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From: Tom Lendacky <thomas.lendacky@amd.com>
To: Paolo Bonzini <pbonzini@redhat.com>,
	Lai Jiangshan <laijs@linux.alibaba.com>,
	linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Cc: stable@vger.kernel.org
Subject: Re: [PATCH] KVM: MMU: shadow nested paging does not have PKU
Date: Mon, 29 Nov 2021 13:08:22 -0600	[thread overview]
Message-ID: <9f56fc4c-9842-a125-0f95-c32e248b677c@amd.com> (raw)
In-Reply-To: <b5e2c332-59a8-7fa8-5e59-4cb2e5be3b8d@redhat.com>

On 11/27/21 4:25 AM, Paolo Bonzini wrote:
> On 11/27/21 02:21, Lai Jiangshan wrote:
>>
>>
>> On 2021/11/26 21:21, Paolo Bonzini wrote:
>>> Initialize the mask for PKU permissions as if CR4.PKE=0, avoiding
>>> incorrect interpretations of the nested hypervisor's page tables.
>>
>> I think the AMD64 volume2 Architecture Programmer’s Manual does not
>> specify it, but it seems that for a sane NPT walk, PKU should not work
>> in NPT.
> 
> The PK bit is not defined in the nested page fault EXITINFO1, too. Thomas, 
> can you have it fixed in the APM that the host's SMEP, SMAP and PKE bits 
> do not affect nested page table walks?
> 

I talked to our documentation folks and they will look to update the APM 
with the appropriate information.

Thanks,
Tom

      reply	other threads:[~2021-11-29 19:10 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-26 13:21 [PATCH] KVM: MMU: shadow nested paging does not have PKU Paolo Bonzini
2021-11-27  1:21 ` Lai Jiangshan
2021-11-27 10:25   ` Paolo Bonzini
2021-11-29 19:08     ` Tom Lendacky [this message]

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