* Re: [PATCH 1/2] arm64: dts: qcom: pmi632: Add vibrator
@ 2024-04-18 10:03 99% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-04-18 10:03 UTC (permalink / raw)
To: Konrad Dybcio, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Fenglin Wu
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel
On Thu Apr 18, 2024 at 12:01 PM CEST, Konrad Dybcio wrote:
> On 18.04.2024 8:36 AM, Luca Weiss wrote:
> > Add a node for the vibrator module found inside the PMI632.
> >
> > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
> > ---
>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
>
> On a side note, this is a totally configuration-free peripheral that doesn't do
> anything crazy until manually configured.
>
> In the slow quest to be (hopefully) more sane about the defaults, should we keep
> them enabled by default? Bjorn?
But many (most?) devices don't have a vibration motor connected to
PMI632, some (like devboards) don't have anything, and other phones have
a separate chip that controls the vibration motor.
Enabling this by default would mean all devices with PMI632 would get an
input device for the vibrator that probably doesn't work?
Regards
Luca
>
> Konrad
^ permalink raw reply [relevance 99%]
* [PATCH 2/2] arm64: dts: qcom: sdm632-fairphone-fp3: Enable vibrator
2024-04-18 6:36 99% [PATCH 0/2] Enable vibrator on PMI632 + Fairphone 3 Luca Weiss
2024-04-18 6:36 99% ` [PATCH 1/2] arm64: dts: qcom: pmi632: Add vibrator Luca Weiss
@ 2024-04-18 6:36 99% ` Luca Weiss
1 sibling, 0 replies; 200+ results
From: Luca Weiss @ 2024-04-18 6:36 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Fenglin Wu
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel, Luca Weiss
Enable the vibrator on the PMI632 which is used on this phone.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts b/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts
index e2708c74e95a..2c1172aa97e4 100644
--- a/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts
+++ b/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts
@@ -143,6 +143,10 @@ &pmi632_vbus {
status = "okay";
};
+&pmi632_vib {
+ status = "okay";
+};
+
&sdhc_1 {
status = "okay";
vmmc-supply = <&pm8953_l8>;
--
2.44.0
^ permalink raw reply related [relevance 99%]
* [PATCH 1/2] arm64: dts: qcom: pmi632: Add vibrator
2024-04-18 6:36 99% [PATCH 0/2] Enable vibrator on PMI632 + Fairphone 3 Luca Weiss
@ 2024-04-18 6:36 99% ` Luca Weiss
2024-04-18 6:36 99% ` [PATCH 2/2] arm64: dts: qcom: sdm632-fairphone-fp3: Enable vibrator Luca Weiss
1 sibling, 1 reply; 200+ results
From: Luca Weiss @ 2024-04-18 6:36 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Fenglin Wu
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel, Luca Weiss
Add a node for the vibrator module found inside the PMI632.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
arch/arm64/boot/dts/qcom/pmi632.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/pmi632.dtsi b/arch/arm64/boot/dts/qcom/pmi632.dtsi
index 94d53b1cf6c8..b4313728f3e7 100644
--- a/arch/arm64/boot/dts/qcom/pmi632.dtsi
+++ b/arch/arm64/boot/dts/qcom/pmi632.dtsi
@@ -200,5 +200,11 @@ pmi632_lpg: pwm {
status = "disabled";
};
+
+ pmi632_vib: vibrator@5700 {
+ compatible = "qcom,pmi632-vib";
+ reg = <0x5700>;
+ status = "disabled";
+ };
};
};
--
2.44.0
^ permalink raw reply related [relevance 99%]
* [PATCH 0/2] Enable vibrator on PMI632 + Fairphone 3
@ 2024-04-18 6:36 99% Luca Weiss
2024-04-18 6:36 99% ` [PATCH 1/2] arm64: dts: qcom: pmi632: Add vibrator Luca Weiss
2024-04-18 6:36 99% ` [PATCH 2/2] arm64: dts: qcom: sdm632-fairphone-fp3: Enable vibrator Luca Weiss
0 siblings, 2 replies; 200+ results
From: Luca Weiss @ 2024-04-18 6:36 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Fenglin Wu
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel, Luca Weiss
With the patches to add vibration support for PMI632 finally applied,
let's enable this for the PMI632 PMIC and Fairphone 3 smartphone.
https://lore.kernel.org/linux-arm-msm/20240416-pm8xxx-vibrator-new-design-v11-0-7b1c951e1515@quicinc.com/
Patches have landed in the input tree:
https://git.kernel.org/pub/scm/linux/kernel/git/dtor/input.git/
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
Luca Weiss (2):
arm64: dts: qcom: pmi632: Add vibrator
arm64: dts: qcom: sdm632-fairphone-fp3: Enable vibrator
arch/arm64/boot/dts/qcom/pmi632.dtsi | 6 ++++++
arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts | 4 ++++
2 files changed, 10 insertions(+)
---
base-commit: eecc5d90861b551d3b8fbd0d0e6f25c40496f3c0
change-id: 20240418-fp3-vibra-18c400889853
Best regards,
--
Luca Weiss <luca.weiss@fairphone.com>
^ permalink raw reply [relevance 99%]
* Re: [PATCH v1] arm64: dts: qcom: sc7280: Remove CTS/RTS configuration
@ 2024-04-16 11:38 98% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-04-16 11:38 UTC (permalink / raw)
To: Viken Dadhaniya, cros-qcom-dts-watchers, andersson,
konrad.dybcio, swboyd, robh, krzk+dt, linux-arm-msm, conor+dt,
devicetree, linux-kernel, rajpat, mka, rojay
Cc: quic_msavaliy, quic_anupkulk
On Tue Apr 16, 2024 at 12:56 PM CEST, Viken Dadhaniya wrote:
> Remove CTS and RTS pinctrl configuration for UART5 node as
> it's designed for debug UART for all the board variants of the
> sc7280 chipset.
>
> Also change compatible string to debug UART.
This change has little to do with the SoC design though and is dependent
on the usage on a given board, right? Also the QCM6490 datasheet
mentions gpio21 & gpio22 can be used for UART_CTS and UART_RFR.
But at least consistency-wise this change makes sense, in practically
all other SoCs one UART is marked as geni-debug-uart.
But with this patch you should then also remove some overrides that are
placed in various boards already?
arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts: compatible = "qcom,geni-debug-uart";
arch/arm64/boot/dts/qcom/qcm6490-idp.dts: compatible = "qcom,geni-debug-uart";
arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts: compatible = "qcom,geni-debug-uart";
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi: compatible = "qcom,geni-debug-uart";
arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi: compatible = "qcom,geni-debug-uart";
Regards
Luca
>
> Fixes: 38cd93f413fd ("arm64: dts: qcom: sc7280: Update QUPv3 UART5 DT node")
> Signed-off-by: Viken Dadhaniya <quic_vdadhani@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 14 ++------------
> 1 file changed, 2 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 38c183b2bb26..2a6b4c4639d1 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -1440,12 +1440,12 @@
> };
>
> uart5: serial@994000 {
> - compatible = "qcom,geni-uart";
> + compatible = "qcom,geni-debug-uart";
> reg = <0 0x00994000 0 0x4000>;
> clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
> clock-names = "se";
> pinctrl-names = "default";
> - pinctrl-0 = <&qup_uart5_cts>, <&qup_uart5_rts>, <&qup_uart5_tx>, <&qup_uart5_rx>;
> + pinctrl-0 = <&qup_uart5_tx>, <&qup_uart5_rx>;
> interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
> power-domains = <&rpmhpd SC7280_CX>;
> operating-points-v2 = <&qup_opp_table>;
> @@ -5397,16 +5397,6 @@
> function = "qup04";
> };
>
> - qup_uart5_cts: qup-uart5-cts-state {
> - pins = "gpio20";
> - function = "qup05";
> - };
> -
> - qup_uart5_rts: qup-uart5-rts-state {
> - pins = "gpio21";
> - function = "qup05";
> - };
> -
> qup_uart5_tx: qup-uart5-tx-state {
> pins = "gpio22";
> function = "qup05";
^ permalink raw reply [relevance 98%]
* Re: [PATCH] Bluetooth: Add more Bluetooth version defines
2024-02-16 13:22 97% [PATCH] Bluetooth: Add more Bluetooth version defines Luca Weiss
@ 2024-04-12 14:23 99% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-04-12 14:23 UTC (permalink / raw)
To: Luca Weiss, Marcel Holtmann, Johan Hedberg,
Luiz Augusto von Dentz, David S. Miller, Eric Dumazet,
Jakub Kicinski, Paolo Abeni
Cc: ~postmarketos/upstreaming, linux-bluetooth, netdev, linux-kernel,
phone-devel
On Fri Feb 16, 2024 at 2:22 PM CET, Luca Weiss wrote:
> Add the various Bluetooth version identifiers found in the "Assigned
> Numbers" document[0] from the Bluetooth SIG.
>
> [0] https://www.bluetooth.com/specifications/assigned-numbers/
Hi all,
Is there any interest in this patch? Would be nice to get at least a
positive or negative reaction to it.
Regards
Luca
>
> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
> ---
> To be clear, I don't have a use case for these extra defines myself but
> some time ago when working on Bluetooth I came across this and thought
> it would be interesting to have the list complete. No other motives.
> ---
> include/net/bluetooth/bluetooth.h | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/include/net/bluetooth/bluetooth.h b/include/net/bluetooth/bluetooth.h
> index 7ffa8c192c3f..818eb142eda3 100644
> --- a/include/net/bluetooth/bluetooth.h
> +++ b/include/net/bluetooth/bluetooth.h
> @@ -39,11 +39,20 @@
> #endif
>
> /* Bluetooth versions */
> +#define BLUETOOTH_VER_1_0B 0
> #define BLUETOOTH_VER_1_1 1
> #define BLUETOOTH_VER_1_2 2
> #define BLUETOOTH_VER_2_0 3
> #define BLUETOOTH_VER_2_1 4
> +#define BLUETOOTH_VER_3_0 5
> #define BLUETOOTH_VER_4_0 6
> +#define BLUETOOTH_VER_4_1 7
> +#define BLUETOOTH_VER_4_2 8
> +#define BLUETOOTH_VER_5_0 9
> +#define BLUETOOTH_VER_5_1 10
> +#define BLUETOOTH_VER_5_2 11
> +#define BLUETOOTH_VER_5_3 12
> +#define BLUETOOTH_VER_5_4 13
>
> /* Reserv for core and drivers use */
> #define BT_SKB_RESERVE 8
>
> ---
> base-commit: 841c35169323cd833294798e58b9bf63fa4fa1de
> change-id: 20240216-bluetooth-defines-b810ce543191
>
> Best regards,
^ permalink raw reply [relevance 99%]
* [PATCH v2] dt-bindings: mfd: qcom,spmi-pmic: Add pbs to SPMI device types
@ 2024-04-12 14:22 97% Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-04-12 14:22 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Lee Jones, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Stephen Boyd, Catalin Marinas,
Will Deacon
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel, linux-arm-kernel, Luca Weiss
Add the PBS (Programmable Boot Sequencer) to the list of devices.
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
Changes in v2:
- Pick up tags
- Rebase on linux-next, drop merged patches
- Link to v1: https://lore.kernel.org/r/20240205-pmi632-ppg-v1-0-e236c95a2099@fairphone.com
---
Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml
index 8103fb61a16c..b7f01cbb8fff 100644
--- a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml
+++ b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml
@@ -160,6 +160,10 @@ patternProperties:
type: object
$ref: /schemas/nvmem/qcom,spmi-sdam.yaml#
+ "^pbs@[0-9a-f]+$":
+ type: object
+ $ref: /schemas/soc/qcom/qcom,pbs.yaml#
+
"phy@[0-9a-f]+$":
type: object
$ref: /schemas/phy/qcom,snps-eusb2-repeater.yaml#
---
base-commit: fa8c2b5f446d6e8ff4bc8f67ba944b1be3aad790
change-id: 20240117-pmi632-ppg-f1efb4318722
Best regards,
--
Luca Weiss <luca.weiss@fairphone.com>
^ permalink raw reply related [relevance 97%]
* [PATCH v2] media: dt-bindings: qcom,sc7280-venus: Allow one IOMMU entry
@ 2024-04-12 14:19 96% Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-04-12 14:19 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Stanimir Varbanov,
Vikash Garodia, Bryan O'Donoghue, Mauro Carvalho Chehab,
Conor Dooley, Rob Herring, Krzysztof Kozlowski
Cc: ~postmarketos/upstreaming, phone-devel, Stanimir Varbanov,
linux-arm-msm, linux-media, devicetree, linux-kernel,
Krzysztof Kozlowski, Luca Weiss
Some SC7280-based boards crash when providing the "secure_non_pixel"
context bank, so allow only one iommu in the bindings also.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
Reference:
https://lore.kernel.org/linux-arm-msm/20231201-sc7280-venus-pas-v3-2-bc132dc5fc30@fairphone.com/
---
Changes in v2:
- Pick up tags
- Otherwise just a resend, v1 was sent in January
- Link to v1: https://lore.kernel.org/r/20240129-sc7280-venus-bindings-v1-1-20a9ba194c60@fairphone.com
---
Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml b/Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml
index 8f9b6433aeb8..10c334e6b3dc 100644
--- a/Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml
+++ b/Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml
@@ -43,6 +43,7 @@ properties:
- const: vcodec_bus
iommus:
+ minItems: 1
maxItems: 2
interconnects:
---
base-commit: 9ed46da14b9b9b2ad4edb3b0c545b6dbe5c00d39
change-id: 20240129-sc7280-venus-bindings-6e62a99620de
Best regards,
--
Luca Weiss <luca.weiss@fairphone.com>
^ permalink raw reply related [relevance 96%]
* Re: [PATCH 2/4] clk: qcom: dispcc-sm6350: fix DisplayPort clocks
@ 2024-04-11 11:33 99% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-04-11 11:33 UTC (permalink / raw)
To: Dmitry Baryshkov, Bjorn Andersson, Michael Turquette,
Stephen Boyd, Konrad Dybcio, Konrad Dybcio, Neil Armstrong
Cc: linux-arm-msm, linux-clk, linux-kernel
On Mon Apr 8, 2024 at 1:47 PM CEST, Dmitry Baryshkov wrote:
> On SM6350 DisplayPort link clocks use frequency tables inherited from
> the vendor kernel, it is not applicable in the upstream kernel. Drop
> frequency tables and use clk_byte2_ops for those clocks.
>
> Fixes: 837519775f1d ("clk: qcom: Add display clock controller driver for SM6350")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Appears to fix this non-critical error when enabling DisplayPort.
msm-dp-display ae90000.displayport-controller: _opp_config_clk_single: failed to set clock rate: -22
And DisplayPort (over USB-C) continues to work as expected, thanks!
Tested-by: Luca Weiss <luca.weiss@fairphone.com>
For completeness, I wrote something about this also on #linux-msm IRC on
March 22nd.
> Hi, I'm trying to get displayport to work on sm6350 but hitting a
> weird issue regarding link clk frequency. For the requested link
> rate=540000 in dp_ctrl_enable_mainlink_clocks we call
> dev_pm_opp_set_rate with target_freq=540000000 (clk name:
> disp_cc_mdss_dp_link_clk) but the clk_round_rate there makes this into
> freq=810000 and subsequently qmp_dp_link_clk_determine_rate fails
> because that's not a valid frequency, only for example 810000000.
> Without any debug statements the visible error in kernel log is:
> "msm-dp-display ae90000.displayport-controller:
> _opp_config_clk_single: failed to set clock rate: -22"
>
> So somewhere there seems to be confusion between how many zeroes
> should be where.. But not sure how this is working on other SoCs, I
> don't see anything much different for my SoC
>
> Kernel base is 6.8.1 fwiw
>
> clk_round_rate behavior feels correct as
> ftbl_disp_cc_mdss_dp_link_clk_src lists the frequencies as
> 162000/270000/540000/810000 so it rounds it to the highest available
> frequency of the clock
Regards
Luca
> ---
> drivers/clk/qcom/dispcc-sm6350.c | 11 +----------
> 1 file changed, 1 insertion(+), 10 deletions(-)
>
> diff --git a/drivers/clk/qcom/dispcc-sm6350.c b/drivers/clk/qcom/dispcc-sm6350.c
> index 839435362010..e4b7464c4d0e 100644
> --- a/drivers/clk/qcom/dispcc-sm6350.c
> +++ b/drivers/clk/qcom/dispcc-sm6350.c
> @@ -221,26 +221,17 @@ static struct clk_rcg2 disp_cc_mdss_dp_crypto_clk_src = {
> },
> };
>
> -static const struct freq_tbl ftbl_disp_cc_mdss_dp_link_clk_src[] = {
> - F(162000, P_DP_PHY_PLL_LINK_CLK, 1, 0, 0),
> - F(270000, P_DP_PHY_PLL_LINK_CLK, 1, 0, 0),
> - F(540000, P_DP_PHY_PLL_LINK_CLK, 1, 0, 0),
> - F(810000, P_DP_PHY_PLL_LINK_CLK, 1, 0, 0),
> - { }
> -};
> -
> static struct clk_rcg2 disp_cc_mdss_dp_link_clk_src = {
> .cmd_rcgr = 0x10f8,
> .mnd_width = 0,
> .hid_width = 5,
> .parent_map = disp_cc_parent_map_0,
> - .freq_tbl = ftbl_disp_cc_mdss_dp_link_clk_src,
> .clkr.hw.init = &(struct clk_init_data){
> .name = "disp_cc_mdss_dp_link_clk_src",
> .parent_data = disp_cc_parent_data_0,
> .num_parents = ARRAY_SIZE(disp_cc_parent_data_0),
> .flags = CLK_SET_RATE_PARENT | CLK_GET_RATE_NOCACHE,
> - .ops = &clk_rcg2_ops,
> + .ops = &clk_byte2_ops,
> },
> };
>
^ permalink raw reply [relevance 99%]
* Re: [PATCH v2] dt-bindings: usb: add common Type-C USB Switch schema
@ 2024-04-11 7:35 98% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-04-11 7:35 UTC (permalink / raw)
To: Krzysztof Kozlowski, Greg Kroah-Hartman, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson,
Konrad Dybcio, Neil Armstrong, linux-usb, devicetree,
linux-kernel, linux-arm-msm
On Thu Apr 11, 2024 at 9:25 AM CEST, Krzysztof Kozlowski wrote:
> On 11/04/2024 09:13, Luca Weiss wrote:
> > On Mon Jan 22, 2024 at 10:44 AM CET, Krzysztof Kozlowski wrote:
> >> Several bindings implement parts of Type-C USB orientation and mode
> >> switching, and retiming. Keep definition of such properties in one
> >> place, new usb-switch schema, to avoid duplicate defines.
> >>
> >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> >>
> >> ---
> >>
> >> Changes in v2:
> >> 1. Fix language typos handle->handler (Luca)
> >> 2. Drop debugging left-over (Luca)
> >> ---
> >> .../devicetree/bindings/usb/fcs,fsa4480.yaml | 12 ++--
> >> .../devicetree/bindings/usb/gpio-sbu-mux.yaml | 12 ++--
> >> .../devicetree/bindings/usb/nxp,ptn36502.yaml | 12 ++--
> >> .../bindings/usb/onnn,nb7vpq904m.yaml | 13 ++--
> >> .../bindings/usb/qcom,wcd939x-usbss.yaml | 12 ++--
> >> .../devicetree/bindings/usb/usb-switch.yaml | 67 +++++++++++++++++++
> >> 6 files changed, 92 insertions(+), 36 deletions(-)
> >> create mode 100644 Documentation/devicetree/bindings/usb/usb-switch.yaml
> >>
> >> diff --git a/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml b/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml
> >> index f9410eb76a62..8b25b9a01ced 100644
> >> --- a/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml
> >> +++ b/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml
> >> @@ -27,13 +27,8 @@ properties:
> >> vcc-supply:
> >> description: power supply (2.7V-5.5V)
> >>
> >> - mode-switch:
> >> - description: Flag the port as possible handle of altmode switching
> >> - type: boolean
> >> -
> >> - orientation-switch:
> >> - description: Flag the port as possible handler of orientation switching
> >> - type: boolean
> >> + mode-switch: true
> >> + orientation-switch: true
> >>
> >> port:
> >> $ref: /schemas/graph.yaml#/$defs/port-base
> >> @@ -79,6 +74,9 @@ required:
> >> - reg
> >> - port
> >>
> >> +allOf:
> >> + - $ref: usb-switch.yaml#
> >> +
> >> additionalProperties: false
> >>
> >> examples:
> >
> > Hi Krzysztof,
> >
> > This patch seems to break validation for fsa4480 if data-lanes is set in
> > the endpoint like the following
> >
> > diff --git a/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml b/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml
> > index f9410eb76a62..3aa03fd65556 100644
> > --- a/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml
> > +++ b/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml
> > @@ -102,6 +102,7 @@ examples:
> > port {
> > fsa4480_ept: endpoint {
> > remote-endpoint = <&typec_controller>;
> > + data-lanes = <0 1>;
> > };
> > };
> > };
> >
> > Similar to how it's already used on qcom/qcm6490-fairphone-fp5.dts
> >
> > I'm guessing the 'port' definition in the common schema somehow
> > disallows the fsa4480 schema from describing it further?
>
> There is no such code in qcm6490-fairphone-fp5.dts. There was no such
> code in the example of fsa4480 when I was testing my changes (and
> examples should be complete), so this did not pop up.
Right, I'm sorry this is just out-of-tree for now, I've forgotten this.
There's some dependency chain with some unsupported DSC configuration in
DPU for now that blocks upstreaming this.
My tree with these patches is here if you want to take a look:
https://github.com/sc7280-mainline/linux/blob/sc7280-6.8.y/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts#L628
>
> You right, new schema does not allow extending the port. However the
> true question is, why muxing happens on the port to the SoC controller?
> The graph in commit msg fad89aa14 shows it happens on the side of the
> connector.
>
> Looks like fsa4480 mixes connector with the controller.
Could be honestly.. I trust you with knowing better how the ports are
supposed to work.
The property is for telling the fsa4480 driver that essentially the
hardware is wired up the reverse way. So with this info the driver can
handle the orientation switching correctly.
There's another layer to this as explained in the patches there that the
OCP96011 essentially works reversed compared to FSA4480, that's why it's
all a bit of a mess.
Regards
Luca
>
> Best regards,
> Krzysztof
^ permalink raw reply [relevance 98%]
* Re: [PATCH v2] dt-bindings: usb: add common Type-C USB Switch schema
@ 2024-04-11 7:13 99% ` Luca Weiss
0 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-04-11 7:13 UTC (permalink / raw)
To: Krzysztof Kozlowski, Greg Kroah-Hartman, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson,
Konrad Dybcio, Neil Armstrong, linux-usb, devicetree,
linux-kernel, linux-arm-msm
On Mon Jan 22, 2024 at 10:44 AM CET, Krzysztof Kozlowski wrote:
> Several bindings implement parts of Type-C USB orientation and mode
> switching, and retiming. Keep definition of such properties in one
> place, new usb-switch schema, to avoid duplicate defines.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>
> ---
>
> Changes in v2:
> 1. Fix language typos handle->handler (Luca)
> 2. Drop debugging left-over (Luca)
> ---
> .../devicetree/bindings/usb/fcs,fsa4480.yaml | 12 ++--
> .../devicetree/bindings/usb/gpio-sbu-mux.yaml | 12 ++--
> .../devicetree/bindings/usb/nxp,ptn36502.yaml | 12 ++--
> .../bindings/usb/onnn,nb7vpq904m.yaml | 13 ++--
> .../bindings/usb/qcom,wcd939x-usbss.yaml | 12 ++--
> .../devicetree/bindings/usb/usb-switch.yaml | 67 +++++++++++++++++++
> 6 files changed, 92 insertions(+), 36 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/usb/usb-switch.yaml
>
> diff --git a/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml b/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml
> index f9410eb76a62..8b25b9a01ced 100644
> --- a/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml
> +++ b/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml
> @@ -27,13 +27,8 @@ properties:
> vcc-supply:
> description: power supply (2.7V-5.5V)
>
> - mode-switch:
> - description: Flag the port as possible handle of altmode switching
> - type: boolean
> -
> - orientation-switch:
> - description: Flag the port as possible handler of orientation switching
> - type: boolean
> + mode-switch: true
> + orientation-switch: true
>
> port:
> $ref: /schemas/graph.yaml#/$defs/port-base
> @@ -79,6 +74,9 @@ required:
> - reg
> - port
>
> +allOf:
> + - $ref: usb-switch.yaml#
> +
> additionalProperties: false
>
> examples:
Hi Krzysztof,
This patch seems to break validation for fsa4480 if data-lanes is set in
the endpoint like the following
diff --git a/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml b/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml
index f9410eb76a62..3aa03fd65556 100644
--- a/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml
+++ b/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml
@@ -102,6 +102,7 @@ examples:
port {
fsa4480_ept: endpoint {
remote-endpoint = <&typec_controller>;
+ data-lanes = <0 1>;
};
};
};
Similar to how it's already used on qcom/qcm6490-fairphone-fp5.dts
I'm guessing the 'port' definition in the common schema somehow
disallows the fsa4480 schema from describing it further?
Regards
Luca
> diff --git a/Documentation/devicetree/bindings/usb/gpio-sbu-mux.yaml b/Documentation/devicetree/bindings/usb/gpio-sbu-mux.yaml
> index d3b2b666ec2a..88e1607cf053 100644
> --- a/Documentation/devicetree/bindings/usb/gpio-sbu-mux.yaml
> +++ b/Documentation/devicetree/bindings/usb/gpio-sbu-mux.yaml
> @@ -33,13 +33,8 @@ properties:
> vcc-supply:
> description: power supply
>
> - mode-switch:
> - description: Flag the port as possible handle of altmode switching
> - type: boolean
> -
> - orientation-switch:
> - description: Flag the port as possible handler of orientation switching
> - type: boolean
> + mode-switch: true
> + orientation-switch: true
>
> port:
> $ref: /schemas/graph.yaml#/properties/port
> @@ -54,6 +49,9 @@ required:
> - orientation-switch
> - port
>
> +allOf:
> + - $ref: usb-switch.yaml#
> +
> additionalProperties: false
>
> examples:
> diff --git a/Documentation/devicetree/bindings/usb/nxp,ptn36502.yaml b/Documentation/devicetree/bindings/usb/nxp,ptn36502.yaml
> index eee548ac1abe..d805dde80796 100644
> --- a/Documentation/devicetree/bindings/usb/nxp,ptn36502.yaml
> +++ b/Documentation/devicetree/bindings/usb/nxp,ptn36502.yaml
> @@ -20,13 +20,8 @@ properties:
> vdd18-supply:
> description: Power supply for VDD18 pin
>
> - retimer-switch:
> - description: Flag the port as possible handle of SuperSpeed signals retiming
> - type: boolean
> -
> - orientation-switch:
> - description: Flag the port as possible handler of orientation switching
> - type: boolean
> + orientation-switch: true
> + retimer-switch: true
>
> ports:
> $ref: /schemas/graph.yaml#/properties/ports
> @@ -49,6 +44,9 @@ required:
> - compatible
> - reg
>
> +allOf:
> + - $ref: usb-switch.yaml#
> +
> additionalProperties: false
>
> examples:
> diff --git a/Documentation/devicetree/bindings/usb/onnn,nb7vpq904m.yaml b/Documentation/devicetree/bindings/usb/onnn,nb7vpq904m.yaml
> index c0201da002f6..589914d22bf2 100644
> --- a/Documentation/devicetree/bindings/usb/onnn,nb7vpq904m.yaml
> +++ b/Documentation/devicetree/bindings/usb/onnn,nb7vpq904m.yaml
> @@ -21,14 +21,8 @@ properties:
> description: power supply (1.8V)
>
> enable-gpios: true
> -
> - retimer-switch:
> - description: Flag the port as possible handle of SuperSpeed signals retiming
> - type: boolean
> -
> - orientation-switch:
> - description: Flag the port as possible handler of orientation switching
> - type: boolean
> + orientation-switch: true
> + retimer-switch: true
>
> ports:
> $ref: /schemas/graph.yaml#/properties/ports
> @@ -95,6 +89,9 @@ required:
> - compatible
> - reg
>
> +allOf:
> + - $ref: usb-switch.yaml#
> +
> additionalProperties: false
>
> examples:
> diff --git a/Documentation/devicetree/bindings/usb/qcom,wcd939x-usbss.yaml b/Documentation/devicetree/bindings/usb/qcom,wcd939x-usbss.yaml
> index 7ddfd3313a18..96346723f3e9 100644
> --- a/Documentation/devicetree/bindings/usb/qcom,wcd939x-usbss.yaml
> +++ b/Documentation/devicetree/bindings/usb/qcom,wcd939x-usbss.yaml
> @@ -35,13 +35,8 @@ properties:
> vdd-supply:
> description: USBSS VDD power supply
>
> - mode-switch:
> - description: Flag the port as possible handle of altmode switching
> - type: boolean
> -
> - orientation-switch:
> - description: Flag the port as possible handler of orientation switching
> - type: boolean
> + mode-switch: true
> + orientation-switch: true
>
> ports:
> $ref: /schemas/graph.yaml#/properties/ports
> @@ -63,6 +58,9 @@ required:
> - reg
> - ports
>
> +allOf:
> + - $ref: usb-switch.yaml#
> +
> additionalProperties: false
>
> examples:
> diff --git a/Documentation/devicetree/bindings/usb/usb-switch.yaml b/Documentation/devicetree/bindings/usb/usb-switch.yaml
> new file mode 100644
> index 000000000000..da76118e73a5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/usb-switch.yaml
> @@ -0,0 +1,67 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/usb/usb-switch.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: USB Orientation and Mode Switches Common Properties
> +
> +maintainers:
> + - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
> +
> +description:
> + Common properties for devices handling USB mode and orientation switching.
> +
> +properties:
> + mode-switch:
> + description: Possible handler of altmode switching
> + type: boolean
> +
> + orientation-switch:
> + description: Possible handler of orientation switching
> + type: boolean
> +
> + retimer-switch:
> + description: Possible handler of SuperSpeed signals retiming
> + type: boolean
> +
> + port:
> + $ref: /schemas/graph.yaml#/properties/port
> + description:
> + A port node to link the device to a TypeC controller for the purpose of
> + handling altmode muxing and orientation switching.
> +
> + ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> + properties:
> + port@0:
> + $ref: /schemas/graph.yaml#/properties/port
> + description:
> + Super Speed (SS) Output endpoint to the Type-C connector
> +
> + port@1:
> + $ref: /schemas/graph.yaml#/$defs/port-base
> + description:
> + Super Speed (SS) Input endpoint from the Super-Speed PHY
> + unevaluatedProperties: false
> +
> + properties:
> + endpoint:
> + $ref: /schemas/graph.yaml#/$defs/endpoint-base
> + unevaluatedProperties: false
> + properties:
> + data-lanes:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + minItems: 1
> + maxItems: 8
> + uniqueItems: true
> + items:
> + maximum: 8
> +
> +oneOf:
> + - required:
> + - port
> + - required:
> + - ports
> +
> +additionalProperties: true
^ permalink raw reply related [relevance 99%]
* [PATCH] arm64: dts: qcom: qcm6490-fairphone-fp5: Add USB-C orientation GPIO
@ 2024-04-11 7:06 98% Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-04-11 7:06 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Dmitry Baryshkov
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel, Luca Weiss
Define the USB-C orientation GPIOs so that the USB-C ports orientation
is known without having to resort to the altmode notifications.
On PCB level this is the signal from PM7250B (pin CC_OUT) which is
called USB_PHY_PS.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
Depends on (for bindings): https://lore.kernel.org/linux-arm-msm/20240409-hdk-orientation-gpios-v2-0-658efd993987@linaro.org/
---
arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts b/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
index 4ff9fc24e50e..f3432701945f 100644
--- a/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
+++ b/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
@@ -77,6 +77,8 @@ pmic-glink {
#address-cells = <1>;
#size-cells = <0>;
+ orientation-gpios = <&tlmm 140 GPIO_ACTIVE_HIGH>;
+
connector@0 {
compatible = "usb-c-connector";
reg = <0>;
---
base-commit: 65b0418f6e86eef0f62fc053fb3622fbaa3e506e
change-id: 20240411-fp5-usb-c-gpio-afd22741adcd
Best regards,
--
Luca Weiss <luca.weiss@fairphone.com>
^ permalink raw reply related [relevance 98%]
* [PATCH v2 2/2] ARM: dts: qcom: msm8974-hammerhead: Update gpio hog node name
2024-04-09 18:36 87% [PATCH v2 0/2] Allow gpio-hog nodes in qcom,pmic-gpio bindings (& dt fixup) Luca Weiss
2024-04-09 18:36 86% ` [PATCH v2 1/2] dt-bindings: pinctrl: qcom,pmic-gpio: Allow gpio-hog nodes Luca Weiss
@ 2024-04-09 18:36 87% ` Luca Weiss
1 sibling, 0 replies; 200+ results
From: Luca Weiss @ 2024-04-09 18:36 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Linus Walleij, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Konrad Dybcio
Cc: linux-arm-msm, linux-gpio, devicetree, linux-kernel, Luca Weiss
Follow the gpio-hog bindings and use otg-hog as node name.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts
index 4aaae8537a3f..06549051be50 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts
+++ b/arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts
@@ -328,7 +328,7 @@ wlan_regulator_pin: wl-reg-active-state {
power-source = <PM8941_GPIO_S3>;
};
- otg {
+ otg-hog {
gpio-hog;
gpios = <35 GPIO_ACTIVE_HIGH>;
output-high;
--
2.44.0
^ permalink raw reply related [relevance 87%]
* [PATCH v2 0/2] Allow gpio-hog nodes in qcom,pmic-gpio bindings (& dt fixup)
@ 2024-04-09 18:36 87% Luca Weiss
2024-04-09 18:36 86% ` [PATCH v2 1/2] dt-bindings: pinctrl: qcom,pmic-gpio: Allow gpio-hog nodes Luca Weiss
2024-04-09 18:36 87% ` [PATCH v2 2/2] ARM: dts: qcom: msm8974-hammerhead: Update gpio hog node name Luca Weiss
0 siblings, 2 replies; 200+ results
From: Luca Weiss @ 2024-04-09 18:36 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Linus Walleij, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Konrad Dybcio
Cc: linux-arm-msm, linux-gpio, devicetree, linux-kernel, Luca Weiss
Resolve the dt validation failure on Nexus 5.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Changes in v2:
- Use simpler regex from tlmm bindings (Krzysztof)
- Link to v1: https://lore.kernel.org/r/20240408-qcom-pmic-gpio-hog-v1-0-f61fc5323110@z3ntu.xyz
---
Luca Weiss (2):
dt-bindings: pinctrl: qcom,pmic-gpio: Allow gpio-hog nodes
ARM: dts: qcom: msm8974-hammerhead: Update gpio hog node name
.../devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml | 12 ++++++++++++
.../arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts | 2 +-
2 files changed, 13 insertions(+), 1 deletion(-)
---
base-commit: 8568bb2ccc278f344e6ac44af6ed010a90aa88dc
change-id: 20240408-qcom-pmic-gpio-hog-2b4c5f103126
Best regards,
--
Luca Weiss <luca@z3ntu.xyz>
^ permalink raw reply [relevance 87%]
* [PATCH v2 1/2] dt-bindings: pinctrl: qcom,pmic-gpio: Allow gpio-hog nodes
2024-04-09 18:36 87% [PATCH v2 0/2] Allow gpio-hog nodes in qcom,pmic-gpio bindings (& dt fixup) Luca Weiss
@ 2024-04-09 18:36 86% ` Luca Weiss
2024-04-09 18:36 87% ` [PATCH v2 2/2] ARM: dts: qcom: msm8974-hammerhead: Update gpio hog node name Luca Weiss
1 sibling, 0 replies; 200+ results
From: Luca Weiss @ 2024-04-09 18:36 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Linus Walleij, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Konrad Dybcio
Cc: linux-arm-msm, linux-gpio, devicetree, linux-kernel, Luca Weiss
Allow specifying a GPIO hog, as already used on
qcom-msm8974-lge-nexus5-hammerhead.dts.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
.../devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml
index a786357ed1af..bd9471de0c69 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml
@@ -424,6 +424,10 @@ patternProperties:
$ref: "#/$defs/qcom-pmic-gpio-state"
additionalProperties: false
+ "-hog(-[0-9]+)?$":
+ required:
+ - gpio-hog
+
$defs:
qcom-pmic-gpio-state:
type: object
@@ -571,6 +575,7 @@ $defs:
examples:
- |
+ #include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
pm8921_gpio: gpio@150 {
@@ -594,5 +599,12 @@ examples:
power-source = <PM8921_GPIO_S4>;
};
};
+
+ otg-hog {
+ gpio-hog;
+ gpios = <35 GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "otg-gpio";
+ };
};
...
--
2.44.0
^ permalink raw reply related [relevance 86%]
* Re: [PATCH 0/3] Fix up qcom,halt-regs definition in various schemas
@ 2024-04-09 18:32 88% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-04-09 18:32 UTC (permalink / raw)
To: Rob Herring
Cc: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Mathieu Poirier, Krzysztof Kozlowski, Conor Dooley,
linux-arm-msm, linux-remoteproc, devicetree, linux-kernel
On Dienstag, 9. April 2024 17:10:41 CEST Rob Herring wrote:
> On Sun, Apr 07, 2024 at 11:58:29AM +0200, Luca Weiss wrote:
> > The original motivation is that a bunch of other schemas fail to
> > validate qcom,halt-regs, for example like in the following examples:
> >
> > arch/arm64/boot/dts/qcom/apq8016-sbc.dtb: remoteproc@4080000: qcom,halt-regs:0: [20] is too short
> > from schema $id: http://devicetree.org/schemas/remoteproc/qcom,msm8916-mss-pil.yaml#
> > arch/arm64/boot/dts/qcom/apq8096-ifc6640.dtb: remoteproc@2080000: qcom,halt-regs:0: [82] is too short
> > from schema $id: http://devicetree.org/schemas/remoteproc/qcom,msm8996-mss-pil.yaml#
> > arch/arm64/boot/dts/qcom/apq8039-t2.dtb: remoteproc@4080000: qcom,halt-regs:0: [32] is too short
> > from schema $id: http://devicetree.org/schemas/remoteproc/qcom,msm8916-mss-pil.yaml#
> >
> > While I'm actually not quite sure why these patches fix this in
> > the other schemas - feels like a bug/limitation in dt-schema maybe? -
>
> Was this with v2024.02? It should be a bit better there. Though it
> may just have different errors. The limitation is that property
> types and in the case of matrix's (which phandle-array actually is)
> range for dimensions are global. So if there's not correct dimensions
> for a property, the tools aren't going to decode it properly.
You're right, I doesn't look like I can reproduce this with the latest
dtschema installed.
Anyways these patches should be good to actually validate qcom,halt-regs for
the schemas I'm touching here.
Regards
Luca
>
> Rob
>
^ permalink raw reply [relevance 88%]
* [PATCH 1/2] dt-bindings: mailbox: qcom: Add MSM8974 APCS compatible
2024-04-08 19:32 87% [PATCH 0/2] Fix msm8974 apcs syscon compatible Luca Weiss
@ 2024-04-08 19:32 87% ` Luca Weiss
2024-04-08 19:32 78% ` [PATCH 2/2] ARM: dts: qcom: msm8974: Use proper compatible for APCS syscon Luca Weiss
1 sibling, 0 replies; 200+ results
From: Luca Weiss @ 2024-04-08 19:32 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Jassi Brar, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson,
Konrad Dybcio, Matthias Brugger, AngeloGioacchino Del Regno,
Jacky Huang, Shan-Chun Hung
Cc: linux-arm-msm, linux-kernel, devicetree, linux-arm-kernel,
linux-mediatek, Luca Weiss
Add compatible for the Qualcomm MSM8974 APCS block.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml
index 79eb523b8436..982c741e6225 100644
--- a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml
+++ b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml
@@ -30,6 +30,7 @@ properties:
- const: syscon
- items:
- enum:
+ - qcom,msm8974-apcs-kpss-global
- qcom,msm8976-apcs-kpss-global
- const: qcom,msm8994-apcs-kpss-global
- const: syscon
--
2.44.0
^ permalink raw reply related [relevance 87%]
* [PATCH 2/2] ARM: dts: qcom: msm8974: Use proper compatible for APCS syscon
2024-04-08 19:32 87% [PATCH 0/2] Fix msm8974 apcs syscon compatible Luca Weiss
2024-04-08 19:32 87% ` [PATCH 1/2] dt-bindings: mailbox: qcom: Add MSM8974 APCS compatible Luca Weiss
@ 2024-04-08 19:32 78% ` Luca Weiss
1 sibling, 0 replies; 200+ results
From: Luca Weiss @ 2024-04-08 19:32 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Jassi Brar, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson,
Konrad Dybcio, Matthias Brugger, AngeloGioacchino Del Regno,
Jacky Huang, Shan-Chun Hung
Cc: linux-arm-msm, linux-kernel, devicetree, linux-arm-kernel,
linux-mediatek, Luca Weiss
Use the apcs-kpss-global compatible for the APCS global mailbox block
found on this SoC.
This also resolves a dt-binding checker warning:
arch/arm/boot/dts/qcom/qcom-msm8974pro-fairphone-fp2.dtb: syscon@f9011000: compatible: 'anyOf' conditional failed, one must be fixed:
['syscon'] is too short
'syscon' is not one of ['allwinner,sun8i-a83t-system-controller', 'allwinner,sun8i-h3-system-controller', 'allwinner,sun8i-v3s-system-controller', 'allwinner,sun50i-a64-system-controller', 'amd,pensando-elba-syscon', 'brcm,cru-clkset', 'freecom,fsg-cs2-system-controller', 'fsl,imx93-aonmix-ns-syscfg', 'fsl,imx93-wakeupmix-syscfg', 'hisilicon,dsa-subctrl', 'hisilicon,hi6220-sramctrl', 'hisilicon,pcie-sas-subctrl', 'hisilicon,peri-subctrl', 'hpe,gxp-sysreg', 'intel,lgm-syscon', 'loongson,ls1b-syscon', 'loongson,ls1c-syscon', 'marvell,armada-3700-usb2-host-misc', 'mediatek,mt8135-pctl-a-syscfg', 'mediatek,mt8135-pctl-b-syscfg', 'mediatek,mt8365-syscfg', 'microchip,lan966x-cpu-syscon', 'microchip,sparx5-cpu-syscon', 'mstar,msc313-pmsleep', 'nuvoton,ma35d1-sys', 'nuvoton,wpcm450-shm', 'rockchip,px30-qos', 'rockchip,rk3036-qos', 'rockchip,rk3066-qos', 'rockchip,rk3128-qos', 'rockchip,rk3228-qos', 'rockchip,rk3288-qos', 'rockchip,rk3368-qos', 'rockchip,rk3399-qos', 'rockchip,rk356
8-qos', 'rockchip,rk3588-qos', 'rockchip,rv1126-qos', 'starfive,jh7100-sysmain', 'ti,am62-usb-phy-ctrl', 'ti,am654-dss-oldi-io-ctrl', 'ti,am654-serdes-ctrl', 'ti,j784s4-pcie-ctrl']
from schema $id: http://devicetree.org/schemas/mfd/syscon.yaml#
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
arch/arm/boot/dts/qcom/qcom-msm8974.dtsi | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
index 233d9bf42298..7e0224006b1f 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
@@ -341,9 +341,11 @@ intc: interrupt-controller@f9000000 {
<0xf9002000 0x1000>;
};
- apcs: syscon@f9011000 {
- compatible = "syscon";
+ apcs: mailbox@f9011000 {
+ compatible = "qcom,msm8974-apcs-kpss-global",
+ "qcom,msm8994-apcs-kpss-global", "syscon";
reg = <0xf9011000 0x1000>;
+ #mbox-cells = <1>;
};
saw_l2: power-manager@f9012000 {
--
2.44.0
^ permalink raw reply related [relevance 78%]
* [PATCH 0/2] Fix msm8974 apcs syscon compatible
@ 2024-04-08 19:32 87% Luca Weiss
2024-04-08 19:32 87% ` [PATCH 1/2] dt-bindings: mailbox: qcom: Add MSM8974 APCS compatible Luca Weiss
2024-04-08 19:32 78% ` [PATCH 2/2] ARM: dts: qcom: msm8974: Use proper compatible for APCS syscon Luca Weiss
0 siblings, 2 replies; 200+ results
From: Luca Weiss @ 2024-04-08 19:32 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Jassi Brar, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson,
Konrad Dybcio, Matthias Brugger, AngeloGioacchino Del Regno,
Jacky Huang, Shan-Chun Hung
Cc: linux-arm-msm, linux-kernel, devicetree, linux-arm-kernel,
linux-mediatek, Luca Weiss
Finally fix a warning about the apcs-global syscon used on msm8974 that
has been around forever.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Luca Weiss (2):
dt-bindings: mailbox: qcom: Add MSM8974 APCS compatible
ARM: dts: qcom: msm8974: Use proper compatible for APCS syscon
.../devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml | 1 +
arch/arm/boot/dts/qcom/qcom-msm8974.dtsi | 6 ++++--
2 files changed, 5 insertions(+), 2 deletions(-)
---
base-commit: 8568bb2ccc278f344e6ac44af6ed010a90aa88dc
change-id: 20240408-msm8974-apcs-b7765f6bab99
Best regards,
--
Luca Weiss <luca@z3ntu.xyz>
^ permalink raw reply [relevance 87%]
* Re: [PATCH 1/2] dt-bindings: pinctrl: qcom,pmic-gpio: Allow gpio-hog nodes
@ 2024-04-08 18:36 88% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-04-08 18:36 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Linus Walleij, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Konrad Dybcio
Cc: linux-arm-msm, linux-gpio, devicetree, linux-kernel
On Montag, 8. April 2024 19:26:49 CEST Konrad Dybcio wrote:
>
> On 4/8/24 18:39, Luca Weiss wrote:
> > Allow specifying a GPIO hog, as already used on
> > qcom-msm8974-lge-nexus5-hammerhead.dts.
> >
> > Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
> > ---
> > .../devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml | 12 ++++++++++++
> > 1 file changed, 12 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml
> > index a786357ed1af..510a05369dbb 100644
> > --- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml
> > +++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml
> > @@ -424,6 +424,10 @@ patternProperties:
> > $ref: "#/$defs/qcom-pmic-gpio-state"
> > additionalProperties: false
> >
> > + "^(hog-[0-9]+|.+-hog(-[0-9]+)?)$":
>
> I see a couple bindings do this, but I'm not sure if we want two
> allow two styles for no reason.. Rob?
This regex is actually from the gpio-hog.yaml base
https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/gpio/gpio-hog.yaml#L23
Why it's made this way I cannot tell you, but I didn't want to 'artifically'
restrict the pattern for qcom,pmic-gpio.
>
> Konrad
>
^ permalink raw reply [relevance 88%]
* [PATCH 0/2] Allow gpio-hog nodes in qcom,pmic-gpio bindings (& dt fixup)
@ 2024-04-08 16:39 88% Luca Weiss
2024-04-08 16:39 86% ` [PATCH 1/2] dt-bindings: pinctrl: qcom,pmic-gpio: Allow gpio-hog nodes Luca Weiss
2024-04-08 16:39 87% ` [PATCH 2/2] ARM: dts: qcom: msm8974-hammerhead: Update gpio hog node name Luca Weiss
0 siblings, 2 replies; 200+ results
From: Luca Weiss @ 2024-04-08 16:39 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Linus Walleij, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Konrad Dybcio
Cc: linux-arm-msm, linux-gpio, devicetree, linux-kernel, Luca Weiss
Resolve the dt validation failure on Nexus 5.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Luca Weiss (2):
dt-bindings: pinctrl: qcom,pmic-gpio: Allow gpio-hog nodes
ARM: dts: qcom: msm8974-hammerhead: Update gpio hog node name
.../devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml | 12 ++++++++++++
.../arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts | 2 +-
2 files changed, 13 insertions(+), 1 deletion(-)
---
base-commit: 8568bb2ccc278f344e6ac44af6ed010a90aa88dc
change-id: 20240408-qcom-pmic-gpio-hog-2b4c5f103126
Best regards,
--
Luca Weiss <luca@z3ntu.xyz>
^ permalink raw reply [relevance 88%]
* [PATCH 2/2] ARM: dts: qcom: msm8974-hammerhead: Update gpio hog node name
2024-04-08 16:39 88% [PATCH 0/2] Allow gpio-hog nodes in qcom,pmic-gpio bindings (& dt fixup) Luca Weiss
2024-04-08 16:39 86% ` [PATCH 1/2] dt-bindings: pinctrl: qcom,pmic-gpio: Allow gpio-hog nodes Luca Weiss
@ 2024-04-08 16:39 87% ` Luca Weiss
1 sibling, 0 replies; 200+ results
From: Luca Weiss @ 2024-04-08 16:39 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Linus Walleij, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Konrad Dybcio
Cc: linux-arm-msm, linux-gpio, devicetree, linux-kernel, Luca Weiss
Follow the gpio-hog bindings and use otg-hog as node name.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts
index 4aaae8537a3f..06549051be50 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts
+++ b/arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts
@@ -328,7 +328,7 @@ wlan_regulator_pin: wl-reg-active-state {
power-source = <PM8941_GPIO_S3>;
};
- otg {
+ otg-hog {
gpio-hog;
gpios = <35 GPIO_ACTIVE_HIGH>;
output-high;
--
2.44.0
^ permalink raw reply related [relevance 87%]
* [PATCH 1/2] dt-bindings: pinctrl: qcom,pmic-gpio: Allow gpio-hog nodes
2024-04-08 16:39 88% [PATCH 0/2] Allow gpio-hog nodes in qcom,pmic-gpio bindings (& dt fixup) Luca Weiss
@ 2024-04-08 16:39 86% ` Luca Weiss
2024-04-08 16:39 87% ` [PATCH 2/2] ARM: dts: qcom: msm8974-hammerhead: Update gpio hog node name Luca Weiss
1 sibling, 1 reply; 200+ results
From: Luca Weiss @ 2024-04-08 16:39 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Linus Walleij, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Konrad Dybcio
Cc: linux-arm-msm, linux-gpio, devicetree, linux-kernel, Luca Weiss
Allow specifying a GPIO hog, as already used on
qcom-msm8974-lge-nexus5-hammerhead.dts.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
.../devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml
index a786357ed1af..510a05369dbb 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml
@@ -424,6 +424,10 @@ patternProperties:
$ref: "#/$defs/qcom-pmic-gpio-state"
additionalProperties: false
+ "^(hog-[0-9]+|.+-hog(-[0-9]+)?)$":
+ required:
+ - gpio-hog
+
$defs:
qcom-pmic-gpio-state:
type: object
@@ -571,6 +575,7 @@ $defs:
examples:
- |
+ #include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
pm8921_gpio: gpio@150 {
@@ -594,5 +599,12 @@ examples:
power-source = <PM8921_GPIO_S4>;
};
};
+
+ otg-hog {
+ gpio-hog;
+ gpios = <35 GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "otg-gpio";
+ };
};
...
--
2.44.0
^ permalink raw reply related [relevance 86%]
* [PATCH] dt-bindings: iio: imu: mpu6050: Improve i2c-gate disallow list
@ 2024-04-08 16:34 82% Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-04-08 16:34 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Jonathan Cameron,
Lars-Peter Clausen, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jean-Baptiste Maneyrol
Cc: linux-iio, devicetree, linux-kernel, Luca Weiss
Before all supported sensors except for MPU{9150,9250,9255} were not
allowed to use i2c-gate in the bindings which excluded quite a few
supported sensors where this functionality is supported.
Switch the list of sensors to ones where the Linux driver explicitly
disallows support for the auxiliary bus ("inv_mpu_i2c_aux_bus"). Since
the driver is also based on "default: return true" this should scale
better into the future.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
This fixes dt validation error on qcom-msm8974-lge-nexus5-hammerhead
which uses mpu6515
arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dtb: mpu6515@68: i2c-gate: False schema does not allow {'#address-cells': [[1]], '#size-cells': [[0]], 'ak8963@f': {'compatible': ['asahi-kasei,ak8963'], 'reg': [[15]], 'gpios': [[40, 67, 0]], 'vid-supply': [[50]], 'vdd-supply': [[49]]}, 'bmp280@76': {'compatible': ['bosch,bmp280'], 'reg': [[118]], 'vdda-supply': [[50]], 'vddd-supply': [[49]]}}
from schema $id: http://devicetree.org/schemas/iio/imu/invensense,mpu6050.yaml#
---
.../devicetree/bindings/iio/imu/invensense,mpu6050.yaml | 17 +++++++++--------
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/Documentation/devicetree/bindings/iio/imu/invensense,mpu6050.yaml b/Documentation/devicetree/bindings/iio/imu/invensense,mpu6050.yaml
index 297b8a1a7ffb..587ff2bced2d 100644
--- a/Documentation/devicetree/bindings/iio/imu/invensense,mpu6050.yaml
+++ b/Documentation/devicetree/bindings/iio/imu/invensense,mpu6050.yaml
@@ -62,14 +62,15 @@ properties:
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
- if:
- not:
- properties:
- compatible:
- contains:
- enum:
- - invensense,mpu9150
- - invensense,mpu9250
- - invensense,mpu9255
+ properties:
+ compatible:
+ contains:
+ enum:
+ - invensense,iam20680
+ - invensense,icm20602
+ - invensense,icm20608
+ - invensense,icm20609
+ - invensense,icm20689
then:
properties:
i2c-gate: false
---
base-commit: 8568bb2ccc278f344e6ac44af6ed010a90aa88dc
change-id: 20240408-mpu6050-i2c-gate-4ea473e492f4
Best regards,
--
Luca Weiss <luca@z3ntu.xyz>
^ permalink raw reply related [relevance 82%]
* Re: [PATCH 0/4] arm64: dts: qcom: add USB-C orientation GPIOs
2024-04-08 7:04 99% ` Luca Weiss
@ 2024-04-08 7:50 99% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-04-08 7:50 UTC (permalink / raw)
To: Luca Weiss, Dmitry Baryshkov
Cc: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, linux-arm-msm, devicetree, linux-kernel
On Mon Apr 8, 2024 at 9:04 AM CEST, Luca Weiss wrote:
> On Mon Apr 8, 2024 at 9:03 AM CEST, Dmitry Baryshkov wrote:
> > On Mon, 8 Apr 2024 at 10:02, Luca Weiss <luca.weiss@fairphone.com> wrote:
> > >
> > > On Mon Apr 8, 2024 at 4:33 AM CEST, Dmitry Baryshkov wrote:
> > > > Populate orientation GPIOs for some of the PMIC-GLINK-based devices.
> > > > This leaves only FairPhone5, RB3Gen2, SC8180X Primus and SC8280XP CRD
> > > > without the orientation GPIOs declared.
> > >
> > > Hi Dmitry,
> > >
> > > How would I find this GPIO on the schematics, or downstream devicetree?
> > > I scanned over some relevant areas but nothing jumped out at me except
> > > for the USB_PHY_PS signal coming from PM7250B CC_OUT and going into
> > > GPIO_140 of the QCM6490 - but I'm guessing this is something else?
> >
> > It is exactly that GPIO.
>
> Great, thanks! The PM7250B datasheet and my limited USB-C knowledge
> didn't help me there much ;)
>
> I'll send a patch to add it.
One thing I've noticed now is that the dt schema currently explicitly
disallows orientation-gpios for anything that's not sm8450, sm8550 or
x1e80100.
arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dtb: pmic-glink: orientation-gpios: False schema does not allow [[84, 140, 0]]
from schema $id: http://devicetree.org/schemas/soc/qcom/qcom,pmic-glink.yaml#
So I'd think also this series will cause some extra validation errors if
the schema is not adjusted? Are you planning to do that?
Regards
Luca
>
> Regards
> Luca
>
> >
> > >
> > > Regards
> > > Luca
> > >
> > > >
> > > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> > > > ---
> > > > Dmitry Baryshkov (4):
> > > > arm64: dts: qcom: sm8350-hdk: add USB-C orientation GPIO
> > > > arm64: dts: qcom: sm8450-hdk: add USB-C orientation GPIO
> > > > arm64: dts: qcom: sc8280xp-lenovo-thinkpad-x13s: add USB-C orientation GPIOs
> > > > arm64: dts: qcom: sc8180x-lenovo-flex-5g: add USB-C orientation GPIOs
> > > >
> > > > arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts | 2 ++
> > > > arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 2 ++
> > > > arch/arm64/boot/dts/qcom/sm8350-hdk.dts | 1 +
> > > > arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 1 +
> > > > 4 files changed, 6 insertions(+)
> > > > ---
> > > > base-commit: 8568bb2ccc278f344e6ac44af6ed010a90aa88dc
> > > > change-id: 20240408-hdk-orientation-gpios-141bc7fd247d
> > > >
> > > > Best regards,
> > >
^ permalink raw reply [relevance 99%]
* Re: [PATCH 0/4] arm64: dts: qcom: add USB-C orientation GPIOs
@ 2024-04-08 7:04 99% ` Luca Weiss
2024-04-08 7:50 99% ` Luca Weiss
0 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-04-08 7:04 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, linux-arm-msm, devicetree, linux-kernel
On Mon Apr 8, 2024 at 9:03 AM CEST, Dmitry Baryshkov wrote:
> On Mon, 8 Apr 2024 at 10:02, Luca Weiss <luca.weiss@fairphone.com> wrote:
> >
> > On Mon Apr 8, 2024 at 4:33 AM CEST, Dmitry Baryshkov wrote:
> > > Populate orientation GPIOs for some of the PMIC-GLINK-based devices.
> > > This leaves only FairPhone5, RB3Gen2, SC8180X Primus and SC8280XP CRD
> > > without the orientation GPIOs declared.
> >
> > Hi Dmitry,
> >
> > How would I find this GPIO on the schematics, or downstream devicetree?
> > I scanned over some relevant areas but nothing jumped out at me except
> > for the USB_PHY_PS signal coming from PM7250B CC_OUT and going into
> > GPIO_140 of the QCM6490 - but I'm guessing this is something else?
>
> It is exactly that GPIO.
Great, thanks! The PM7250B datasheet and my limited USB-C knowledge
didn't help me there much ;)
I'll send a patch to add it.
Regards
Luca
>
> >
> > Regards
> > Luca
> >
> > >
> > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> > > ---
> > > Dmitry Baryshkov (4):
> > > arm64: dts: qcom: sm8350-hdk: add USB-C orientation GPIO
> > > arm64: dts: qcom: sm8450-hdk: add USB-C orientation GPIO
> > > arm64: dts: qcom: sc8280xp-lenovo-thinkpad-x13s: add USB-C orientation GPIOs
> > > arm64: dts: qcom: sc8180x-lenovo-flex-5g: add USB-C orientation GPIOs
> > >
> > > arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts | 2 ++
> > > arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 2 ++
> > > arch/arm64/boot/dts/qcom/sm8350-hdk.dts | 1 +
> > > arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 1 +
> > > 4 files changed, 6 insertions(+)
> > > ---
> > > base-commit: 8568bb2ccc278f344e6ac44af6ed010a90aa88dc
> > > change-id: 20240408-hdk-orientation-gpios-141bc7fd247d
> > >
> > > Best regards,
> >
^ permalink raw reply [relevance 99%]
* Re: [PATCH 0/4] arm64: dts: qcom: add USB-C orientation GPIOs
@ 2024-04-08 7:02 99% ` Luca Weiss
0 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-04-08 7:02 UTC (permalink / raw)
To: Dmitry Baryshkov, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel
On Mon Apr 8, 2024 at 4:33 AM CEST, Dmitry Baryshkov wrote:
> Populate orientation GPIOs for some of the PMIC-GLINK-based devices.
> This leaves only FairPhone5, RB3Gen2, SC8180X Primus and SC8280XP CRD
> without the orientation GPIOs declared.
Hi Dmitry,
How would I find this GPIO on the schematics, or downstream devicetree?
I scanned over some relevant areas but nothing jumped out at me except
for the USB_PHY_PS signal coming from PM7250B CC_OUT and going into
GPIO_140 of the QCM6490 - but I'm guessing this is something else?
Regards
Luca
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> Dmitry Baryshkov (4):
> arm64: dts: qcom: sm8350-hdk: add USB-C orientation GPIO
> arm64: dts: qcom: sm8450-hdk: add USB-C orientation GPIO
> arm64: dts: qcom: sc8280xp-lenovo-thinkpad-x13s: add USB-C orientation GPIOs
> arm64: dts: qcom: sc8180x-lenovo-flex-5g: add USB-C orientation GPIOs
>
> arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts | 2 ++
> arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 2 ++
> arch/arm64/boot/dts/qcom/sm8350-hdk.dts | 1 +
> arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 1 +
> 4 files changed, 6 insertions(+)
> ---
> base-commit: 8568bb2ccc278f344e6ac44af6ed010a90aa88dc
> change-id: 20240408-hdk-orientation-gpios-141bc7fd247d
>
> Best regards,
^ permalink raw reply [relevance 99%]
* [PATCH 2/3] dt-bindings: remoteproc: qcom,sc7280-wpss-pil: Fix qcom,halt-regs definition
2024-04-07 9:58 81% [PATCH 0/3] Fix up qcom,halt-regs definition in various schemas Luca Weiss
2024-04-07 9:58 86% ` [PATCH 1/3] dt-bindings: remoteproc: qcom,qcs404-cdsp-pil: Fix qcom,halt-regs definition Luca Weiss
@ 2024-04-07 9:58 86% ` Luca Weiss
2024-04-07 9:58 86% ` [PATCH 3/3] dt-bindings: remoteproc: qcom,sdm845-adsp-pil: " Luca Weiss
3 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-04-07 9:58 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Mathieu Poirier, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-remoteproc, devicetree, linux-kernel, Luca Weiss
Set the 'items' correctly for the qcom,halt-regs property and update the
description to match what it should be.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
.../devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml
index 9381c7022ff4..f4118b2da5f6 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml
@@ -89,7 +89,11 @@ properties:
$ref: /schemas/types.yaml#/definitions/phandle-array
description:
Phandle reference to a syscon representing TCSR followed by the
- three offsets within syscon for q6, modem and nc halt registers.
+ offset within syscon for q6 halt register.
+ items:
+ - items:
+ - description: phandle to TCSR syscon region
+ - description: offset to the Q6 halt register
qcom,qmp:
$ref: /schemas/types.yaml#/definitions/phandle
--
2.44.0
^ permalink raw reply related [relevance 86%]
* [PATCH 3/3] dt-bindings: remoteproc: qcom,sdm845-adsp-pil: Fix qcom,halt-regs definition
2024-04-07 9:58 81% [PATCH 0/3] Fix up qcom,halt-regs definition in various schemas Luca Weiss
2024-04-07 9:58 86% ` [PATCH 1/3] dt-bindings: remoteproc: qcom,qcs404-cdsp-pil: Fix qcom,halt-regs definition Luca Weiss
2024-04-07 9:58 86% ` [PATCH 2/3] dt-bindings: remoteproc: qcom,sc7280-wpss-pil: " Luca Weiss
@ 2024-04-07 9:58 86% ` Luca Weiss
3 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-04-07 9:58 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Mathieu Poirier, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-remoteproc, devicetree, linux-kernel, Luca Weiss
Set the 'items' correctly for the qcom,halt-regs property and update the
description to match what it should be.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
.../devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml
index 20df83a96ef3..a3c74871457f 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml
@@ -81,7 +81,11 @@ properties:
$ref: /schemas/types.yaml#/definitions/phandle-array
description:
Phandle reference to a syscon representing TCSR followed by the
- three offsets within syscon for q6, modem and nc halt registers.
+ offset within syscon for q6 halt register.
+ items:
+ - items:
+ - description: phandle to TCSR syscon region
+ - description: offset to the Q6 halt register
qcom,smem-states:
$ref: /schemas/types.yaml#/definitions/phandle-array
--
2.44.0
^ permalink raw reply related [relevance 86%]
* [PATCH 1/3] dt-bindings: remoteproc: qcom,qcs404-cdsp-pil: Fix qcom,halt-regs definition
2024-04-07 9:58 81% [PATCH 0/3] Fix up qcom,halt-regs definition in various schemas Luca Weiss
@ 2024-04-07 9:58 86% ` Luca Weiss
2024-04-07 9:58 86% ` [PATCH 2/3] dt-bindings: remoteproc: qcom,sc7280-wpss-pil: " Luca Weiss
` (2 subsequent siblings)
3 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-04-07 9:58 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Mathieu Poirier, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-remoteproc, devicetree, linux-kernel, Luca Weiss
Set the 'items' correctly for the qcom,halt-regs property and update the
description to match what it should be.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
.../devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml
index 06f5f93f62a9..bca59394aef4 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml
@@ -81,7 +81,11 @@ properties:
$ref: /schemas/types.yaml#/definitions/phandle-array
description:
Phandle reference to a syscon representing TCSR followed by the
- three offsets within syscon for q6, modem and nc halt registers.
+ offset within syscon for q6 halt register.
+ items:
+ - items:
+ - description: phandle to TCSR syscon region
+ - description: offset to the Q6 halt register
qcom,smem-states:
$ref: /schemas/types.yaml#/definitions/phandle-array
--
2.44.0
^ permalink raw reply related [relevance 86%]
* [PATCH 0/3] Fix up qcom,halt-regs definition in various schemas
@ 2024-04-07 9:58 81% Luca Weiss
2024-04-07 9:58 86% ` [PATCH 1/3] dt-bindings: remoteproc: qcom,qcs404-cdsp-pil: Fix qcom,halt-regs definition Luca Weiss
` (3 more replies)
0 siblings, 4 replies; 200+ results
From: Luca Weiss @ 2024-04-07 9:58 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Mathieu Poirier, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-remoteproc, devicetree, linux-kernel, Luca Weiss
The original motivation is that a bunch of other schemas fail to
validate qcom,halt-regs, for example like in the following examples:
arch/arm64/boot/dts/qcom/apq8016-sbc.dtb: remoteproc@4080000: qcom,halt-regs:0: [20] is too short
from schema $id: http://devicetree.org/schemas/remoteproc/qcom,msm8916-mss-pil.yaml#
arch/arm64/boot/dts/qcom/apq8096-ifc6640.dtb: remoteproc@2080000: qcom,halt-regs:0: [82] is too short
from schema $id: http://devicetree.org/schemas/remoteproc/qcom,msm8996-mss-pil.yaml#
arch/arm64/boot/dts/qcom/apq8039-t2.dtb: remoteproc@4080000: qcom,halt-regs:0: [32] is too short
from schema $id: http://devicetree.org/schemas/remoteproc/qcom,msm8916-mss-pil.yaml#
While I'm actually not quite sure why these patches fix this in
the other schemas - feels like a bug/limitation in dt-schema maybe? -
the patches should be correct anyways to validate qcom,halt-regs in the
schemas I'm touching.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Luca Weiss (3):
dt-bindings: remoteproc: qcom,qcs404-cdsp-pil: Fix qcom,halt-regs definition
dt-bindings: remoteproc: qcom,sc7280-wpss-pil: Fix qcom,halt-regs definition
dt-bindings: remoteproc: qcom,sdm845-adsp-pil: Fix qcom,halt-regs definition
.../devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml | 6 +++++-
.../devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml | 6 +++++-
.../devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml | 6 +++++-
3 files changed, 15 insertions(+), 3 deletions(-)
---
base-commit: 8568bb2ccc278f344e6ac44af6ed010a90aa88dc
change-id: 20240407-qcom-halt-regs-fixup-2c6cce9734e4
Best regards,
--
Luca Weiss <luca@z3ntu.xyz>
^ permalink raw reply [relevance 81%]
* Re: [PATCH] Documentation: ABI: document in_temp_input file
@ 2024-04-06 17:47 88% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-04-06 17:47 UTC (permalink / raw)
To: Jonathan Cameron
Cc: ~postmarketos/upstreaming, phone-devel, Lars-Peter Clausen,
linux-iio, linux-kernel
On Samstag, 6. April 2024 18:45:21 CEST Jonathan Cameron wrote:
> On Sat, 06 Apr 2024 17:31:04 +0200
> Luca Weiss <luca@z3ntu.xyz> wrote:
>
> > For example the BMP280 barometric pressure sensor on Qualcomm
> > MSM8974-based Nexus 5 smartphone exposes such file in sysfs.
> > Document it.
> >
> > Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
>
> Hi Luca,
>
> Applied with a note added on fixing the line above to not reuse X.
> A good additional thing but needs mentioning in the commit message.
Good point! I wrote the patch in Feb 2021 without any description so
I had to retroactively make something up ;)
Thanks for amending and applying!
Regards
Luca
>
> Thanks,
>
> Jonathan
>
> > ---
> > Documentation/ABI/testing/sysfs-bus-iio | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/Documentation/ABI/testing/sysfs-bus-iio b/Documentation/ABI/testing/sysfs-bus-iio
> > index 2e6d5ebfd3c7..7cee78ad4108 100644
> > --- a/Documentation/ABI/testing/sysfs-bus-iio
> > +++ b/Documentation/ABI/testing/sysfs-bus-iio
> > @@ -243,7 +243,8 @@ Description:
> > less measurements. Units after application of scale and offset
> > are milli degrees Celsius.
> >
> > -What: /sys/bus/iio/devices/iio:deviceX/in_tempX_input
> > +What: /sys/bus/iio/devices/iio:deviceX/in_tempY_input
> > +What: /sys/bus/iio/devices/iio:deviceX/in_temp_input
> > KernelVersion: 2.6.38
> > Contact: linux-iio@vger.kernel.org
> > Description:
> >
> > ---
> > base-commit: 8568bb2ccc278f344e6ac44af6ed010a90aa88dc
> > change-id: 20240406-in_temp_input-4505d7fafff8
> >
> > Best regards,
>
>
^ permalink raw reply [relevance 88%]
* [PATCH] ARM: dts: qcom: msm8974-sony-shinano: Enable vibrator
@ 2024-04-06 15:27 88% Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-04-06 15:27 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss
Enable the vibrator connected to PM8941 found on the Sony shinano
platform.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
.../arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-common.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-common.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-common.dtsi
index 3a0c0035de09..e129bb1bd6ec 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-common.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-common.dtsi
@@ -202,6 +202,10 @@ led@7 {
};
};
+&pm8941_vib {
+ status = "okay";
+};
+
&remoteproc_adsp {
cx-supply = <&pm8841_s2>;
status = "okay";
---
base-commit: 956abeb75f90eac3d5ba1f4cff7c048f7c079502
change-id: 20240406-shinano-vib-80e27e9bab2c
Best regards,
--
Luca Weiss <luca@z3ntu.xyz>
^ permalink raw reply related [relevance 88%]
* [PATCH] Documentation: ABI: document in_temp_input file
@ 2024-04-06 15:31 88% Luca Weiss
0 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-04-06 15:31 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Jonathan Cameron,
Lars-Peter Clausen
Cc: linux-iio, linux-kernel, Luca Weiss
For example the BMP280 barometric pressure sensor on Qualcomm
MSM8974-based Nexus 5 smartphone exposes such file in sysfs.
Document it.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Documentation/ABI/testing/sysfs-bus-iio | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/ABI/testing/sysfs-bus-iio b/Documentation/ABI/testing/sysfs-bus-iio
index 2e6d5ebfd3c7..7cee78ad4108 100644
--- a/Documentation/ABI/testing/sysfs-bus-iio
+++ b/Documentation/ABI/testing/sysfs-bus-iio
@@ -243,7 +243,8 @@ Description:
less measurements. Units after application of scale and offset
are milli degrees Celsius.
-What: /sys/bus/iio/devices/iio:deviceX/in_tempX_input
+What: /sys/bus/iio/devices/iio:deviceX/in_tempY_input
+What: /sys/bus/iio/devices/iio:deviceX/in_temp_input
KernelVersion: 2.6.38
Contact: linux-iio@vger.kernel.org
Description:
---
base-commit: 8568bb2ccc278f344e6ac44af6ed010a90aa88dc
change-id: 20240406-in_temp_input-4505d7fafff8
Best regards,
--
Luca Weiss <luca@z3ntu.xyz>
^ permalink raw reply related [relevance 88%]
* Re: [PATCH RFT 0/7] arm64: qcom: allow up to 4 lanes for the Type-C DisplayPort Altmode
@ 2024-04-05 10:19 99% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-04-05 10:19 UTC (permalink / raw)
To: neil.armstrong, Konrad Dybcio, Bjorn Andersson
Cc: Vinod Koul, Kishon Vijay Abraham I, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Abhinav Kumar, linux-arm-msm,
linux-phy, devicetree, linux-kernel
On Fri Apr 5, 2024 at 10:08 AM CEST, Neil Armstrong wrote:
> Hi Luca,
>
> On 29/03/2024 10:02, Luca Weiss wrote:
> > On Tue Mar 26, 2024 at 10:02 PM CET, Konrad Dybcio wrote:
> >> On 16.03.2024 5:01 PM, Bjorn Andersson wrote:
> >>> On Fri, Mar 15, 2024 at 06:35:15PM +0100, Neil Armstrong wrote:
> >>>> On 15/03/2024 18:19, Luca Weiss wrote:
> >>>>> On Thu Feb 29, 2024 at 2:07 PM CET, Neil Armstrong wrote:
> >>>>>> Register a typec mux in order to change the PHY mode on the Type-C
> >>>>>> mux events depending on the mode and the svid when in Altmode setup.
> >>>>>>
> >>>>>> The DisplayPort phy should be left enabled if is still powered on
> >>>>>> by the DRM DisplayPort controller, so bail out until the DisplayPort
> >>>>>> PHY is not powered off.
> >>>>>>
> >>>>>> The Type-C Mode/SVID only changes on plug/unplug, and USB SAFE states
> >>>>>> will be set in between of USB-Only, Combo and DisplayPort Only so
> >>>>>> this will leave enough time to the DRM DisplayPort controller to
> >>>>>> turn of the DisplayPort PHY.
> >>>>>>
> >>>>>> The patchset also includes bindings changes and DT changes.
> >>>>>>
> >>>>>> This has been successfully tested on an SM8550 board, but the
> >>>>>> Thinkpad X13s deserved testing between non-PD USB, non-PD DisplayPort,
> >>>>>> PD USB Hubs and PD Altmode Dongles to make sure the switch works
> >>>>>> as expected.
> >>>>>>
> >>>>>> The DisplayPort 4 lanes setup can be check with:
> >>>>>> $ cat /sys/kernel/debug/dri/ae01000.display-controller/DP-1/dp_debug
> >>>>>> name = msm_dp
> >>>>>> drm_dp_link
> >>>>>> rate = 540000
> >>>>>> num_lanes = 4
> >>>>>
> >>>>> Hi Neil,
> >>>>>
> >>>>> I tried this on QCM6490/SC7280 which should also support 4-lane DP but I
> >>>>> haven't had any success so far.
> >>>>>
> >>> [..]
> >>>>> [ 1775.563969] [drm:dp_ctrl_link_train] *ERROR* max v_level reached
> >>>>> [ 1775.564031] [drm:dp_ctrl_link_train] *ERROR* link training #1 failed. ret=-11
> >>>>
> >>>> Interesting #1 means the 4 lanes are not physically connected to the other side,
> >>>> perhaps QCM6490/SC7280 requires a specific way to enable the 4 lanes in the PHY,
> >>>> or some fixups in the init tables.
> >>>>
> >>>
> >>> I tested the same on rb3gen2 (qcs6490) a couple of weeks ago, with the
> >>> same outcome. Looking at the AUX reads, after switching to 4-lane the
> >>> link training is failing on all 4 lanes, in contrast to succeeding only
> >>> on the first 2 if you e.g. forget to mux the other two.
> >>>
> >>> As such, my expectation is that there's something wrong in the QMP PHY
> >>> (or possibly redriver) for this platform.
> >>
> >> Do we have any downstream tag where 4lane dp works? I'm willing to believe
> >> the PHY story..
> >
> > Just tested on Fairphone 5 downstream and 4 lane appears to work there.
> > This is with an USB-C to HDMI adapter that only does HDMI.
> >
> > FP5:/ # cat /sys/kernel/debug/drm_dp/dp_debug
> > state=0x20a5
> > link_rate=270000
> > num_lanes=4
> > resolution=2560x1440@60Hz
> > pclock=241500KHz
> > bpp=24
> > test_req=DP_LINK_STATUS_UPDATED
> > lane_count=4
> > bw_code=10
> > v_level=0
> > p_level=0
> >
> > Sources are here:
> > https://gerrit-public.fairphone.software/plugins/gitiles/kernel/msm-5.4/+/refs/heads/odm/rc/target/13/fp5
> > And probably more importantly techpack/display:
> > https://gerrit-public.fairphone.software/plugins/gitiles/platform/vendor/opensource/display-drivers/+/refs/heads/odm/rc/target/13/fp5
> > Dts if useful:
> > https://gerrit-public.fairphone.software/plugins/gitiles/kernel/msm-extra/devicetree/+/refs/heads/kernel/13/fp5
>
> Could you retry with this applied ?
>
> https://lore.kernel.org/all/20240405000111.1450598-1-swboyd@chromium.org/
Unfortunately I do not see any change with this on QCM6490 Fairphone 5
and 4-lane DP.
Regards
Luca
>
> Thanks,
> Neil
>
> >
> > Regards
> > Luca
> >
> >>
> >> Konrad
> >
^ permalink raw reply [relevance 99%]
* Re: [PATCH] usb: typec: ptn36502: fix CONFIG_OF dependency
@ 2024-04-04 12:37 99% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-04-04 12:37 UTC (permalink / raw)
To: Arnd Bergmann, Heikki Krogerus, Greg Kroah-Hartman, Dmitry Baryshkov
Cc: Arnd Bergmann, Neil Armstrong, Nathan Chancellor,
AngeloGioacchino Del Regno, linux-usb, linux-kernel
On Thu Apr 4, 2024 at 2:35 PM CEST, Arnd Bergmann wrote:
> From: Arnd Bergmann <arnd@arndb.de>
>
> When CONFIG_OF is disabled, TYPEC_MUX_PTN36502 causes a Kconfig warning:
>
> WARNING: unmet direct dependencies detected for DRM_AUX_BRIDGE
> Depends on [n]: HAS_IOMEM [=y] && DRM_BRIDGE [=y] && OF [=n]
> Selected by [y]:
> - TYPEC_MUX_PTN36502 [=y] && USB_SUPPORT [=y] && TYPEC [=y] && I2C [=y] && (DRM [=y] || DRM [=y]=n) && DRM_BRIDGE [=y]
>
> It doesn't actually seem to be required here, so just avoid the warning
> with a narrower select statement and use the same condition that Nathan
> added for NB7VPQ904M.
Hi,
This has already been sent by Nathan, just hasn't been picked up yet I
guess.
https://lore.kernel.org/linux-patches/20240328-fix-ptn36502-drm_aux_bridge-select-v1-1-85552117e26e@kernel.org/
Regards
Luca
>
> Fixes: 9dc28ea21eb4 ("usb: typec: ptn36502: switch to DRM_AUX_BRIDGE")
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> ---
> drivers/usb/typec/mux/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/usb/typec/mux/Kconfig b/drivers/usb/typec/mux/Kconfig
> index 4827e86fed6d..ce7db6ad3057 100644
> --- a/drivers/usb/typec/mux/Kconfig
> +++ b/drivers/usb/typec/mux/Kconfig
> @@ -60,7 +60,7 @@ config TYPEC_MUX_PTN36502
> tristate "NXP PTN36502 Type-C redriver driver"
> depends on I2C
> depends on DRM || DRM=n
> - select DRM_AUX_BRIDGE if DRM_BRIDGE
> + select DRM_AUX_BRIDGE if DRM_BRIDGE && OF
> select REGMAP_I2C
> help
> Say Y or M if your system has a NXP PTN36502 Type-C redriver chip
^ permalink raw reply [relevance 99%]
* [PATCH v2 3/3] arm64: dts: qcom: sm7225-fairphone-fp4: Enable USB role switching
2024-03-29 12:26 94% [PATCH v2 0/3] Add TCPM support for PM7250B and Fairphone 4 Luca Weiss
2024-03-29 12:26 99% ` [PATCH v2 1/3] arm64: dts: qcom: pm7250b: Add node for PMIC VBUS booster Luca Weiss
2024-03-29 12:26 95% ` [PATCH v2 2/3] arm64: dts: qcom: pm7250b: Add a TCPM description Luca Weiss
@ 2024-03-29 12:26 89% ` Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-29 12:26 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel, Luca Weiss
Configure the Type-C and VBUS regulator on PM7250B and wire it up to the
USB PHY, so that USB role and orientation switching works.
For now USB Power Delivery properties are skipped / disabled, so that
the (presumably) bootloader-configured charger doesn't get messed with
and we can charge the phone with at least some amount of power.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
arch/arm64/boot/dts/qcom/sm6350.dtsi | 47 ++++++++++++++++++
arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts | 60 ++++++++++++++++++++++-
2 files changed, 106 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index b663c1b18f61..2e135989de8c 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -1717,6 +1717,33 @@ usb_1_qmpphy: phy@88e8000 {
#phy-cells = <1>;
status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ usb_1_qmpphy_out: endpoint {
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ usb_1_qmpphy_usb_ss_in: endpoint {
+ remote-endpoint = <&usb_1_dwc3_ss_out>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ usb_1_qmpphy_dp_in: endpoint {
+ };
+ };
+ };
};
dc_noc: interconnect@9160000 {
@@ -1892,6 +1919,26 @@ usb_1_dwc3: usb@a600000 {
snps,hird-threshold = /bits/ 8 <0x10>;
phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy", "usb3-phy";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ usb_1_dwc3_hs_out: endpoint {
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ usb_1_dwc3_ss_out: endpoint {
+ remote-endpoint = <&usb_1_qmpphy_usb_ss_in>;
+ };
+ };
+ };
};
};
diff --git a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts
index bc67e8c1fe4d..5d7778c48413 100644
--- a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts
+++ b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts
@@ -19,6 +19,7 @@
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
+#include <dt-bindings/usb/pd.h>
#include "sm7225.dtsi"
#include "pm6150l.dtsi"
#include "pm6350.dtsi"
@@ -543,6 +544,53 @@ conn-therm@1 {
};
};
+&pm7250b_typec {
+ vdd-pdphy-supply = <&vreg_l3a>;
+
+ status = "okay";
+
+ connector {
+ compatible = "usb-c-connector";
+
+ power-role = "dual";
+ data-role = "dual";
+ self-powered;
+
+ /*
+ * Disable USB Power Delivery for now, seems to need extra work
+ * to support role switching while also letting the battery
+ * charge still - without charger driver
+ */
+ typec-power-opmode = "default";
+ pd-disable;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ pm7250b_hs_in: endpoint {
+ remote-endpoint = <&usb_1_dwc3_hs_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ pm7250b_ss_in: endpoint {
+ remote-endpoint = <&usb_1_qmpphy_out>;
+ };
+ };
+ };
+ };
+};
+
+&pm7250b_vbus {
+ regulator-min-microamp = <500000>;
+ regulator-max-microamp = <1500000>;
+ status = "okay";
+};
+
&pmk8350_rtc {
status = "okay";
};
@@ -726,7 +774,12 @@ &usb_1 {
&usb_1_dwc3 {
maximum-speed = "super-speed";
- dr_mode = "peripheral";
+ dr_mode = "otg";
+ usb-role-switch;
+};
+
+&usb_1_dwc3_hs_out {
+ remote-endpoint = <&pm7250b_hs_in>;
};
&usb_1_hsphy {
@@ -740,10 +793,15 @@ &usb_1_hsphy {
&usb_1_qmpphy {
vdda-phy-supply = <&vreg_l22a>;
vdda-pll-supply = <&vreg_l16a>;
+ orientation-switch;
status = "okay";
};
+&usb_1_qmpphy_out {
+ remote-endpoint = <&pm7250b_ss_in>;
+};
+
&wifi {
vdd-0.8-cx-mx-supply = <&vreg_l4a>;
vdd-1.8-xo-supply = <&vreg_l7a>;
--
2.44.0
^ permalink raw reply related [relevance 89%]
* [PATCH v2 1/3] arm64: dts: qcom: pm7250b: Add node for PMIC VBUS booster
2024-03-29 12:26 94% [PATCH v2 0/3] Add TCPM support for PM7250B and Fairphone 4 Luca Weiss
@ 2024-03-29 12:26 99% ` Luca Weiss
2024-03-29 12:26 95% ` [PATCH v2 2/3] arm64: dts: qcom: pm7250b: Add a TCPM description Luca Weiss
2024-03-29 12:26 89% ` [PATCH v2 3/3] arm64: dts: qcom: sm7225-fairphone-fp4: Enable USB role switching Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-29 12:26 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel, Luca Weiss, Bryan O'Donoghue
Add the required DTS node for the USB VBUS output regulator, which is
available on PM7250B. This will provide the VBUS source to connected
peripherals.
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
arch/arm64/boot/dts/qcom/pm7250b.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/pm7250b.dtsi b/arch/arm64/boot/dts/qcom/pm7250b.dtsi
index 3bf7cf5d1700..4faed25a787f 100644
--- a/arch/arm64/boot/dts/qcom/pm7250b.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm7250b.dtsi
@@ -45,6 +45,12 @@ pmic@PM7250B_SID {
#address-cells = <1>;
#size-cells = <0>;
+ pm7250b_vbus: usb-vbus-regulator@1100 {
+ compatible = "qcom,pm7250b-vbus-reg", "qcom,pm8150b-vbus-reg";
+ reg = <0x1100>;
+ status = "disabled";
+ };
+
pm7250b_temp: temp-alarm@2400 {
compatible = "qcom,spmi-temp-alarm";
reg = <0x2400>;
--
2.44.0
^ permalink raw reply related [relevance 99%]
* [PATCH v2 2/3] arm64: dts: qcom: pm7250b: Add a TCPM description
2024-03-29 12:26 94% [PATCH v2 0/3] Add TCPM support for PM7250B and Fairphone 4 Luca Weiss
2024-03-29 12:26 99% ` [PATCH v2 1/3] arm64: dts: qcom: pm7250b: Add node for PMIC VBUS booster Luca Weiss
@ 2024-03-29 12:26 95% ` Luca Weiss
2024-03-29 12:26 89% ` [PATCH v2 3/3] arm64: dts: qcom: sm7225-fairphone-fp4: Enable USB role switching Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-29 12:26 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel, Luca Weiss, Bryan O'Donoghue
Type-C port management functionality lives inside of the PMIC block on
pm7250b.
The Type-C port management logic controls orientation detection,
vbus/vconn sense and to send/receive Type-C Power Domain messages.
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
arch/arm64/boot/dts/qcom/pm7250b.dtsi | 39 +++++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/pm7250b.dtsi b/arch/arm64/boot/dts/qcom/pm7250b.dtsi
index 4faed25a787f..0205c2669093 100644
--- a/arch/arm64/boot/dts/qcom/pm7250b.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm7250b.dtsi
@@ -51,6 +51,45 @@ pm7250b_vbus: usb-vbus-regulator@1100 {
status = "disabled";
};
+ pm7250b_typec: typec@1500 {
+ compatible = "qcom,pm7250b-typec", "qcom,pm8150b-typec";
+ reg = <0x1500>,
+ <0x1700>;
+ interrupts = <PM7250B_SID 0x15 0x00 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x15 0x01 IRQ_TYPE_EDGE_BOTH>,
+ <PM7250B_SID 0x15 0x02 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x15 0x03 IRQ_TYPE_EDGE_BOTH>,
+ <PM7250B_SID 0x15 0x04 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x15 0x05 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x15 0x06 IRQ_TYPE_EDGE_BOTH>,
+ <PM7250B_SID 0x15 0x07 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x17 0x00 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x17 0x01 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x17 0x02 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x17 0x03 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x17 0x04 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x17 0x05 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x17 0x06 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x17 0x07 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "or-rid-detect-change",
+ "vpd-detect",
+ "cc-state-change",
+ "vconn-oc",
+ "vbus-change",
+ "attach-detach",
+ "legacy-cable-detect",
+ "try-snk-src-detect",
+ "sig-tx",
+ "sig-rx",
+ "msg-tx",
+ "msg-rx",
+ "msg-tx-failed",
+ "msg-tx-discarded",
+ "msg-rx-discarded",
+ "fr-swap";
+ vdd-vbus-supply = <&pm7250b_vbus>;
+ };
+
pm7250b_temp: temp-alarm@2400 {
compatible = "qcom,spmi-temp-alarm";
reg = <0x2400>;
--
2.44.0
^ permalink raw reply related [relevance 95%]
* [PATCH v2 0/3] Add TCPM support for PM7250B and Fairphone 4
@ 2024-03-29 12:26 94% Luca Weiss
2024-03-29 12:26 99% ` [PATCH v2 1/3] arm64: dts: qcom: pm7250b: Add node for PMIC VBUS booster Luca Weiss
` (2 more replies)
0 siblings, 3 replies; 200+ results
From: Luca Weiss @ 2024-03-29 12:26 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel, Luca Weiss, Bryan O'Donoghue
This series adds support for Type-C Port Management on the Fairphone 4
which enables USB role switching and orientation switching.
This enables a user for example to plug in a USB stick or a USB keyboard
to the Type-C port.
To: Bjorn Andersson <andersson@kernel.org>
To: Konrad Dybcio <konrad.dybcio@linaro.org>
To: Rob Herring <robh@kernel.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
To: Conor Dooley <conor+dt@kernel.org>
Cc: ~postmarketos/upstreaming@lists.sr.ht
Cc: phone-devel@vger.kernel.org
Cc: linux-arm-msm@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Changes in v2:
- Move disabled as last property for pm7250b_vbus
- Update USB graph to newer version, connect both HS and SS signals
- Update FP4 Type-C properties, try to keep phone charging intact by
disabling USB PD for now
- Pick up tags
- Drop patches that landed in linux-next already
- Link to v1: https://lore.kernel.org/r/20240322-fp4-tcpm-v1-0-c5644099d57b@fairphone.com
---
Luca Weiss (3):
arm64: dts: qcom: pm7250b: Add node for PMIC VBUS booster
arm64: dts: qcom: pm7250b: Add a TCPM description
arm64: dts: qcom: sm7225-fairphone-fp4: Enable USB role switching
arch/arm64/boot/dts/qcom/pm7250b.dtsi | 45 +++++++++++++++++
arch/arm64/boot/dts/qcom/sm6350.dtsi | 47 ++++++++++++++++++
arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts | 60 ++++++++++++++++++++++-
3 files changed, 151 insertions(+), 1 deletion(-)
---
base-commit: f3583a292140e0a2a2ca0ae0019108401b4c9158
change-id: 20240322-fp4-tcpm-2ad68ef55346
Best regards,
--
Luca Weiss <luca.weiss@fairphone.com>
^ permalink raw reply [relevance 94%]
* Re: [PATCH RFT 0/7] arm64: qcom: allow up to 4 lanes for the Type-C DisplayPort Altmode
@ 2024-03-29 9:02 99% ` Luca Weiss
0 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-03-29 9:02 UTC (permalink / raw)
To: Konrad Dybcio, Bjorn Andersson, Neil Armstrong
Cc: Vinod Koul, Kishon Vijay Abraham I, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Abhinav Kumar, linux-arm-msm,
linux-phy, devicetree, linux-kernel
On Tue Mar 26, 2024 at 10:02 PM CET, Konrad Dybcio wrote:
> On 16.03.2024 5:01 PM, Bjorn Andersson wrote:
> > On Fri, Mar 15, 2024 at 06:35:15PM +0100, Neil Armstrong wrote:
> >> On 15/03/2024 18:19, Luca Weiss wrote:
> >>> On Thu Feb 29, 2024 at 2:07 PM CET, Neil Armstrong wrote:
> >>>> Register a typec mux in order to change the PHY mode on the Type-C
> >>>> mux events depending on the mode and the svid when in Altmode setup.
> >>>>
> >>>> The DisplayPort phy should be left enabled if is still powered on
> >>>> by the DRM DisplayPort controller, so bail out until the DisplayPort
> >>>> PHY is not powered off.
> >>>>
> >>>> The Type-C Mode/SVID only changes on plug/unplug, and USB SAFE states
> >>>> will be set in between of USB-Only, Combo and DisplayPort Only so
> >>>> this will leave enough time to the DRM DisplayPort controller to
> >>>> turn of the DisplayPort PHY.
> >>>>
> >>>> The patchset also includes bindings changes and DT changes.
> >>>>
> >>>> This has been successfully tested on an SM8550 board, but the
> >>>> Thinkpad X13s deserved testing between non-PD USB, non-PD DisplayPort,
> >>>> PD USB Hubs and PD Altmode Dongles to make sure the switch works
> >>>> as expected.
> >>>>
> >>>> The DisplayPort 4 lanes setup can be check with:
> >>>> $ cat /sys/kernel/debug/dri/ae01000.display-controller/DP-1/dp_debug
> >>>> name = msm_dp
> >>>> drm_dp_link
> >>>> rate = 540000
> >>>> num_lanes = 4
> >>>
> >>> Hi Neil,
> >>>
> >>> I tried this on QCM6490/SC7280 which should also support 4-lane DP but I
> >>> haven't had any success so far.
> >>>
> > [..]
> >>> [ 1775.563969] [drm:dp_ctrl_link_train] *ERROR* max v_level reached
> >>> [ 1775.564031] [drm:dp_ctrl_link_train] *ERROR* link training #1 failed. ret=-11
> >>
> >> Interesting #1 means the 4 lanes are not physically connected to the other side,
> >> perhaps QCM6490/SC7280 requires a specific way to enable the 4 lanes in the PHY,
> >> or some fixups in the init tables.
> >>
> >
> > I tested the same on rb3gen2 (qcs6490) a couple of weeks ago, with the
> > same outcome. Looking at the AUX reads, after switching to 4-lane the
> > link training is failing on all 4 lanes, in contrast to succeeding only
> > on the first 2 if you e.g. forget to mux the other two.
> >
> > As such, my expectation is that there's something wrong in the QMP PHY
> > (or possibly redriver) for this platform.
>
> Do we have any downstream tag where 4lane dp works? I'm willing to believe
> the PHY story..
Just tested on Fairphone 5 downstream and 4 lane appears to work there.
This is with an USB-C to HDMI adapter that only does HDMI.
FP5:/ # cat /sys/kernel/debug/drm_dp/dp_debug
state=0x20a5
link_rate=270000
num_lanes=4
resolution=2560x1440@60Hz
pclock=241500KHz
bpp=24
test_req=DP_LINK_STATUS_UPDATED
lane_count=4
bw_code=10
v_level=0
p_level=0
Sources are here:
https://gerrit-public.fairphone.software/plugins/gitiles/kernel/msm-5.4/+/refs/heads/odm/rc/target/13/fp5
And probably more importantly techpack/display:
https://gerrit-public.fairphone.software/plugins/gitiles/platform/vendor/opensource/display-drivers/+/refs/heads/odm/rc/target/13/fp5
Dts if useful:
https://gerrit-public.fairphone.software/plugins/gitiles/kernel/msm-extra/devicetree/+/refs/heads/kernel/13/fp5
Regards
Luca
>
> Konrad
^ permalink raw reply [relevance 99%]
* [PATCH v2 3/3] arm64: dts: qcom: sm6350: Add DisplayPort controller
2024-03-29 7:45 95% [PATCH v2 0/3] DisplayPort support for SM6350/SM7225 Luca Weiss
2024-03-29 7:45 97% ` [PATCH v2 1/3] dt-bindings: display: msm: dp-controller: document SM6350 compatible Luca Weiss
2024-03-29 7:45 97% ` [PATCH v2 2/3] dt-bindings: display: msm: sm6350-mdss: document DP controller subnode Luca Weiss
@ 2024-03-29 7:45 92% ` Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-29 7:45 UTC (permalink / raw)
To: Rob Clark, Abhinav Kumar, Dmitry Baryshkov, Sean Paul,
Marijn Suijten, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, David Airlie, Daniel Vetter, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Kuogee Hsieh,
Krishna Manikandan, Bjorn Andersson, Konrad Dybcio
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm, dri-devel,
freedreno, devicetree, linux-kernel, Luca Weiss
Add the node for the DisplayPort controller found on the SM6350 SoC.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
arch/arm64/boot/dts/qcom/sm6350.dtsi | 88 ++++++++++++++++++++++++++++++++++++
1 file changed, 88 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 24bcec3366ef..d7cf4b5ceea6 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -2033,6 +2033,14 @@ dpu_intf1_out: endpoint {
remote-endpoint = <&mdss_dsi0_in>;
};
};
+
+ port@2 {
+ reg = <2>;
+
+ dpu_intf0_out: endpoint {
+ remote-endpoint = <&mdss_dp_in>;
+ };
+ };
};
mdp_opp_table: opp-table {
@@ -2070,6 +2078,86 @@ opp-560000000 {
};
};
+ mdss_dp: displayport-controller@ae90000 {
+ compatible = "qcom,sm6350-dp", "qcom,sm8350-dp";
+ reg = <0 0xae90000 0 0x200>,
+ <0 0xae90200 0 0x200>,
+ <0 0xae90400 0 0x600>,
+ <0 0xae91000 0 0x400>,
+ <0 0xae91400 0 0x400>;
+ interrupt-parent = <&mdss>;
+ interrupts = <12>;
+ clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ <&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
+ <&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
+ <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
+ <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
+ clock-names = "core_iface",
+ "core_aux",
+ "ctrl_link",
+ "ctrl_link_iface",
+ "stream_pixel";
+
+ assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
+ <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
+ assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
+
+ phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>;
+ phy-names = "dp";
+
+ #sound-dai-cells = <0>;
+
+ operating-points-v2 = <&dp_opp_table>;
+ power-domains = <&rpmhpd SM6350_CX>;
+
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ mdss_dp_in: endpoint {
+ remote-endpoint = <&dpu_intf0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mdss_dp_out: endpoint {
+ };
+ };
+ };
+
+ dp_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-160000000 {
+ opp-hz = /bits/ 64 <160000000>;
+ required-opps = <&rpmhpd_opp_low_svs>;
+ };
+
+ opp-270000000 {
+ opp-hz = /bits/ 64 <270000000>;
+ required-opps = <&rpmhpd_opp_svs>;
+ };
+
+ opp-540000000 {
+ opp-hz = /bits/ 64 <540000000>;
+ required-opps = <&rpmhpd_opp_svs_l1>;
+ };
+
+ opp-810000000 {
+ opp-hz = /bits/ 64 <810000000>;
+ required-opps = <&rpmhpd_opp_nom>;
+ };
+ };
+ };
+
mdss_dsi0: dsi@ae94000 {
compatible = "qcom,sm6350-dsi-ctrl", "qcom,mdss-dsi-ctrl";
reg = <0 0x0ae94000 0 0x400>;
--
2.44.0
^ permalink raw reply related [relevance 92%]
* [PATCH v2 2/3] dt-bindings: display: msm: sm6350-mdss: document DP controller subnode
2024-03-29 7:45 95% [PATCH v2 0/3] DisplayPort support for SM6350/SM7225 Luca Weiss
2024-03-29 7:45 97% ` [PATCH v2 1/3] dt-bindings: display: msm: dp-controller: document SM6350 compatible Luca Weiss
@ 2024-03-29 7:45 97% ` Luca Weiss
2024-03-29 7:45 92% ` [PATCH v2 3/3] arm64: dts: qcom: sm6350: Add DisplayPort controller Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-29 7:45 UTC (permalink / raw)
To: Rob Clark, Abhinav Kumar, Dmitry Baryshkov, Sean Paul,
Marijn Suijten, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, David Airlie, Daniel Vetter, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Kuogee Hsieh,
Krishna Manikandan, Bjorn Andersson, Konrad Dybcio
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm, dri-devel,
freedreno, devicetree, linux-kernel, Luca Weiss
Document the displayport controller subnode of the SM6350 MDSS.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
.../devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml
index c9ba1fae8042..bba666bdffe5 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml
@@ -53,6 +53,15 @@ patternProperties:
compatible:
const: qcom,sm6350-dpu
+ "^displayport-controller@[0-9a-f]+$":
+ type: object
+ additionalProperties: true
+
+ properties:
+ compatible:
+ contains:
+ const: qcom,sm6350-dp
+
"^dsi@[0-9a-f]+$":
type: object
additionalProperties: true
--
2.44.0
^ permalink raw reply related [relevance 97%]
* [PATCH v2 1/3] dt-bindings: display: msm: dp-controller: document SM6350 compatible
2024-03-29 7:45 95% [PATCH v2 0/3] DisplayPort support for SM6350/SM7225 Luca Weiss
@ 2024-03-29 7:45 97% ` Luca Weiss
2024-03-29 7:45 97% ` [PATCH v2 2/3] dt-bindings: display: msm: sm6350-mdss: document DP controller subnode Luca Weiss
2024-03-29 7:45 92% ` [PATCH v2 3/3] arm64: dts: qcom: sm6350: Add DisplayPort controller Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-29 7:45 UTC (permalink / raw)
To: Rob Clark, Abhinav Kumar, Dmitry Baryshkov, Sean Paul,
Marijn Suijten, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, David Airlie, Daniel Vetter, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Kuogee Hsieh,
Krishna Manikandan, Bjorn Andersson, Konrad Dybcio
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm, dri-devel,
freedreno, devicetree, linux-kernel, Luca Weiss
Add the compatible string for the DisplayPort controller on SM6350 which
is compatible with the one on SM8350.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
Documentation/devicetree/bindings/display/msm/dp-controller.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
index ae53cbfb2193..97993feda193 100644
--- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
@@ -29,6 +29,7 @@ properties:
- qcom,sm8650-dp
- items:
- enum:
+ - qcom,sm6350-dp
- qcom,sm8150-dp
- qcom,sm8250-dp
- qcom,sm8450-dp
--
2.44.0
^ permalink raw reply related [relevance 97%]
* [PATCH v2 0/3] DisplayPort support for SM6350/SM7225
@ 2024-03-29 7:45 95% Luca Weiss
2024-03-29 7:45 97% ` [PATCH v2 1/3] dt-bindings: display: msm: dp-controller: document SM6350 compatible Luca Weiss
` (2 more replies)
0 siblings, 3 replies; 200+ results
From: Luca Weiss @ 2024-03-29 7:45 UTC (permalink / raw)
To: Rob Clark, Abhinav Kumar, Dmitry Baryshkov, Sean Paul,
Marijn Suijten, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, David Airlie, Daniel Vetter, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Kuogee Hsieh,
Krishna Manikandan, Bjorn Andersson, Konrad Dybcio
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm, dri-devel,
freedreno, devicetree, linux-kernel, Luca Weiss
Add the required changes to support DisplayPort (normally(?) available
via the USB-C connector) on the SM6350/SM7225 SoC.
This has been tested on a Fairphone 4 smartphone with additional changes
not included in this series (mostly just wiring up TCPM and the SBU
mux).
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
Changes in v2:
- Fix typo in dp-controller patch subject
- Use 'contains' for subnode in mdss schema
- Pick up tags
- Link to v1: https://lore.kernel.org/r/20240328-sm6350-dp-v1-0-215ca2b81c35@fairphone.com
---
Luca Weiss (3):
dt-bindings: display: msm: dp-controller: document SM6350 compatible
dt-bindings: display: msm: sm6350-mdss: document DP controller subnode
arm64: dts: qcom: sm6350: Add DisplayPort controller
.../bindings/display/msm/dp-controller.yaml | 1 +
.../bindings/display/msm/qcom,sm6350-mdss.yaml | 9 +++
arch/arm64/boot/dts/qcom/sm6350.dtsi | 88 ++++++++++++++++++++++
3 files changed, 98 insertions(+)
---
base-commit: 871760455183dc66b3e185f8d3ed2184cc9fac25
change-id: 20240328-sm6350-dp-41238153b448
Best regards,
--
Luca Weiss <luca.weiss@fairphone.com>
^ permalink raw reply [relevance 95%]
* Re: [PATCH 1/3] dt-bindings: display: msm: dp-controller: document SM8250 compatible
2024-03-28 9:42 97% ` [PATCH 1/3] dt-bindings: display: msm: dp-controller: document SM8250 compatible Luca Weiss
@ 2024-03-28 9:49 99% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-28 9:49 UTC (permalink / raw)
To: Luca Weiss, Rob Clark, Abhinav Kumar, Dmitry Baryshkov,
Sean Paul, Marijn Suijten, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, David Airlie, Daniel Vetter, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Kuogee Hsieh,
Krishna Manikandan, Bjorn Andersson, Konrad Dybcio
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm, dri-devel,
freedreno, devicetree, linux-kernel
Stupid typo in subject, should of course be SM6350, not SM8250.
On Thu Mar 28, 2024 at 10:42 AM CET, Luca Weiss wrote:
> Add the compatible string for the DisplayPort controller on SM6350 which
> is compatible with the one on SM8350.
>
> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
> ---
> Documentation/devicetree/bindings/display/msm/dp-controller.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
> index ae53cbfb2193..97993feda193 100644
> --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
> +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
> @@ -29,6 +29,7 @@ properties:
> - qcom,sm8650-dp
> - items:
> - enum:
> + - qcom,sm6350-dp
> - qcom,sm8150-dp
> - qcom,sm8250-dp
> - qcom,sm8450-dp
^ permalink raw reply [relevance 99%]
* [PATCH 3/3] arm64: dts: qcom: sm6350: Add DisplayPort controller
2024-03-28 9:42 96% [PATCH 0/3] DisplayPort support for SM6350/SM7225 Luca Weiss
2024-03-28 9:42 97% ` [PATCH 1/3] dt-bindings: display: msm: dp-controller: document SM8250 compatible Luca Weiss
2024-03-28 9:42 97% ` [PATCH 2/3] dt-bindings: display: msm: sm6350-mdss: document DP controller subnode Luca Weiss
@ 2024-03-28 9:42 92% ` Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-28 9:42 UTC (permalink / raw)
To: Rob Clark, Abhinav Kumar, Dmitry Baryshkov, Sean Paul,
Marijn Suijten, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, David Airlie, Daniel Vetter, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Kuogee Hsieh,
Krishna Manikandan, Bjorn Andersson, Konrad Dybcio
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm, dri-devel,
freedreno, devicetree, linux-kernel, Luca Weiss
Add the node for the DisplayPort controller found on the SM6350 SoC.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
arch/arm64/boot/dts/qcom/sm6350.dtsi | 88 ++++++++++++++++++++++++++++++++++++
1 file changed, 88 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 24bcec3366ef..d7cf4b5ceea6 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -2033,6 +2033,14 @@ dpu_intf1_out: endpoint {
remote-endpoint = <&mdss_dsi0_in>;
};
};
+
+ port@2 {
+ reg = <2>;
+
+ dpu_intf0_out: endpoint {
+ remote-endpoint = <&mdss_dp_in>;
+ };
+ };
};
mdp_opp_table: opp-table {
@@ -2070,6 +2078,86 @@ opp-560000000 {
};
};
+ mdss_dp: displayport-controller@ae90000 {
+ compatible = "qcom,sm6350-dp", "qcom,sm8350-dp";
+ reg = <0 0xae90000 0 0x200>,
+ <0 0xae90200 0 0x200>,
+ <0 0xae90400 0 0x600>,
+ <0 0xae91000 0 0x400>,
+ <0 0xae91400 0 0x400>;
+ interrupt-parent = <&mdss>;
+ interrupts = <12>;
+ clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ <&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
+ <&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
+ <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
+ <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
+ clock-names = "core_iface",
+ "core_aux",
+ "ctrl_link",
+ "ctrl_link_iface",
+ "stream_pixel";
+
+ assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
+ <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
+ assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
+
+ phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>;
+ phy-names = "dp";
+
+ #sound-dai-cells = <0>;
+
+ operating-points-v2 = <&dp_opp_table>;
+ power-domains = <&rpmhpd SM6350_CX>;
+
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ mdss_dp_in: endpoint {
+ remote-endpoint = <&dpu_intf0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mdss_dp_out: endpoint {
+ };
+ };
+ };
+
+ dp_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-160000000 {
+ opp-hz = /bits/ 64 <160000000>;
+ required-opps = <&rpmhpd_opp_low_svs>;
+ };
+
+ opp-270000000 {
+ opp-hz = /bits/ 64 <270000000>;
+ required-opps = <&rpmhpd_opp_svs>;
+ };
+
+ opp-540000000 {
+ opp-hz = /bits/ 64 <540000000>;
+ required-opps = <&rpmhpd_opp_svs_l1>;
+ };
+
+ opp-810000000 {
+ opp-hz = /bits/ 64 <810000000>;
+ required-opps = <&rpmhpd_opp_nom>;
+ };
+ };
+ };
+
mdss_dsi0: dsi@ae94000 {
compatible = "qcom,sm6350-dsi-ctrl", "qcom,mdss-dsi-ctrl";
reg = <0 0x0ae94000 0 0x400>;
--
2.44.0
^ permalink raw reply related [relevance 92%]
* [PATCH 2/3] dt-bindings: display: msm: sm6350-mdss: document DP controller subnode
2024-03-28 9:42 96% [PATCH 0/3] DisplayPort support for SM6350/SM7225 Luca Weiss
2024-03-28 9:42 97% ` [PATCH 1/3] dt-bindings: display: msm: dp-controller: document SM8250 compatible Luca Weiss
@ 2024-03-28 9:42 97% ` Luca Weiss
2024-03-28 9:42 92% ` [PATCH 3/3] arm64: dts: qcom: sm6350: Add DisplayPort controller Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-28 9:42 UTC (permalink / raw)
To: Rob Clark, Abhinav Kumar, Dmitry Baryshkov, Sean Paul,
Marijn Suijten, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, David Airlie, Daniel Vetter, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Kuogee Hsieh,
Krishna Manikandan, Bjorn Andersson, Konrad Dybcio
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm, dri-devel,
freedreno, devicetree, linux-kernel, Luca Weiss
Document the displayport controller subnode of the SM6350 MDSS.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
.../devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml
index c9ba1fae8042..d91b8eca6aba 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml
@@ -53,6 +53,16 @@ patternProperties:
compatible:
const: qcom,sm6350-dpu
+ "^displayport-controller@[0-9a-f]+$":
+ type: object
+ additionalProperties: true
+
+ properties:
+ compatible:
+ items:
+ - const: qcom,sm6350-dp
+ - const: qcom,sm8350-dp
+
"^dsi@[0-9a-f]+$":
type: object
additionalProperties: true
--
2.44.0
^ permalink raw reply related [relevance 97%]
* [PATCH 1/3] dt-bindings: display: msm: dp-controller: document SM8250 compatible
2024-03-28 9:42 96% [PATCH 0/3] DisplayPort support for SM6350/SM7225 Luca Weiss
@ 2024-03-28 9:42 97% ` Luca Weiss
2024-03-28 9:49 99% ` Luca Weiss
2024-03-28 9:42 97% ` [PATCH 2/3] dt-bindings: display: msm: sm6350-mdss: document DP controller subnode Luca Weiss
2024-03-28 9:42 92% ` [PATCH 3/3] arm64: dts: qcom: sm6350: Add DisplayPort controller Luca Weiss
2 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-03-28 9:42 UTC (permalink / raw)
To: Rob Clark, Abhinav Kumar, Dmitry Baryshkov, Sean Paul,
Marijn Suijten, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, David Airlie, Daniel Vetter, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Kuogee Hsieh,
Krishna Manikandan, Bjorn Andersson, Konrad Dybcio
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm, dri-devel,
freedreno, devicetree, linux-kernel, Luca Weiss
Add the compatible string for the DisplayPort controller on SM6350 which
is compatible with the one on SM8350.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
Documentation/devicetree/bindings/display/msm/dp-controller.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
index ae53cbfb2193..97993feda193 100644
--- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
@@ -29,6 +29,7 @@ properties:
- qcom,sm8650-dp
- items:
- enum:
+ - qcom,sm6350-dp
- qcom,sm8150-dp
- qcom,sm8250-dp
- qcom,sm8450-dp
--
2.44.0
^ permalink raw reply related [relevance 97%]
* [PATCH 0/3] DisplayPort support for SM6350/SM7225
@ 2024-03-28 9:42 96% Luca Weiss
2024-03-28 9:42 97% ` [PATCH 1/3] dt-bindings: display: msm: dp-controller: document SM8250 compatible Luca Weiss
` (2 more replies)
0 siblings, 3 replies; 200+ results
From: Luca Weiss @ 2024-03-28 9:42 UTC (permalink / raw)
To: Rob Clark, Abhinav Kumar, Dmitry Baryshkov, Sean Paul,
Marijn Suijten, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, David Airlie, Daniel Vetter, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Kuogee Hsieh,
Krishna Manikandan, Bjorn Andersson, Konrad Dybcio
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm, dri-devel,
freedreno, devicetree, linux-kernel, Luca Weiss
Add the required changes to support DisplayPort (normally(?) available
via the USB-C connector) on the SM6350/SM7225 SoC.
This has been tested on a Fairphone 4 smartphone with additional changes
not included in this series (mostly just wiring up TCPM and the SBU
mux).
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
Luca Weiss (3):
dt-bindings: display: msm: dp-controller: document SM8250 compatible
dt-bindings: display: msm: sm6350-mdss: document DP controller subnode
arm64: dts: qcom: sm6350: Add DisplayPort controller
.../bindings/display/msm/dp-controller.yaml | 1 +
.../bindings/display/msm/qcom,sm6350-mdss.yaml | 10 +++
arch/arm64/boot/dts/qcom/sm6350.dtsi | 88 ++++++++++++++++++++++
3 files changed, 99 insertions(+)
---
base-commit: 871760455183dc66b3e185f8d3ed2184cc9fac25
change-id: 20240328-sm6350-dp-41238153b448
Best regards,
--
Luca Weiss <luca.weiss@fairphone.com>
^ permalink raw reply [relevance 96%]
* [PATCH] drm/msm/adreno: Set highest_bank_bit for A619
@ 2024-03-28 8:02 95% Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-28 8:02 UTC (permalink / raw)
To: Rob Clark, Abhinav Kumar, Dmitry Baryshkov, Sean Paul,
Marijn Suijten, David Airlie, Daniel Vetter, Akhil P Oommen,
Konrad Dybcio
Cc: ~postmarketos/upstreaming, phone-devel, Rob Clark, linux-arm-msm,
dri-devel, freedreno, linux-kernel, Luca Weiss
The default highest_bank_bit of 15 didn't seem to cause issues so far
but downstream defines it to be 14. But similar to [0] leaving it on 14
(or 15 for that matter) causes some corruption issues with some
resolutions with DisplayPort, like 1920x1200.
So set it to 13 for now so that there's no screen corruption.
[0] commit 6a0dbcd20ef2 ("drm/msm/a6xx: set highest_bank_bit to 13 for a610")
Fixes: b7616b5c69e6 ("drm/msm/adreno: Add A619 support")
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
@Akhil: Dmitry & Abhinav said I should ping you specifically to take a
look if you have an idea why HBB=13 works but HBB=14 causes issues.
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index 0674aca0f8a3..cf0b1de1c071 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -1377,6 +1377,10 @@ static void a6xx_calc_ubwc_config(struct adreno_gpu *gpu)
if (adreno_is_a618(gpu))
gpu->ubwc_config.highest_bank_bit = 14;
+ if (adreno_is_a619(gpu))
+ /* TODO: Should be 14 but causes corruption at e.g. 1920x1200 on DP */
+ gpu->ubwc_config.highest_bank_bit = 13;
+
if (adreno_is_a619_holi(gpu))
gpu->ubwc_config.highest_bank_bit = 13;
---
base-commit: d5a436a7b5958caa6fc0dcda6c842f9d951be73b
change-id: 20240328-a619-hbb-a3b6bda9e4a7
Best regards,
--
Luca Weiss <luca.weiss@fairphone.com>
^ permalink raw reply related [relevance 95%]
* [PATCH 5/5] arm64: dts: qcom: sm7225-fairphone-fp4: Enable USB role switching
2024-03-22 8:01 96% [PATCH 0/5] Add TCPM support for PM7250B and Fairphone 4 Luca Weiss
` (3 preceding siblings ...)
2024-03-22 8:01 94% ` [PATCH 4/5] arm64: dts: qcom: pm7250b: Add a TCPM description Luca Weiss
@ 2024-03-22 8:01 88% ` Luca Weiss
4 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-22 8:01 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Liam Girdwood, Mark Brown,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Wesley Cheng,
Bryan O'Donoghue, Greg Kroah-Hartman
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
linux-kernel, devicetree, linux-usb, Luca Weiss
Configure the Type-C and VBUS regulator on PM7250B and wire it up to the
USB PHY, so that USB role and orientation switching works.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
With this patch I'm not quite sure if the 'ports' are connected
correctly, though functionally everything appears to work fine.
On some other SoCs port@1 in qmpphy and a second port in dwc3 are
connected together also - one port of USB 2.0 HS, one for USB 3.0 SS.
Here I'm following sm8250's solution. Also checking the binding doc
doesn't reveal anything useful.
---
arch/arm64/boot/dts/qcom/sm6350.dtsi | 25 ++++++++++
arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts | 57 ++++++++++++++++++++++-
2 files changed, 81 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 24bcec3366ef..b267500467f0 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -1686,6 +1686,27 @@ usb_1_qmpphy: phy@88e8000 {
#phy-cells = <1>;
status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ usb_1_qmpphy_out: endpoint {};
+ };
+
+ port@1 {
+ reg = <1>;
+ };
+
+ port@2 {
+ reg = <2>;
+
+ usb_1_qmpphy_dp_in: endpoint {};
+ };
+ };
};
dc_noc: interconnect@9160000 {
@@ -1861,6 +1882,10 @@ usb_1_dwc3: usb@a600000 {
snps,hird-threshold = /bits/ 8 <0x10>;
phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy", "usb3-phy";
+
+ port {
+ usb_1_role_switch_out: endpoint {};
+ };
};
};
diff --git a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts
index bc67e8c1fe4d..104f23ec322d 100644
--- a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts
+++ b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts
@@ -19,6 +19,7 @@
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
+#include <dt-bindings/usb/pd.h>
#include "sm7225.dtsi"
#include "pm6150l.dtsi"
#include "pm6350.dtsi"
@@ -543,6 +544,50 @@ conn-therm@1 {
};
};
+&pm7250b_typec {
+ vdd-pdphy-supply = <&vreg_l3a>;
+
+ status = "okay";
+
+ connector {
+ compatible = "usb-c-connector";
+
+ power-role = "source";
+ data-role = "dual";
+ self-powered;
+
+ source-pdos = <PDO_FIXED(5000, 1500,
+ PDO_FIXED_DUAL_ROLE |
+ PDO_FIXED_USB_COMM |
+ PDO_FIXED_DATA_SWAP)>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ pm7250b_role_switch_in: endpoint {
+ remote-endpoint = <&usb_1_role_switch_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ pm7250b_typec_mux_in: endpoint {
+ remote-endpoint = <&usb_1_qmpphy_out>;
+ };
+ };
+ };
+ };
+};
+
+&pm7250b_vbus {
+ regulator-min-microamp = <500000>;
+ regulator-max-microamp = <1500000>;
+ status = "okay";
+};
+
&pmk8350_rtc {
status = "okay";
};
@@ -726,7 +771,12 @@ &usb_1 {
&usb_1_dwc3 {
maximum-speed = "super-speed";
- dr_mode = "peripheral";
+ dr_mode = "otg";
+ usb-role-switch;
+};
+
+&usb_1_role_switch_out {
+ remote-endpoint = <&pm7250b_role_switch_in>;
};
&usb_1_hsphy {
@@ -740,10 +790,15 @@ &usb_1_hsphy {
&usb_1_qmpphy {
vdda-phy-supply = <&vreg_l22a>;
vdda-pll-supply = <&vreg_l16a>;
+ orientation-switch;
status = "okay";
};
+&usb_1_qmpphy_out {
+ remote-endpoint = <&pm7250b_typec_mux_in>;
+};
+
&wifi {
vdd-0.8-cx-mx-supply = <&vreg_l4a>;
vdd-1.8-xo-supply = <&vreg_l7a>;
--
2.44.0
^ permalink raw reply related [relevance 88%]
* [PATCH 4/5] arm64: dts: qcom: pm7250b: Add a TCPM description
2024-03-22 8:01 96% [PATCH 0/5] Add TCPM support for PM7250B and Fairphone 4 Luca Weiss
` (2 preceding siblings ...)
2024-03-22 8:01 98% ` [PATCH 3/5] arm64: dts: qcom: pm7250b: Add node for PMIC VBUS booster Luca Weiss
@ 2024-03-22 8:01 94% ` Luca Weiss
2024-03-22 8:01 88% ` [PATCH 5/5] arm64: dts: qcom: sm7225-fairphone-fp4: Enable USB role switching Luca Weiss
4 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-22 8:01 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Liam Girdwood, Mark Brown,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Wesley Cheng,
Bryan O'Donoghue, Greg Kroah-Hartman
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
linux-kernel, devicetree, linux-usb, Luca Weiss
Type-C port management functionality lives inside of the PMIC block on
pm7250b.
The Type-C port management logic controls orientation detection,
vbus/vconn sense and to send/receive Type-C Power Domain messages.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
arch/arm64/boot/dts/qcom/pm7250b.dtsi | 39 +++++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/pm7250b.dtsi b/arch/arm64/boot/dts/qcom/pm7250b.dtsi
index 91a046b3529c..d9abac052afe 100644
--- a/arch/arm64/boot/dts/qcom/pm7250b.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm7250b.dtsi
@@ -51,6 +51,45 @@ pm7250b_vbus: usb-vbus-regulator@1100 {
reg = <0x1100>;
};
+ pm7250b_typec: typec@1500 {
+ compatible = "qcom,pm7250b-typec", "qcom,pm8150b-typec";
+ reg = <0x1500>,
+ <0x1700>;
+ interrupts = <PM7250B_SID 0x15 0x00 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x15 0x01 IRQ_TYPE_EDGE_BOTH>,
+ <PM7250B_SID 0x15 0x02 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x15 0x03 IRQ_TYPE_EDGE_BOTH>,
+ <PM7250B_SID 0x15 0x04 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x15 0x05 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x15 0x06 IRQ_TYPE_EDGE_BOTH>,
+ <PM7250B_SID 0x15 0x07 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x17 0x00 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x17 0x01 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x17 0x02 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x17 0x03 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x17 0x04 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x17 0x05 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x17 0x06 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x17 0x07 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "or-rid-detect-change",
+ "vpd-detect",
+ "cc-state-change",
+ "vconn-oc",
+ "vbus-change",
+ "attach-detach",
+ "legacy-cable-detect",
+ "try-snk-src-detect",
+ "sig-tx",
+ "sig-rx",
+ "msg-tx",
+ "msg-rx",
+ "msg-tx-failed",
+ "msg-tx-discarded",
+ "msg-rx-discarded",
+ "fr-swap";
+ vdd-vbus-supply = <&pm7250b_vbus>;
+ };
+
pm7250b_temp: temp-alarm@2400 {
compatible = "qcom,spmi-temp-alarm";
reg = <0x2400>;
--
2.44.0
^ permalink raw reply related [relevance 94%]
* [PATCH 3/5] arm64: dts: qcom: pm7250b: Add node for PMIC VBUS booster
2024-03-22 8:01 96% [PATCH 0/5] Add TCPM support for PM7250B and Fairphone 4 Luca Weiss
2024-03-22 8:01 98% ` [PATCH 1/5] dt-bindings: regulator: qcom,usb-vbus-regulator: Add PM7250B compatible Luca Weiss
2024-03-22 8:01 98% ` [PATCH 2/5] dt-bindings: usb: qcom,pmic-typec: Add support for the PM7250B PMIC Luca Weiss
@ 2024-03-22 8:01 98% ` Luca Weiss
2024-03-22 8:01 94% ` [PATCH 4/5] arm64: dts: qcom: pm7250b: Add a TCPM description Luca Weiss
2024-03-22 8:01 88% ` [PATCH 5/5] arm64: dts: qcom: sm7225-fairphone-fp4: Enable USB role switching Luca Weiss
4 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-22 8:01 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Liam Girdwood, Mark Brown,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Wesley Cheng,
Bryan O'Donoghue, Greg Kroah-Hartman
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
linux-kernel, devicetree, linux-usb, Luca Weiss
Add the required DTS node for the USB VBUS output regulator, which is
available on PM7250B. This will provide the VBUS source to connected
peripherals.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
arch/arm64/boot/dts/qcom/pm7250b.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/pm7250b.dtsi b/arch/arm64/boot/dts/qcom/pm7250b.dtsi
index 3bf7cf5d1700..91a046b3529c 100644
--- a/arch/arm64/boot/dts/qcom/pm7250b.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm7250b.dtsi
@@ -45,6 +45,12 @@ pmic@PM7250B_SID {
#address-cells = <1>;
#size-cells = <0>;
+ pm7250b_vbus: usb-vbus-regulator@1100 {
+ compatible = "qcom,pm7250b-vbus-reg", "qcom,pm8150b-vbus-reg";
+ status = "disabled";
+ reg = <0x1100>;
+ };
+
pm7250b_temp: temp-alarm@2400 {
compatible = "qcom,spmi-temp-alarm";
reg = <0x2400>;
--
2.44.0
^ permalink raw reply related [relevance 98%]
* [PATCH 2/5] dt-bindings: usb: qcom,pmic-typec: Add support for the PM7250B PMIC
2024-03-22 8:01 96% [PATCH 0/5] Add TCPM support for PM7250B and Fairphone 4 Luca Weiss
2024-03-22 8:01 98% ` [PATCH 1/5] dt-bindings: regulator: qcom,usb-vbus-regulator: Add PM7250B compatible Luca Weiss
@ 2024-03-22 8:01 98% ` Luca Weiss
2024-03-22 8:01 98% ` [PATCH 3/5] arm64: dts: qcom: pm7250b: Add node for PMIC VBUS booster Luca Weiss
` (2 subsequent siblings)
4 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-22 8:01 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Liam Girdwood, Mark Brown,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Wesley Cheng,
Bryan O'Donoghue, Greg Kroah-Hartman
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
linux-kernel, devicetree, linux-usb, Luca Weiss
The PM6150 PMIC has the same Type-C register block as the PM8150B.
Define corresponding compatible string, having the qcom,pm8150b-vbus-reg
as a fallback.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
Documentation/devicetree/bindings/usb/qcom,pmic-typec.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/usb/qcom,pmic-typec.yaml b/Documentation/devicetree/bindings/usb/qcom,pmic-typec.yaml
index d9694570c419..0cdc60b76fbd 100644
--- a/Documentation/devicetree/bindings/usb/qcom,pmic-typec.yaml
+++ b/Documentation/devicetree/bindings/usb/qcom,pmic-typec.yaml
@@ -21,6 +21,7 @@ properties:
- items:
- enum:
- qcom,pm6150-typec
+ - qcom,pm7250b-typec
- const: qcom,pm8150b-typec
- items:
- enum:
--
2.44.0
^ permalink raw reply related [relevance 98%]
* [PATCH 1/5] dt-bindings: regulator: qcom,usb-vbus-regulator: Add PM7250B compatible
2024-03-22 8:01 96% [PATCH 0/5] Add TCPM support for PM7250B and Fairphone 4 Luca Weiss
@ 2024-03-22 8:01 98% ` Luca Weiss
2024-03-22 8:01 98% ` [PATCH 2/5] dt-bindings: usb: qcom,pmic-typec: Add support for the PM7250B PMIC Luca Weiss
` (3 subsequent siblings)
4 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-22 8:01 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Liam Girdwood, Mark Brown,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Wesley Cheng,
Bryan O'Donoghue, Greg Kroah-Hartman
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
linux-kernel, devicetree, linux-usb, Luca Weiss
The VBUS register block on the PM6150 PMIC shares the design with the
PM8150B one. Define corresponding compatible string, having the
qcom,pm8150b-vbus-reg as a fallback.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
Documentation/devicetree/bindings/regulator/qcom,usb-vbus-regulator.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/regulator/qcom,usb-vbus-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,usb-vbus-regulator.yaml
index 33ae1f786802..fcefc722ee2a 100644
--- a/Documentation/devicetree/bindings/regulator/qcom,usb-vbus-regulator.yaml
+++ b/Documentation/devicetree/bindings/regulator/qcom,usb-vbus-regulator.yaml
@@ -26,6 +26,7 @@ properties:
- enum:
- qcom,pm4125-vbus-reg
- qcom,pm6150-vbus-reg
+ - qcom,pm7250b-vbus-reg
- qcom,pmi632-vbus-reg
- const: qcom,pm8150b-vbus-reg
--
2.44.0
^ permalink raw reply related [relevance 98%]
* [PATCH 0/5] Add TCPM support for PM7250B and Fairphone 4
@ 2024-03-22 8:01 96% Luca Weiss
2024-03-22 8:01 98% ` [PATCH 1/5] dt-bindings: regulator: qcom,usb-vbus-regulator: Add PM7250B compatible Luca Weiss
` (4 more replies)
0 siblings, 5 replies; 200+ results
From: Luca Weiss @ 2024-03-22 8:01 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Liam Girdwood, Mark Brown,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Wesley Cheng,
Bryan O'Donoghue, Greg Kroah-Hartman
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
linux-kernel, devicetree, linux-usb, Luca Weiss
This series adds support for Type-C Port Management on the Fairphone 4
which enables USB role switching and orientation switching.
This enables a user for example to plug in a USB stick or a USB keyboard
to the Type-C port.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
Luca Weiss (5):
dt-bindings: regulator: qcom,usb-vbus-regulator: Add PM7250B compatible
dt-bindings: usb: qcom,pmic-typec: Add support for the PM7250B PMIC
arm64: dts: qcom: pm7250b: Add node for PMIC VBUS booster
arm64: dts: qcom: pm7250b: Add a TCPM description
arm64: dts: qcom: sm7225-fairphone-fp4: Enable USB role switching
.../regulator/qcom,usb-vbus-regulator.yaml | 1 +
.../devicetree/bindings/usb/qcom,pmic-typec.yaml | 1 +
arch/arm64/boot/dts/qcom/pm7250b.dtsi | 45 +++++++++++++++++
arch/arm64/boot/dts/qcom/sm6350.dtsi | 25 ++++++++++
arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts | 57 +++++++++++++++++++++-
5 files changed, 128 insertions(+), 1 deletion(-)
---
base-commit: fa564eb0e6faf40ceea92b2e5ba7a08d0a79594c
change-id: 20240322-fp4-tcpm-2ad68ef55346
Best regards,
--
Luca Weiss <luca.weiss@fairphone.com>
^ permalink raw reply [relevance 96%]
* Re: [PATCH v5 2/3] arm64: dts: qcom: sc7280: Add UFS nodes for sc7280 soc
@ 2024-03-22 7:59 99% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-22 7:59 UTC (permalink / raw)
To: Manivannan Sadhasivam
Cc: Nitin Rawat, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Alim Akhtar, Avri Altman, Bart Van Assche, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, cros-qcom-dts-watchers,
~postmarketos/upstreaming, phone-devel, linux-arm-msm,
linux-scsi, devicetree, linux-kernel
On Mon Dec 4, 2023 at 6:28 PM CET, Manivannan Sadhasivam wrote:
> On Mon, Dec 04, 2023 at 01:21:42PM +0100, Luca Weiss wrote:
> > On Mon Dec 4, 2023 at 1:15 PM CET, Nitin Rawat wrote:
> > >
> > >
> > > On 12/4/2023 3:54 PM, Luca Weiss wrote:
> > > > From: Nitin Rawat <quic_nitirawa@quicinc.com>
> > > >
> > > > Add UFS host controller and PHY nodes for sc7280 soc.
> > > >
> > > > Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com>
> > > > Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> > > > Tested-by: Konrad Dybcio <konrad.dybcio@linaro.org> # QCM6490 FP5
> > > > [luca: various cleanups and additions as written in the cover letter]
> > > > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
> > > > ---
> > > > arch/arm64/boot/dts/qcom/sc7280.dtsi | 74 +++++++++++++++++++++++++++++++++++-
> > > > 1 file changed, 73 insertions(+), 1 deletion(-)
> > > >
> > > > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> > > > index 04bf85b0399a..8b08569f2191 100644
> > > > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> > > > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> > > > @@ -15,6 +15,7 @@
> > > > #include <dt-bindings/dma/qcom-gpi.h>
> > > > #include <dt-bindings/firmware/qcom,scm.h>
> > > > #include <dt-bindings/gpio/gpio.h>
> > > > +#include <dt-bindings/interconnect/qcom,icc.h>
> > > > #include <dt-bindings/interconnect/qcom,osm-l3.h>
> > > > #include <dt-bindings/interconnect/qcom,sc7280.h>
> > > > #include <dt-bindings/interrupt-controller/arm-gic.h>
> > > > @@ -906,7 +907,7 @@ gcc: clock-controller@100000 {
> > > > clocks = <&rpmhcc RPMH_CXO_CLK>,
> > > > <&rpmhcc RPMH_CXO_CLK_A>, <&sleep_clk>,
> > > > <0>, <&pcie1_phy>,
> > > > - <0>, <0>, <0>,
> > > > + <&ufs_mem_phy 0>, <&ufs_mem_phy 1>, <&ufs_mem_phy 2>,
> > > > <&usb_1_qmpphy QMP_USB43DP_USB3_PIPE_CLK>;
> > > > clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk",
> > > > "pcie_0_pipe_clk", "pcie_1_pipe_clk",
> > > > @@ -2238,6 +2239,77 @@ pcie1_phy: phy@1c0e000 {
> > > > status = "disabled";
> > > > };
> > > >
> > > > + ufs_mem_hc: ufs@1d84000 {
> > > > + compatible = "qcom,sc7280-ufshc", "qcom,ufshc",
> > > > + "jedec,ufs-2.0";
> > > > + reg = <0x0 0x01d84000 0x0 0x3000>;
> > > > + interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
> > > > + phys = <&ufs_mem_phy>;
> > > > + phy-names = "ufsphy";
> > > > + lanes-per-direction = <2>;
> > > > + #reset-cells = <1>;
> > > > + resets = <&gcc GCC_UFS_PHY_BCR>;
> > > > + reset-names = "rst";
> > > > +
> > > > + power-domains = <&gcc GCC_UFS_PHY_GDSC>;
> > > > + required-opps = <&rpmhpd_opp_nom>;
> > > > +
> > > > + iommus = <&apps_smmu 0x80 0x0>;
> > > > + dma-coherent;
> > > > +
> > > > + interconnects = <&aggre1_noc MASTER_UFS_MEM QCOM_ICC_TAG_ALWAYS
> > > > + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
> > > > + <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
> > > > + &cnoc2 SLAVE_UFS_MEM_CFG QCOM_ICC_TAG_ALWAYS>;
> > > > + interconnect-names = "ufs-ddr", "cpu-ufs";
> > > > +
> > > > + clocks = <&gcc GCC_UFS_PHY_AXI_CLK>,
> > > > + <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
> > > > + <&gcc GCC_UFS_PHY_AHB_CLK>,
> > > > + <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>,
> > > > + <&rpmhcc RPMH_CXO_CLK>,
> > > > + <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>,
> > > > + <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
> > > > + <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>;
> > > > + clock-names = "core_clk",
> > > > + "bus_aggr_clk",
> > > > + "iface_clk",
> > > > + "core_clk_unipro",
> > > > + "ref_clk",
> > > > + "tx_lane0_sync_clk",
> > > > + "rx_lane0_sync_clk",
> > > > + "rx_lane1_sync_clk";
> > > > + freq-table-hz =
> > > > + <75000000 300000000>,
> > > > + <0 0>,
> > > > + <0 0>,
> > > > + <75000000 300000000>,
> > > > + <0 0>,
> > > > + <0 0>,
> > > > + <0 0>,
> > > > + <0 0>;
> > > > + status = "disabled";
> > > > + };
> > > > +
> > > > + ufs_mem_phy: phy@1d87000 {
> > > > + compatible = "qcom,sc7280-qmp-ufs-phy";
> > > > + reg = <0x0 0x01d87000 0x0 0xe00>;
> > > > + clocks = <&rpmhcc RPMH_CXO_CLK>,
> > > > + <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
> > > > + <&gcc GCC_UFS_1_CLKREF_EN>;
> > > > + clock-names = "ref", "ref_aux", "qref";
> > > > +
> > > > + power-domains = <&gcc GCC_UFS_PHY_GDSC>;
> >
> > Hi Nitin,
> >
> > >
> > > GCC_UFS_PHY_GDSC is UFS controller GDSC. For sc7280 Phy we don't need this.
> >
> > In the current dt-bindings the power-domains property is required.
> >
> > Is there another power-domain for the PHY to use, or do we need to
> > adjust the bindings to not require power-domains property for ufs phy on
> > sc7280?
> >
>
> PHYs are backed by MX power domain. So you should use that.
>
> > Also, with "PHY" in the name, it's interesting that this is not for the
> > phy ;)
> >
>
> Yes, confusing indeed. But the controllers (PCIe, UFS, USB etc...) are backed by
> GDSCs and all the analog components (PHYs) belong to MX domain since it is kind
> of always ON.
>
> I'll submit a series to fix this for the rest of the SoCs.
Hi Mani,
Did you get around to sending such series?
This would also fix some binding warnings, e.g. on SM6350.
arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dtb: phy@1d87000: 'power-domains' is a required property
from schema $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-ufs-phy.yaml#
Regards
Luca
>
> - Mani
>
> > Regards
> > Luca
> >
> > >
> > > > +
> > > > + resets = <&ufs_mem_hc 0>;
> > > > + reset-names = "ufsphy";
> > > > +
> > > > + #clock-cells = <1>;
> > > > + #phy-cells = <0>;
> > > > +
> > > > + status = "disabled";
> > > > + };
> > > > +
> > > > ipa: ipa@1e40000 {
> > > > compatible = "qcom,sc7280-ipa";
> > > >
> > > >
> >
^ permalink raw reply [relevance 99%]
* Re: [PATCH] drm/bridge: Select DRM_KMS_HELPER for DRM_PANEL_BRIDGE
@ 2024-03-18 13:48 99% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-18 13:48 UTC (permalink / raw)
To: Jani Nikula, Neil Armstrong, Andrzej Hajda, Robert Foss,
Laurent Pinchart, Jonas Karlman, Jernej Skrabec,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
David Airlie, Daniel Vetter
Cc: ~postmarketos/upstreaming, phone-devel, dri-devel, linux-kernel
On Mon Mar 18, 2024 at 11:59 AM CET, Jani Nikula wrote:
> On Mon, 18 Mar 2024, Jani Nikula <jani.nikula@linux.intel.com> wrote:
> > On Mon, 18 Mar 2024, Neil Armstrong <neil.armstrong@linaro.org> wrote:
> >> Hi,
> >>
> >> On Thu, 11 Jan 2024 13:38:04 +0100, Luca Weiss wrote:
> >>> Since the kconfig symbol of DRM_PANEL_BRIDGE is only adding
> >>> bridge/panel.o to drm_kms_helper object, we need to select
> >>> DRM_KMS_HELPER to make sure the file is actually getting built.
> >>>
> >>> Otherwise with certain defconfigs e.g. devm_drm_of_get_bridge will not
> >>> be properly available:
> >>>
> >>> [...]
> >>
> >> Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git (drm-misc-fixes)
> >>
> >> [1/1] drm/bridge: Select DRM_KMS_HELPER for DRM_PANEL_BRIDGE
> >> https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/e3f18b0dd1db242791afbc3bd173026163ce0ccc
> >
> > With my kernel config, e3f18b0dd1db ("drm/bridge: Select DRM_KMS_HELPER
> > for DRM_PANEL_BRIDGE") leads to:
> >
> > WARNING: unmet direct dependencies detected for DRM_KMS_HELPER
> > Depends on [m]: HAS_IOMEM [=y] && DRM [=m]
> > Selected by [y]:
> > - DRM_PANEL_BRIDGE [=y] && HAS_IOMEM [=y] && DRM_BRIDGE [=y]
> > Selected by [m]:
> > - DRM [=m] && HAS_IOMEM [=y] && (AGP [=y] || AGP [=y]=n) && !EMULATED_CMPXCHG && HAS_DMA [=y] && DRM_FBDEV_EMULATION [=y]
> > - DRM_MIPI_DBI [=m] && HAS_IOMEM [=y] && DRM [=m]
> > - DRM_KUNIT_TEST [=m] && HAS_IOMEM [=y] && DRM [=m] && KUNIT [=y] && MMU [=y]
> > - DRM_RADEON [=m] && HAS_IOMEM [=y] && DRM [=m] && PCI [=y] && MMU [=y] && (AGP [=y] || !AGP [=y])
> > - DRM_AMDGPU [=m] && HAS_IOMEM [=y] && DRM [=m] && PCI [=y] && MMU [=y] && !UML
> > - DRM_NOUVEAU [=m] && HAS_IOMEM [=y] && DRM [=m] && PCI [=y] && MMU [=y]
> > - DRM_I915 [=m] && HAS_IOMEM [=y] && DRM [=m] && X86 [=y] && PCI [=y] && !PREEMPT_RT [=n]
> > - DRM_XE [=m] && HAS_IOMEM [=y] && DRM [=m] && PCI [=y] && MMU [=y] && (m && MODULES [=y] || y && KUNIT [=y]=y) && 64BIT [=y]
> > - DRM_VKMS [=m] && HAS_IOMEM [=y] && DRM [=m] && MMU [=y]
> > - DRM_VMWGFX [=m] && HAS_IOMEM [=y] && DRM [=m] && PCI [=y] && MMU [=y] && (X86 [=y] || ARM64)
> > - DRM_GMA500 [=m] && HAS_IOMEM [=y] && DRM [=m] && PCI [=y] && X86 [=y] && MMU [=y]
> > - DRM_UDL [=m] && HAS_IOMEM [=y] && DRM [=m] && USB [=m] && USB_ARCH_HAS_HCD [=y] && MMU [=y]
> > - DRM_AST [=m] && HAS_IOMEM [=y] && DRM [=m] && PCI [=y] && MMU [=y]
> > - DRM_MGAG200 [=m] && HAS_IOMEM [=y] && DRM [=m] && PCI [=y] && MMU [=y]
> > - DRM_QXL [=m] && HAS_IOMEM [=y] && DRM [=m] && PCI [=y] && MMU [=y]
> > - DRM_VIRTIO_GPU [=m] && HAS_IOMEM [=y] && DRM [=m] && VIRTIO_MENU [=y] && MMU [=y]
> > - DRM_BOCHS [=m] && HAS_IOMEM [=y] && DRM [=m] && PCI [=y] && MMU [=y]
> > - DRM_CIRRUS_QEMU [=m] && HAS_IOMEM [=y] && DRM [=m] && PCI [=y] && MMU [=y]
> > - DRM_GM12U320 [=m] && HAS_IOMEM [=y] && DRM [=m] && USB [=m] && MMU [=y]
> > - DRM_PANEL_MIPI_DBI [=m] && HAS_IOMEM [=y] && DRM [=m] && SPI [=y]
> > - DRM_SIMPLEDRM [=m] && HAS_IOMEM [=y] && DRM [=m] && MMU [=y]
> > - TINYDRM_HX8357D [=m] && HAS_IOMEM [=y] && DRM [=m] && SPI [=y]
> > - TINYDRM_ILI9163 [=m] && HAS_IOMEM [=y] && DRM [=m] && SPI [=y]
> > - TINYDRM_ILI9225 [=m] && HAS_IOMEM [=y] && DRM [=m] && SPI [=y]
> > - TINYDRM_ILI9341 [=m] && HAS_IOMEM [=y] && DRM [=m] && SPI [=y]
> > - TINYDRM_ILI9486 [=m] && HAS_IOMEM [=y] && DRM [=m] && SPI [=y]
> > - TINYDRM_MI0283QT [=m] && HAS_IOMEM [=y] && DRM [=m] && SPI [=y]
> > - TINYDRM_REPAPER [=m] && HAS_IOMEM [=y] && DRM [=m] && SPI [=y]
> > - TINYDRM_ST7586 [=m] && HAS_IOMEM [=y] && DRM [=m] && SPI [=y]
> > - TINYDRM_ST7735R [=m] && HAS_IOMEM [=y] && DRM [=m] && SPI [=y]
> > - DRM_XEN_FRONTEND [=m] && HAS_IOMEM [=y] && XEN [=y] && DRM [=m]
> > - DRM_VBOXVIDEO [=m] && HAS_IOMEM [=y] && DRM [=m] && X86 [=y] && PCI [=y]
> > - DRM_GUD [=m] && HAS_IOMEM [=y] && DRM [=m] && USB [=m] && MMU [=y]
> > - DRM_SSD130X [=m] && HAS_IOMEM [=y] && DRM [=m] && MMU [=y]
> > - DRM_ANALOGIX_ANX78XX [=m] && HAS_IOMEM [=y] && DRM [=m] && DRM_BRIDGE [=y]
>
> Please read Documentation/kbuild/kconfig-language.rst.
>
> Basically boolean DRM_PANEL_BRIDGE selecting tristate DRM_KMS_HELPER
> forces it to y while it should remain m.
Would you know the correct fix for this? I'm aware of the pattern
"select FOO || !FOO" but I guess it's also not applicable here?
In any case building DRM_PANEL_BRIDGE also needs to build
DRM_KMS_HELPER, otherwise the object files just don't get used.
Unfortunately I'm not versed well enough at all in Kconfig :/
>
> Please revert.
>
> BR,
> Jani.
^ permalink raw reply [relevance 99%]
* Re: [PATCH RFT 0/7] arm64: qcom: allow up to 4 lanes for the Type-C DisplayPort Altmode
@ 2024-03-18 10:45 99% ` Luca Weiss
1 sibling, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-18 10:45 UTC (permalink / raw)
To: Bjorn Andersson, Neil Armstrong
Cc: Konrad Dybcio, Vinod Koul, Kishon Vijay Abraham I, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Abhinav Kumar, linux-arm-msm,
linux-phy, devicetree, linux-kernel
On Sat Mar 16, 2024 at 5:01 PM CET, Bjorn Andersson wrote:
> On Fri, Mar 15, 2024 at 06:35:15PM +0100, Neil Armstrong wrote:
> > On 15/03/2024 18:19, Luca Weiss wrote:
> > > On Thu Feb 29, 2024 at 2:07 PM CET, Neil Armstrong wrote:
> > > > Register a typec mux in order to change the PHY mode on the Type-C
> > > > mux events depending on the mode and the svid when in Altmode setup.
> > > >
> > > > The DisplayPort phy should be left enabled if is still powered on
> > > > by the DRM DisplayPort controller, so bail out until the DisplayPort
> > > > PHY is not powered off.
> > > >
> > > > The Type-C Mode/SVID only changes on plug/unplug, and USB SAFE states
> > > > will be set in between of USB-Only, Combo and DisplayPort Only so
> > > > this will leave enough time to the DRM DisplayPort controller to
> > > > turn of the DisplayPort PHY.
> > > >
> > > > The patchset also includes bindings changes and DT changes.
> > > >
> > > > This has been successfully tested on an SM8550 board, but the
> > > > Thinkpad X13s deserved testing between non-PD USB, non-PD DisplayPort,
> > > > PD USB Hubs and PD Altmode Dongles to make sure the switch works
> > > > as expected.
> > > >
> > > > The DisplayPort 4 lanes setup can be check with:
> > > > $ cat /sys/kernel/debug/dri/ae01000.display-controller/DP-1/dp_debug
> > > > name = msm_dp
> > > > drm_dp_link
> > > > rate = 540000
> > > > num_lanes = 4
> > >
> > > Hi Neil,
> > >
> > > I tried this on QCM6490/SC7280 which should also support 4-lane DP but I
> > > haven't had any success so far.
> > >
> [..]
> > > [ 1775.563969] [drm:dp_ctrl_link_train] *ERROR* max v_level reached
> > > [ 1775.564031] [drm:dp_ctrl_link_train] *ERROR* link training #1 failed. ret=-11
> >
> > Interesting #1 means the 4 lanes are not physically connected to the other side,
> > perhaps QCM6490/SC7280 requires a specific way to enable the 4 lanes in the PHY,
> > or some fixups in the init tables.
> >
>
> I tested the same on rb3gen2 (qcs6490) a couple of weeks ago, with the
> same outcome. Looking at the AUX reads, after switching to 4-lane the
> link training is failing on all 4 lanes, in contrast to succeeding only
> on the first 2 if you e.g. forget to mux the other two.
Good to know it's not just my device then ;)
>
> As such, my expectation is that there's something wrong in the QMP PHY
> (or possibly redriver) for this platform.
Since I imagine rb3gen2 uses a different redriver setup compared to FP5,
I wouldn't say that's at fault for now? And at least my ptn36502 driver
only has very little difference between 2-lane and 4-lane setup, only
setting the mode to DP-only and 4-lane (vs USB+DP and 2-lane), nothing
else.
Regards
Luca
>
> Regards,
> Bjorn
^ permalink raw reply [relevance 99%]
* [PATCH 2/2] ARM: dts: qcom: msm8974: Add empty chosen node
2024-03-18 9:24 88% [PATCH 0/2] Small fixes for MSM8974 SoC dtsi Luca Weiss
2024-03-18 9:24 87% ` [PATCH 1/2] ARM: dts: qcom: msm8974: Add @0 to memory node name Luca Weiss
@ 2024-03-18 9:24 88% ` Luca Weiss
1 sibling, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-18 9:24 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss
Add an empty /chosen node to the dtsi like is common on most other
Qualcomm SoC files, so that various pieces of software expecting this
node to exist don't complain.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
arch/arm/boot/dts/qcom/qcom-msm8974.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
index 00c6526a525d..2ec4ec4e5d2a 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
@@ -14,6 +14,8 @@ / {
#size-cells = <1>;
interrupt-parent = <&intc>;
+ chosen { };
+
clocks {
xo_board: xo_board {
compatible = "fixed-clock";
--
2.44.0
^ permalink raw reply related [relevance 88%]
* [PATCH 1/2] ARM: dts: qcom: msm8974: Add @0 to memory node name
2024-03-18 9:24 88% [PATCH 0/2] Small fixes for MSM8974 SoC dtsi Luca Weiss
@ 2024-03-18 9:24 87% ` Luca Weiss
2024-03-18 9:24 88% ` [PATCH 2/2] ARM: dts: qcom: msm8974: Add empty chosen node Luca Weiss
1 sibling, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-18 9:24 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss
Add the @0 from reg to the node name, so that both dtc warning and dt
validation failure get resolved.
arch/arm/boot/dts/qcom/qcom-msm8974.dtsi:106.9-109.4: Warning (unit_address_vs_reg): /memory: node has a reg or ranges property, but no unit name
[..]/arch/arm/boot/dts/qcom/qcom-msm8974pro-fairphone-fp2.dtb: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 0]]}
from schema $id: http://devicetree.org/schemas/root-node.yaml#
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
arch/arm/boot/dts/qcom/qcom-msm8974.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
index 5efc38d712cc..00c6526a525d 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
@@ -103,7 +103,7 @@ scm {
};
};
- memory {
+ memory@0 {
device_type = "memory";
reg = <0x0 0x0>;
};
--
2.44.0
^ permalink raw reply related [relevance 87%]
* [PATCH 0/2] Small fixes for MSM8974 SoC dtsi
@ 2024-03-18 9:24 88% Luca Weiss
2024-03-18 9:24 87% ` [PATCH 1/2] ARM: dts: qcom: msm8974: Add @0 to memory node name Luca Weiss
2024-03-18 9:24 88% ` [PATCH 2/2] ARM: dts: qcom: msm8974: Add empty chosen node Luca Weiss
0 siblings, 2 replies; 200+ results
From: Luca Weiss @ 2024-03-18 9:24 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss
One fix for dt schema validation, one for the /chosen node.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Luca Weiss (2):
ARM: dts: qcom: msm8974: Add @0 to memory node name
ARM: dts: qcom: msm8974: Add empty chosen node
arch/arm/boot/dts/qcom/qcom-msm8974.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
---
base-commit: f6cef5f8c37f58a3bc95b3754c3ae98e086631ca
change-id: 20240318-msm8974-misc2-1fb92ae6bdf3
Best regards,
--
Luca Weiss <luca@z3ntu.xyz>
^ permalink raw reply [relevance 88%]
* Re: ERROR: modpost: "devm_drm_of_get_bridge" [drivers/usb/typec/mux/ptn36502.ko] undefined!
@ 2024-03-18 7:55 99% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-18 7:55 UTC (permalink / raw)
To: kernel test robot
Cc: oe-kbuild-all, linux-kernel, Heikki Krogerus, Neil Armstrong,
Dmitry Baryshkov
On Sat Mar 16, 2024 at 7:23 AM CET, kernel test robot wrote:
> tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
> head: 66a27abac311a30edbbb65fe8c41ff1b13876faa
> commit: 8e99dc783648e5e663494434544bdc5160522de3 usb: typec: add support for PTN36502 redriver
> date: 5 months ago
> config: riscv-randconfig-r064-20240311 (https://download.01.org/0day-ci/archive/20240316/202403161449.bV9MUszO-lkp@intel.com/config)
> compiler: riscv64-linux-gcc (GCC) 13.2.0
> reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240316/202403161449.bV9MUszO-lkp@intel.com/reproduce)
>
> If you fix the issue in a separate patch/commit (i.e. not just a new version of
> the same patch/commit), kindly add following tags
> | Reported-by: kernel test robot <lkp@intel.com>
> | Closes: https://lore.kernel.org/oe-kbuild-all/202403161449.bV9MUszO-lkp@intel.com/
>
> All errors (new ones prefixed by >>, old ones prefixed by <<):
>
> WARNING: modpost: missing MODULE_DESCRIPTION() in vmlinux.o
> WARNING: modpost: missing MODULE_DESCRIPTION() in kernel/locking/locktorture.o
> WARNING: modpost: missing MODULE_DESCRIPTION() in kernel/rcu/rcutorture.o
> WARNING: modpost: missing MODULE_DESCRIPTION() in kernel/rcu/rcuscale.o
> WARNING: modpost: missing MODULE_DESCRIPTION() in kernel/rcu/refscale.o
> WARNING: modpost: missing MODULE_DESCRIPTION() in kernel/torture.o
> WARNING: modpost: missing MODULE_DESCRIPTION() in fs/nfs/nfsv4.o
> WARNING: modpost: missing MODULE_DESCRIPTION() in fs/nls/nls_ucs2_utils.o
> WARNING: modpost: missing MODULE_DESCRIPTION() in fs/smb/common/cifs_arc4.o
> WARNING: modpost: missing MODULE_DESCRIPTION() in fs/smb/common/cifs_md4.o
> WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/gpu/drm/drm_panel_orientation_quirks.o
> ERROR: modpost: "devm_drm_of_get_bridge" [drivers/usb/typec/mux/nb7vpq904m.ko] undefined!
> >> ERROR: modpost: "devm_drm_of_get_bridge" [drivers/usb/typec/mux/ptn36502.ko] undefined!
This should be fixed by the patch I sent a while ago:
https://lore.kernel.org/lkml/20240111-drm-panel-bridge-fixup-v1-1-e06292f6f500@fairphone.com/
Regards
Luca
^ permalink raw reply [relevance 99%]
* Re: [PATCH RFT 0/7] arm64: qcom: allow up to 4 lanes for the Type-C DisplayPort Altmode
@ 2024-03-15 17:19 83% ` Luca Weiss
0 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-03-15 17:19 UTC (permalink / raw)
To: Neil Armstrong, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-arm-msm, linux-phy, devicetree, linux-kernel
On Thu Feb 29, 2024 at 2:07 PM CET, Neil Armstrong wrote:
> Register a typec mux in order to change the PHY mode on the Type-C
> mux events depending on the mode and the svid when in Altmode setup.
>
> The DisplayPort phy should be left enabled if is still powered on
> by the DRM DisplayPort controller, so bail out until the DisplayPort
> PHY is not powered off.
>
> The Type-C Mode/SVID only changes on plug/unplug, and USB SAFE states
> will be set in between of USB-Only, Combo and DisplayPort Only so
> this will leave enough time to the DRM DisplayPort controller to
> turn of the DisplayPort PHY.
>
> The patchset also includes bindings changes and DT changes.
>
> This has been successfully tested on an SM8550 board, but the
> Thinkpad X13s deserved testing between non-PD USB, non-PD DisplayPort,
> PD USB Hubs and PD Altmode Dongles to make sure the switch works
> as expected.
>
> The DisplayPort 4 lanes setup can be check with:
> $ cat /sys/kernel/debug/dri/ae01000.display-controller/DP-1/dp_debug
> name = msm_dp
> drm_dp_link
> rate = 540000
> num_lanes = 4
Hi Neil,
I tried this on QCM6490/SC7280 which should also support 4-lane DP but I
haven't had any success so far.
On top of your patches I added the following for my device:
diff --git a/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts b/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
index f5bd51806819..e7be17844da1 100644
--- a/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
+++ b/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
@@ -712,7 +712,7 @@ &mdss_dp {
};
&mdss_dp_out {
- data-lanes = <0 1>;
+ data-lanes = <0 1 2 3>;
remote-endpoint = <&usb_dp_qmpphy_dp_in>;
};
@@ -1344,6 +1344,7 @@ &usb_1_qmpphy {
vdda-phy-supply = <&vreg_l6b>;
vdda-pll-supply = <&vreg_l1b>;
+ mode-switch;
orientation-switch;
status = "okay";
The output of the dp_debug file shows it's trying to use 4 lanes:
name = msm_dp
drm_dp_link
rate = 540000
num_lanes = 4
capabilities = 1
dp_panel_info:
active = 0x0
back_porch = 0x0
front_porch = 0x0
sync_width = 0x0
active_low = 0x0
h_skew = 0
refresh rate = 0
pixel clock khz = 0
bpp = 0
dp_link:
test_requested = 128
num_lanes = 4
bw_code = 20
lclk = 540000000
v_level = 2
p_level = 0
But the monitor stays black and the following appears in dmesg:
(starts with plugging in a dongle, ends with unplugging it again)
[ 1773.538161] xhci-hcd xhci-hcd.2.auto: xHCI Host Controller
[ 1773.538197] xhci-hcd xhci-hcd.2.auto: new USB bus registered, assigned bus number 1
[ 1773.540215] xhci-hcd xhci-hcd.2.auto: hcc params 0x0230fe65 hci version 0x110 quirks 0x0000008000000010
[ 1773.540260] xhci-hcd xhci-hcd.2.auto: irq 185, io mem 0x0a600000
[ 1773.540372] xhci-hcd xhci-hcd.2.auto: xHCI Host Controller
[ 1773.540384] xhci-hcd xhci-hcd.2.auto: new USB bus registered, assigned bus number 2
[ 1773.540396] xhci-hcd xhci-hcd.2.auto: Host supports USB 3.0 SuperSpeed
[ 1773.540524] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 6.08
[ 1773.540534] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 1773.540541] usb usb1: Product: xHCI Host Controller
[ 1773.540547] usb usb1: Manufacturer: Linux 6.8.0-00058-g113103fa3b95 xhci-hcd
[ 1773.540554] usb usb1: SerialNumber: xhci-hcd.2.auto
[ 1773.540999] hub 1-0:1.0: USB hub found
[ 1773.541028] hub 1-0:1.0: 1 port detected
[ 1773.542010] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
[ 1773.542146] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 6.08
[ 1773.542162] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 1773.542174] usb usb2: Product: xHCI Host Controller
[ 1773.542183] usb usb2: Manufacturer: Linux 6.8.0-00058-g113103fa3b95 xhci-hcd
[ 1773.542193] usb usb2: SerialNumber: xhci-hcd.2.auto
[ 1773.543241] hub 2-0:1.0: USB hub found
[ 1773.543282] hub 2-0:1.0: 1 port detected
[ 1775.563969] [drm:dp_ctrl_link_train] *ERROR* max v_level reached
[ 1775.564031] [drm:dp_ctrl_link_train] *ERROR* link training #1 failed. ret=-11
[ 1775.597965] [drm:dp_display_process_hpd_high] *ERROR* failed to complete DP link training
[ 1775.598149] [drm:dp_aux_isr] *ERROR* Unexpected DP AUX IRQ 0x01000000 when not busy
[ 1776.632081] [drm:dp_ctrl_link_train] *ERROR* max v_level reached
[ 1776.632145] [drm:dp_ctrl_link_train] *ERROR* link training #1 failed. ret=-11
[ 1776.662978] [drm:dp_display_process_hpd_high] *ERROR* failed to complete DP link training
[ 1776.663039] [drm:dp_aux_isr] *ERROR* Unexpected DP AUX IRQ 0x01000000 when not busy
[ 1777.717501] [drm:dp_ctrl_link_train] *ERROR* max v_level reached
[ 1777.717524] [drm:dp_ctrl_link_train] *ERROR* link training #1 failed. ret=-11
[ 1777.751427] [drm:dp_display_process_hpd_high] *ERROR* failed to complete DP link training
[ 1777.751518] [drm:dp_aux_isr] *ERROR* Unexpected DP AUX IRQ 0x01000000 when not busy
[ 1778.793550] [drm:dp_ctrl_link_train] *ERROR* max v_level reached
[ 1778.793617] [drm:dp_ctrl_link_train] *ERROR* link training #1 failed. ret=-11
[ 1778.827260] [drm:dp_aux_isr] *ERROR* Unexpected DP AUX IRQ 0x01000000 when not busy
[ 1778.827334] [drm:dp_display_process_hpd_high] *ERROR* failed to complete DP link training
[ 1779.279889] xhci-hcd xhci-hcd.2.auto: remove, state 1
[ 1779.279942] usb usb2: USB disconnect, device number 1
[ 1779.311920] xhci-hcd xhci-hcd.2.auto: USB bus 2 deregistered
[ 1779.311987] xhci-hcd xhci-hcd.2.auto: remove, state 4
[ 1779.312019] usb usb1: USB disconnect, device number 1
[ 1779.317772] xhci-hcd xhci-hcd.2.auto: USB bus 1 deregistered
Regards
Luca
> ...
>
> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> ---
> Neil Armstrong (7):
> dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp: Add mode-switch
> phy: qcom: qmp-combo: store DP phy power state
> phy: qcom: qmp-combo: introduce QPHY_MODE
> phy: qcom: qmp-combo: register a typec mux to change the QPHY_MODE
> arm64: dts: qcom-sm8550: allow 4 lanes for DisplayPort and enable QMP PHY mode-switch
> arm64: dts: qcom-sm8650: allow 4 lanes for DisplayPort and enable QMP PHY mode-switch
> arm64: dts: qcom-mode-switch: allow 4 lanes for DisplayPort and enable QMP PHY mode-switch
>
> .../phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml | 5 +
> .../dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 6 +-
> arch/arm64/boot/dts/qcom/sm8550-hdk.dts | 3 +-
> arch/arm64/boot/dts/qcom/sm8550-qrd.dts | 3 +-
> arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 3 +-
> drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 168 +++++++++++++++++++--
> 6 files changed, 173 insertions(+), 15 deletions(-)
> ---
> base-commit: b321c0e8ca754d8cd9f23ceba958e3ea93c6519e
> change-id: 20240229-topic-sm8x50-upstream-phy-combo-typec-mux-31b5252513c9
>
> Best regards,
^ permalink raw reply related [relevance 83%]
* [PATCH] usb: typec: ptn36502: switch to DRM_AUX_BRIDGE
@ 2024-03-15 16:04 91% Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-15 16:04 UTC (permalink / raw)
To: Heikki Krogerus, Greg Kroah-Hartman, Dmitry Baryshkov
Cc: ~postmarketos/upstreaming, phone-devel, linux-usb, linux-kernel,
Luca Weiss
Switch to using the new DRM_AUX_BRIDGE helper to create the transparent
DRM bridge device instead of handcoding corresponding functionality.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
Very similar to this patch:
c5d296bad640 ("usb: typec: nb7vpq904m: switch to DRM_AUX_BRIDGE")
---
drivers/usb/typec/mux/Kconfig | 2 +-
drivers/usb/typec/mux/ptn36502.c | 44 ++--------------------------------------
2 files changed, 3 insertions(+), 43 deletions(-)
diff --git a/drivers/usb/typec/mux/Kconfig b/drivers/usb/typec/mux/Kconfig
index 399c7b0983df..4827e86fed6d 100644
--- a/drivers/usb/typec/mux/Kconfig
+++ b/drivers/usb/typec/mux/Kconfig
@@ -60,7 +60,7 @@ config TYPEC_MUX_PTN36502
tristate "NXP PTN36502 Type-C redriver driver"
depends on I2C
depends on DRM || DRM=n
- select DRM_PANEL_BRIDGE if DRM
+ select DRM_AUX_BRIDGE if DRM_BRIDGE
select REGMAP_I2C
help
Say Y or M if your system has a NXP PTN36502 Type-C redriver chip
diff --git a/drivers/usb/typec/mux/ptn36502.c b/drivers/usb/typec/mux/ptn36502.c
index 72ae38a1b2be..0ec86ef32a87 100644
--- a/drivers/usb/typec/mux/ptn36502.c
+++ b/drivers/usb/typec/mux/ptn36502.c
@@ -8,7 +8,7 @@
* Copyright (C) 2023 Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
*/
-#include <drm/drm_bridge.h>
+#include <drm/bridge/aux-bridge.h>
#include <linux/bitfield.h>
#include <linux/i2c.h>
#include <linux/kernel.h>
@@ -68,8 +68,6 @@ struct ptn36502 {
struct typec_switch *typec_switch;
- struct drm_bridge bridge;
-
struct mutex lock; /* protect non-concurrent retimer & switch */
enum typec_orientation orientation;
@@ -283,44 +281,6 @@ static int ptn36502_detect(struct ptn36502 *ptn)
return 0;
}
-#if IS_ENABLED(CONFIG_OF) && IS_ENABLED(CONFIG_DRM_PANEL_BRIDGE)
-static int ptn36502_bridge_attach(struct drm_bridge *bridge,
- enum drm_bridge_attach_flags flags)
-{
- struct ptn36502 *ptn = container_of(bridge, struct ptn36502, bridge);
- struct drm_bridge *next_bridge;
-
- if (!(flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR))
- return -EINVAL;
-
- next_bridge = devm_drm_of_get_bridge(&ptn->client->dev, ptn->client->dev.of_node, 0, 0);
- if (IS_ERR(next_bridge)) {
- dev_err(&ptn->client->dev, "failed to acquire drm_bridge: %pe\n", next_bridge);
- return PTR_ERR(next_bridge);
- }
-
- return drm_bridge_attach(bridge->encoder, next_bridge, bridge,
- DRM_BRIDGE_ATTACH_NO_CONNECTOR);
-}
-
-static const struct drm_bridge_funcs ptn36502_bridge_funcs = {
- .attach = ptn36502_bridge_attach,
-};
-
-static int ptn36502_register_bridge(struct ptn36502 *ptn)
-{
- ptn->bridge.funcs = &ptn36502_bridge_funcs;
- ptn->bridge.of_node = ptn->client->dev.of_node;
-
- return devm_drm_bridge_add(&ptn->client->dev, &ptn->bridge);
-}
-#else
-static int ptn36502_register_bridge(struct ptn36502 *ptn)
-{
- return 0;
-}
-#endif
-
static const struct regmap_config ptn36502_regmap = {
.max_register = 0x0d,
.reg_bits = 8,
@@ -369,7 +329,7 @@ static int ptn36502_probe(struct i2c_client *client)
if (ret)
goto err_disable_regulator;
- ret = ptn36502_register_bridge(ptn);
+ ret = drm_aux_bridge_register(dev);
if (ret)
goto err_disable_regulator;
---
base-commit: 9bb9b28d0568991b1d63e66fe75afa5f97ad1156
change-id: 20240315-ptn36502-aux-15dd6f289aff
Best regards,
--
Luca Weiss <luca.weiss@fairphone.com>
^ permalink raw reply related [relevance 91%]
* [PATCH v2 2/2] ARM: dts: qcom: msm8974: Add Samsung Galaxy Note 3
2024-03-14 19:00 88% [PATCH v2 0/2] Add Samsung Galaxy Note 3 support Luca Weiss
2024-03-14 19:00 88% ` [PATCH v2 1/2] dt-bindings: arm: qcom: Add Samsung Galaxy Note 3 Luca Weiss
@ 2024-03-14 19:00 62% ` Luca Weiss
1 sibling, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-14 19:00 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Adam Honse
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss
From: Adam Honse <calcprogrammer1@gmail.com>
Add the devicetree for this "phablet" using the Snapdragon 800 SoC.
Signed-off-by: Adam Honse <calcprogrammer1@gmail.com>
[luca@z3ntu.xyz: clean up, prepare for upstream]
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
arch/arm/boot/dts/qcom/Makefile | 1 +
.../boot/dts/qcom/qcom-msm8974-samsung-hlte.dts | 401 +++++++++++++++++++++
2 files changed, 402 insertions(+)
diff --git a/arch/arm/boot/dts/qcom/Makefile b/arch/arm/boot/dts/qcom/Makefile
index 9cc1e14e6cd0..845af12d15a2 100644
--- a/arch/arm/boot/dts/qcom/Makefile
+++ b/arch/arm/boot/dts/qcom/Makefile
@@ -39,6 +39,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
qcom-msm8960-cdp.dtb \
qcom-msm8960-samsung-expressatt.dtb \
qcom-msm8974-lge-nexus5-hammerhead.dtb \
+ qcom-msm8974-samsung-hlte.dtb \
qcom-msm8974-sony-xperia-rhine-amami.dtb \
qcom-msm8974-sony-xperia-rhine-honami.dtb \
qcom-msm8974pro-fairphone-fp2.dtb \
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974-samsung-hlte.dts b/arch/arm/boot/dts/qcom/qcom-msm8974-samsung-hlte.dts
new file mode 100644
index 000000000000..903bb4d12513
--- /dev/null
+++ b/arch/arm/boot/dts/qcom/qcom-msm8974-samsung-hlte.dts
@@ -0,0 +1,401 @@
+// SPDX-License-Identifier: GPL-2.0
+#include "qcom-msm8974.dtsi"
+#include "pm8841.dtsi"
+#include "pm8941.dtsi"
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
+
+/ {
+ model = "Samsung Galaxy Note 3";
+ compatible = "samsung,hlte", "qcom,msm8974";
+ chassis-type = "handset";
+
+ aliases {
+ mmc0 = &sdhc_1; /* SDC1 eMMC slot */
+ mmc1 = &sdhc_3; /* SDC3 SD card slot */
+ serial0 = &blsp1_uart1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ pinctrl-0 = <&gpio_keys_pin_a>;
+ pinctrl-names = "default";
+
+ key-home {
+ label = "Home Key";
+ gpios = <&pm8941_gpios 3 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_HOMEPAGE>;
+ wakeup-source;
+ debounce-interval = <15>;
+ };
+
+ key-volume-down {
+ label = "Volume Down";
+ gpios = <&pm8941_gpios 2 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_VOLUMEDOWN>;
+ debounce-interval = <15>;
+ };
+
+ key-volume-up {
+ label = "Volume Up";
+ gpios = <&pm8941_gpios 5 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_VOLUMEUP>;
+ debounce-interval = <15>;
+ };
+ };
+
+ touch_ldo: regulator-touch {
+ compatible = "regulator-fixed";
+ regulator-name = "touch-ldo";
+
+ gpio = <&pm8941_gpios 9 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-boot-on;
+
+ pinctrl-0 = <&touch_ldo_pin>;
+ pinctrl-names = "default";
+ };
+};
+
+&blsp1_i2c2 {
+ status = "okay";
+
+ touchscreen@20 {
+ compatible = "syna,rmi4-i2c";
+ reg = <0x20>;
+
+ interrupt-parent = <&pm8941_gpios>;
+ interrupts = <30 IRQ_TYPE_EDGE_FALLING>;
+
+ vdd-supply = <&pm8941_l10>;
+ vio-supply = <&touch_ldo>;
+
+ pinctrl-0 = <&touch_pin>;
+ pinctrl-names = "default";
+
+ syna,startup-delay-ms = <100>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rmi4-f01@1 {
+ reg = <0x1>;
+ syna,nosleep-mode = <1>;
+ };
+
+ rmi4-f12@12 {
+ reg = <0x12>;
+ syna,sensor-type = <1>;
+ };
+ };
+};
+
+&blsp2_i2c6 {
+ status = "okay";
+
+ fuelgauge@36 {
+ compatible = "maxim,max17048";
+ reg = <0x36>;
+
+ maxim,double-soc;
+ maxim,rcomp = /bits/ 8 <0x56>;
+
+ interrupt-parent = <&pm8941_gpios>;
+ interrupts = <26 IRQ_TYPE_EDGE_FALLING>;
+
+ pinctrl-0 = <&fuelgauge_pin>;
+ pinctrl-names = "default";
+ };
+};
+
+&blsp1_uart2 {
+ status = "okay";
+};
+
+&pm8941_gpios {
+ gpio_keys_pin_a: gpio-keys-active-state {
+ pins = "gpio2", "gpio3", "gpio5";
+ function = "normal";
+ bias-pull-up;
+ power-source = <PM8941_GPIO_S3>;
+ };
+
+ fuelgauge_pin: fuelgauge-int-state {
+ pins = "gpio26";
+ function = "normal";
+ bias-disable;
+ input-enable;
+ power-source = <PM8941_GPIO_S3>;
+ };
+
+ touch_pin: touchscreen-int-state {
+ pins = "gpio30";
+ function = "normal";
+ bias-disable;
+ input-enable;
+ power-source = <PM8941_GPIO_S3>;
+ };
+
+ touch_ldo_pin: touchscreen-ldo-state {
+ pins = "gpio9";
+ function = "normal";
+ output-high;
+ power-source = <PM8941_GPIO_S3>;
+ qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
+ };
+};
+
+&remoteproc_adsp {
+ cx-supply = <&pm8841_s2>;
+ status = "okay";
+};
+
+&remoteproc_mss {
+ cx-supply = <&pm8841_s2>;
+ mss-supply = <&pm8841_s3>;
+ mx-supply = <&pm8841_s1>;
+ pll-supply = <&pm8941_l12>;
+ status = "okay";
+};
+
+&rpm_requests {
+ regulators-0 {
+ compatible = "qcom,rpm-pm8841-regulators";
+
+ pm8841_s1: s1 {
+ regulator-min-microvolt = <675000>;
+ regulator-max-microvolt = <1050000>;
+ };
+
+ pm8841_s2: s2 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1050000>;
+ };
+
+ pm8841_s3: s3 {
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1050000>;
+ };
+
+ pm8841_s4: s4 {
+ regulator-min-microvolt = <815000>;
+ regulator-max-microvolt = <900000>;
+ };
+ };
+
+ regulators-1 {
+ compatible = "qcom,rpm-pm8941-regulators";
+
+ pm8941_s1: s1 {
+ regulator-min-microvolt = <1300000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-always-on;
+ };
+
+ pm8941_s2: s2 {
+ regulator-min-microvolt = <2150000>;
+ regulator-max-microvolt = <2150000>;
+ };
+
+ pm8941_s3: s3 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ pm8941_l1: l1 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ };
+
+ pm8941_l2: l2 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ };
+
+ pm8941_l3: l3 {
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1225000>;
+ };
+
+ pm8941_l4: l4 {
+ regulator-min-microvolt = <1225000>;
+ regulator-max-microvolt = <1225000>;
+ };
+
+ pm8941_l5: l5 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ pm8941_l6: l6 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ pm8941_l7: l7 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ pm8941_l8: l8 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ pm8941_l9: l9 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2950000>;
+ };
+
+ pm8941_l10: l10 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ pm8941_l11: l11 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1350000>;
+ };
+
+ pm8941_l12: l12 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ pm8941_l13: l13 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ pm8941_l14: l14 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ pm8941_l15: l15 {
+ regulator-min-microvolt = <2050000>;
+ regulator-max-microvolt = <2050000>;
+ };
+
+ pm8941_l16: l16 {
+ regulator-min-microvolt = <2700000>;
+ regulator-max-microvolt = <2700000>;
+ };
+
+ pm8941_l17: l17 {
+ regulator-min-microvolt = <2850000>;
+ regulator-max-microvolt = <3000000>;
+ };
+
+ pm8941_l18: l18 {
+ regulator-min-microvolt = <2850000>;
+ regulator-max-microvolt = <2850000>;
+ };
+
+ pm8941_l19: l19 {
+ regulator-min-microvolt = <2900000>;
+ regulator-max-microvolt = <3350000>;
+ };
+
+ pm8941_l20: l20 {
+ regulator-min-microvolt = <2950000>;
+ regulator-max-microvolt = <2950000>;
+ regulator-system-load = <200000>;
+ regulator-allow-set-load;
+ };
+
+ pm8941_l21: l21 {
+ regulator-min-microvolt = <2950000>;
+ regulator-max-microvolt = <2950000>;
+ regulator-system-load = <200000>;
+ regulator-allow-set-load;
+ };
+
+ pm8941_l22: l22 {
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <3000000>;
+ };
+
+ pm8941_l23: l23 {
+ regulator-min-microvolt = <2400000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ pm8941_l24: l24 {
+ regulator-min-microvolt = <3075000>;
+ regulator-max-microvolt = <3075000>;
+ };
+ };
+};
+
+&sdhc_1 {
+ vmmc-supply = <&pm8941_l20>;
+ vqmmc-supply = <&pm8941_s3>;
+
+ pinctrl-0 = <&sdhc1_pin_a>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&sdhc_3 {
+ max-frequency = <100000000>;
+
+ vmmc-supply = <&pm8941_l21>;
+ vqmmc-supply = <&pm8941_l21>;
+
+ pinctrl-0 = <&sdhc3_pin_a>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&tlmm {
+ sdhc1_pin_a: sdhc1-pin-active-state {
+ clk-pins {
+ pins = "sdc1_clk";
+ drive-strength = <4>;
+ bias-disable;
+ };
+
+ cmd-data-pins {
+ pins = "sdc1_cmd", "sdc1_data";
+ drive-strength = <4>;
+ bias-pull-up;
+ };
+ };
+
+ sdhc3_pin_a: sdhc3-pin-active-state {
+ pins = "gpio35", "gpio36", "gpio37", "gpio38", "gpio39", "gpio40";
+ function = "sdc3";
+ drive-strength = <8>;
+ bias-disable;
+ };
+};
+
+&usb {
+ phys = <&usb_hs1_phy>;
+ phy-select = <&tcsr 0xb000 0>;
+
+ hnp-disable;
+ srp-disable;
+ adp-disable;
+
+ status = "okay";
+};
+
+&usb_hs1_phy {
+ v1p8-supply = <&pm8941_l6>;
+ v3p3-supply = <&pm8941_l24>;
+
+ qcom,init-seq = /bits/ 8 <0x1 0x64>;
+
+ status = "okay";
+};
--
2.44.0
^ permalink raw reply related [relevance 62%]
* [PATCH v2 1/2] dt-bindings: arm: qcom: Add Samsung Galaxy Note 3
2024-03-14 19:00 88% [PATCH v2 0/2] Add Samsung Galaxy Note 3 support Luca Weiss
@ 2024-03-14 19:00 88% ` Luca Weiss
2024-03-14 19:00 62% ` [PATCH v2 2/2] ARM: dts: qcom: msm8974: " Luca Weiss
1 sibling, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-14 19:00 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Adam Honse
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss, Krzysztof Kozlowski
Add the compatible for this Samsung smartphone ("phablet" as it was
named in that era).
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Documentation/devicetree/bindings/arm/qcom.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
index 1a5fb889a444..57182bfa27ee 100644
--- a/Documentation/devicetree/bindings/arm/qcom.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom.yaml
@@ -214,6 +214,7 @@ properties:
- items:
- enum:
- lge,hammerhead
+ - samsung,hlte
- sony,xperia-amami
- sony,xperia-honami
- const: qcom,msm8974
--
2.44.0
^ permalink raw reply related [relevance 88%]
* [PATCH v2 0/2] Add Samsung Galaxy Note 3 support
@ 2024-03-14 19:00 88% Luca Weiss
2024-03-14 19:00 88% ` [PATCH v2 1/2] dt-bindings: arm: qcom: Add Samsung Galaxy Note 3 Luca Weiss
2024-03-14 19:00 62% ` [PATCH v2 2/2] ARM: dts: qcom: msm8974: " Luca Weiss
0 siblings, 2 replies; 200+ results
From: Luca Weiss @ 2024-03-14 19:00 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Adam Honse
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss, Krzysztof Kozlowski
Add the dts for "hlte" which is a phablet from 2013.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Changes in v2:
- Correct property order (Konrad)
- Pick up tags
- Link to v1: https://lore.kernel.org/r/20240310-samsung-hlte-v1-0-e9b55bf98a48@z3ntu.xyz
---
Adam Honse (1):
ARM: dts: qcom: msm8974: Add Samsung Galaxy Note 3
Luca Weiss (1):
dt-bindings: arm: qcom: Add Samsung Galaxy Note 3
Documentation/devicetree/bindings/arm/qcom.yaml | 1 +
arch/arm/boot/dts/qcom/Makefile | 1 +
.../boot/dts/qcom/qcom-msm8974-samsung-hlte.dts | 401 +++++++++++++++++++++
3 files changed, 403 insertions(+)
---
base-commit: 90d35da658da8cff0d4ecbb5113f5fac9d00eb72
change-id: 20240310-samsung-hlte-78d1a287b0a8
Best regards,
--
Luca Weiss <luca@z3ntu.xyz>
^ permalink raw reply [relevance 88%]
* [PATCH v2 3/3] ARM: dts: qcom: Add Sony Xperia Z3 smartphone
2024-03-14 18:56 85% [PATCH v2 0/3] Split sony-castor into shinano-common and add Sony Xperia Z3 Luca Weiss
2024-03-14 18:56 41% ` [PATCH v2 1/3] ARM: dts: qcom: msm8974-sony-castor: Split into shinano-common Luca Weiss
2024-03-14 18:56 88% ` [PATCH v2 2/3] dt-bindings: arm: qcom: Add Sony Xperia Z3 Luca Weiss
@ 2024-03-14 18:56 80% ` Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-14 18:56 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss
Add the dts for the Xperia Z3 smartphone which is based on Sony's
shinano platform, so at the moment there's little device-specific dts to
add on top of the common parts.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
arch/arm/boot/dts/qcom/Makefile | 1 +
.../qcom-msm8974pro-sony-xperia-shinano-leo.dts | 44 ++++++++++++++++++++++
2 files changed, 45 insertions(+)
diff --git a/arch/arm/boot/dts/qcom/Makefile b/arch/arm/boot/dts/qcom/Makefile
index 9cc1e14e6cd0..92eca505a4ab 100644
--- a/arch/arm/boot/dts/qcom/Makefile
+++ b/arch/arm/boot/dts/qcom/Makefile
@@ -45,6 +45,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
qcom-msm8974pro-oneplus-bacon.dtb \
qcom-msm8974pro-samsung-klte.dtb \
qcom-msm8974pro-sony-xperia-shinano-castor.dtb \
+ qcom-msm8974pro-sony-xperia-shinano-leo.dtb \
qcom-mdm9615-wp8548-mangoh-green.dtb \
qcom-sdx55-mtp.dtb \
qcom-sdx55-t55.dtb \
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-leo.dts b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-leo.dts
new file mode 100644
index 000000000000..1ed6e1cc21d5
--- /dev/null
+++ b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-leo.dts
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: GPL-2.0
+#include "qcom-msm8974pro-sony-xperia-shinano-common.dtsi"
+
+/ {
+ model = "Sony Xperia Z3";
+ compatible = "sony,xperia-leo", "qcom,msm8974pro", "qcom,msm8974";
+ chassis-type = "handset";
+
+ gpio-keys {
+ key-camera-snapshot {
+ label = "camera_snapshot";
+ gpios = <&pm8941_gpios 3 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_CAMERA>;
+ debounce-interval = <15>;
+ };
+
+ key-camera-focus {
+ label = "camera_focus";
+ gpios = <&pm8941_gpios 4 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_CAMERA_FOCUS>;
+ debounce-interval = <15>;
+ };
+ };
+};
+
+&gpio_keys_pin_a {
+ pins = "gpio2", "gpio3", "gpio4", "gpio5";
+};
+
+&smbb {
+ usb-charge-current-limit = <1500000>;
+ qcom,fast-charge-safe-current = <3000000>;
+ qcom,fast-charge-current-limit = <2150000>;
+ qcom,fast-charge-safe-voltage = <4400000>;
+ qcom,fast-charge-high-threshold-voltage = <4350000>;
+ qcom,auto-recharge-threshold-voltage = <4280000>;
+ qcom,minimum-input-voltage = <4200000>;
+
+ status = "okay";
+};
+
+&synaptics_touchscreen {
+ vio-supply = <&pm8941_s3>;
+};
--
2.44.0
^ permalink raw reply related [relevance 80%]
* [PATCH v2 2/3] dt-bindings: arm: qcom: Add Sony Xperia Z3
2024-03-14 18:56 85% [PATCH v2 0/3] Split sony-castor into shinano-common and add Sony Xperia Z3 Luca Weiss
2024-03-14 18:56 41% ` [PATCH v2 1/3] ARM: dts: qcom: msm8974-sony-castor: Split into shinano-common Luca Weiss
@ 2024-03-14 18:56 88% ` Luca Weiss
2024-03-14 18:56 80% ` [PATCH v2 3/3] ARM: dts: qcom: Add Sony Xperia Z3 smartphone Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-14 18:56 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss, Krzysztof Kozlowski
Add the compatible for this Sony smartphone.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Documentation/devicetree/bindings/arm/qcom.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
index 1a5fb889a444..d6a7ee5e1d91 100644
--- a/Documentation/devicetree/bindings/arm/qcom.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom.yaml
@@ -224,6 +224,7 @@ properties:
- oneplus,bacon
- samsung,klte
- sony,xperia-castor
+ - sony,xperia-leo
- const: qcom,msm8974pro
- const: qcom,msm8974
--
2.44.0
^ permalink raw reply related [relevance 88%]
* [PATCH v2 1/3] ARM: dts: qcom: msm8974-sony-castor: Split into shinano-common
2024-03-14 18:56 85% [PATCH v2 0/3] Split sony-castor into shinano-common and add Sony Xperia Z3 Luca Weiss
@ 2024-03-14 18:56 41% ` Luca Weiss
2024-03-14 18:56 88% ` [PATCH v2 2/3] dt-bindings: arm: qcom: Add Sony Xperia Z3 Luca Weiss
2024-03-14 18:56 80% ` [PATCH v2 3/3] ARM: dts: qcom: Add Sony Xperia Z3 smartphone Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-14 18:56 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss
In preparation for adding the Sony Xperia Z3 smartphone, split the
common parts into shinano-common.dtsi.
No functional change intended.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
.../qcom-msm8974pro-sony-xperia-shinano-castor.dts | 863 +++++----------------
...com-msm8974pro-sony-xperia-shinano-common.dtsi} | 155 +---
2 files changed, 179 insertions(+), 839 deletions(-)
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts
dissimilarity index 74%
index 20f98a9e49ea..409d1798de34 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts
+++ b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts
@@ -1,686 +1,177 @@
-// SPDX-License-Identifier: GPL-2.0
-#include "qcom-msm8974pro.dtsi"
-#include "pm8841.dtsi"
-#include "pm8941.dtsi"
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
-
-/ {
- model = "Sony Xperia Z2 Tablet";
- compatible = "sony,xperia-castor", "qcom,msm8974pro", "qcom,msm8974";
- chassis-type = "tablet";
-
- aliases {
- mmc0 = &sdhc_1;
- mmc1 = &sdhc_2;
- serial0 = &blsp1_uart2;
- serial1 = &blsp2_uart1;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- gpio-keys {
- compatible = "gpio-keys";
-
- pinctrl-0 = <&gpio_keys_pin_a>;
- pinctrl-names = "default";
-
- key-volume-down {
- label = "volume_down";
- gpios = <&pm8941_gpios 2 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_VOLUMEDOWN>;
- debounce-interval = <15>;
- };
-
- key-volume-up {
- label = "volume_up";
- gpios = <&pm8941_gpios 5 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_VOLUMEUP>;
- debounce-interval = <15>;
- };
- };
-
- vreg_bl_vddio: lcd-backlight-vddio {
- compatible = "regulator-fixed";
- regulator-name = "vreg_bl_vddio";
- regulator-min-microvolt = <3150000>;
- regulator-max-microvolt = <3150000>;
-
- gpio = <&tlmm 69 0>;
- enable-active-high;
-
- vin-supply = <&pm8941_s3>;
- startup-delay-us = <70000>;
-
- pinctrl-0 = <&lcd_backlight_en_pin_a>;
- pinctrl-names = "default";
- };
-
- vreg_vsp: lcd-dcdc-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vreg_vsp";
- regulator-min-microvolt = <5600000>;
- regulator-max-microvolt = <5600000>;
-
- gpio = <&pm8941_gpios 20 GPIO_ACTIVE_HIGH>;
- enable-active-high;
-
- pinctrl-0 = <&lcd_dcdc_en_pin_a>;
- pinctrl-names = "default";
- };
-
- vreg_boost: vreg-boost {
- compatible = "regulator-fixed";
-
- regulator-name = "vreg-boost";
- regulator-min-microvolt = <3150000>;
- regulator-max-microvolt = <3150000>;
-
- regulator-always-on;
- regulator-boot-on;
-
- gpio = <&pm8941_gpios 21 GPIO_ACTIVE_HIGH>;
- enable-active-high;
-
- pinctrl-names = "default";
- pinctrl-0 = <&boost_bypass_n_pin>;
- };
-
- vreg_vph_pwr: vreg-vph-pwr {
- compatible = "regulator-fixed";
- regulator-name = "vph-pwr";
-
- regulator-min-microvolt = <3600000>;
- regulator-max-microvolt = <3600000>;
-
- regulator-always-on;
- };
-
- vreg_wlan: wlan-regulator {
- compatible = "regulator-fixed";
-
- regulator-name = "wl-reg";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- gpio = <&pm8941_gpios 18 GPIO_ACTIVE_HIGH>;
- enable-active-high;
-
- pinctrl-0 = <&wlan_regulator_pin>;
- pinctrl-names = "default";
- };
-};
-
-&blsp1_uart2 {
- status = "okay";
-};
-
-&blsp2_i2c2 {
- clock-frequency = <355000>;
-
- status = "okay";
-
- synaptics@2c {
- compatible = "syna,rmi4-i2c";
- reg = <0x2c>;
-
- interrupt-parent = <&tlmm>;
- interrupts = <86 IRQ_TYPE_EDGE_FALLING>;
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- vdd-supply = <&pm8941_l22>;
- vio-supply = <&pm8941_lvs3>;
-
- pinctrl-0 = <&ts_int_pin>;
- pinctrl-names = "default";
-
- syna,startup-delay-ms = <100>;
-
- rmi4-f01@1 {
- reg = <0x1>;
- syna,nosleep-mode = <1>;
- };
-
- rmi4-f11@11 {
- reg = <0x11>;
- syna,sensor-type = <1>;
- touchscreen-inverted-x;
- };
- };
-};
-
-&blsp2_i2c5 {
- clock-frequency = <355000>;
-
- status = "okay";
-
- lp8566_wled: backlight@2c {
- compatible = "ti,lp8556";
- reg = <0x2c>;
- power-supply = <&vreg_bl_vddio>;
-
- bl-name = "backlight";
- dev-ctrl = /bits/ 8 <0x05>;
- init-brt = /bits/ 8 <0x3f>;
-
- rom-a0h {
- rom-addr = /bits/ 8 <0xa0>;
- rom-val = /bits/ 8 <0xff>;
- };
- rom-a1h {
- rom-addr = /bits/ 8 <0xa1>;
- rom-val = /bits/ 8 <0x3f>;
- };
- rom-a2h {
- rom-addr = /bits/ 8 <0xa2>;
- rom-val = /bits/ 8 <0x20>;
- };
- rom-a3h {
- rom-addr = /bits/ 8 <0xa3>;
- rom-val = /bits/ 8 <0x5e>;
- };
- rom-a4h {
- rom-addr = /bits/ 8 <0xa4>;
- rom-val = /bits/ 8 <0x02>;
- };
- rom-a5h {
- rom-addr = /bits/ 8 <0xa5>;
- rom-val = /bits/ 8 <0x04>;
- };
- rom-a6h {
- rom-addr = /bits/ 8 <0xa6>;
- rom-val = /bits/ 8 <0x80>;
- };
- rom-a7h {
- rom-addr = /bits/ 8 <0xa7>;
- rom-val = /bits/ 8 <0xf7>;
- };
- rom-a9h {
- rom-addr = /bits/ 8 <0xa9>;
- rom-val = /bits/ 8 <0x80>;
- };
- rom-aah {
- rom-addr = /bits/ 8 <0xaa>;
- rom-val = /bits/ 8 <0x0f>;
- };
- rom-aeh {
- rom-addr = /bits/ 8 <0xae>;
- rom-val = /bits/ 8 <0x0f>;
- };
- };
-};
-
-&blsp2_uart1 {
- status = "okay";
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- max-speed = <3000000>;
-
- pinctrl-0 = <&bt_host_wake_pin>, <&bt_dev_wake_pin>, <&bt_reg_on_pin>;
- pinctrl-names = "default";
-
- host-wakeup-gpios = <&tlmm 95 GPIO_ACTIVE_HIGH>;
- device-wakeup-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
- shutdown-gpios = <&pm8941_gpios 16 GPIO_ACTIVE_HIGH>;
- };
-};
-
-&pm8941_coincell {
- qcom,rset-ohms = <2100>;
- qcom,vset-millivolts = <3000>;
-
- status = "okay";
-};
-
-&pm8941_gpios {
- gpio_keys_pin_a: gpio-keys-active-state {
- pins = "gpio2", "gpio5";
- function = "normal";
- bias-pull-up;
- power-source = <PM8941_GPIO_S3>;
- };
-
- bt_reg_on_pin: bt-reg-on-state {
- pins = "gpio16";
- function = "normal";
- output-low;
- power-source = <PM8941_GPIO_S3>;
- };
-
- wlan_sleep_clk_pin: wl-sleep-clk-state {
- pins = "gpio17";
- function = "func2";
- output-high;
- power-source = <PM8941_GPIO_S3>;
- };
-
- wlan_regulator_pin: wl-reg-active-state {
- pins = "gpio18";
- function = "normal";
- bias-disable;
- power-source = <PM8941_GPIO_S3>;
- };
-
- lcd_dcdc_en_pin_a: lcd-dcdc-en-active-state {
- pins = "gpio20";
- function = "normal";
- bias-disable;
- power-source = <PM8941_GPIO_S3>;
- input-disable;
- output-low;
- };
-};
-
-&pm8941_lpg {
- qcom,power-source = <1>;
-
- status = "okay";
-
- multi-led {
- color = <LED_COLOR_ID_RGB>;
- function = LED_FUNCTION_STATUS;
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- led@5 {
- reg = <5>;
- color = <LED_COLOR_ID_BLUE>;
- };
-
- led@6 {
- reg = <6>;
- color = <LED_COLOR_ID_GREEN>;
- };
-
- led@7 {
- reg = <7>;
- color = <LED_COLOR_ID_RED>;
- };
- };
-};
-
-&remoteproc_adsp {
- cx-supply = <&pm8841_s2>;
- status = "okay";
-};
-
-&remoteproc_mss {
- cx-supply = <&pm8841_s2>;
- mss-supply = <&pm8841_s3>;
- mx-supply = <&pm8841_s1>;
- pll-supply = <&pm8941_l12>;
- status = "okay";
-};
-
-&rpm_requests {
- regulators-0 {
- compatible = "qcom,rpm-pm8841-regulators";
-
- pm8841_s1: s1 {
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <1050000>;
- };
-
- pm8841_s2: s2 {
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1050000>;
- };
-
- pm8841_s3: s3 {
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1050000>;
- };
-
- pm8841_s4: s4 {
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1050000>;
- };
- };
-
- regulators-1 {
- compatible = "qcom,rpm-pm8941-regulators";
-
- vdd_l1_l3-supply = <&pm8941_s1>;
- vdd_l2_lvs1_2_3-supply = <&pm8941_s3>;
- vdd_l4_l11-supply = <&pm8941_s1>;
- vdd_l5_l7-supply = <&pm8941_s2>;
- vdd_l6_l12_l14_l15-supply = <&pm8941_s2>;
- vdd_l9_l10_l17_l22-supply = <&vreg_boost>;
- vdd_l13_l20_l23_l24-supply = <&vreg_boost>;
- vdd_l21-supply = <&vreg_boost>;
-
- pm8941_s1: s1 {
- regulator-min-microvolt = <1300000>;
- regulator-max-microvolt = <1300000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- pm8941_s2: s2 {
- regulator-min-microvolt = <2150000>;
- regulator-max-microvolt = <2150000>;
- regulator-boot-on;
- };
-
- pm8941_s3: s3 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-system-load = <154000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- pm8941_s4: s4 {
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
- pm8941_l1: l1 {
- regulator-min-microvolt = <1225000>;
- regulator-max-microvolt = <1225000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- pm8941_l2: l2 {
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- };
-
- pm8941_l3: l3 {
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- };
-
- pm8941_l4: l4 {
- regulator-min-microvolt = <1225000>;
- regulator-max-microvolt = <1225000>;
- };
-
- pm8941_l5: l5 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- pm8941_l6: l6 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
- };
-
- pm8941_l7: l7 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
- };
-
- pm8941_l8: l8 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- pm8941_l9: l9 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <2950000>;
- };
-
- pm8941_l11: l11 {
- regulator-min-microvolt = <1300000>;
- regulator-max-microvolt = <1350000>;
- };
-
- pm8941_l12: l12 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- pm8941_l13: l13 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <2950000>;
- regulator-boot-on;
- };
-
- pm8941_l14: l14 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- pm8941_l15: l15 {
- regulator-min-microvolt = <2050000>;
- regulator-max-microvolt = <2050000>;
- };
-
- pm8941_l16: l16 {
- regulator-min-microvolt = <2700000>;
- regulator-max-microvolt = <2700000>;
- };
-
- pm8941_l17: l17 {
- regulator-min-microvolt = <2700000>;
- regulator-max-microvolt = <2700000>;
- };
-
- pm8941_l18: l18 {
- regulator-min-microvolt = <2850000>;
- regulator-max-microvolt = <2850000>;
- };
-
- pm8941_l19: l19 {
- regulator-min-microvolt = <2850000>;
- regulator-max-microvolt = <2850000>;
- };
-
- pm8941_l20: l20 {
- regulator-min-microvolt = <2950000>;
- regulator-max-microvolt = <2950000>;
- regulator-system-load = <500000>;
- regulator-allow-set-load;
- regulator-boot-on;
- };
-
- pm8941_l21: l21 {
- regulator-min-microvolt = <2950000>;
- regulator-max-microvolt = <2950000>;
- regulator-boot-on;
- };
-
- pm8941_l22: l22 {
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- };
-
- pm8941_l23: l23 {
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- };
-
- pm8941_l24: l24 {
- regulator-min-microvolt = <3075000>;
- regulator-max-microvolt = <3075000>;
- regulator-boot-on;
- };
-
- pm8941_lvs3: lvs3 {};
- };
-};
-
-&sdhc_1 {
- vmmc-supply = <&pm8941_l20>;
- vqmmc-supply = <&pm8941_s3>;
-
- pinctrl-0 = <&sdc1_on>;
- pinctrl-1 = <&sdc1_off>;
- pinctrl-names = "default", "sleep";
-
- status = "okay";
-};
-
-&sdhc_2 {
- vmmc-supply = <&pm8941_l21>;
- vqmmc-supply = <&pm8941_l13>;
-
- cd-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>;
-
- pinctrl-0 = <&sdc2_on>;
- pinctrl-1 = <&sdc2_off>;
- pinctrl-names = "default", "sleep";
-
- status = "okay";
-};
-
-&sdhc_3 {
- max-frequency = <100000000>;
- vmmc-supply = <&vreg_wlan>;
- non-removable;
-
- pinctrl-0 = <&sdc3_on>;
- pinctrl-names = "default";
-
- status = "okay";
-
- wifi@1 {
- compatible = "brcm,bcm4339-fmac", "brcm,bcm4329-fmac";
- reg = <1>;
-
- brcm,drive-strength = <10>;
-
- pinctrl-0 = <&wlan_sleep_clk_pin>;
- pinctrl-names = "default";
- };
-};
-
-&smbb {
- qcom,fast-charge-safe-current = <1500000>;
- qcom,fast-charge-current-limit = <1500000>;
- qcom,dc-current-limit = <1800000>;
- usb-charge-current-limit = <1800000>;
- qcom,fast-charge-safe-voltage = <4400000>;
- qcom,fast-charge-high-threshold-voltage = <4350000>;
- qcom,fast-charge-low-threshold-voltage = <3400000>;
- qcom,auto-recharge-threshold-voltage = <4200000>;
- qcom,minimum-input-voltage = <4300000>;
-
- status = "okay";
-};
-
-&tlmm {
- lcd_backlight_en_pin_a: lcd-backlight-vddio-state {
- pins = "gpio69";
- function = "gpio";
- drive-strength = <10>;
- output-low;
- bias-disable;
- };
-
- sdc1_on: sdc1-on-state {
- clk-pins {
- pins = "sdc1_clk";
- drive-strength = <16>;
- bias-disable;
- };
-
- cmd-data-pins {
- pins = "sdc1_cmd", "sdc1_data";
- drive-strength = <10>;
- bias-pull-up;
- };
- };
-
- sdc2_on: sdc2-on-state {
- clk-pins {
- pins = "sdc2_clk";
- drive-strength = <6>;
- bias-disable;
- };
-
- cmd-data-pins {
- pins = "sdc2_cmd", "sdc2_data";
- drive-strength = <6>;
- bias-pull-up;
- };
-
- cd-pins {
- pins = "gpio62";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- };
- };
-
- sdc3_on: sdc3-on-state {
- clk-pins {
- pins = "gpio40";
- function = "sdc3";
- drive-strength = <10>;
- bias-disable;
- };
-
- cmd-pins {
- pins = "gpio39";
- function = "sdc3";
- drive-strength = <10>;
- bias-pull-up;
- };
-
- data-pins {
- pins = "gpio35", "gpio36", "gpio37", "gpio38";
- function = "sdc3";
- drive-strength = <10>;
- bias-pull-up;
- };
- };
-
- ts_int_pin: ts-int-pin-state {
- pins = "gpio86";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- };
-
- bt_host_wake_pin: bt-host-wake-state {
- pins = "gpio95";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- output-low;
- };
-
- bt_dev_wake_pin: bt-dev-wake-state {
- pins = "gpio96";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- };
-};
-
-&usb {
- phys = <&usb_hs1_phy>;
- phy-select = <&tcsr 0xb000 0>;
- extcon = <&smbb>, <&usb_id>;
- vbus-supply = <&chg_otg>;
-
- hnp-disable;
- srp-disable;
- adp-disable;
-
- status = "okay";
-};
-
-&usb_hs1_phy {
- v1p8-supply = <&pm8941_l6>;
- v3p3-supply = <&pm8941_l24>;
-
- extcon = <&smbb>;
- qcom,init-seq = /bits/ 8 <0x1 0x64>;
-
- status = "okay";
-};
+// SPDX-License-Identifier: GPL-2.0
+#include "qcom-msm8974pro-sony-xperia-shinano-common.dtsi"
+
+/ {
+ model = "Sony Xperia Z2 Tablet";
+ compatible = "sony,xperia-castor", "qcom,msm8974pro", "qcom,msm8974";
+ chassis-type = "tablet";
+
+ vreg_bl_vddio: lcd-backlight-vddio {
+ compatible = "regulator-fixed";
+ regulator-name = "vreg_bl_vddio";
+ regulator-min-microvolt = <3150000>;
+ regulator-max-microvolt = <3150000>;
+
+ gpio = <&tlmm 69 0>;
+ enable-active-high;
+
+ vin-supply = <&pm8941_s3>;
+ startup-delay-us = <70000>;
+
+ pinctrl-0 = <&lcd_backlight_en_pin_a>;
+ pinctrl-names = "default";
+ };
+};
+
+&blsp2_i2c5 {
+ clock-frequency = <355000>;
+
+ status = "okay";
+
+ lp8566_wled: backlight@2c {
+ compatible = "ti,lp8556";
+ reg = <0x2c>;
+ power-supply = <&vreg_bl_vddio>;
+
+ bl-name = "backlight";
+ dev-ctrl = /bits/ 8 <0x05>;
+ init-brt = /bits/ 8 <0x3f>;
+
+ rom-a0h {
+ rom-addr = /bits/ 8 <0xa0>;
+ rom-val = /bits/ 8 <0xff>;
+ };
+
+ rom-a1h {
+ rom-addr = /bits/ 8 <0xa1>;
+ rom-val = /bits/ 8 <0x3f>;
+ };
+
+ rom-a2h {
+ rom-addr = /bits/ 8 <0xa2>;
+ rom-val = /bits/ 8 <0x20>;
+ };
+
+ rom-a3h {
+ rom-addr = /bits/ 8 <0xa3>;
+ rom-val = /bits/ 8 <0x5e>;
+ };
+
+ rom-a4h {
+ rom-addr = /bits/ 8 <0xa4>;
+ rom-val = /bits/ 8 <0x02>;
+ };
+
+ rom-a5h {
+ rom-addr = /bits/ 8 <0xa5>;
+ rom-val = /bits/ 8 <0x04>;
+ };
+
+ rom-a6h {
+ rom-addr = /bits/ 8 <0xa6>;
+ rom-val = /bits/ 8 <0x80>;
+ };
+
+ rom-a7h {
+ rom-addr = /bits/ 8 <0xa7>;
+ rom-val = /bits/ 8 <0xf7>;
+ };
+
+ rom-a9h {
+ rom-addr = /bits/ 8 <0xa9>;
+ rom-val = /bits/ 8 <0x80>;
+ };
+
+ rom-aah {
+ rom-addr = /bits/ 8 <0xaa>;
+ rom-val = /bits/ 8 <0x0f>;
+ };
+
+ rom-aeh {
+ rom-addr = /bits/ 8 <0xae>;
+ rom-val = /bits/ 8 <0x0f>;
+ };
+ };
+};
+
+&blsp2_uart1 {
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ max-speed = <3000000>;
+
+ pinctrl-0 = <&bt_host_wake_pin>, <&bt_dev_wake_pin>, <&bt_reg_on_pin>;
+ pinctrl-names = "default";
+
+ host-wakeup-gpios = <&tlmm 95 GPIO_ACTIVE_HIGH>;
+ device-wakeup-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
+ shutdown-gpios = <&pm8941_gpios 16 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&pm8941_gpios {
+ bt_reg_on_pin: bt-reg-on-state {
+ pins = "gpio16";
+ function = "normal";
+ output-low;
+ power-source = <PM8941_GPIO_S3>;
+ };
+};
+
+&rpm_requests {
+ regulators-1 {
+ pm8941_l11: l11 {
+ regulator-min-microvolt = <1300000>;
+ regulator-max-microvolt = <1350000>;
+ };
+
+ pm8941_l19: l19 {
+ regulator-min-microvolt = <2850000>;
+ regulator-max-microvolt = <2850000>;
+ };
+ };
+};
+
+&smbb {
+ qcom,fast-charge-safe-current = <1500000>;
+ qcom,fast-charge-current-limit = <1500000>;
+ qcom,dc-current-limit = <1800000>;
+ usb-charge-current-limit = <1800000>;
+ qcom,fast-charge-safe-voltage = <4400000>;
+ qcom,fast-charge-high-threshold-voltage = <4350000>;
+ qcom,fast-charge-low-threshold-voltage = <3400000>;
+ qcom,auto-recharge-threshold-voltage = <4200000>;
+ qcom,minimum-input-voltage = <4300000>;
+
+ status = "okay";
+};
+
+&synaptics_touchscreen {
+ vio-supply = <&pm8941_lvs3>;
+};
+
+&tlmm {
+ bt_dev_wake_pin: bt-dev-wake-state {
+ pins = "gpio96";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ bt_host_wake_pin: bt-host-wake-state {
+ pins = "gpio95";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ output-low;
+ };
+
+ lcd_backlight_en_pin_a: lcd-backlight-vddio-state {
+ pins = "gpio69";
+ function = "gpio";
+ drive-strength = <10>;
+ output-low;
+ bias-disable;
+ };
+};
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-common.dtsi
similarity index 75%
copy from arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts
copy to arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-common.dtsi
index 20f98a9e49ea..3a0c0035de09 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts
+++ b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-common.dtsi
@@ -7,10 +7,6 @@
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
/ {
- model = "Sony Xperia Z2 Tablet";
- compatible = "sony,xperia-castor", "qcom,msm8974pro", "qcom,msm8974";
- chassis-type = "tablet";
-
aliases {
mmc0 = &sdhc_1;
mmc1 = &sdhc_2;
@@ -43,22 +39,6 @@ key-volume-up {
};
};
- vreg_bl_vddio: lcd-backlight-vddio {
- compatible = "regulator-fixed";
- regulator-name = "vreg_bl_vddio";
- regulator-min-microvolt = <3150000>;
- regulator-max-microvolt = <3150000>;
-
- gpio = <&tlmm 69 0>;
- enable-active-high;
-
- vin-supply = <&pm8941_s3>;
- startup-delay-us = <70000>;
-
- pinctrl-0 = <&lcd_backlight_en_pin_a>;
- pinctrl-names = "default";
- };
-
vreg_vsp: lcd-dcdc-regulator {
compatible = "regulator-fixed";
regulator-name = "vreg_vsp";
@@ -123,7 +103,7 @@ &blsp2_i2c2 {
status = "okay";
- synaptics@2c {
+ synaptics_touchscreen: synaptics@2c {
compatible = "syna,rmi4-i2c";
reg = <0x2c>;
@@ -134,7 +114,7 @@ synaptics@2c {
#size-cells = <0>;
vdd-supply = <&pm8941_l22>;
- vio-supply = <&pm8941_lvs3>;
+ /* vio-supply is set in dts */
pinctrl-0 = <&ts_int_pin>;
pinctrl-names = "default";
@@ -154,83 +134,6 @@ rmi4-f11@11 {
};
};
-&blsp2_i2c5 {
- clock-frequency = <355000>;
-
- status = "okay";
-
- lp8566_wled: backlight@2c {
- compatible = "ti,lp8556";
- reg = <0x2c>;
- power-supply = <&vreg_bl_vddio>;
-
- bl-name = "backlight";
- dev-ctrl = /bits/ 8 <0x05>;
- init-brt = /bits/ 8 <0x3f>;
-
- rom-a0h {
- rom-addr = /bits/ 8 <0xa0>;
- rom-val = /bits/ 8 <0xff>;
- };
- rom-a1h {
- rom-addr = /bits/ 8 <0xa1>;
- rom-val = /bits/ 8 <0x3f>;
- };
- rom-a2h {
- rom-addr = /bits/ 8 <0xa2>;
- rom-val = /bits/ 8 <0x20>;
- };
- rom-a3h {
- rom-addr = /bits/ 8 <0xa3>;
- rom-val = /bits/ 8 <0x5e>;
- };
- rom-a4h {
- rom-addr = /bits/ 8 <0xa4>;
- rom-val = /bits/ 8 <0x02>;
- };
- rom-a5h {
- rom-addr = /bits/ 8 <0xa5>;
- rom-val = /bits/ 8 <0x04>;
- };
- rom-a6h {
- rom-addr = /bits/ 8 <0xa6>;
- rom-val = /bits/ 8 <0x80>;
- };
- rom-a7h {
- rom-addr = /bits/ 8 <0xa7>;
- rom-val = /bits/ 8 <0xf7>;
- };
- rom-a9h {
- rom-addr = /bits/ 8 <0xa9>;
- rom-val = /bits/ 8 <0x80>;
- };
- rom-aah {
- rom-addr = /bits/ 8 <0xaa>;
- rom-val = /bits/ 8 <0x0f>;
- };
- rom-aeh {
- rom-addr = /bits/ 8 <0xae>;
- rom-val = /bits/ 8 <0x0f>;
- };
- };
-};
-
-&blsp2_uart1 {
- status = "okay";
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- max-speed = <3000000>;
-
- pinctrl-0 = <&bt_host_wake_pin>, <&bt_dev_wake_pin>, <&bt_reg_on_pin>;
- pinctrl-names = "default";
-
- host-wakeup-gpios = <&tlmm 95 GPIO_ACTIVE_HIGH>;
- device-wakeup-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
- shutdown-gpios = <&pm8941_gpios 16 GPIO_ACTIVE_HIGH>;
- };
-};
-
&pm8941_coincell {
qcom,rset-ohms = <2100>;
qcom,vset-millivolts = <3000>;
@@ -246,13 +149,6 @@ gpio_keys_pin_a: gpio-keys-active-state {
power-source = <PM8941_GPIO_S3>;
};
- bt_reg_on_pin: bt-reg-on-state {
- pins = "gpio16";
- function = "normal";
- output-low;
- power-source = <PM8941_GPIO_S3>;
- };
-
wlan_sleep_clk_pin: wl-sleep-clk-state {
pins = "gpio17";
function = "func2";
@@ -431,11 +327,6 @@ pm8941_l9: l9 {
regulator-max-microvolt = <2950000>;
};
- pm8941_l11: l11 {
- regulator-min-microvolt = <1300000>;
- regulator-max-microvolt = <1350000>;
- };
-
pm8941_l12: l12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
@@ -474,11 +365,6 @@ pm8941_l18: l18 {
regulator-max-microvolt = <2850000>;
};
- pm8941_l19: l19 {
- regulator-min-microvolt = <2850000>;
- regulator-max-microvolt = <2850000>;
- };
-
pm8941_l20: l20 {
regulator-min-microvolt = <2950000>;
regulator-max-microvolt = <2950000>;
@@ -558,29 +444,7 @@ wifi@1 {
};
};
-&smbb {
- qcom,fast-charge-safe-current = <1500000>;
- qcom,fast-charge-current-limit = <1500000>;
- qcom,dc-current-limit = <1800000>;
- usb-charge-current-limit = <1800000>;
- qcom,fast-charge-safe-voltage = <4400000>;
- qcom,fast-charge-high-threshold-voltage = <4350000>;
- qcom,fast-charge-low-threshold-voltage = <3400000>;
- qcom,auto-recharge-threshold-voltage = <4200000>;
- qcom,minimum-input-voltage = <4300000>;
-
- status = "okay";
-};
-
&tlmm {
- lcd_backlight_en_pin_a: lcd-backlight-vddio-state {
- pins = "gpio69";
- function = "gpio";
- drive-strength = <10>;
- output-low;
- bias-disable;
- };
-
sdc1_on: sdc1-on-state {
clk-pins {
pins = "sdc1_clk";
@@ -645,21 +509,6 @@ ts_int_pin: ts-int-pin-state {
drive-strength = <2>;
bias-disable;
};
-
- bt_host_wake_pin: bt-host-wake-state {
- pins = "gpio95";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- output-low;
- };
-
- bt_dev_wake_pin: bt-dev-wake-state {
- pins = "gpio96";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- };
};
&usb {
--
2.44.0
^ permalink raw reply related [relevance 41%]
* [PATCH v2 0/3] Split sony-castor into shinano-common and add Sony Xperia Z3
@ 2024-03-14 18:56 85% Luca Weiss
2024-03-14 18:56 41% ` [PATCH v2 1/3] ARM: dts: qcom: msm8974-sony-castor: Split into shinano-common Luca Weiss
` (2 more replies)
0 siblings, 3 replies; 200+ results
From: Luca Weiss @ 2024-03-14 18:56 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss, Krzysztof Kozlowski
Prepare for adding sony-leo dts by splitting common parts into a
separate dtsi file.
Then add the dts for Sony Xperia Z3.
Depends on:
https://lore.kernel.org/linux-arm-msm/20240306-castor-changes-v1-0-2286eaf85fff@z3ntu.xyz/T/
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Changes in v2:
- Add leo dtb to Makefile
- Add newlines between the subnodes in the backlight node
- Pick up tags
- Link to v1: https://lore.kernel.org/r/20240310-shinano-common-v1-0-d64cd322ebca@z3ntu.xyz
---
Luca Weiss (3):
ARM: dts: qcom: msm8974-sony-castor: Split into shinano-common
dt-bindings: arm: qcom: Add Sony Xperia Z3
ARM: dts: qcom: Add Sony Xperia Z3 smartphone
Documentation/devicetree/bindings/arm/qcom.yaml | 1 +
arch/arm/boot/dts/qcom/Makefile | 1 +
.../qcom-msm8974pro-sony-xperia-shinano-castor.dts | 551 +--------------------
...qcom-msm8974pro-sony-xperia-shinano-common.dtsi | 535 ++++++++++++++++++++
.../qcom-msm8974pro-sony-xperia-shinano-leo.dts | 44 ++
5 files changed, 602 insertions(+), 530 deletions(-)
---
base-commit: bee52eeb37d8124a07711657d1650bf3b467e7dd
change-id: 20240310-shinano-common-093fe25fe3a1
Best regards,
--
Luca Weiss <luca@z3ntu.xyz>
^ permalink raw reply [relevance 85%]
* [PATCH 2/2] arm64: dts: qcom: sc7280: Add inline crypto engine
2024-03-13 12:53 99% [PATCH 0/2] Add Inline Crypto Engine for SC7280 UFS Luca Weiss
2024-03-13 12:53 99% ` [PATCH 1/2] dt-bindings: crypto: ice: Document sc7280 inline crypto engine Luca Weiss
@ 2024-03-13 12:53 98% ` Luca Weiss
1 sibling, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-13 12:53 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Herbert Xu, David S. Miller,
Rob Herring, Krzysztof Kozlowski, Conor Dooley,
cros-qcom-dts-watchers
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
linux-crypto, devicetree, linux-kernel, Luca Weiss
Add the ICE found on sc7280 and link it to the UFS node.
For reference:
[ 0.261424] qcom-ice 1d88000.crypto: Found QC Inline Crypto Engine (ICE) v3.2.0
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 83b5b76ba179..3ea5f9cf040e 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2314,6 +2314,8 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
<0 0>,
<0 0>,
<0 0>;
+ qcom,ice = <&ice>;
+
status = "disabled";
};
@@ -2336,6 +2338,13 @@ ufs_mem_phy: phy@1d87000 {
status = "disabled";
};
+ ice: crypto@1d88000 {
+ compatible = "qcom,sc7280-inline-crypto-engine",
+ "qcom,inline-crypto-engine";
+ reg = <0 0x01d88000 0 0x8000>;
+ clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
+ };
+
cryptobam: dma-controller@1dc4000 {
compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
reg = <0x0 0x01dc4000 0x0 0x28000>;
--
2.44.0
^ permalink raw reply related [relevance 98%]
* [PATCH 1/2] dt-bindings: crypto: ice: Document sc7280 inline crypto engine
2024-03-13 12:53 99% [PATCH 0/2] Add Inline Crypto Engine for SC7280 UFS Luca Weiss
@ 2024-03-13 12:53 99% ` Luca Weiss
2024-03-13 12:53 98% ` [PATCH 2/2] arm64: dts: qcom: sc7280: Add " Luca Weiss
1 sibling, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-13 12:53 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Herbert Xu, David S. Miller,
Rob Herring, Krzysztof Kozlowski, Conor Dooley,
cros-qcom-dts-watchers
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
linux-crypto, devicetree, linux-kernel, Luca Weiss
Document the compatible used for the inline crypto engine found on
SC7280.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml
index 09e43157cc71..a43527fb2ceb 100644
--- a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml
+++ b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml
@@ -14,6 +14,7 @@ properties:
items:
- enum:
- qcom,sa8775p-inline-crypto-engine
+ - qcom,sc7280-inline-crypto-engine
- qcom,sm8450-inline-crypto-engine
- qcom,sm8550-inline-crypto-engine
- qcom,sm8650-inline-crypto-engine
--
2.44.0
^ permalink raw reply related [relevance 99%]
* [PATCH 0/2] Add Inline Crypto Engine for SC7280 UFS
@ 2024-03-13 12:53 99% Luca Weiss
2024-03-13 12:53 99% ` [PATCH 1/2] dt-bindings: crypto: ice: Document sc7280 inline crypto engine Luca Weiss
2024-03-13 12:53 98% ` [PATCH 2/2] arm64: dts: qcom: sc7280: Add " Luca Weiss
0 siblings, 2 replies; 200+ results
From: Luca Weiss @ 2024-03-13 12:53 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Herbert Xu, David S. Miller,
Rob Herring, Krzysztof Kozlowski, Conor Dooley,
cros-qcom-dts-watchers
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
linux-crypto, devicetree, linux-kernel, Luca Weiss
Add the required bits to support Inline Crypto Engine on SC7280 SoC with
UFS.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
Luca Weiss (2):
dt-bindings: crypto: ice: Document sc7280 inline crypto engine
arm64: dts: qcom: sc7280: Add inline crypto engine
.../devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml | 1 +
arch/arm64/boot/dts/qcom/sc7280.dtsi | 9 +++++++++
2 files changed, 10 insertions(+)
---
base-commit: 5f19977109ce685937fee9feea9b807599dfc925
change-id: 20231208-sc7280-ice-a550626bfc09
Best regards,
--
Luca Weiss <luca.weiss@fairphone.com>
^ permalink raw reply [relevance 99%]
* Re: [PATCH 0/2] Add Samsung Galaxy Note 3 support
@ 2024-03-11 16:53 88% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-11 16:53 UTC (permalink / raw)
To: Rob Herring
Cc: linux-arm-msm, Bjorn Andersson, Krzysztof Kozlowski,
Conor Dooley, Rob Herring, ~postmarketos/upstreaming, devicetree,
linux-kernel, Konrad Dybcio, phone-devel, Adam Honse
On Montag, 11. März 2024 15:23:30 CET Rob Herring wrote:
>
> On Sun, 10 Mar 2024 15:13:35 +0100, Luca Weiss wrote:
> > Add the dts for "hlte" which is a phablet from 2013.
> >
> > Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
> > ---
> > Adam Honse (1):
> > ARM: dts: qcom: msm8974: Add Samsung Galaxy Note 3
> >
> > Luca Weiss (1):
> > dt-bindings: arm: qcom: Add Samsung Galaxy Note 3
> >
> > Documentation/devicetree/bindings/arm/qcom.yaml | 1 +
> > arch/arm/boot/dts/qcom/Makefile | 1 +
> > .../boot/dts/qcom/qcom-msm8974-samsung-hlte.dts | 403 +++++++++++++++++++++
> > 3 files changed, 405 insertions(+)
> > ---
> > base-commit: 90d35da658da8cff0d4ecbb5113f5fac9d00eb72
> > change-id: 20240310-samsung-hlte-78d1a287b0a8
> >
> > Best regards,
> > --
> > Luca Weiss <luca@z3ntu.xyz>
> >
> >
> >
>
>
> My bot found new DTB warnings on the .dts files added or changed in this
> series.
>
> Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
> are fixed by another series. Ultimately, it is up to the platform
> maintainer whether these warnings are acceptable or not. No need to reply
> unless the platform maintainer has comments.
>
> If you already ran DT checks and didn't see these error(s), then
> make sure dt-schema is up to date:
>
> pip3 install dtschema --upgrade
>
>
> New warnings running 'make CHECK_DTBS=y qcom/qcom-msm8974-samsung-hlte.dtb' for 20240310-samsung-hlte-v1-0-e9b55bf98a48@z3ntu.xyz:
>
> arch/arm/boot/dts/qcom/qcom-msm8974-samsung-hlte.dtb: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 0]]}
> from schema $id: http://devicetree.org/schemas/root-node.yaml#
> arch/arm/boot/dts/qcom/qcom-msm8974-samsung-hlte.dtb: l2-cache: Unevaluated properties are not allowed ('qcom,saw' was unexpected)
> from schema $id: http://devicetree.org/schemas/cache.yaml#
> arch/arm/boot/dts/qcom/qcom-msm8974-samsung-hlte.dtb: idle-states: 'spc' does not match any of the regexes: '^(cpu|cluster)-', 'pinctrl-[0-9]+'
> from schema $id: http://devicetree.org/schemas/cpu/idle-states.yaml#
> arch/arm/boot/dts/qcom/qcom-msm8974-samsung-hlte.dtb: syscon@f9011000: compatible: 'anyOf' conditional failed, one must be fixed:
> ['syscon'] is too short
> 'syscon' is not one of ['allwinner,sun8i-a83t-system-controller', 'allwinner,sun8i-h3-system-controller', 'allwinner,sun8i-v3s-system-controller', 'allwinner,sun50i-a64-system-controller', 'amd,pensando-elba-syscon', 'brcm,cru-clkset', 'freecom,fsg-cs2-system-controller', 'fsl,imx93-aonmix-ns-syscfg', 'fsl,imx93-wakeupmix-syscfg', 'hisilicon,dsa-subctrl', 'hisilicon,hi6220-sramctrl', 'hisilicon,pcie-sas-subctrl', 'hisilicon,peri-subctrl', 'hpe,gxp-sysreg', 'intel,lgm-syscon', 'loongson,ls1b-syscon', 'loongson,ls1c-syscon', 'marvell,armada-3700-usb2-host-misc', 'mediatek,mt8135-pctl-a-syscfg', 'mediatek,mt8135-pctl-b-syscfg', 'mediatek,mt8365-syscfg', 'microchip,lan966x-cpu-syscon', 'microchip,sparx5-cpu-syscon', 'mstar,msc313-pmsleep', 'nuvoton,ma35d1-sys', 'nuvoton,wpcm450-shm', 'rockchip,px30-qos', 'rockchip,rk3036-qos', 'rockchip,rk3066-qos', 'rockchip,rk3128-qos', 'rockchip,rk3228-qos', 'rockchip,rk3288-qos', 'rockchip,rk3368-qos', 'rockchip,rk3399-qos', 'rockchip,rk3568-qos', '
> rockchip,rk3588-qos', 'rockchip,rv1126-qos', 'starfive,jh7100-sysmain', 'ti,am62-usb-phy-ctrl', 'ti,am654-dss-oldi-io-ctrl', 'ti,am654-serdes-ctrl', 'ti,j784s4-pcie-ctrl']
> from schema $id: http://devicetree.org/schemas/mfd/syscon.yaml#
Unfortunately all existing warnings from the .dtsi.
Regards
Luca
^ permalink raw reply [relevance 88%]
* [PATCH 1/2] dt-bindings: arm: qcom: Add Samsung Galaxy Note 3
2024-03-10 14:13 88% [PATCH 0/2] Add Samsung Galaxy Note 3 support Luca Weiss
@ 2024-03-10 14:13 88% ` Luca Weiss
2024-03-10 14:13 62% ` [PATCH 2/2] ARM: dts: qcom: msm8974: " Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-10 14:13 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Adam Honse
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss
Add the compatible for this Samsung smartphone ("phablet" as it was
named in that era).
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Documentation/devicetree/bindings/arm/qcom.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
index 1a5fb889a444..57182bfa27ee 100644
--- a/Documentation/devicetree/bindings/arm/qcom.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom.yaml
@@ -214,6 +214,7 @@ properties:
- items:
- enum:
- lge,hammerhead
+ - samsung,hlte
- sony,xperia-amami
- sony,xperia-honami
- const: qcom,msm8974
--
2.44.0
^ permalink raw reply related [relevance 88%]
* [PATCH 2/2] ARM: dts: qcom: msm8974: Add Samsung Galaxy Note 3
2024-03-10 14:13 88% [PATCH 0/2] Add Samsung Galaxy Note 3 support Luca Weiss
2024-03-10 14:13 88% ` [PATCH 1/2] dt-bindings: arm: qcom: Add Samsung Galaxy Note 3 Luca Weiss
@ 2024-03-10 14:13 62% ` Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-10 14:13 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Adam Honse
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss
From: Adam Honse <calcprogrammer1@gmail.com>
Add the devicetree for this "phablet" using the Snapdragon 800 SoC.
Signed-off-by: Adam Honse <calcprogrammer1@gmail.com>
[luca@z3ntu.xyz: clean up, prepare for upstream]
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
arch/arm/boot/dts/qcom/Makefile | 1 +
.../boot/dts/qcom/qcom-msm8974-samsung-hlte.dts | 403 +++++++++++++++++++++
2 files changed, 404 insertions(+)
diff --git a/arch/arm/boot/dts/qcom/Makefile b/arch/arm/boot/dts/qcom/Makefile
index 9cc1e14e6cd0..845af12d15a2 100644
--- a/arch/arm/boot/dts/qcom/Makefile
+++ b/arch/arm/boot/dts/qcom/Makefile
@@ -39,6 +39,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
qcom-msm8960-cdp.dtb \
qcom-msm8960-samsung-expressatt.dtb \
qcom-msm8974-lge-nexus5-hammerhead.dtb \
+ qcom-msm8974-samsung-hlte.dtb \
qcom-msm8974-sony-xperia-rhine-amami.dtb \
qcom-msm8974-sony-xperia-rhine-honami.dtb \
qcom-msm8974pro-fairphone-fp2.dtb \
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974-samsung-hlte.dts b/arch/arm/boot/dts/qcom/qcom-msm8974-samsung-hlte.dts
new file mode 100644
index 000000000000..e03227a49b67
--- /dev/null
+++ b/arch/arm/boot/dts/qcom/qcom-msm8974-samsung-hlte.dts
@@ -0,0 +1,403 @@
+// SPDX-License-Identifier: GPL-2.0
+#include "qcom-msm8974.dtsi"
+#include "pm8841.dtsi"
+#include "pm8941.dtsi"
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
+
+/ {
+ model = "Samsung Galaxy Note 3";
+ compatible = "samsung,hlte", "qcom,msm8974";
+ chassis-type = "handset";
+
+ aliases {
+ mmc0 = &sdhc_1; /* SDC1 eMMC slot */
+ mmc1 = &sdhc_3; /* SDC3 SD card slot */
+ serial0 = &blsp1_uart1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio_keys_pin_a>;
+
+ key-home {
+ label = "home_key";
+ gpios = <&pm8941_gpios 3 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_HOMEPAGE>;
+ wakeup-source;
+ debounce-interval = <15>;
+ };
+
+ key-volume-down {
+ label = "volume_down";
+ gpios = <&pm8941_gpios 2 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_VOLUMEDOWN>;
+ debounce-interval = <15>;
+ };
+
+ key-volume-up {
+ label = "volume_up";
+ gpios = <&pm8941_gpios 5 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_VOLUMEUP>;
+ debounce-interval = <15>;
+ };
+ };
+
+ touch_ldo: regulator-touch {
+ compatible = "regulator-fixed";
+ regulator-name = "touch-ldo";
+
+ gpio = <&pm8941_gpios 9 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-boot-on;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&touch_ldo_pin>;
+ };
+};
+
+&blsp1_i2c2 {
+ status = "okay";
+
+ touchscreen@20 {
+ compatible = "syna,rmi4-i2c";
+ reg = <0x20>;
+
+ interrupt-parent = <&pm8941_gpios>;
+ interrupts = <30 IRQ_TYPE_EDGE_FALLING>;
+
+ vdd-supply = <&pm8941_l10>;
+ vio-supply = <&touch_ldo>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&touch_pin>;
+
+ syna,startup-delay-ms = <100>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rmi4-f01@1 {
+ reg = <0x1>;
+ syna,nosleep-mode = <1>;
+ };
+
+ rmi4-f12@12 {
+ reg = <0x12>;
+ syna,sensor-type = <1>;
+ };
+ };
+};
+
+&blsp2_i2c6 {
+ status = "okay";
+
+ fuelgauge@36 {
+ compatible = "maxim,max17048";
+ reg = <0x36>;
+
+ maxim,double-soc;
+ maxim,rcomp = /bits/ 8 <0x56>;
+
+ interrupt-parent = <&pm8941_gpios>;
+ interrupts = <26 IRQ_TYPE_EDGE_FALLING>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&fuelgauge_pin>;
+ };
+};
+
+&blsp1_uart2 {
+ status = "okay";
+};
+
+&pm8941_gpios {
+ gpio_keys_pin_a: gpio-keys-active-state {
+ pins = "gpio2", "gpio3", "gpio5";
+ function = "normal";
+ bias-pull-up;
+ power-source = <PM8941_GPIO_S3>;
+ };
+
+ fuelgauge_pin: fuelgauge-int-state {
+ pins = "gpio26";
+ function = "normal";
+ bias-disable;
+ input-enable;
+ power-source = <PM8941_GPIO_S3>;
+ };
+
+ touch_pin: touchscreen-int-state {
+ pins = "gpio30";
+ function = "normal";
+ bias-disable;
+ input-enable;
+ power-source = <PM8941_GPIO_S3>;
+ };
+
+ touch_ldo_pin: touchscreen-ldo-state {
+ pins = "gpio9";
+ function = "normal";
+ output-high;
+ power-source = <PM8941_GPIO_S3>;
+ qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
+ };
+};
+
+&remoteproc_adsp {
+ cx-supply = <&pm8841_s2>;
+ status = "okay";
+};
+
+&remoteproc_mss {
+ cx-supply = <&pm8841_s2>;
+ mss-supply = <&pm8841_s3>;
+ mx-supply = <&pm8841_s1>;
+ pll-supply = <&pm8941_l12>;
+ status = "okay";
+};
+
+&rpm_requests {
+ regulators-0 {
+ compatible = "qcom,rpm-pm8841-regulators";
+
+ pm8841_s1: s1 {
+ regulator-min-microvolt = <675000>;
+ regulator-max-microvolt = <1050000>;
+ };
+
+ pm8841_s2: s2 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1050000>;
+ };
+
+ pm8841_s3: s3 {
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1050000>;
+ };
+
+ pm8841_s4: s4 {
+ regulator-min-microvolt = <815000>;
+ regulator-max-microvolt = <900000>;
+ };
+ };
+
+ regulators-1 {
+ compatible = "qcom,rpm-pm8941-regulators";
+
+ pm8941_s1: s1 {
+ regulator-min-microvolt = <1300000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-always-on;
+ };
+
+ pm8941_s2: s2 {
+ regulator-min-microvolt = <2150000>;
+ regulator-max-microvolt = <2150000>;
+ };
+
+ pm8941_s3: s3 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ pm8941_l1: l1 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ };
+
+ pm8941_l2: l2 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ };
+
+ pm8941_l3: l3 {
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1225000>;
+ };
+
+ pm8941_l4: l4 {
+ regulator-min-microvolt = <1225000>;
+ regulator-max-microvolt = <1225000>;
+ };
+
+ pm8941_l5: l5 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ pm8941_l6: l6 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ pm8941_l7: l7 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ pm8941_l8: l8 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ pm8941_l9: l9 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2950000>;
+ };
+
+ pm8941_l10: l10 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ pm8941_l11: l11 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1350000>;
+ };
+
+ pm8941_l12: l12 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ pm8941_l13: l13 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ pm8941_l14: l14 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ pm8941_l15: l15 {
+ regulator-min-microvolt = <2050000>;
+ regulator-max-microvolt = <2050000>;
+ };
+
+ pm8941_l16: l16 {
+ regulator-min-microvolt = <2700000>;
+ regulator-max-microvolt = <2700000>;
+ };
+
+ pm8941_l17: l17 {
+ regulator-min-microvolt = <2850000>;
+ regulator-max-microvolt = <3000000>;
+ };
+
+ pm8941_l18: l18 {
+ regulator-min-microvolt = <2850000>;
+ regulator-max-microvolt = <2850000>;
+ };
+
+ pm8941_l19: l19 {
+ regulator-min-microvolt = <2900000>;
+ regulator-max-microvolt = <3350000>;
+ };
+
+ pm8941_l20: l20 {
+ regulator-min-microvolt = <2950000>;
+ regulator-max-microvolt = <2950000>;
+
+ regulator-allow-set-load;
+ regulator-system-load = <200000>;
+ };
+
+ pm8941_l21: l21 {
+ regulator-min-microvolt = <2950000>;
+ regulator-max-microvolt = <2950000>;
+
+ regulator-allow-set-load;
+ regulator-system-load = <200000>;
+ };
+
+ pm8941_l22: l22 {
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <3000000>;
+ };
+
+ pm8941_l23: l23 {
+ regulator-min-microvolt = <2400000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ pm8941_l24: l24 {
+ regulator-min-microvolt = <3075000>;
+ regulator-max-microvolt = <3075000>;
+ };
+ };
+};
+
+&sdhc_1 {
+ vmmc-supply = <&pm8941_l20>;
+ vqmmc-supply = <&pm8941_s3>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdhc1_pin_a>;
+
+ status = "okay";
+};
+
+&sdhc_3 {
+ max-frequency = <100000000>;
+
+ vmmc-supply = <&pm8941_l21>;
+ vqmmc-supply = <&pm8941_l21>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdhc3_pin_a>;
+
+ status = "okay";
+};
+
+&tlmm {
+ sdhc1_pin_a: sdhc1-pin-active-state {
+ clk-pins {
+ pins = "sdc1_clk";
+ drive-strength = <4>;
+ bias-disable;
+ };
+
+ cmd-data-pins {
+ pins = "sdc1_cmd", "sdc1_data";
+ drive-strength = <4>;
+ bias-pull-up;
+ };
+ };
+
+ sdhc3_pin_a: sdhc3-pin-active-state {
+ pins = "gpio35", "gpio36", "gpio37", "gpio38", "gpio39", "gpio40";
+ function = "sdc3";
+ drive-strength = <8>;
+ bias-disable;
+ };
+};
+
+&usb {
+ phys = <&usb_hs1_phy>;
+ phy-select = <&tcsr 0xb000 0>;
+
+ hnp-disable;
+ srp-disable;
+ adp-disable;
+
+ status = "okay";
+};
+
+&usb_hs1_phy {
+ v1p8-supply = <&pm8941_l6>;
+ v3p3-supply = <&pm8941_l24>;
+
+ qcom,init-seq = /bits/ 8 <0x1 0x64>;
+
+ status = "okay";
+};
--
2.44.0
^ permalink raw reply related [relevance 62%]
* [PATCH 0/2] Add Samsung Galaxy Note 3 support
@ 2024-03-10 14:13 88% Luca Weiss
2024-03-10 14:13 88% ` [PATCH 1/2] dt-bindings: arm: qcom: Add Samsung Galaxy Note 3 Luca Weiss
` (2 more replies)
0 siblings, 3 replies; 200+ results
From: Luca Weiss @ 2024-03-10 14:13 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Adam Honse
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss
Add the dts for "hlte" which is a phablet from 2013.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Adam Honse (1):
ARM: dts: qcom: msm8974: Add Samsung Galaxy Note 3
Luca Weiss (1):
dt-bindings: arm: qcom: Add Samsung Galaxy Note 3
Documentation/devicetree/bindings/arm/qcom.yaml | 1 +
arch/arm/boot/dts/qcom/Makefile | 1 +
.../boot/dts/qcom/qcom-msm8974-samsung-hlte.dts | 403 +++++++++++++++++++++
3 files changed, 405 insertions(+)
---
base-commit: 90d35da658da8cff0d4ecbb5113f5fac9d00eb72
change-id: 20240310-samsung-hlte-78d1a287b0a8
Best regards,
--
Luca Weiss <luca@z3ntu.xyz>
^ permalink raw reply [relevance 88%]
* Re: [PATCH 3/3] ARM: dts: qcom: Add Sony Xperia Z3 smartphone
2024-03-10 11:41 83% ` [PATCH 3/3] ARM: dts: qcom: Add Sony Xperia Z3 smartphone Luca Weiss
@ 2024-03-10 11:52 88% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-10 11:52 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel
On Sonntag, 10. März 2024 12:41:09 CET Luca Weiss wrote:
> Add the dts for the Xperia Z3 smartphone which is based on Sony's
> shinano platform, so at the moment there's little device-specific dts to
> add on top of the common parts.
>
> Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
> ---
> .../qcom-msm8974pro-sony-xperia-shinano-leo.dts | 44 +++++++++++++++++++
+++
> 1 file changed, 44 insertions(+)
Of course I forgot to add the dtb to the Makefile...
Apparently "make qcom/qcom-msm8974pro-sony-xperia-shinano-leo.dtb" doesn't
care about whether the dtb is in the Makefile so I didn't notice.
Will fix in v2 but I'm going to wait for any comments on this or the other
patches for at least a day or so.
Regards
Luca
>
> diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-
leo.dts b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-leo.dts
> new file mode 100644
> index 000000000000..1ed6e1cc21d5
> --- /dev/null
> +++ b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-leo.dts
> @@ -0,0 +1,44 @@
> +// SPDX-License-Identifier: GPL-2.0
> +#include "qcom-msm8974pro-sony-xperia-shinano-common.dtsi"
> +
> +/ {
> + model = "Sony Xperia Z3";
> + compatible = "sony,xperia-leo", "qcom,msm8974pro", "qcom,msm8974";
> + chassis-type = "handset";
> +
> + gpio-keys {
> + key-camera-snapshot {
> + label = "camera_snapshot";
> + gpios = <&pm8941_gpios 3 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_CAMERA>;
> + debounce-interval = <15>;
> + };
> +
> + key-camera-focus {
> + label = "camera_focus";
> + gpios = <&pm8941_gpios 4 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_CAMERA_FOCUS>;
> + debounce-interval = <15>;
> + };
> + };
> +};
> +
> +&gpio_keys_pin_a {
> + pins = "gpio2", "gpio3", "gpio4", "gpio5";
> +};
> +
> +&smbb {
> + usb-charge-current-limit = <1500000>;
> + qcom,fast-charge-safe-current = <3000000>;
> + qcom,fast-charge-current-limit = <2150000>;
> + qcom,fast-charge-safe-voltage = <4400000>;
> + qcom,fast-charge-high-threshold-voltage = <4350000>;
> + qcom,auto-recharge-threshold-voltage = <4280000>;
> + qcom,minimum-input-voltage = <4200000>;
> +
> + status = "okay";
> +};
> +
> +&synaptics_touchscreen {
> + vio-supply = <&pm8941_s3>;
> +};
>
>
^ permalink raw reply [relevance 88%]
* [PATCH 2/3] dt-bindings: arm: qcom: Add Sony Xperia Z3
2024-03-10 11:41 87% [PATCH 0/3] Split sony-castor into shinano-common and add Sony Xperia Z3 Luca Weiss
2024-03-10 11:41 41% ` [PATCH 1/3] ARM: dts: qcom: msm8974-sony-castor: Split into shinano-common Luca Weiss
@ 2024-03-10 11:41 88% ` Luca Weiss
2024-03-10 11:41 83% ` [PATCH 3/3] ARM: dts: qcom: Add Sony Xperia Z3 smartphone Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-10 11:41 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss
Add the compatible for this Sony smartphone.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Documentation/devicetree/bindings/arm/qcom.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
index 1a5fb889a444..d6a7ee5e1d91 100644
--- a/Documentation/devicetree/bindings/arm/qcom.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom.yaml
@@ -224,6 +224,7 @@ properties:
- oneplus,bacon
- samsung,klte
- sony,xperia-castor
+ - sony,xperia-leo
- const: qcom,msm8974pro
- const: qcom,msm8974
--
2.44.0
^ permalink raw reply related [relevance 88%]
* [PATCH 3/3] ARM: dts: qcom: Add Sony Xperia Z3 smartphone
2024-03-10 11:41 87% [PATCH 0/3] Split sony-castor into shinano-common and add Sony Xperia Z3 Luca Weiss
2024-03-10 11:41 41% ` [PATCH 1/3] ARM: dts: qcom: msm8974-sony-castor: Split into shinano-common Luca Weiss
2024-03-10 11:41 88% ` [PATCH 2/3] dt-bindings: arm: qcom: Add Sony Xperia Z3 Luca Weiss
@ 2024-03-10 11:41 83% ` Luca Weiss
2024-03-10 11:52 88% ` Luca Weiss
2 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-03-10 11:41 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss
Add the dts for the Xperia Z3 smartphone which is based on Sony's
shinano platform, so at the moment there's little device-specific dts to
add on top of the common parts.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
.../qcom-msm8974pro-sony-xperia-shinano-leo.dts | 44 ++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-leo.dts b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-leo.dts
new file mode 100644
index 000000000000..1ed6e1cc21d5
--- /dev/null
+++ b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-leo.dts
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: GPL-2.0
+#include "qcom-msm8974pro-sony-xperia-shinano-common.dtsi"
+
+/ {
+ model = "Sony Xperia Z3";
+ compatible = "sony,xperia-leo", "qcom,msm8974pro", "qcom,msm8974";
+ chassis-type = "handset";
+
+ gpio-keys {
+ key-camera-snapshot {
+ label = "camera_snapshot";
+ gpios = <&pm8941_gpios 3 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_CAMERA>;
+ debounce-interval = <15>;
+ };
+
+ key-camera-focus {
+ label = "camera_focus";
+ gpios = <&pm8941_gpios 4 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_CAMERA_FOCUS>;
+ debounce-interval = <15>;
+ };
+ };
+};
+
+&gpio_keys_pin_a {
+ pins = "gpio2", "gpio3", "gpio4", "gpio5";
+};
+
+&smbb {
+ usb-charge-current-limit = <1500000>;
+ qcom,fast-charge-safe-current = <3000000>;
+ qcom,fast-charge-current-limit = <2150000>;
+ qcom,fast-charge-safe-voltage = <4400000>;
+ qcom,fast-charge-high-threshold-voltage = <4350000>;
+ qcom,auto-recharge-threshold-voltage = <4280000>;
+ qcom,minimum-input-voltage = <4200000>;
+
+ status = "okay";
+};
+
+&synaptics_touchscreen {
+ vio-supply = <&pm8941_s3>;
+};
--
2.44.0
^ permalink raw reply related [relevance 83%]
* [PATCH 0/3] Split sony-castor into shinano-common and add Sony Xperia Z3
@ 2024-03-10 11:41 87% Luca Weiss
2024-03-10 11:41 41% ` [PATCH 1/3] ARM: dts: qcom: msm8974-sony-castor: Split into shinano-common Luca Weiss
` (2 more replies)
0 siblings, 3 replies; 200+ results
From: Luca Weiss @ 2024-03-10 11:41 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss
Prepare for adding sony-leo dts by splitting common parts into a
separate dtsi file.
Then add the dts for Sony Xperia Z3.
Depends on:
https://lore.kernel.org/linux-arm-msm/20240306-castor-changes-v1-0-2286eaf85fff@z3ntu.xyz/T/
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Luca Weiss (3):
ARM: dts: qcom: msm8974-sony-castor: Split into shinano-common
dt-bindings: arm: qcom: Add Sony Xperia Z3
ARM: dts: qcom: Add Sony Xperia Z3 smartphone
Documentation/devicetree/bindings/arm/qcom.yaml | 1 +
.../qcom-msm8974pro-sony-xperia-shinano-castor.dts | 541 +--------------------
...qcom-msm8974pro-sony-xperia-shinano-common.dtsi | 535 ++++++++++++++++++++
.../qcom-msm8974pro-sony-xperia-shinano-leo.dts | 44 ++
4 files changed, 591 insertions(+), 530 deletions(-)
---
base-commit: bee52eeb37d8124a07711657d1650bf3b467e7dd
change-id: 20240310-shinano-common-093fe25fe3a1
Best regards,
--
Luca Weiss <luca@z3ntu.xyz>
^ permalink raw reply [relevance 87%]
* [PATCH 1/3] ARM: dts: qcom: msm8974-sony-castor: Split into shinano-common
2024-03-10 11:41 87% [PATCH 0/3] Split sony-castor into shinano-common and add Sony Xperia Z3 Luca Weiss
@ 2024-03-10 11:41 41% ` Luca Weiss
2024-03-10 11:41 88% ` [PATCH 2/3] dt-bindings: arm: qcom: Add Sony Xperia Z3 Luca Weiss
2024-03-10 11:41 83% ` [PATCH 3/3] ARM: dts: qcom: Add Sony Xperia Z3 smartphone Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-10 11:41 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss
In preparation for adding the Sony Xperia Z3 smartphone, split the
common parts into shinano-common.dtsi.
No functional change intended.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
.../qcom-msm8974pro-sony-xperia-shinano-castor.dts | 853 ++++-----------------
...com-msm8974pro-sony-xperia-shinano-common.dtsi} | 155 +---
2 files changed, 169 insertions(+), 839 deletions(-)
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts
dissimilarity index 74%
index 20f98a9e49ea..727ad5c53e7f 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts
+++ b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts
@@ -1,686 +1,167 @@
-// SPDX-License-Identifier: GPL-2.0
-#include "qcom-msm8974pro.dtsi"
-#include "pm8841.dtsi"
-#include "pm8941.dtsi"
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
-
-/ {
- model = "Sony Xperia Z2 Tablet";
- compatible = "sony,xperia-castor", "qcom,msm8974pro", "qcom,msm8974";
- chassis-type = "tablet";
-
- aliases {
- mmc0 = &sdhc_1;
- mmc1 = &sdhc_2;
- serial0 = &blsp1_uart2;
- serial1 = &blsp2_uart1;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- gpio-keys {
- compatible = "gpio-keys";
-
- pinctrl-0 = <&gpio_keys_pin_a>;
- pinctrl-names = "default";
-
- key-volume-down {
- label = "volume_down";
- gpios = <&pm8941_gpios 2 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_VOLUMEDOWN>;
- debounce-interval = <15>;
- };
-
- key-volume-up {
- label = "volume_up";
- gpios = <&pm8941_gpios 5 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_VOLUMEUP>;
- debounce-interval = <15>;
- };
- };
-
- vreg_bl_vddio: lcd-backlight-vddio {
- compatible = "regulator-fixed";
- regulator-name = "vreg_bl_vddio";
- regulator-min-microvolt = <3150000>;
- regulator-max-microvolt = <3150000>;
-
- gpio = <&tlmm 69 0>;
- enable-active-high;
-
- vin-supply = <&pm8941_s3>;
- startup-delay-us = <70000>;
-
- pinctrl-0 = <&lcd_backlight_en_pin_a>;
- pinctrl-names = "default";
- };
-
- vreg_vsp: lcd-dcdc-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vreg_vsp";
- regulator-min-microvolt = <5600000>;
- regulator-max-microvolt = <5600000>;
-
- gpio = <&pm8941_gpios 20 GPIO_ACTIVE_HIGH>;
- enable-active-high;
-
- pinctrl-0 = <&lcd_dcdc_en_pin_a>;
- pinctrl-names = "default";
- };
-
- vreg_boost: vreg-boost {
- compatible = "regulator-fixed";
-
- regulator-name = "vreg-boost";
- regulator-min-microvolt = <3150000>;
- regulator-max-microvolt = <3150000>;
-
- regulator-always-on;
- regulator-boot-on;
-
- gpio = <&pm8941_gpios 21 GPIO_ACTIVE_HIGH>;
- enable-active-high;
-
- pinctrl-names = "default";
- pinctrl-0 = <&boost_bypass_n_pin>;
- };
-
- vreg_vph_pwr: vreg-vph-pwr {
- compatible = "regulator-fixed";
- regulator-name = "vph-pwr";
-
- regulator-min-microvolt = <3600000>;
- regulator-max-microvolt = <3600000>;
-
- regulator-always-on;
- };
-
- vreg_wlan: wlan-regulator {
- compatible = "regulator-fixed";
-
- regulator-name = "wl-reg";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- gpio = <&pm8941_gpios 18 GPIO_ACTIVE_HIGH>;
- enable-active-high;
-
- pinctrl-0 = <&wlan_regulator_pin>;
- pinctrl-names = "default";
- };
-};
-
-&blsp1_uart2 {
- status = "okay";
-};
-
-&blsp2_i2c2 {
- clock-frequency = <355000>;
-
- status = "okay";
-
- synaptics@2c {
- compatible = "syna,rmi4-i2c";
- reg = <0x2c>;
-
- interrupt-parent = <&tlmm>;
- interrupts = <86 IRQ_TYPE_EDGE_FALLING>;
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- vdd-supply = <&pm8941_l22>;
- vio-supply = <&pm8941_lvs3>;
-
- pinctrl-0 = <&ts_int_pin>;
- pinctrl-names = "default";
-
- syna,startup-delay-ms = <100>;
-
- rmi4-f01@1 {
- reg = <0x1>;
- syna,nosleep-mode = <1>;
- };
-
- rmi4-f11@11 {
- reg = <0x11>;
- syna,sensor-type = <1>;
- touchscreen-inverted-x;
- };
- };
-};
-
-&blsp2_i2c5 {
- clock-frequency = <355000>;
-
- status = "okay";
-
- lp8566_wled: backlight@2c {
- compatible = "ti,lp8556";
- reg = <0x2c>;
- power-supply = <&vreg_bl_vddio>;
-
- bl-name = "backlight";
- dev-ctrl = /bits/ 8 <0x05>;
- init-brt = /bits/ 8 <0x3f>;
-
- rom-a0h {
- rom-addr = /bits/ 8 <0xa0>;
- rom-val = /bits/ 8 <0xff>;
- };
- rom-a1h {
- rom-addr = /bits/ 8 <0xa1>;
- rom-val = /bits/ 8 <0x3f>;
- };
- rom-a2h {
- rom-addr = /bits/ 8 <0xa2>;
- rom-val = /bits/ 8 <0x20>;
- };
- rom-a3h {
- rom-addr = /bits/ 8 <0xa3>;
- rom-val = /bits/ 8 <0x5e>;
- };
- rom-a4h {
- rom-addr = /bits/ 8 <0xa4>;
- rom-val = /bits/ 8 <0x02>;
- };
- rom-a5h {
- rom-addr = /bits/ 8 <0xa5>;
- rom-val = /bits/ 8 <0x04>;
- };
- rom-a6h {
- rom-addr = /bits/ 8 <0xa6>;
- rom-val = /bits/ 8 <0x80>;
- };
- rom-a7h {
- rom-addr = /bits/ 8 <0xa7>;
- rom-val = /bits/ 8 <0xf7>;
- };
- rom-a9h {
- rom-addr = /bits/ 8 <0xa9>;
- rom-val = /bits/ 8 <0x80>;
- };
- rom-aah {
- rom-addr = /bits/ 8 <0xaa>;
- rom-val = /bits/ 8 <0x0f>;
- };
- rom-aeh {
- rom-addr = /bits/ 8 <0xae>;
- rom-val = /bits/ 8 <0x0f>;
- };
- };
-};
-
-&blsp2_uart1 {
- status = "okay";
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- max-speed = <3000000>;
-
- pinctrl-0 = <&bt_host_wake_pin>, <&bt_dev_wake_pin>, <&bt_reg_on_pin>;
- pinctrl-names = "default";
-
- host-wakeup-gpios = <&tlmm 95 GPIO_ACTIVE_HIGH>;
- device-wakeup-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
- shutdown-gpios = <&pm8941_gpios 16 GPIO_ACTIVE_HIGH>;
- };
-};
-
-&pm8941_coincell {
- qcom,rset-ohms = <2100>;
- qcom,vset-millivolts = <3000>;
-
- status = "okay";
-};
-
-&pm8941_gpios {
- gpio_keys_pin_a: gpio-keys-active-state {
- pins = "gpio2", "gpio5";
- function = "normal";
- bias-pull-up;
- power-source = <PM8941_GPIO_S3>;
- };
-
- bt_reg_on_pin: bt-reg-on-state {
- pins = "gpio16";
- function = "normal";
- output-low;
- power-source = <PM8941_GPIO_S3>;
- };
-
- wlan_sleep_clk_pin: wl-sleep-clk-state {
- pins = "gpio17";
- function = "func2";
- output-high;
- power-source = <PM8941_GPIO_S3>;
- };
-
- wlan_regulator_pin: wl-reg-active-state {
- pins = "gpio18";
- function = "normal";
- bias-disable;
- power-source = <PM8941_GPIO_S3>;
- };
-
- lcd_dcdc_en_pin_a: lcd-dcdc-en-active-state {
- pins = "gpio20";
- function = "normal";
- bias-disable;
- power-source = <PM8941_GPIO_S3>;
- input-disable;
- output-low;
- };
-};
-
-&pm8941_lpg {
- qcom,power-source = <1>;
-
- status = "okay";
-
- multi-led {
- color = <LED_COLOR_ID_RGB>;
- function = LED_FUNCTION_STATUS;
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- led@5 {
- reg = <5>;
- color = <LED_COLOR_ID_BLUE>;
- };
-
- led@6 {
- reg = <6>;
- color = <LED_COLOR_ID_GREEN>;
- };
-
- led@7 {
- reg = <7>;
- color = <LED_COLOR_ID_RED>;
- };
- };
-};
-
-&remoteproc_adsp {
- cx-supply = <&pm8841_s2>;
- status = "okay";
-};
-
-&remoteproc_mss {
- cx-supply = <&pm8841_s2>;
- mss-supply = <&pm8841_s3>;
- mx-supply = <&pm8841_s1>;
- pll-supply = <&pm8941_l12>;
- status = "okay";
-};
-
-&rpm_requests {
- regulators-0 {
- compatible = "qcom,rpm-pm8841-regulators";
-
- pm8841_s1: s1 {
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <1050000>;
- };
-
- pm8841_s2: s2 {
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1050000>;
- };
-
- pm8841_s3: s3 {
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1050000>;
- };
-
- pm8841_s4: s4 {
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1050000>;
- };
- };
-
- regulators-1 {
- compatible = "qcom,rpm-pm8941-regulators";
-
- vdd_l1_l3-supply = <&pm8941_s1>;
- vdd_l2_lvs1_2_3-supply = <&pm8941_s3>;
- vdd_l4_l11-supply = <&pm8941_s1>;
- vdd_l5_l7-supply = <&pm8941_s2>;
- vdd_l6_l12_l14_l15-supply = <&pm8941_s2>;
- vdd_l9_l10_l17_l22-supply = <&vreg_boost>;
- vdd_l13_l20_l23_l24-supply = <&vreg_boost>;
- vdd_l21-supply = <&vreg_boost>;
-
- pm8941_s1: s1 {
- regulator-min-microvolt = <1300000>;
- regulator-max-microvolt = <1300000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- pm8941_s2: s2 {
- regulator-min-microvolt = <2150000>;
- regulator-max-microvolt = <2150000>;
- regulator-boot-on;
- };
-
- pm8941_s3: s3 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-system-load = <154000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- pm8941_s4: s4 {
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
- pm8941_l1: l1 {
- regulator-min-microvolt = <1225000>;
- regulator-max-microvolt = <1225000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- pm8941_l2: l2 {
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- };
-
- pm8941_l3: l3 {
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- };
-
- pm8941_l4: l4 {
- regulator-min-microvolt = <1225000>;
- regulator-max-microvolt = <1225000>;
- };
-
- pm8941_l5: l5 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- pm8941_l6: l6 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
- };
-
- pm8941_l7: l7 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
- };
-
- pm8941_l8: l8 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- pm8941_l9: l9 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <2950000>;
- };
-
- pm8941_l11: l11 {
- regulator-min-microvolt = <1300000>;
- regulator-max-microvolt = <1350000>;
- };
-
- pm8941_l12: l12 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- pm8941_l13: l13 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <2950000>;
- regulator-boot-on;
- };
-
- pm8941_l14: l14 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- pm8941_l15: l15 {
- regulator-min-microvolt = <2050000>;
- regulator-max-microvolt = <2050000>;
- };
-
- pm8941_l16: l16 {
- regulator-min-microvolt = <2700000>;
- regulator-max-microvolt = <2700000>;
- };
-
- pm8941_l17: l17 {
- regulator-min-microvolt = <2700000>;
- regulator-max-microvolt = <2700000>;
- };
-
- pm8941_l18: l18 {
- regulator-min-microvolt = <2850000>;
- regulator-max-microvolt = <2850000>;
- };
-
- pm8941_l19: l19 {
- regulator-min-microvolt = <2850000>;
- regulator-max-microvolt = <2850000>;
- };
-
- pm8941_l20: l20 {
- regulator-min-microvolt = <2950000>;
- regulator-max-microvolt = <2950000>;
- regulator-system-load = <500000>;
- regulator-allow-set-load;
- regulator-boot-on;
- };
-
- pm8941_l21: l21 {
- regulator-min-microvolt = <2950000>;
- regulator-max-microvolt = <2950000>;
- regulator-boot-on;
- };
-
- pm8941_l22: l22 {
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- };
-
- pm8941_l23: l23 {
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- };
-
- pm8941_l24: l24 {
- regulator-min-microvolt = <3075000>;
- regulator-max-microvolt = <3075000>;
- regulator-boot-on;
- };
-
- pm8941_lvs3: lvs3 {};
- };
-};
-
-&sdhc_1 {
- vmmc-supply = <&pm8941_l20>;
- vqmmc-supply = <&pm8941_s3>;
-
- pinctrl-0 = <&sdc1_on>;
- pinctrl-1 = <&sdc1_off>;
- pinctrl-names = "default", "sleep";
-
- status = "okay";
-};
-
-&sdhc_2 {
- vmmc-supply = <&pm8941_l21>;
- vqmmc-supply = <&pm8941_l13>;
-
- cd-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>;
-
- pinctrl-0 = <&sdc2_on>;
- pinctrl-1 = <&sdc2_off>;
- pinctrl-names = "default", "sleep";
-
- status = "okay";
-};
-
-&sdhc_3 {
- max-frequency = <100000000>;
- vmmc-supply = <&vreg_wlan>;
- non-removable;
-
- pinctrl-0 = <&sdc3_on>;
- pinctrl-names = "default";
-
- status = "okay";
-
- wifi@1 {
- compatible = "brcm,bcm4339-fmac", "brcm,bcm4329-fmac";
- reg = <1>;
-
- brcm,drive-strength = <10>;
-
- pinctrl-0 = <&wlan_sleep_clk_pin>;
- pinctrl-names = "default";
- };
-};
-
-&smbb {
- qcom,fast-charge-safe-current = <1500000>;
- qcom,fast-charge-current-limit = <1500000>;
- qcom,dc-current-limit = <1800000>;
- usb-charge-current-limit = <1800000>;
- qcom,fast-charge-safe-voltage = <4400000>;
- qcom,fast-charge-high-threshold-voltage = <4350000>;
- qcom,fast-charge-low-threshold-voltage = <3400000>;
- qcom,auto-recharge-threshold-voltage = <4200000>;
- qcom,minimum-input-voltage = <4300000>;
-
- status = "okay";
-};
-
-&tlmm {
- lcd_backlight_en_pin_a: lcd-backlight-vddio-state {
- pins = "gpio69";
- function = "gpio";
- drive-strength = <10>;
- output-low;
- bias-disable;
- };
-
- sdc1_on: sdc1-on-state {
- clk-pins {
- pins = "sdc1_clk";
- drive-strength = <16>;
- bias-disable;
- };
-
- cmd-data-pins {
- pins = "sdc1_cmd", "sdc1_data";
- drive-strength = <10>;
- bias-pull-up;
- };
- };
-
- sdc2_on: sdc2-on-state {
- clk-pins {
- pins = "sdc2_clk";
- drive-strength = <6>;
- bias-disable;
- };
-
- cmd-data-pins {
- pins = "sdc2_cmd", "sdc2_data";
- drive-strength = <6>;
- bias-pull-up;
- };
-
- cd-pins {
- pins = "gpio62";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- };
- };
-
- sdc3_on: sdc3-on-state {
- clk-pins {
- pins = "gpio40";
- function = "sdc3";
- drive-strength = <10>;
- bias-disable;
- };
-
- cmd-pins {
- pins = "gpio39";
- function = "sdc3";
- drive-strength = <10>;
- bias-pull-up;
- };
-
- data-pins {
- pins = "gpio35", "gpio36", "gpio37", "gpio38";
- function = "sdc3";
- drive-strength = <10>;
- bias-pull-up;
- };
- };
-
- ts_int_pin: ts-int-pin-state {
- pins = "gpio86";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- };
-
- bt_host_wake_pin: bt-host-wake-state {
- pins = "gpio95";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- output-low;
- };
-
- bt_dev_wake_pin: bt-dev-wake-state {
- pins = "gpio96";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- };
-};
-
-&usb {
- phys = <&usb_hs1_phy>;
- phy-select = <&tcsr 0xb000 0>;
- extcon = <&smbb>, <&usb_id>;
- vbus-supply = <&chg_otg>;
-
- hnp-disable;
- srp-disable;
- adp-disable;
-
- status = "okay";
-};
-
-&usb_hs1_phy {
- v1p8-supply = <&pm8941_l6>;
- v3p3-supply = <&pm8941_l24>;
-
- extcon = <&smbb>;
- qcom,init-seq = /bits/ 8 <0x1 0x64>;
-
- status = "okay";
-};
+// SPDX-License-Identifier: GPL-2.0
+#include "qcom-msm8974pro-sony-xperia-shinano-common.dtsi"
+
+/ {
+ model = "Sony Xperia Z2 Tablet";
+ compatible = "sony,xperia-castor", "qcom,msm8974pro", "qcom,msm8974";
+ chassis-type = "tablet";
+
+ vreg_bl_vddio: lcd-backlight-vddio {
+ compatible = "regulator-fixed";
+ regulator-name = "vreg_bl_vddio";
+ regulator-min-microvolt = <3150000>;
+ regulator-max-microvolt = <3150000>;
+
+ gpio = <&tlmm 69 0>;
+ enable-active-high;
+
+ vin-supply = <&pm8941_s3>;
+ startup-delay-us = <70000>;
+
+ pinctrl-0 = <&lcd_backlight_en_pin_a>;
+ pinctrl-names = "default";
+ };
+};
+
+&blsp2_i2c5 {
+ clock-frequency = <355000>;
+
+ status = "okay";
+
+ lp8566_wled: backlight@2c {
+ compatible = "ti,lp8556";
+ reg = <0x2c>;
+ power-supply = <&vreg_bl_vddio>;
+
+ bl-name = "backlight";
+ dev-ctrl = /bits/ 8 <0x05>;
+ init-brt = /bits/ 8 <0x3f>;
+
+ rom-a0h {
+ rom-addr = /bits/ 8 <0xa0>;
+ rom-val = /bits/ 8 <0xff>;
+ };
+ rom-a1h {
+ rom-addr = /bits/ 8 <0xa1>;
+ rom-val = /bits/ 8 <0x3f>;
+ };
+ rom-a2h {
+ rom-addr = /bits/ 8 <0xa2>;
+ rom-val = /bits/ 8 <0x20>;
+ };
+ rom-a3h {
+ rom-addr = /bits/ 8 <0xa3>;
+ rom-val = /bits/ 8 <0x5e>;
+ };
+ rom-a4h {
+ rom-addr = /bits/ 8 <0xa4>;
+ rom-val = /bits/ 8 <0x02>;
+ };
+ rom-a5h {
+ rom-addr = /bits/ 8 <0xa5>;
+ rom-val = /bits/ 8 <0x04>;
+ };
+ rom-a6h {
+ rom-addr = /bits/ 8 <0xa6>;
+ rom-val = /bits/ 8 <0x80>;
+ };
+ rom-a7h {
+ rom-addr = /bits/ 8 <0xa7>;
+ rom-val = /bits/ 8 <0xf7>;
+ };
+ rom-a9h {
+ rom-addr = /bits/ 8 <0xa9>;
+ rom-val = /bits/ 8 <0x80>;
+ };
+ rom-aah {
+ rom-addr = /bits/ 8 <0xaa>;
+ rom-val = /bits/ 8 <0x0f>;
+ };
+ rom-aeh {
+ rom-addr = /bits/ 8 <0xae>;
+ rom-val = /bits/ 8 <0x0f>;
+ };
+ };
+};
+
+&blsp2_uart1 {
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ max-speed = <3000000>;
+
+ pinctrl-0 = <&bt_host_wake_pin>, <&bt_dev_wake_pin>, <&bt_reg_on_pin>;
+ pinctrl-names = "default";
+
+ host-wakeup-gpios = <&tlmm 95 GPIO_ACTIVE_HIGH>;
+ device-wakeup-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
+ shutdown-gpios = <&pm8941_gpios 16 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&pm8941_gpios {
+ bt_reg_on_pin: bt-reg-on-state {
+ pins = "gpio16";
+ function = "normal";
+ output-low;
+ power-source = <PM8941_GPIO_S3>;
+ };
+};
+
+&rpm_requests {
+ regulators-1 {
+ pm8941_l11: l11 {
+ regulator-min-microvolt = <1300000>;
+ regulator-max-microvolt = <1350000>;
+ };
+
+ pm8941_l19: l19 {
+ regulator-min-microvolt = <2850000>;
+ regulator-max-microvolt = <2850000>;
+ };
+ };
+};
+
+&smbb {
+ qcom,fast-charge-safe-current = <1500000>;
+ qcom,fast-charge-current-limit = <1500000>;
+ qcom,dc-current-limit = <1800000>;
+ usb-charge-current-limit = <1800000>;
+ qcom,fast-charge-safe-voltage = <4400000>;
+ qcom,fast-charge-high-threshold-voltage = <4350000>;
+ qcom,fast-charge-low-threshold-voltage = <3400000>;
+ qcom,auto-recharge-threshold-voltage = <4200000>;
+ qcom,minimum-input-voltage = <4300000>;
+
+ status = "okay";
+};
+
+&synaptics_touchscreen {
+ vio-supply = <&pm8941_lvs3>;
+};
+
+&tlmm {
+ bt_dev_wake_pin: bt-dev-wake-state {
+ pins = "gpio96";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ bt_host_wake_pin: bt-host-wake-state {
+ pins = "gpio95";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ output-low;
+ };
+
+ lcd_backlight_en_pin_a: lcd-backlight-vddio-state {
+ pins = "gpio69";
+ function = "gpio";
+ drive-strength = <10>;
+ output-low;
+ bias-disable;
+ };
+};
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-common.dtsi
similarity index 75%
copy from arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts
copy to arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-common.dtsi
index 20f98a9e49ea..3a0c0035de09 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts
+++ b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-common.dtsi
@@ -7,10 +7,6 @@
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
/ {
- model = "Sony Xperia Z2 Tablet";
- compatible = "sony,xperia-castor", "qcom,msm8974pro", "qcom,msm8974";
- chassis-type = "tablet";
-
aliases {
mmc0 = &sdhc_1;
mmc1 = &sdhc_2;
@@ -43,22 +39,6 @@ key-volume-up {
};
};
- vreg_bl_vddio: lcd-backlight-vddio {
- compatible = "regulator-fixed";
- regulator-name = "vreg_bl_vddio";
- regulator-min-microvolt = <3150000>;
- regulator-max-microvolt = <3150000>;
-
- gpio = <&tlmm 69 0>;
- enable-active-high;
-
- vin-supply = <&pm8941_s3>;
- startup-delay-us = <70000>;
-
- pinctrl-0 = <&lcd_backlight_en_pin_a>;
- pinctrl-names = "default";
- };
-
vreg_vsp: lcd-dcdc-regulator {
compatible = "regulator-fixed";
regulator-name = "vreg_vsp";
@@ -123,7 +103,7 @@ &blsp2_i2c2 {
status = "okay";
- synaptics@2c {
+ synaptics_touchscreen: synaptics@2c {
compatible = "syna,rmi4-i2c";
reg = <0x2c>;
@@ -134,7 +114,7 @@ synaptics@2c {
#size-cells = <0>;
vdd-supply = <&pm8941_l22>;
- vio-supply = <&pm8941_lvs3>;
+ /* vio-supply is set in dts */
pinctrl-0 = <&ts_int_pin>;
pinctrl-names = "default";
@@ -154,83 +134,6 @@ rmi4-f11@11 {
};
};
-&blsp2_i2c5 {
- clock-frequency = <355000>;
-
- status = "okay";
-
- lp8566_wled: backlight@2c {
- compatible = "ti,lp8556";
- reg = <0x2c>;
- power-supply = <&vreg_bl_vddio>;
-
- bl-name = "backlight";
- dev-ctrl = /bits/ 8 <0x05>;
- init-brt = /bits/ 8 <0x3f>;
-
- rom-a0h {
- rom-addr = /bits/ 8 <0xa0>;
- rom-val = /bits/ 8 <0xff>;
- };
- rom-a1h {
- rom-addr = /bits/ 8 <0xa1>;
- rom-val = /bits/ 8 <0x3f>;
- };
- rom-a2h {
- rom-addr = /bits/ 8 <0xa2>;
- rom-val = /bits/ 8 <0x20>;
- };
- rom-a3h {
- rom-addr = /bits/ 8 <0xa3>;
- rom-val = /bits/ 8 <0x5e>;
- };
- rom-a4h {
- rom-addr = /bits/ 8 <0xa4>;
- rom-val = /bits/ 8 <0x02>;
- };
- rom-a5h {
- rom-addr = /bits/ 8 <0xa5>;
- rom-val = /bits/ 8 <0x04>;
- };
- rom-a6h {
- rom-addr = /bits/ 8 <0xa6>;
- rom-val = /bits/ 8 <0x80>;
- };
- rom-a7h {
- rom-addr = /bits/ 8 <0xa7>;
- rom-val = /bits/ 8 <0xf7>;
- };
- rom-a9h {
- rom-addr = /bits/ 8 <0xa9>;
- rom-val = /bits/ 8 <0x80>;
- };
- rom-aah {
- rom-addr = /bits/ 8 <0xaa>;
- rom-val = /bits/ 8 <0x0f>;
- };
- rom-aeh {
- rom-addr = /bits/ 8 <0xae>;
- rom-val = /bits/ 8 <0x0f>;
- };
- };
-};
-
-&blsp2_uart1 {
- status = "okay";
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- max-speed = <3000000>;
-
- pinctrl-0 = <&bt_host_wake_pin>, <&bt_dev_wake_pin>, <&bt_reg_on_pin>;
- pinctrl-names = "default";
-
- host-wakeup-gpios = <&tlmm 95 GPIO_ACTIVE_HIGH>;
- device-wakeup-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
- shutdown-gpios = <&pm8941_gpios 16 GPIO_ACTIVE_HIGH>;
- };
-};
-
&pm8941_coincell {
qcom,rset-ohms = <2100>;
qcom,vset-millivolts = <3000>;
@@ -246,13 +149,6 @@ gpio_keys_pin_a: gpio-keys-active-state {
power-source = <PM8941_GPIO_S3>;
};
- bt_reg_on_pin: bt-reg-on-state {
- pins = "gpio16";
- function = "normal";
- output-low;
- power-source = <PM8941_GPIO_S3>;
- };
-
wlan_sleep_clk_pin: wl-sleep-clk-state {
pins = "gpio17";
function = "func2";
@@ -431,11 +327,6 @@ pm8941_l9: l9 {
regulator-max-microvolt = <2950000>;
};
- pm8941_l11: l11 {
- regulator-min-microvolt = <1300000>;
- regulator-max-microvolt = <1350000>;
- };
-
pm8941_l12: l12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
@@ -474,11 +365,6 @@ pm8941_l18: l18 {
regulator-max-microvolt = <2850000>;
};
- pm8941_l19: l19 {
- regulator-min-microvolt = <2850000>;
- regulator-max-microvolt = <2850000>;
- };
-
pm8941_l20: l20 {
regulator-min-microvolt = <2950000>;
regulator-max-microvolt = <2950000>;
@@ -558,29 +444,7 @@ wifi@1 {
};
};
-&smbb {
- qcom,fast-charge-safe-current = <1500000>;
- qcom,fast-charge-current-limit = <1500000>;
- qcom,dc-current-limit = <1800000>;
- usb-charge-current-limit = <1800000>;
- qcom,fast-charge-safe-voltage = <4400000>;
- qcom,fast-charge-high-threshold-voltage = <4350000>;
- qcom,fast-charge-low-threshold-voltage = <3400000>;
- qcom,auto-recharge-threshold-voltage = <4200000>;
- qcom,minimum-input-voltage = <4300000>;
-
- status = "okay";
-};
-
&tlmm {
- lcd_backlight_en_pin_a: lcd-backlight-vddio-state {
- pins = "gpio69";
- function = "gpio";
- drive-strength = <10>;
- output-low;
- bias-disable;
- };
-
sdc1_on: sdc1-on-state {
clk-pins {
pins = "sdc1_clk";
@@ -645,21 +509,6 @@ ts_int_pin: ts-int-pin-state {
drive-strength = <2>;
bias-disable;
};
-
- bt_host_wake_pin: bt-host-wake-state {
- pins = "gpio95";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- output-low;
- };
-
- bt_dev_wake_pin: bt-dev-wake-state {
- pins = "gpio96";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- };
};
&usb {
--
2.44.0
^ permalink raw reply related [relevance 41%]
* Re: [PATCH] drm/bridge: Select DRM_KMS_HELPER for DRM_PANEL_BRIDGE
@ 2024-03-08 9:29 99% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-08 9:29 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: neil.armstrong, Andrzej Hajda, Robert Foss, Laurent Pinchart,
Jonas Karlman, Jernej Skrabec, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, David Airlie, Daniel Vetter,
~postmarketos/upstreaming, phone-devel, dri-devel, linux-kernel
On Sun Mar 3, 2024 at 9:37 PM CET, Dmitry Baryshkov wrote:
> On Thu, 29 Feb 2024 at 11:27, Luca Weiss <luca.weiss@fairphone.com> wrote:
> >
> > On Wed Jan 17, 2024 at 9:59 AM CET, Luca Weiss wrote:
> > > On Mon Jan 15, 2024 at 9:43 AM CET, Neil Armstrong wrote:
> > > > Hi Luca,
> > > >
> > > > On 11/01/2024 13:38, Luca Weiss wrote:
> > > > > Since the kconfig symbol of DRM_PANEL_BRIDGE is only adding
> > > > > bridge/panel.o to drm_kms_helper object, we need to select
> > > > > DRM_KMS_HELPER to make sure the file is actually getting built.
> > > > >
> > > > > Otherwise with certain defconfigs e.g. devm_drm_of_get_bridge will not
> > > > > be properly available:
> > > > >
> > > > > aarch64-linux-gnu-ld: drivers/phy/qualcomm/phy-qcom-qmp-combo.o: in function `qmp_combo_bridge_attach':
> > > > > drivers/phy/qualcomm/phy-qcom-qmp-combo.c:3204:(.text+0x8f4): undefined reference to `devm_drm_of_get_bridge'
> > > > >
> > > > > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
> > > > > ---
> > > > > I can see "depends on DRM_KMS_HELPER" was removed with commit
> > > > > 3c3384050d68 ("drm: Don't make DRM_PANEL_BRIDGE dependent on DRM_KMS_HELPERS")
>
> Could you please make sure that the usecase described in the mentioned
> commit message doesn't get broken by your change?
Hi Neil,
The problem fixed in that linked patch (3c3384050d68) is about fixing
undefined reference errors with specific .config setups - similar to
this patch.
Since we're only adding a 'select' and not removing anything I don't see
how it could cause new errors like that, and it does fix the one I'm
describing.
And also I checked again and I don't see any circular dependencies
(something that was also mentioned in the linked patch), so apart from
what I mentioned with that I'm not too familiar when 'select' should be
used and when 'depend' should be used, it's good from my perspective.
Regards
Luca
>
> > > > >
> > > > > I'm not too familiar with Kconfig but it feels more correct if
> > > > > PHY_QCOM_QMP_COMBO selects DRM_PANEL_BRIDGE that that's enough; and it
> > > > > doesn't also has to explicitly select DRM_KMS_HELPER because of how the
> > > > > objects are built in the Makefile.
> > > > >
> > > > > Alternatively solution to this patch could be adjusting this line in
> > > > > include/drm/drm_bridge.h:
> > > > >
> > > > > -#if defined(CONFIG_OF) && defined(CONFIG_DRM_PANEL_BRIDGE)
> > > > > +#if defined(CONFIG_OF) && defined(CONFIG_DRM_PANEL_BRIDGE) && defined(CONFIG_DRM_KMS_HELPER)
> > > > > struct drm_bridge *devm_drm_of_get_bridge(struct device *dev, struct device_node *node,
> > > > > u32 port, u32 endpoint);
> > > > >
> > > > > .. and then selecting DRM_KMS_HELPER for PHY_QCOM_QMP_COMBO.
> > > > >
> > > > > But I think the solution in this patch is better. Let me know what you
> > > > > think.
> > > >
> > > > I think this is no more the case after on linux-next:
> > > > 35921910bbd0 phy: qcom: qmp-combo: switch to DRM_AUX_BRIDGE
> > > >
> > > > But could you still check ?
> > >
> > > On next-20240117 the error happens in the aux-bridge file instead then.
> > >
> > > aarch64-linux-gnu-ld: drivers/gpu/drm/bridge/aux-bridge.o: in function `drm_aux_bridge_probe':
> > > drivers/gpu/drm/bridge/aux-bridge.c:115:(.text+0xe0): undefined reference to `devm_drm_of_get_bridge'
> > >
> > > I'm attaching the defconfig with which I can reproduce this but it's
> > > really just DRM_KMS_HELPER=n and PHY_QCOM_QMP_COMBO=y I believe.
> >
> > Hi Neil,
> >
> > Ping on this patch
> >
> > Regards
> > Luca
> >
> > >
> > > Regards
> > > Luca
> > >
> > >
> > > >
> > > > Neil
> > > >
> > > > > ---
> > > > > drivers/gpu/drm/bridge/Kconfig | 1 +
> > > > > 1 file changed, 1 insertion(+)
> > > > >
> > > > > diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
> > > > > index ac9ec5073619..ae782b427829 100644
> > > > > --- a/drivers/gpu/drm/bridge/Kconfig
> > > > > +++ b/drivers/gpu/drm/bridge/Kconfig
> > > > > @@ -8,6 +8,7 @@ config DRM_BRIDGE
> > > > > config DRM_PANEL_BRIDGE
> > > > > def_bool y
> > > > > depends on DRM_BRIDGE
> > > > > + select DRM_KMS_HELPER
> > > > > select DRM_PANEL
> > > > > help
> > > > > DRM bridge wrapper of DRM panels
> > > > >
> > > > > ---
> > > > > base-commit: b9c3a1fa6fb324e691a03cf124b79f4842e65d76
> > > > > change-id: 20240111-drm-panel-bridge-fixup-5c2977fb969f
> > > > >
> > > > > Best regards,
> >
^ permalink raw reply [relevance 99%]
* [PATCH 4/5] ARM: dts: qcom: msm8974pro-castor: Add debounce-interval for keys
2024-03-05 23:18 88% [PATCH 0/5] Some devicetree cleanup for MSM8974 Sony Xperia Z2 Tablet Luca Weiss
` (2 preceding siblings ...)
2024-03-05 23:18 86% ` [PATCH 3/5] ARM: dts: qcom: msm8974pro-castor: Remove camera button definitions Luca Weiss
@ 2024-03-05 23:18 88% ` Luca Weiss
2024-03-05 23:18 88% ` [PATCH 5/5] ARM: dts: qcom: msm8974pro-castor: Rename wifi node name Luca Weiss
4 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-05 23:18 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Andy Gross
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss
Set the debounce-interval for the GPIO keys.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts
index 97b55bda9189..c9f74bf2f8bd 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts
+++ b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts
@@ -32,12 +32,14 @@ key-volume-down {
label = "volume_down";
gpios = <&pm8941_gpios 2 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEDOWN>;
+ debounce-interval = <15>;
};
key-volume-up {
label = "volume_up";
gpios = <&pm8941_gpios 5 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
+ debounce-interval = <15>;
};
};
--
2.44.0
^ permalink raw reply related [relevance 88%]
* [PATCH 2/5] ARM: dts: qcom: msm8974pro-castor: Add mmc aliases
2024-03-05 23:18 88% [PATCH 0/5] Some devicetree cleanup for MSM8974 Sony Xperia Z2 Tablet Luca Weiss
2024-03-05 23:18 70% ` [PATCH 1/5] ARM: dts: qcom: msm8974pro-castor: Clean up formatting Luca Weiss
@ 2024-03-05 23:18 88% ` Luca Weiss
2024-03-05 23:18 86% ` [PATCH 3/5] ARM: dts: qcom: msm8974pro-castor: Remove camera button definitions Luca Weiss
` (2 subsequent siblings)
4 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-05 23:18 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Andy Gross
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss
Add the mmc0 & mmc1 aliases to make sure internal storage always becomes
/dev/mmcblk0 and SD card becomes /dev/mmcblk1
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts
index 2db2ddf00580..da554f72528a 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts
+++ b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts
@@ -12,6 +12,8 @@ / {
chassis-type = "tablet";
aliases {
+ mmc0 = &sdhc_1;
+ mmc1 = &sdhc_2;
serial0 = &blsp1_uart2;
serial1 = &blsp2_uart1;
};
--
2.44.0
^ permalink raw reply related [relevance 88%]
* [PATCH 0/5] Some devicetree cleanup for MSM8974 Sony Xperia Z2 Tablet
@ 2024-03-05 23:18 88% Luca Weiss
2024-03-05 23:18 70% ` [PATCH 1/5] ARM: dts: qcom: msm8974pro-castor: Clean up formatting Luca Weiss
` (4 more replies)
0 siblings, 5 replies; 200+ results
From: Luca Weiss @ 2024-03-05 23:18 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Andy Gross
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss
The sony-castor dts has been around for a while, clean up some things to
prepare for further changes including the introduction of the
shinano-based Sony Xperia Z3.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Luca Weiss (5):
ARM: dts: qcom: msm8974pro-castor: Clean up formatting
ARM: dts: qcom: msm8974pro-castor: Add mmc aliases
ARM: dts: qcom: msm8974pro-castor: Remove camera button definitions
ARM: dts: qcom: msm8974pro-castor: Add debounce-interval for keys
ARM: dts: qcom: msm8974pro-castor: Rename wifi node name
.../qcom-msm8974pro-sony-xperia-shinano-castor.dts | 83 +++++++++-------------
1 file changed, 32 insertions(+), 51 deletions(-)
---
base-commit: 2e397253aae928c6d318beb18c05bc2236f69a8a
change-id: 20240305-castor-changes-bc6785ba8458
Best regards,
--
Luca Weiss <luca@z3ntu.xyz>
^ permalink raw reply [relevance 88%]
* [PATCH 3/5] ARM: dts: qcom: msm8974pro-castor: Remove camera button definitions
2024-03-05 23:18 88% [PATCH 0/5] Some devicetree cleanup for MSM8974 Sony Xperia Z2 Tablet Luca Weiss
2024-03-05 23:18 70% ` [PATCH 1/5] ARM: dts: qcom: msm8974pro-castor: Clean up formatting Luca Weiss
2024-03-05 23:18 88% ` [PATCH 2/5] ARM: dts: qcom: msm8974pro-castor: Add mmc aliases Luca Weiss
@ 2024-03-05 23:18 86% ` Luca Weiss
2024-03-05 23:18 88% ` [PATCH 4/5] ARM: dts: qcom: msm8974pro-castor: Add debounce-interval for keys Luca Weiss
2024-03-05 23:18 88% ` [PATCH 5/5] ARM: dts: qcom: msm8974pro-castor: Rename wifi node name Luca Weiss
4 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-05 23:18 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Andy Gross
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss
From what I can tell, the camera buttons are not part of Z2 Tablet
hardware even though other devices based on 'shinano' do have them.
Fixes: ab80661883de ("ARM: dts: qcom: msm8974: Add Sony Xperia Z2 Tablet")
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
.../dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts | 12 ------------
1 file changed, 12 deletions(-)
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts
index da554f72528a..97b55bda9189 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts
+++ b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts
@@ -34,18 +34,6 @@ key-volume-down {
linux,code = <KEY_VOLUMEDOWN>;
};
- key-camera-snapshot {
- label = "camera_snapshot";
- gpios = <&pm8941_gpios 3 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_CAMERA>;
- };
-
- key-camera-focus {
- label = "camera_focus";
- gpios = <&pm8941_gpios 4 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_CAMERA_FOCUS>;
- };
-
key-volume-up {
label = "volume_up";
gpios = <&pm8941_gpios 5 GPIO_ACTIVE_LOW>;
--
2.44.0
^ permalink raw reply related [relevance 86%]
* [PATCH 1/5] ARM: dts: qcom: msm8974pro-castor: Clean up formatting
2024-03-05 23:18 88% [PATCH 0/5] Some devicetree cleanup for MSM8974 Sony Xperia Z2 Tablet Luca Weiss
@ 2024-03-05 23:18 70% ` Luca Weiss
2024-03-05 23:18 88% ` [PATCH 2/5] ARM: dts: qcom: msm8974pro-castor: Add mmc aliases Luca Weiss
` (3 subsequent siblings)
4 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-05 23:18 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Andy Gross
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss
Clean up some easy things do prepare the dts for further changes.
* Move pinctrl-names below pinctrl-*
* Move status as last property
* Remove default linux,input-type value
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
.../qcom-msm8974pro-sony-xperia-shinano-castor.dts | 65 +++++++++-------------
1 file changed, 27 insertions(+), 38 deletions(-)
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts
index ee94741a26ed..2db2ddf00580 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts
+++ b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts
@@ -23,34 +23,30 @@ chosen {
gpio-keys {
compatible = "gpio-keys";
- pinctrl-names = "default";
pinctrl-0 = <&gpio_keys_pin_a>;
+ pinctrl-names = "default";
key-volume-down {
label = "volume_down";
gpios = <&pm8941_gpios 2 GPIO_ACTIVE_LOW>;
- linux,input-type = <1>;
linux,code = <KEY_VOLUMEDOWN>;
};
key-camera-snapshot {
label = "camera_snapshot";
gpios = <&pm8941_gpios 3 GPIO_ACTIVE_LOW>;
- linux,input-type = <1>;
linux,code = <KEY_CAMERA>;
};
key-camera-focus {
label = "camera_focus";
gpios = <&pm8941_gpios 4 GPIO_ACTIVE_LOW>;
- linux,input-type = <1>;
linux,code = <KEY_CAMERA_FOCUS>;
};
key-volume-up {
label = "volume_up";
gpios = <&pm8941_gpios 5 GPIO_ACTIVE_LOW>;
- linux,input-type = <1>;
linux,code = <KEY_VOLUMEUP>;
};
};
@@ -67,8 +63,8 @@ vreg_bl_vddio: lcd-backlight-vddio {
vin-supply = <&pm8941_s3>;
startup-delay-us = <70000>;
- pinctrl-names = "default";
pinctrl-0 = <&lcd_backlight_en_pin_a>;
+ pinctrl-names = "default";
};
vreg_vsp: lcd-dcdc-regulator {
@@ -80,8 +76,8 @@ vreg_vsp: lcd-dcdc-regulator {
gpio = <&pm8941_gpios 20 GPIO_ACTIVE_HIGH>;
enable-active-high;
- pinctrl-names = "default";
pinctrl-0 = <&lcd_dcdc_en_pin_a>;
+ pinctrl-names = "default";
};
vreg_boost: vreg-boost {
@@ -121,8 +117,8 @@ vreg_wlan: wlan-regulator {
gpio = <&pm8941_gpios 18 GPIO_ACTIVE_HIGH>;
enable-active-high;
- pinctrl-names = "default";
pinctrl-0 = <&wlan_regulator_pin>;
+ pinctrl-names = "default";
};
};
@@ -131,9 +127,10 @@ &blsp1_uart2 {
};
&blsp2_i2c2 {
- status = "okay";
clock-frequency = <355000>;
+ status = "okay";
+
synaptics@2c {
compatible = "syna,rmi4-i2c";
reg = <0x2c>;
@@ -147,8 +144,8 @@ synaptics@2c {
vdd-supply = <&pm8941_l22>;
vio-supply = <&pm8941_lvs3>;
- pinctrl-names = "default";
pinctrl-0 = <&ts_int_pin>;
+ pinctrl-names = "default";
syna,startup-delay-ms = <100>;
@@ -166,9 +163,10 @@ rmi4-f11@11 {
};
&blsp2_i2c5 {
- status = "okay";
clock-frequency = <355000>;
+ status = "okay";
+
lp8566_wled: backlight@2c {
compatible = "ti,lp8556";
reg = <0x2c>;
@@ -232,8 +230,8 @@ bluetooth {
compatible = "brcm,bcm43438-bt";
max-speed = <3000000>;
- pinctrl-names = "default";
pinctrl-0 = <&bt_host_wake_pin>, <&bt_dev_wake_pin>, <&bt_reg_on_pin>;
+ pinctrl-names = "default";
host-wakeup-gpios = <&tlmm 95 GPIO_ACTIVE_HIGH>;
device-wakeup-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
@@ -242,17 +240,16 @@ bluetooth {
};
&pm8941_coincell {
- status = "okay";
-
qcom,rset-ohms = <2100>;
qcom,vset-millivolts = <3000>;
+
+ status = "okay";
};
&pm8941_gpios {
gpio_keys_pin_a: gpio-keys-active-state {
pins = "gpio2", "gpio5";
function = "normal";
-
bias-pull-up;
power-source = <PM8941_GPIO_S3>;
};
@@ -260,7 +257,6 @@ gpio_keys_pin_a: gpio-keys-active-state {
bt_reg_on_pin: bt-reg-on-state {
pins = "gpio16";
function = "normal";
-
output-low;
power-source = <PM8941_GPIO_S3>;
};
@@ -268,7 +264,6 @@ bt_reg_on_pin: bt-reg-on-state {
wlan_sleep_clk_pin: wl-sleep-clk-state {
pins = "gpio17";
function = "func2";
-
output-high;
power-source = <PM8941_GPIO_S3>;
};
@@ -276,7 +271,6 @@ wlan_sleep_clk_pin: wl-sleep-clk-state {
wlan_regulator_pin: wl-reg-active-state {
pins = "gpio18";
function = "normal";
-
bias-disable;
power-source = <PM8941_GPIO_S3>;
};
@@ -284,20 +278,18 @@ wlan_regulator_pin: wl-reg-active-state {
lcd_dcdc_en_pin_a: lcd-dcdc-en-active-state {
pins = "gpio20";
function = "normal";
-
bias-disable;
power-source = <PM8941_GPIO_S3>;
input-disable;
output-low;
};
-
};
&pm8941_lpg {
- status = "okay";
-
qcom,power-source = <1>;
+ status = "okay";
+
multi-led {
color = <LED_COLOR_ID_RGB>;
function = LED_FUNCTION_STATUS;
@@ -530,41 +522,38 @@ pm8941_l24: l24 {
};
&sdhc_1 {
- status = "okay";
-
vmmc-supply = <&pm8941_l20>;
vqmmc-supply = <&pm8941_s3>;
- pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc1_on>;
pinctrl-1 = <&sdc1_off>;
+ pinctrl-names = "default", "sleep";
+
+ status = "okay";
};
&sdhc_2 {
- status = "okay";
-
vmmc-supply = <&pm8941_l21>;
vqmmc-supply = <&pm8941_l13>;
cd-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_on>;
pinctrl-1 = <&sdc2_off>;
+ pinctrl-names = "default", "sleep";
+
+ status = "okay";
};
&sdhc_3 {
- status = "okay";
-
max-frequency = <100000000>;
vmmc-supply = <&vreg_wlan>;
non-removable;
- pinctrl-names = "default";
pinctrl-0 = <&sdc3_on>;
+ pinctrl-names = "default";
- #address-cells = <1>;
- #size-cells = <0>;
+ status = "okay";
bcrmf@1 {
compatible = "brcm,bcm4339-fmac", "brcm,bcm4329-fmac";
@@ -572,8 +561,8 @@ bcrmf@1 {
brcm,drive-strength = <10>;
- pinctrl-names = "default";
pinctrl-0 = <&wlan_sleep_clk_pin>;
+ pinctrl-names = "default";
};
};
@@ -682,8 +671,6 @@ bt_dev_wake_pin: bt-dev-wake-state {
};
&usb {
- status = "okay";
-
phys = <&usb_hs1_phy>;
phy-select = <&tcsr 0xb000 0>;
extcon = <&smbb>, <&usb_id>;
@@ -692,14 +679,16 @@ &usb {
hnp-disable;
srp-disable;
adp-disable;
+
+ status = "okay";
};
&usb_hs1_phy {
- status = "okay";
-
v1p8-supply = <&pm8941_l6>;
v3p3-supply = <&pm8941_l24>;
extcon = <&smbb>;
qcom,init-seq = /bits/ 8 <0x1 0x64>;
+
+ status = "okay";
};
--
2.44.0
^ permalink raw reply related [relevance 70%]
* [PATCH 5/5] ARM: dts: qcom: msm8974pro-castor: Rename wifi node name
2024-03-05 23:18 88% [PATCH 0/5] Some devicetree cleanup for MSM8974 Sony Xperia Z2 Tablet Luca Weiss
` (3 preceding siblings ...)
2024-03-05 23:18 88% ` [PATCH 4/5] ARM: dts: qcom: msm8974pro-castor: Add debounce-interval for keys Luca Weiss
@ 2024-03-05 23:18 88% ` Luca Weiss
4 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-03-05 23:18 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Andy Gross
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss
Give the wifi node a generic node name 'wifi'.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts
index c9f74bf2f8bd..20f98a9e49ea 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts
+++ b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts
@@ -547,7 +547,7 @@ &sdhc_3 {
status = "okay";
- bcrmf@1 {
+ wifi@1 {
compatible = "brcm,bcm4339-fmac", "brcm,bcm4329-fmac";
reg = <1>;
--
2.44.0
^ permalink raw reply related [relevance 88%]
* Re: [PATCH] drm/bridge: Select DRM_KMS_HELPER for DRM_PANEL_BRIDGE
2024-01-17 8:59 13% ` Luca Weiss
@ 2024-02-29 9:27 99% ` Luca Weiss
0 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-02-29 9:27 UTC (permalink / raw)
To: Luca Weiss, neil.armstrong, Andrzej Hajda, Robert Foss,
Laurent Pinchart, Jonas Karlman, Jernej Skrabec,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
David Airlie, Daniel Vetter
Cc: ~postmarketos/upstreaming, phone-devel, dri-devel, linux-kernel
On Wed Jan 17, 2024 at 9:59 AM CET, Luca Weiss wrote:
> On Mon Jan 15, 2024 at 9:43 AM CET, Neil Armstrong wrote:
> > Hi Luca,
> >
> > On 11/01/2024 13:38, Luca Weiss wrote:
> > > Since the kconfig symbol of DRM_PANEL_BRIDGE is only adding
> > > bridge/panel.o to drm_kms_helper object, we need to select
> > > DRM_KMS_HELPER to make sure the file is actually getting built.
> > >
> > > Otherwise with certain defconfigs e.g. devm_drm_of_get_bridge will not
> > > be properly available:
> > >
> > > aarch64-linux-gnu-ld: drivers/phy/qualcomm/phy-qcom-qmp-combo.o: in function `qmp_combo_bridge_attach':
> > > drivers/phy/qualcomm/phy-qcom-qmp-combo.c:3204:(.text+0x8f4): undefined reference to `devm_drm_of_get_bridge'
> > >
> > > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
> > > ---
> > > I can see "depends on DRM_KMS_HELPER" was removed with commit
> > > 3c3384050d68 ("drm: Don't make DRM_PANEL_BRIDGE dependent on DRM_KMS_HELPERS")
> > >
> > > I'm not too familiar with Kconfig but it feels more correct if
> > > PHY_QCOM_QMP_COMBO selects DRM_PANEL_BRIDGE that that's enough; and it
> > > doesn't also has to explicitly select DRM_KMS_HELPER because of how the
> > > objects are built in the Makefile.
> > >
> > > Alternatively solution to this patch could be adjusting this line in
> > > include/drm/drm_bridge.h:
> > >
> > > -#if defined(CONFIG_OF) && defined(CONFIG_DRM_PANEL_BRIDGE)
> > > +#if defined(CONFIG_OF) && defined(CONFIG_DRM_PANEL_BRIDGE) && defined(CONFIG_DRM_KMS_HELPER)
> > > struct drm_bridge *devm_drm_of_get_bridge(struct device *dev, struct device_node *node,
> > > u32 port, u32 endpoint);
> > >
> > > .. and then selecting DRM_KMS_HELPER for PHY_QCOM_QMP_COMBO.
> > >
> > > But I think the solution in this patch is better. Let me know what you
> > > think.
> >
> > I think this is no more the case after on linux-next:
> > 35921910bbd0 phy: qcom: qmp-combo: switch to DRM_AUX_BRIDGE
> >
> > But could you still check ?
>
> On next-20240117 the error happens in the aux-bridge file instead then.
>
> aarch64-linux-gnu-ld: drivers/gpu/drm/bridge/aux-bridge.o: in function `drm_aux_bridge_probe':
> drivers/gpu/drm/bridge/aux-bridge.c:115:(.text+0xe0): undefined reference to `devm_drm_of_get_bridge'
>
> I'm attaching the defconfig with which I can reproduce this but it's
> really just DRM_KMS_HELPER=n and PHY_QCOM_QMP_COMBO=y I believe.
Hi Neil,
Ping on this patch
Regards
Luca
>
> Regards
> Luca
>
>
> >
> > Neil
> >
> > > ---
> > > drivers/gpu/drm/bridge/Kconfig | 1 +
> > > 1 file changed, 1 insertion(+)
> > >
> > > diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
> > > index ac9ec5073619..ae782b427829 100644
> > > --- a/drivers/gpu/drm/bridge/Kconfig
> > > +++ b/drivers/gpu/drm/bridge/Kconfig
> > > @@ -8,6 +8,7 @@ config DRM_BRIDGE
> > > config DRM_PANEL_BRIDGE
> > > def_bool y
> > > depends on DRM_BRIDGE
> > > + select DRM_KMS_HELPER
> > > select DRM_PANEL
> > > help
> > > DRM bridge wrapper of DRM panels
> > >
> > > ---
> > > base-commit: b9c3a1fa6fb324e691a03cf124b79f4842e65d76
> > > change-id: 20240111-drm-panel-bridge-fixup-5c2977fb969f
> > >
> > > Best regards,
^ permalink raw reply [relevance 99%]
* Re: [PATCH RESEND 0/4] Ensure all backlight drivers zero the properties structure
@ 2024-02-20 16:48 88% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-20 16:48 UTC (permalink / raw)
To: Lee Jones, Jingoo Han, Daniel Thompson
Cc: Daniel Thompson, dri-devel, linux-fbdev, linux-kernel
On Dienstag, 20. Februar 2024 16:35:23 CET Daniel Thompson wrote:
> [Sorry for the RESEND so soon... embarrassingly I got Lee's e-mail
> address wrong the first time!]
>
> Luca Weiss recently shared a patch to zero the properties structure for
> lm3630a... and shortly afterwards I realized I should probably scan for
> a similar class of errors in other drivers.
Thanks for fixing the other drivers! Was definitely a fun one to debug :)
>
> Results follow in the next four patches (they could all be one patch but
> for the fact there are different Fixes: tags)!
>
> Daniel Thompson (4):
> backlight: da9052: Fully initialize backlight_properties during probe
> backlight: lm3639: Fully initialize backlight_properties during probe
> backlight: lp8788: Fully initialize backlight_properties during probe
> backlight: mp3309c: Fully initialize backlight_properties during probe
>
> drivers/video/backlight/da9052_bl.c | 1 +
> drivers/video/backlight/lm3639_bl.c | 1 +
> drivers/video/backlight/lp8788_bl.c | 1 +
> drivers/video/backlight/mp3309c.c | 1 +
> 4 files changed, 4 insertions(+)
>
>
> base-commit: b401b621758e46812da61fa58a67c3fd8d91de0d
> --
> 2.43.0
>
>
^ permalink raw reply [relevance 88%]
* Re: [PATCH 4/4] ARM: dts: qcom: msm8974-hammerhead: Hook up backlight
@ 2024-02-20 16:45 88% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-20 16:45 UTC (permalink / raw)
To: Daniel Thompson
Cc: ~postmarketos/upstreaming, phone-devel, Lee Jones, Jingoo Han,
Helge Deller, Andrew Morton, G.Shark Jeong, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Maximilian Weigand, dri-devel, linux-fbdev, linux-kernel,
linux-arm-msm, devicetree
On Dienstag, 20. Februar 2024 15:12:10 CET Daniel Thompson wrote:
> On Tue, Feb 20, 2024 at 12:11:22AM +0100, Luca Weiss wrote:
> > Connect the panel with the backlight nodes so that the backlight can be
> > turned off when the display is blanked.
> >
> > Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
>
> Reviewed-by: Daniel Thompson <daniel.thompson@linaro.org>
>
>
> > ---
> > arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts | 4 +++-
> > 1 file changed, 3 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts
> > index 4aaae8537a3f..8eaa5b162815 100644
> > --- a/arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts
> > +++ b/arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts
> > @@ -182,7 +182,7 @@ &blsp2_i2c5 {
> > status = "okay";
> > clock-frequency = <355000>;
> >
> > - led-controller@38 {
> > + backlight: led-controller@38 {
>
> Again... a minor nit regarding existing problems but this node doesn't
> follow the generic naming recommendations:
> https://devicetree-specification.readthedocs.io/en/stable/devicetree-basics.html#generic-names-recommendation
"led-controller" is listed on that page, or do you mean something else?
>
>
> Daniel.
>
^ permalink raw reply [relevance 88%]
* Re: [PATCH 3/4] backlight: lm3630a: Use backlight_get_brightness helper in update_status
@ 2024-02-20 16:43 87% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-20 16:43 UTC (permalink / raw)
To: Daniel Thompson
Cc: ~postmarketos/upstreaming, phone-devel, Lee Jones, Jingoo Han,
Helge Deller, Andrew Morton, G.Shark Jeong, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Maximilian Weigand, dri-devel, linux-fbdev, linux-kernel,
linux-arm-msm, devicetree
On Dienstag, 20. Februar 2024 15:11:07 CET Daniel Thompson wrote:
> On Tue, Feb 20, 2024 at 12:11:21AM +0100, Luca Weiss wrote:
> > As per documentation "drivers are expected to use this function in their
> > update_status() operation to get the brightness value.".
> >
> > With this we can also drop the manual backlight_is_blank() handling
> > since backlight_get_brightness() is already handling this correctly.
> >
> > Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
>
> Reviewed-by: Daniel Thompson <daniel.thompson@linaro.org>
>
> However...
>
> > ---
> > /* disable sleep */
> > @@ -201,9 +202,9 @@ static int lm3630a_bank_a_update_status(struct backlight_device *bl)
> > goto out_i2c_err;
> > usleep_range(1000, 2000);
> > /* minimum brightness is 0x04 */
> > - ret = lm3630a_write(pchip, REG_BRT_A, bl->props.brightness);
> > + ret = lm3630a_write(pchip, REG_BRT_A, brightness);
>
> ... then handling of the minimum brightness looks weird in this driver.
>
> The range of the backlight is 0..max_brightness. Sadly the drivers
> are inconsistant regarding whether zero means off or just minimum,
> however three certainly isn't supposed to mean off! In other words the
> offsetting should be handled by driver rather than hoping userspace has
> some magic LM3630A mode.
I could also try and fix that..
1. Treat 1..4 as 4, so have backlight on at that minimum level? Probably
wouldn't be noticable that brightness 1=2=3=4. And the backlight will be
on compared to off as it is now.
2. Decrease max_brightness by 4 values, so probably 0..251 and shift the
values up in the driver so we get 4..255?
Or would you have some other idea here?
Regards
Luca
>
> You didn't introduce this so this patch still has my R-b ...
>
>
> Daniel.
>
^ permalink raw reply [relevance 87%]
* [PATCH] arm64: dts: qcom: sdm632-fairphone-fp3: enable USB-C port handling
@ 2024-02-20 12:01 95% Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-20 12:01 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel, Luca Weiss
Add the definition for the USB-C connector found on this phone and hook
up the relevant bits. This enables USB role switching.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
arch/arm64/boot/dts/qcom/msm8953.dtsi | 14 ++++++++++
arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts | 31 +++++++++++++++++++++--
2 files changed, 43 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi
index 383657407c6f..6726d15c38c3 100644
--- a/arch/arm64/boot/dts/qcom/msm8953.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi
@@ -1330,6 +1330,20 @@ usb3_dwc3: usb@7000000 {
snps,hird-threshold = /bits/ 8 <0x00>;
maximum-speed = "high-speed";
+
+ usb-role-switch;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ usb_dwc3_hs: endpoint {
+ };
+ };
+ };
};
};
diff --git a/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts b/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts
index c49a196189e3..2a65849f0da2 100644
--- a/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts
+++ b/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts
@@ -162,6 +162,33 @@ led@3 {
};
};
+&pmi632_typec {
+ status = "okay";
+
+ connector {
+ compatible = "usb-c-connector";
+
+ power-role = "dual";
+ data-role = "dual";
+ self-powered;
+
+ typec-power-opmode = "default";
+ pd-disable;
+
+ port {
+ pmi632_hs_in: endpoint {
+ remote-endpoint = <&usb_dwc3_hs>;
+ };
+ };
+ };
+};
+
+&pmi632_vbus {
+ regulator-min-microamp = <500000>;
+ regulator-max-microamp = <1000000>;
+ status = "okay";
+};
+
&sdhc_1 {
status = "okay";
vmmc-supply = <&pm8953_l8>;
@@ -286,8 +313,8 @@ &usb3 {
status = "okay";
};
-&usb3_dwc3 {
- dr_mode = "peripheral";
+&usb_dwc3_hs {
+ remote-endpoint = <&pmi632_hs_in>;
};
&wcnss {
---
base-commit: 103eb8e019aefd616735200ce46833bc74cfe132
change-id: 20240220-fp3-typec-25eb002db8b5
Best regards,
--
Luca Weiss <luca.weiss@fairphone.com>
^ permalink raw reply related [relevance 95%]
* [PATCH 4/4] ARM: dts: qcom: msm8974-hammerhead: Hook up backlight
2024-02-19 23:11 82% [PATCH 0/4] Various fixes for the lm3630a backlight driver Luca Weiss
` (2 preceding siblings ...)
2024-02-19 23:11 79% ` [PATCH 3/4] backlight: lm3630a: Use backlight_get_brightness helper in update_status Luca Weiss
@ 2024-02-19 23:11 85% ` Luca Weiss
3 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-02-19 23:11 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Lee Jones,
Daniel Thompson, Jingoo Han, Helge Deller, Andrew Morton,
G.Shark Jeong, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Maximilian Weigand
Cc: dri-devel, linux-fbdev, linux-kernel, linux-arm-msm, devicetree,
Luca Weiss
Connect the panel with the backlight nodes so that the backlight can be
turned off when the display is blanked.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts
index 4aaae8537a3f..8eaa5b162815 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts
+++ b/arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts
@@ -182,7 +182,7 @@ &blsp2_i2c5 {
status = "okay";
clock-frequency = <355000>;
- led-controller@38 {
+ backlight: led-controller@38 {
compatible = "ti,lm3630a";
status = "okay";
reg = <0x38>;
@@ -272,6 +272,8 @@ panel: panel@0 {
reg = <0>;
compatible = "lg,acx467akm-7";
+ backlight = <&backlight>;
+
pinctrl-names = "default";
pinctrl-0 = <&panel_pin>;
--
2.43.2
^ permalink raw reply related [relevance 85%]
* [PATCH 3/4] backlight: lm3630a: Use backlight_get_brightness helper in update_status
2024-02-19 23:11 82% [PATCH 0/4] Various fixes for the lm3630a backlight driver Luca Weiss
2024-02-19 23:11 86% ` [PATCH 1/4] backlight: lm3630a: Initialize backlight_properties on init Luca Weiss
2024-02-19 23:11 81% ` [PATCH 2/4] backlight: lm3630a: Don't set bl->props.brightness in get_brightness Luca Weiss
@ 2024-02-19 23:11 79% ` Luca Weiss
2024-02-19 23:11 85% ` [PATCH 4/4] ARM: dts: qcom: msm8974-hammerhead: Hook up backlight Luca Weiss
3 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-02-19 23:11 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Lee Jones,
Daniel Thompson, Jingoo Han, Helge Deller, Andrew Morton,
G.Shark Jeong, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Maximilian Weigand
Cc: dri-devel, linux-fbdev, linux-kernel, linux-arm-msm, devicetree,
Luca Weiss
As per documentation "drivers are expected to use this function in their
update_status() operation to get the brightness value.".
With this we can also drop the manual backlight_is_blank() handling
since backlight_get_brightness() is already handling this correctly.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
drivers/video/backlight/lm3630a_bl.c | 14 ++++++++------
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/video/backlight/lm3630a_bl.c b/drivers/video/backlight/lm3630a_bl.c
index 26ff4178cc16..e6c0916ec88b 100644
--- a/drivers/video/backlight/lm3630a_bl.c
+++ b/drivers/video/backlight/lm3630a_bl.c
@@ -189,10 +189,11 @@ static int lm3630a_bank_a_update_status(struct backlight_device *bl)
int ret;
struct lm3630a_chip *pchip = bl_get_data(bl);
enum lm3630a_pwm_ctrl pwm_ctrl = pchip->pdata->pwm_ctrl;
+ int brightness = backlight_get_brightness(bl);
/* pwm control */
if ((pwm_ctrl & LM3630A_PWM_BANK_A) != 0)
- return lm3630a_pwm_ctrl(pchip, bl->props.brightness,
+ return lm3630a_pwm_ctrl(pchip, brightness,
bl->props.max_brightness);
/* disable sleep */
@@ -201,9 +202,9 @@ static int lm3630a_bank_a_update_status(struct backlight_device *bl)
goto out_i2c_err;
usleep_range(1000, 2000);
/* minimum brightness is 0x04 */
- ret = lm3630a_write(pchip, REG_BRT_A, bl->props.brightness);
+ ret = lm3630a_write(pchip, REG_BRT_A, brightness);
- if (backlight_is_blank(bl) || (backlight_get_brightness(bl) < 0x4))
+ if (brightness < 0x4)
/* turn the string off */
ret |= lm3630a_update(pchip, REG_CTRL, LM3630A_LEDA_ENABLE, 0);
else
@@ -263,10 +264,11 @@ static int lm3630a_bank_b_update_status(struct backlight_device *bl)
int ret;
struct lm3630a_chip *pchip = bl_get_data(bl);
enum lm3630a_pwm_ctrl pwm_ctrl = pchip->pdata->pwm_ctrl;
+ int brightness = backlight_get_brightness(bl);
/* pwm control */
if ((pwm_ctrl & LM3630A_PWM_BANK_B) != 0)
- return lm3630a_pwm_ctrl(pchip, bl->props.brightness,
+ return lm3630a_pwm_ctrl(pchip, brightness,
bl->props.max_brightness);
/* disable sleep */
@@ -275,9 +277,9 @@ static int lm3630a_bank_b_update_status(struct backlight_device *bl)
goto out_i2c_err;
usleep_range(1000, 2000);
/* minimum brightness is 0x04 */
- ret = lm3630a_write(pchip, REG_BRT_B, bl->props.brightness);
+ ret = lm3630a_write(pchip, REG_BRT_B, brightness);
- if (backlight_is_blank(bl) || (backlight_get_brightness(bl) < 0x4))
+ if (brightness < 0x4)
/* turn the string off */
ret |= lm3630a_update(pchip, REG_CTRL, LM3630A_LEDB_ENABLE, 0);
else
--
2.43.2
^ permalink raw reply related [relevance 79%]
* [PATCH 1/4] backlight: lm3630a: Initialize backlight_properties on init
2024-02-19 23:11 82% [PATCH 0/4] Various fixes for the lm3630a backlight driver Luca Weiss
@ 2024-02-19 23:11 86% ` Luca Weiss
2024-02-19 23:11 81% ` [PATCH 2/4] backlight: lm3630a: Don't set bl->props.brightness in get_brightness Luca Weiss
` (2 subsequent siblings)
3 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-19 23:11 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Lee Jones,
Daniel Thompson, Jingoo Han, Helge Deller, Andrew Morton,
G.Shark Jeong, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Maximilian Weigand
Cc: dri-devel, linux-fbdev, linux-kernel, linux-arm-msm, devicetree,
Luca Weiss
The backlight_properties struct should be initialized to zero before
using, otherwise there will be some random values in the struct.
Fixes: 0c2a665a648e ("backlight: add Backlight driver for lm3630 chip")
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
drivers/video/backlight/lm3630a_bl.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/video/backlight/lm3630a_bl.c b/drivers/video/backlight/lm3630a_bl.c
index a3412c936ca2..8e275275b808 100644
--- a/drivers/video/backlight/lm3630a_bl.c
+++ b/drivers/video/backlight/lm3630a_bl.c
@@ -343,6 +343,7 @@ static int lm3630a_backlight_register(struct lm3630a_chip *pchip)
struct backlight_properties props;
const char *label;
+ memset(&props, 0, sizeof(struct backlight_properties));
props.type = BACKLIGHT_RAW;
if (pdata->leda_ctrl != LM3630A_LEDA_DISABLE) {
props.brightness = pdata->leda_init_brt;
--
2.43.2
^ permalink raw reply related [relevance 86%]
* [PATCH 2/4] backlight: lm3630a: Don't set bl->props.brightness in get_brightness
2024-02-19 23:11 82% [PATCH 0/4] Various fixes for the lm3630a backlight driver Luca Weiss
2024-02-19 23:11 86% ` [PATCH 1/4] backlight: lm3630a: Initialize backlight_properties on init Luca Weiss
@ 2024-02-19 23:11 81% ` Luca Weiss
2024-02-19 23:11 79% ` [PATCH 3/4] backlight: lm3630a: Use backlight_get_brightness helper in update_status Luca Weiss
2024-02-19 23:11 85% ` [PATCH 4/4] ARM: dts: qcom: msm8974-hammerhead: Hook up backlight Luca Weiss
3 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-19 23:11 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Lee Jones,
Daniel Thompson, Jingoo Han, Helge Deller, Andrew Morton,
G.Shark Jeong, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Maximilian Weigand
Cc: dri-devel, linux-fbdev, linux-kernel, linux-arm-msm, devicetree,
Luca Weiss
There's no need to set bl->props.brightness, the get_brightness function
is just supposed to return the current brightness and not touch the
struct.
With that done we can also remove the 'goto out' and just return the
value.
Fixes: 0c2a665a648e ("backlight: add Backlight driver for lm3630 chip")
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
drivers/video/backlight/lm3630a_bl.c | 14 ++++----------
1 file changed, 4 insertions(+), 10 deletions(-)
diff --git a/drivers/video/backlight/lm3630a_bl.c b/drivers/video/backlight/lm3630a_bl.c
index 8e275275b808..26ff4178cc16 100644
--- a/drivers/video/backlight/lm3630a_bl.c
+++ b/drivers/video/backlight/lm3630a_bl.c
@@ -233,7 +233,7 @@ static int lm3630a_bank_a_get_brightness(struct backlight_device *bl)
if (rval < 0)
goto out_i2c_err;
brightness |= rval;
- goto out;
+ return brightness;
}
/* disable sleep */
@@ -244,11 +244,8 @@ static int lm3630a_bank_a_get_brightness(struct backlight_device *bl)
rval = lm3630a_read(pchip, REG_BRT_A);
if (rval < 0)
goto out_i2c_err;
- brightness = rval;
+ return rval;
-out:
- bl->props.brightness = brightness;
- return bl->props.brightness;
out_i2c_err:
dev_err(pchip->dev, "i2c failed to access register\n");
return 0;
@@ -310,7 +307,7 @@ static int lm3630a_bank_b_get_brightness(struct backlight_device *bl)
if (rval < 0)
goto out_i2c_err;
brightness |= rval;
- goto out;
+ return brightness;
}
/* disable sleep */
@@ -321,11 +318,8 @@ static int lm3630a_bank_b_get_brightness(struct backlight_device *bl)
rval = lm3630a_read(pchip, REG_BRT_B);
if (rval < 0)
goto out_i2c_err;
- brightness = rval;
+ return rval;
-out:
- bl->props.brightness = brightness;
- return bl->props.brightness;
out_i2c_err:
dev_err(pchip->dev, "i2c failed to access register\n");
return 0;
--
2.43.2
^ permalink raw reply related [relevance 81%]
* [PATCH 0/4] Various fixes for the lm3630a backlight driver
@ 2024-02-19 23:11 82% Luca Weiss
2024-02-19 23:11 86% ` [PATCH 1/4] backlight: lm3630a: Initialize backlight_properties on init Luca Weiss
` (3 more replies)
0 siblings, 4 replies; 200+ results
From: Luca Weiss @ 2024-02-19 23:11 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Lee Jones,
Daniel Thompson, Jingoo Han, Helge Deller, Andrew Morton,
G.Shark Jeong, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Maximilian Weigand
Cc: dri-devel, linux-fbdev, linux-kernel, linux-arm-msm, devicetree,
Luca Weiss
On the MSM8974 Nexus 5 and OnePlus One phones (latter doesn't have
display upstream) the display backlight was turning off whenever you
would write a brightness to sysfs since a recent commit to the driver
(kernel v6.5).
backlight: lm3630a: Turn off both led strings when display is blank
Turns out, backlight_is_blank() thought the display was blanked because
the props variable is was checking was never actually initialized so it
was just reading some value that was left before.
The first commit in this series fixes this, and the others are some
cleanups / fixes I noticed while working on this.
As last commit, we can finally hook up the panel and backlight on the
Nexus 5 so blanking the screen actually turns off the backlight.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Luca Weiss (4):
backlight: lm3630a: Initialize backlight_properties on init
backlight: lm3630a: Don't set bl->props.brightness in get_brightness
backlight: lm3630a: Use backlight_get_brightness helper in update_status
ARM: dts: qcom: msm8974-hammerhead: Hook up backlight
.../qcom/qcom-msm8974-lge-nexus5-hammerhead.dts | 4 ++-
drivers/video/backlight/lm3630a_bl.c | 29 ++++++++++------------
2 files changed, 16 insertions(+), 17 deletions(-)
---
base-commit: b401b621758e46812da61fa58a67c3fd8d91de0d
change-id: 20240219-lm3630a-fixups-8a9359e5a8ce
Best regards,
--
Luca Weiss <luca@z3ntu.xyz>
^ permalink raw reply [relevance 82%]
* [PATCH] arm64: dts: qcom: Fix type of "wdog" IRQs for remoteprocs
@ 2024-02-19 14:33 82% Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-19 14:33 UTC (permalink / raw)
To: cros-qcom-dts-watchers, Bjorn Andersson, Konrad Dybcio,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel, Luca Weiss
The code in qcom_q6v5_init() requests the "wdog" IRQ as
IRQF_TRIGGER_RISING. If dt defines the interrupt type as LEVEL_HIGH then
the driver will have issues getting the IRQ again after probe deferral
with an error like:
irq: type mismatch, failed to map hwirq-14 for interrupt-controller@b220000!
Fix that by updating the devicetrees to use IRQ_TYPE_EDGE_RISING for
these interrupts, as is already used in most dt's. Also the driver was
already using the interrupts with that type.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
See also this thread:
https://lore.kernel.org/linux-arm-msm/efecb4cf-e42b-40fb-aa68-37433529604b@linaro.org/
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 4 ++--
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 6 +++---
arch/arm64/boot/dts/qcom/sm6350.dtsi | 4 ++--
arch/arm64/boot/dts/qcom/sm6375.dtsi | 2 +-
arch/arm64/boot/dts/qcom/sm8250.dtsi | 6 +++---
5 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index c31a09bac4ed..8379ca283d52 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -3707,7 +3707,7 @@ remoteproc_adsp: remoteproc@3700000 {
compatible = "qcom,sc7280-adsp-pas";
reg = <0 0x03700000 0 0x100>;
- interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
<&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
<&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
<&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
@@ -3944,7 +3944,7 @@ remoteproc_cdsp: remoteproc@a300000 {
compatible = "qcom,sc7280-cdsp-pas";
reg = <0 0x0a300000 0 0x10000>;
- interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
<&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
<&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
<&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index a5b194813079..c9058c7fc1a3 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -2641,7 +2641,7 @@ remoteproc_adsp: remoteproc@3000000 {
compatible = "qcom,sc8280xp-adsp-pas";
reg = <0 0x03000000 0 0x100>;
- interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
<&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
<&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
<&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
@@ -4977,7 +4977,7 @@ remoteproc_nsp0: remoteproc@1b300000 {
compatible = "qcom,sc8280xp-nsp0-pas";
reg = <0 0x1b300000 0 0x100>;
- interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
<&smp2p_nsp0_in 0 IRQ_TYPE_EDGE_RISING>,
<&smp2p_nsp0_in 1 IRQ_TYPE_EDGE_RISING>,
<&smp2p_nsp0_in 2 IRQ_TYPE_EDGE_RISING>,
@@ -5108,7 +5108,7 @@ remoteproc_nsp1: remoteproc@21300000 {
compatible = "qcom,sc8280xp-nsp1-pas";
reg = <0 0x21300000 0 0x100>;
- interrupts-extended = <&intc GIC_SPI 887 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts-extended = <&intc GIC_SPI 887 IRQ_TYPE_EDGE_RISING>,
<&smp2p_nsp1_in 0 IRQ_TYPE_EDGE_RISING>,
<&smp2p_nsp1_in 1 IRQ_TYPE_EDGE_RISING>,
<&smp2p_nsp1_in 2 IRQ_TYPE_EDGE_RISING>,
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 24bcec3366ef..0be053555602 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -1252,7 +1252,7 @@ adsp: remoteproc@3000000 {
compatible = "qcom,sm6350-adsp-pas";
reg = <0 0x03000000 0 0x100>;
- interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
<&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
<&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
<&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
@@ -1511,7 +1511,7 @@ cdsp: remoteproc@8300000 {
compatible = "qcom,sm6350-cdsp-pas";
reg = <0 0x08300000 0 0x10000>;
- interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
<&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>,
<&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>,
<&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>,
diff --git a/arch/arm64/boot/dts/qcom/sm6375.dtsi b/arch/arm64/boot/dts/qcom/sm6375.dtsi
index 4386f8a9c636..f40509d91bbd 100644
--- a/arch/arm64/boot/dts/qcom/sm6375.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6375.dtsi
@@ -1561,7 +1561,7 @@ remoteproc_adsp: remoteproc@a400000 {
compatible = "qcom,sm6375-adsp-pas";
reg = <0 0x0a400000 0 0x100>;
- interrupts-extended = <&intc GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts-extended = <&intc GIC_SPI 282 IRQ_TYPE_EDGE_RISING>,
<&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
<&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
<&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index f3c70b87efad..03c7dda1d542 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -3062,7 +3062,7 @@ slpi: remoteproc@5c00000 {
compatible = "qcom,sm8250-slpi-pas";
reg = <0 0x05c00000 0 0x4000>;
- interrupts-extended = <&pdc 9 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts-extended = <&pdc 9 IRQ_TYPE_EDGE_RISING>,
<&smp2p_slpi_in 0 IRQ_TYPE_EDGE_RISING>,
<&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>,
<&smp2p_slpi_in 2 IRQ_TYPE_EDGE_RISING>,
@@ -3766,7 +3766,7 @@ cdsp: remoteproc@8300000 {
compatible = "qcom,sm8250-cdsp-pas";
reg = <0 0x08300000 0 0x10000>;
- interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
<&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>,
<&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>,
<&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>,
@@ -5928,7 +5928,7 @@ adsp: remoteproc@17300000 {
compatible = "qcom,sm8250-adsp-pas";
reg = <0 0x17300000 0 0x100>;
- interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
<&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
<&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
<&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
---
base-commit: 35a4fdde2466b9d90af297f249436a270ef9d30e
change-id: 20240219-remoteproc-irqs-63f3293af260
Best regards,
--
Luca Weiss <luca.weiss@fairphone.com>
^ permalink raw reply related [relevance 82%]
* Re: [PATCH 2/2] arm64: dts: qcom: sm6350: Add Crypto Engine
@ 2024-02-19 10:35 99% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-19 10:35 UTC (permalink / raw)
To: Bjorn Andersson
Cc: Stephan Gerhold, Andy Gross, Konrad Dybcio, Thara Gopinath,
Herbert Xu, David S. Miller, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bhupesh Sharma, ~postmarketos/upstreaming,
phone-devel, linux-crypto, linux-arm-msm, devicetree,
linux-kernel
On Fri Feb 16, 2024 at 7:09 PM CET, Bjorn Andersson wrote:
> On Fri, Feb 16, 2024 at 11:46:49AM +0100, Luca Weiss wrote:
> > On Fri Jan 5, 2024 at 5:30 PM CET, Stephan Gerhold wrote:
> > > On Fri, Jan 05, 2024 at 05:15:44PM +0100, Luca Weiss wrote:
> > > > Add crypto engine (CE) and CE BAM related nodes and definitions for this
> > > > SoC.
> > > >
> > > > For reference:
> > > >
> > > > [ 2.297419] qcrypto 1dfa000.crypto: Crypto device found, version 5.5.1
> > > >
> > > > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
> > > > ---
> > > > arch/arm64/boot/dts/qcom/sm6350.dtsi | 31 +++++++++++++++++++++++++++++++
> > > > 1 file changed, 31 insertions(+)
> > > >
> > > > diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
> > > > index 8fd6f4d03490..516aadbb16bb 100644
> > > > --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
> > > > +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
> > > > @@ -1212,6 +1212,37 @@ ufs_mem_phy_lanes: phy@1d87400 {
> > > > };
> > > > };
> > > >
> > > > + cryptobam: dma-controller@1dc4000 {
> > > > + compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
> > > > + reg = <0 0x01dc4000 0 0x24000>;
> > > > + interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
> > > > + #dma-cells = <1>;
> > > > + qcom,ee = <0>;
> > > > + qcom,controlled-remotely;
> > > > + num-channels = <16>;
> > > > + qcom,num-ees = <4>;
> > > > + iommus = <&apps_smmu 0x432 0x0000>,
> > > > + <&apps_smmu 0x438 0x0001>,
> > > > + <&apps_smmu 0x43f 0x0000>,
> > > > + <&apps_smmu 0x426 0x0011>,
> > > > + <&apps_smmu 0x436 0x0011>;
> > >
> > > The last two lines look equivalent to me: 0x436 & ~0x0011 = 0x426.
> >
> > I don't understand the IOMMU SID + mask really, but I think I've seen
> > somewhere before like here that TZ can be a bit picky with the SIDs?
> >
> > https://lore.kernel.org/linux-arm-msm/opqdrmyj3y64nqqqmakjydn5rkspizufyeavm7ec7c7ufqz4wk@ey2a7bq3shfj/
> > https://lore.kernel.org/linux-arm-msm/11b5db69-49f5-4d7b-81c9-687d66a5cb0d@linaro.org/
> >
> > I don't quite want to risk having some obscure use case breaking because
> > we cleaned up the dts ;)
> >
> > But if you're more sure than me that it won't break, let me know!
> >
> > >
> > > It's also a bit weird that the mask has one more digit than the stream
> > > ID. And ordered numerically (by stream ID, first number) it would be a
> > > bit easier to read. :-)
> >
> > Sorting them is no problem, can do that for v2.
> >
>
> Where you able to do this? I don't see a v2 in my inbox, am I just
> searching poorly?
Only sent v2 some minutes ago, didn't have any more time on Friday.
Regards
Luca
>
> Regards,
> Bjorn
>
> > >
> > > Thanks,
> > > Stephan
> >
^ permalink raw reply [relevance 99%]
* [PATCH v2] arm64: dts: qcom: sm6350: Add Crypto Engine
@ 2024-02-19 10:16 93% Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-19 10:16 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Thara Gopinath,
Herbert Xu, David S. Miller, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bhupesh Sharma
Cc: ~postmarketos/upstreaming, phone-devel, linux-crypto,
linux-arm-msm, devicetree, linux-kernel, Luca Weiss
Add crypto engine (CE) and CE BAM related nodes and definitions for this
SoC.
For reference:
[ 2.297419] qcrypto 1dfa000.crypto: Crypto device found, version 5.5.1
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
Add the compatible and nodes for the QCE found on SM6350 SoC.
Not completely sure how to fully test it but "kcapi-speed --all" shows
no issues. Let me know if I can/should test this more.
---
Changes in v2:
- Drop applied patch
- Sort iommu entries & drop extra leading zeroes from mask
- Link to v1: https://lore.kernel.org/r/20240105-sm6350-qce-v1-0-416e5c7319ac@fairphone.com
---
arch/arm64/boot/dts/qcom/sm6350.dtsi | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 43cffe8e1247..7a14b040d140 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -1202,6 +1202,37 @@ ufs_mem_phy: phy@1d87000 {
status = "disabled";
};
+ cryptobam: dma-controller@1dc4000 {
+ compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
+ reg = <0 0x01dc4000 0 0x24000>;
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ qcom,ee = <0>;
+ qcom,controlled-remotely;
+ num-channels = <16>;
+ qcom,num-ees = <4>;
+ iommus = <&apps_smmu 0x426 0x11>,
+ <&apps_smmu 0x432 0x0>,
+ <&apps_smmu 0x436 0x11>,
+ <&apps_smmu 0x438 0x1>,
+ <&apps_smmu 0x43f 0x0>;
+ };
+
+ crypto: crypto@1dfa000 {
+ compatible = "qcom,sm6350-qce", "qcom,sm8150-qce", "qcom,qce";
+ reg = <0 0x01dfa000 0 0x6000>;
+ dmas = <&cryptobam 4>, <&cryptobam 5>;
+ dma-names = "rx", "tx";
+ iommus = <&apps_smmu 0x426 0x11>,
+ <&apps_smmu 0x432 0x0>,
+ <&apps_smmu 0x436 0x11>,
+ <&apps_smmu 0x438 0x1>,
+ <&apps_smmu 0x43f 0x0>;
+ interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 QCOM_ICC_TAG_ALWAYS
+ &clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>;
+ interconnect-names = "memory";
+ };
+
ipa: ipa@1e40000 {
compatible = "qcom,sm6350-ipa";
---
base-commit: 6af5a37dbe961391c3c357c0799d76dcd7c280e4
change-id: 20240105-sm6350-qce-c6233abbf54f
Best regards,
--
Luca Weiss <luca.weiss@fairphone.com>
^ permalink raw reply related [relevance 93%]
* [PATCH v2 3/3] arm64: dts: qcom: qcs404: Use qcs404-hfpll compatible for hfpll
2024-02-18 20:57 85% [PATCH v2 0/3] Convert qcom,hfpll documentation to yaml + related changes Luca Weiss
2024-02-18 20:57 71% ` [PATCH v2 1/3] dt-bindings: clock: qcom,hfpll: Convert to YAML Luca Weiss
2024-02-18 20:57 85% ` [PATCH v2 2/3] clk: qcom: hfpll: Add QCS404-specific compatible Luca Weiss
@ 2024-02-18 20:57 87% ` Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-18 20:57 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-clk, devicetree, linux-kernel, Luca Weiss
Follow the updated bindings and use a QCS404-specific compatible for the
HFPLL on this SoC.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Please note that this patch should only land after the patch for the
clock driver.
---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
index 2f2eeaf2e945..4133d5a19deb 100644
--- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
@@ -1308,7 +1308,7 @@ apcs_glb: mailbox@b011000 {
};
apcs_hfpll: clock-controller@b016000 {
- compatible = "qcom,hfpll";
+ compatible = "qcom,qcs404-hfpll";
reg = <0x0b016000 0x30>;
#clock-cells = <0>;
clock-output-names = "apcs_hfpll";
--
2.43.2
^ permalink raw reply related [relevance 87%]
* [PATCH v2 2/3] clk: qcom: hfpll: Add QCS404-specific compatible
2024-02-18 20:57 85% [PATCH v2 0/3] Convert qcom,hfpll documentation to yaml + related changes Luca Weiss
2024-02-18 20:57 71% ` [PATCH v2 1/3] dt-bindings: clock: qcom,hfpll: Convert to YAML Luca Weiss
@ 2024-02-18 20:57 85% ` Luca Weiss
2024-02-18 20:57 87% ` [PATCH v2 3/3] arm64: dts: qcom: qcs404: Use qcs404-hfpll compatible for hfpll Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-18 20:57 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-clk, devicetree, linux-kernel, Luca Weiss
It doesn't appear that the configuration is for the HFPLL is generic, so
add a qcs404-specific compatible and rename the existing struct to
qcs404.
Keep qcom,hfpll in the driver for compatibility with old dtbs.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
drivers/clk/qcom/hfpll.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/qcom/hfpll.c b/drivers/clk/qcom/hfpll.c
index dac27e31ef60..b0b0cb074b4a 100644
--- a/drivers/clk/qcom/hfpll.c
+++ b/drivers/clk/qcom/hfpll.c
@@ -14,7 +14,7 @@
#include "clk-regmap.h"
#include "clk-hfpll.h"
-static const struct hfpll_data hdata = {
+static const struct hfpll_data qcs404 = {
.mode_reg = 0x00,
.l_reg = 0x04,
.m_reg = 0x08,
@@ -84,10 +84,12 @@ static const struct hfpll_data msm8976_cci = {
};
static const struct of_device_id qcom_hfpll_match_table[] = {
- { .compatible = "qcom,hfpll", .data = &hdata },
{ .compatible = "qcom,msm8976-hfpll-a53", .data = &msm8976_a53 },
{ .compatible = "qcom,msm8976-hfpll-a72", .data = &msm8976_a72 },
{ .compatible = "qcom,msm8976-hfpll-cci", .data = &msm8976_cci },
+ { .compatible = "qcom,qcs404-hfpll", .data = &qcs404 },
+ /* Deprecated in bindings */
+ { .compatible = "qcom,hfpll", .data = &qcs404 },
{ }
};
MODULE_DEVICE_TABLE(of, qcom_hfpll_match_table);
--
2.43.2
^ permalink raw reply related [relevance 85%]
* [PATCH v2 0/3] Convert qcom,hfpll documentation to yaml + related changes
@ 2024-02-18 20:57 85% Luca Weiss
2024-02-18 20:57 71% ` [PATCH v2 1/3] dt-bindings: clock: qcom,hfpll: Convert to YAML Luca Weiss
` (2 more replies)
0 siblings, 3 replies; 200+ results
From: Luca Weiss @ 2024-02-18 20:57 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-clk, devicetree, linux-kernel, Luca Weiss
Finally touch the hfpll doc and convert it to yaml, and do some related
changes along the way.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Changes in v2:
- Drop APQ8064/IPQ8064/MSM8960 compatibles (Dmitry)
- Update example to MSM8974 since IPQ8064 is dropped
- Clean up dt binding description (Krzysztof)
- Remove second example in docs (Krzysztof)
- Try to clear up the text and content around deprecating qcom,hfpll
- Link to v1: https://lore.kernel.org/r/20231231-hfpll-yaml-v1-0-359d44a4e194@z3ntu.xyz
---
Luca Weiss (3):
dt-bindings: clock: qcom,hfpll: Convert to YAML
clk: qcom: hfpll: Add QCS404-specific compatible
arm64: dts: qcom: qcs404: Use qcs404-hfpll compatible for hfpll
.../devicetree/bindings/clock/qcom,hfpll.txt | 63 --------------------
.../devicetree/bindings/clock/qcom,hfpll.yaml | 69 ++++++++++++++++++++++
arch/arm64/boot/dts/qcom/qcs404.dtsi | 2 +-
drivers/clk/qcom/hfpll.c | 6 +-
4 files changed, 74 insertions(+), 66 deletions(-)
---
base-commit: 841c35169323cd833294798e58b9bf63fa4fa1de
change-id: 20231231-hfpll-yaml-9266f012365c
Best regards,
--
Luca Weiss <luca@z3ntu.xyz>
^ permalink raw reply [relevance 85%]
* [PATCH v2 1/3] dt-bindings: clock: qcom,hfpll: Convert to YAML
2024-02-18 20:57 85% [PATCH v2 0/3] Convert qcom,hfpll documentation to yaml + related changes Luca Weiss
@ 2024-02-18 20:57 71% ` Luca Weiss
2024-02-18 20:57 85% ` [PATCH v2 2/3] clk: qcom: hfpll: Add QCS404-specific compatible Luca Weiss
2024-02-18 20:57 87% ` [PATCH v2 3/3] arm64: dts: qcom: qcs404: Use qcs404-hfpll compatible for hfpll Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-18 20:57 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-clk, devicetree, linux-kernel, Luca Weiss
Convert the .txt documentation to .yaml with some adjustments.
* APQ8064/IPQ8064/MSM8960 compatibles are dropped since their HFPLLs are
a part of GCC so there is no need for a separate compat entry.
* Change the MSM8974 compatible to follow the updated naming schema.
Theis compatible is not used upstream yet.
* Add qcs404-hfpll. QCS404 currently uses qcom,hfpll. Mark that as
deprecated since every SoC appears to need different driver data so
"qcom,hfpll" makes no sense to keep
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
.../devicetree/bindings/clock/qcom,hfpll.txt | 63 --------------------
.../devicetree/bindings/clock/qcom,hfpll.yaml | 69 ++++++++++++++++++++++
2 files changed, 69 insertions(+), 63 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/qcom,hfpll.txt b/Documentation/devicetree/bindings/clock/qcom,hfpll.txt
deleted file mode 100644
index 5769cbbe76be..000000000000
--- a/Documentation/devicetree/bindings/clock/qcom,hfpll.txt
+++ /dev/null
@@ -1,63 +0,0 @@
-High-Frequency PLL (HFPLL)
-
-PROPERTIES
-
-- compatible:
- Usage: required
- Value type: <string>:
- shall contain only one of the following. The generic
- compatible "qcom,hfpll" should be also included.
-
- "qcom,hfpll-ipq8064", "qcom,hfpll"
- "qcom,hfpll-apq8064", "qcom,hfpll"
- "qcom,hfpll-msm8974", "qcom,hfpll"
- "qcom,hfpll-msm8960", "qcom,hfpll"
- "qcom,msm8976-hfpll-a53", "qcom,hfpll"
- "qcom,msm8976-hfpll-a72", "qcom,hfpll"
- "qcom,msm8976-hfpll-cci", "qcom,hfpll"
-
-- reg:
- Usage: required
- Value type: <prop-encoded-array>
- Definition: address and size of HPLL registers. An optional second
- element specifies the address and size of the alias
- register region.
-
-- clocks:
- Usage: required
- Value type: <prop-encoded-array>
- Definition: reference to the xo clock.
-
-- clock-names:
- Usage: required
- Value type: <stringlist>
- Definition: must be "xo".
-
-- clock-output-names:
- Usage: required
- Value type: <string>
- Definition: Name of the PLL. Typically hfpllX where X is a CPU number
- starting at 0. Otherwise hfpll_Y where Y is more specific
- such as "l2".
-
-Example:
-
-1) An HFPLL for the L2 cache.
-
- clock-controller@f9016000 {
- compatible = "qcom,hfpll-ipq8064", "qcom,hfpll";
- reg = <0xf9016000 0x30>;
- clocks = <&xo_board>;
- clock-names = "xo";
- clock-output-names = "hfpll_l2";
- };
-
-2) An HFPLL for CPU0. This HFPLL has the alias register region.
-
- clock-controller@f908a000 {
- compatible = "qcom,hfpll-ipq8064", "qcom,hfpll";
- reg = <0xf908a000 0x30>, <0xf900a000 0x30>;
- clocks = <&xo_board>;
- clock-names = "xo";
- clock-output-names = "hfpll0";
- };
diff --git a/Documentation/devicetree/bindings/clock/qcom,hfpll.yaml b/Documentation/devicetree/bindings/clock/qcom,hfpll.yaml
new file mode 100644
index 000000000000..8cb1c164f760
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,hfpll.yaml
@@ -0,0 +1,69 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,hfpll.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm High-Frequency PLL
+
+maintainers:
+ - Bjorn Andersson <andersson@kernel.org>
+
+description:
+ The HFPLL is used as CPU PLL on various Qualcomm SoCs.
+
+properties:
+ compatible:
+ oneOf:
+ - enum:
+ - qcom,msm8974-hfpll
+ - qcom,msm8976-hfpll-a53
+ - qcom,msm8976-hfpll-a72
+ - qcom,msm8976-hfpll-cci
+ - qcom,qcs404-hfpll
+ - const: qcom,hfpll
+ deprecated: true
+
+ reg:
+ items:
+ - description: HFPLL registers
+ - description: Alias register region
+ minItems: 1
+
+ '#clock-cells':
+ const: 0
+
+ clocks:
+ items:
+ - description: board XO clock
+
+ clock-names:
+ items:
+ - const: xo
+
+ clock-output-names:
+ description:
+ Name of the PLL. Typically hfpllX where X is a CPU number starting at 0.
+ Otherwise hfpll_Y where Y is more specific such as "l2".
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - '#clock-cells'
+ - clocks
+ - clock-names
+ - clock-output-names
+
+additionalProperties: false
+
+examples:
+ - |
+ clock-controller@f908a000 {
+ compatible = "qcom,msm8974-hfpll";
+ reg = <0xf908a000 0x30>, <0xf900a000 0x30>;
+ #clock-cells = <0>;
+ clock-output-names = "hfpll0";
+ clocks = <&xo_board>;
+ clock-names = "xo";
+ };
--
2.43.2
^ permalink raw reply related [relevance 71%]
* [PATCH] Bluetooth: Add more Bluetooth version defines
@ 2024-02-16 13:22 97% Luca Weiss
2024-04-12 14:23 99% ` Luca Weiss
0 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-02-16 13:22 UTC (permalink / raw)
To: Marcel Holtmann, Johan Hedberg, Luiz Augusto von Dentz,
David S. Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni
Cc: ~postmarketos/upstreaming, linux-bluetooth, netdev, linux-kernel,
phone-devel, Luca Weiss
Add the various Bluetooth version identifiers found in the "Assigned
Numbers" document[0] from the Bluetooth SIG.
[0] https://www.bluetooth.com/specifications/assigned-numbers/
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
To be clear, I don't have a use case for these extra defines myself but
some time ago when working on Bluetooth I came across this and thought
it would be interesting to have the list complete. No other motives.
---
include/net/bluetooth/bluetooth.h | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/include/net/bluetooth/bluetooth.h b/include/net/bluetooth/bluetooth.h
index 7ffa8c192c3f..818eb142eda3 100644
--- a/include/net/bluetooth/bluetooth.h
+++ b/include/net/bluetooth/bluetooth.h
@@ -39,11 +39,20 @@
#endif
/* Bluetooth versions */
+#define BLUETOOTH_VER_1_0B 0
#define BLUETOOTH_VER_1_1 1
#define BLUETOOTH_VER_1_2 2
#define BLUETOOTH_VER_2_0 3
#define BLUETOOTH_VER_2_1 4
+#define BLUETOOTH_VER_3_0 5
#define BLUETOOTH_VER_4_0 6
+#define BLUETOOTH_VER_4_1 7
+#define BLUETOOTH_VER_4_2 8
+#define BLUETOOTH_VER_5_0 9
+#define BLUETOOTH_VER_5_1 10
+#define BLUETOOTH_VER_5_2 11
+#define BLUETOOTH_VER_5_3 12
+#define BLUETOOTH_VER_5_4 13
/* Reserv for core and drivers use */
#define BT_SKB_RESERVE 8
---
base-commit: 841c35169323cd833294798e58b9bf63fa4fa1de
change-id: 20240216-bluetooth-defines-b810ce543191
Best regards,
--
Luca Weiss <luca.weiss@fairphone.com>
^ permalink raw reply related [relevance 97%]
* [PATCH] arm64: dts: qcom: sm6350: Add interconnect for MDSS
@ 2024-02-16 13:11 99% Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-16 13:11 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel, Luca Weiss
Add the definition for the interconnect used in the display subsystem.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
arch/arm64/boot/dts/qcom/sm6350.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 5e8c8896ba66..ef4d847c4acf 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -1973,6 +1973,13 @@ mdss: display-subsystem@ae00000 {
interrupt-controller;
#interrupt-cells = <1>;
+ interconnects = <&mmss_noc MASTER_MDP_PORT0 QCOM_ICC_TAG_ALWAYS
+ &clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>,
+ <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
+ &config_noc SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ACTIVE_ONLY>;
+ interconnect-names = "mdp0-mem",
+ "cpu-cfg";
+
clocks = <&gcc GCC_DISP_AHB_CLK>,
<&gcc GCC_DISP_AXI_CLK>,
<&dispcc DISP_CC_MDSS_MDP_CLK>;
---
base-commit: 84c11540697ba996a7f55b16565945b52db3019e
change-id: 20240124-sm6350-interconnect-a9c2857a5594
Best regards,
--
Luca Weiss <luca.weiss@fairphone.com>
^ permalink raw reply related [relevance 99%]
* Re: [PATCH 2/2] arm64: dts: qcom: sm6350: Add Crypto Engine
@ 2024-02-16 10:46 99% ` Luca Weiss
0 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-02-16 10:46 UTC (permalink / raw)
To: Stephan Gerhold
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Thara Gopinath,
Herbert Xu, David S. Miller, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bhupesh Sharma, ~postmarketos/upstreaming,
phone-devel, linux-crypto, linux-arm-msm, devicetree,
linux-kernel
On Fri Jan 5, 2024 at 5:30 PM CET, Stephan Gerhold wrote:
> On Fri, Jan 05, 2024 at 05:15:44PM +0100, Luca Weiss wrote:
> > Add crypto engine (CE) and CE BAM related nodes and definitions for this
> > SoC.
> >
> > For reference:
> >
> > [ 2.297419] qcrypto 1dfa000.crypto: Crypto device found, version 5.5.1
> >
> > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
> > ---
> > arch/arm64/boot/dts/qcom/sm6350.dtsi | 31 +++++++++++++++++++++++++++++++
> > 1 file changed, 31 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
> > index 8fd6f4d03490..516aadbb16bb 100644
> > --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
> > @@ -1212,6 +1212,37 @@ ufs_mem_phy_lanes: phy@1d87400 {
> > };
> > };
> >
> > + cryptobam: dma-controller@1dc4000 {
> > + compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
> > + reg = <0 0x01dc4000 0 0x24000>;
> > + interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
> > + #dma-cells = <1>;
> > + qcom,ee = <0>;
> > + qcom,controlled-remotely;
> > + num-channels = <16>;
> > + qcom,num-ees = <4>;
> > + iommus = <&apps_smmu 0x432 0x0000>,
> > + <&apps_smmu 0x438 0x0001>,
> > + <&apps_smmu 0x43f 0x0000>,
> > + <&apps_smmu 0x426 0x0011>,
> > + <&apps_smmu 0x436 0x0011>;
>
> The last two lines look equivalent to me: 0x436 & ~0x0011 = 0x426.
I don't understand the IOMMU SID + mask really, but I think I've seen
somewhere before like here that TZ can be a bit picky with the SIDs?
https://lore.kernel.org/linux-arm-msm/opqdrmyj3y64nqqqmakjydn5rkspizufyeavm7ec7c7ufqz4wk@ey2a7bq3shfj/
https://lore.kernel.org/linux-arm-msm/11b5db69-49f5-4d7b-81c9-687d66a5cb0d@linaro.org/
I don't quite want to risk having some obscure use case breaking because
we cleaned up the dts ;)
But if you're more sure than me that it won't break, let me know!
>
> It's also a bit weird that the mask has one more digit than the stream
> ID. And ordered numerically (by stream ID, first number) it would be a
> bit easier to read. :-)
Sorting them is no problem, can do that for v2.
>
> Thanks,
> Stephan
^ permalink raw reply [relevance 99%]
* Re: [PATCH RFT] arm64: dts: qcom: sm8350: Reenable crypto & cryptobam
@ 2024-02-16 10:36 98% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-16 10:36 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Konrad Dybcio, Andy Gross, Bjorn Andersson, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bhupesh Sharma,
David Heidelberg, Stephan Gerhold, ~postmarketos/upstreaming,
phone-devel, Krzysztof Kozlowski, linux-arm-msm, devicetree,
linux-kernel
On Mon Jan 8, 2024 at 11:45 PM CET, Dmitry Baryshkov wrote:
> On Mon, 8 Jan 2024 at 16:23, Luca Weiss <luca.weiss@fairphone.com> wrote:
> >
> > On Mon Jan 8, 2024 at 3:18 PM CET, Konrad Dybcio wrote:
> > > On 8.01.2024 14:49, Luca Weiss wrote:
> > > > When num-channels and qcom,num-ees is not provided in devicetree, the
> > > > driver will try to read these values from the registers during probe but
> > > > this fails if the interconnect is not on and then crashes the system.
> > > >
> > > > So we can provide these properties in devicetree (queried after patching
> > > > BAM driver to enable the necessary interconnect) so we can probe
> > > > cryptobam without reading registers and then also use the QCE as
> > > > expected.
> > >
> > > This really feels a bit backwards.. Enable the resource to query the
> > > hardware for numbers, so that said resource can be enabled, but
> > > slightly later :/
> >
> > If you think adding interconnect support to driver and dtsi is better,
> > let me know.
>
> I'd say, adding the proper interconnect is a better option. Otherwise
> we just depend on the QCE itself to set up the vote for us.
Yes, currently we depend on that.
>
> >
> > Stephan (+CC) mentioned it should be okay like this *shrug*
> >
> > For the record, this is the same way I got the values for sc7280[0] and
> > sm6350[1].
> >
> > [0] https://lore.kernel.org/linux-arm-msm/20231229-sc7280-cryptobam-fixup-v1-1-bd8f68589b80@fairphone.com/
> > [1] https://lore.kernel.org/linux-arm-msm/20240105-sm6350-qce-v1-0-416e5c7319ac@fairphone.com/
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
> > index b46236235b7f..cd4dd9852d9e 100644
> > --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
> > @@ -1756,8 +1756,8 @@ cryptobam: dma-controller@1dc4000 {
> > qcom,controlled-remotely;
> > iommus = <&apps_smmu 0x594 0x0011>,
> > <&apps_smmu 0x596 0x0011>;
> > - /* FIXME: Probing BAM DMA causes some abort and system hang */
> > - status = "fail";
> > + interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>;
> > + interconnect-names = "memory";
> > };
> >
> > crypto: crypto@1dfa000 {
> > diff --git a/drivers/dma/qcom/bam_dma.c b/drivers/dma/qcom/bam_dma.c
> > index 5e7d332731e0..9de28f615639 100644
> > --- a/drivers/dma/qcom/bam_dma.c
> > +++ b/drivers/dma/qcom/bam_dma.c
> > @@ -40,6 +40,7 @@
> > #include <linux/circ_buf.h>
> > #include <linux/clk.h>
> > #include <linux/dmaengine.h>
> > +#include <linux/interconnect.h>
> > #include <linux/pm_runtime.h>
> >
> > #include "../dmaengine.h"
> > @@ -394,6 +395,7 @@ struct bam_device {
> > const struct reg_offset_data *layout;
> >
> > struct clk *bamclk;
> > + struct icc_path *mem_path;
> > int irq;
> >
> > /* dma start transaction tasklet */
> > @@ -1206,6 +1208,7 @@ static int bam_init(struct bam_device *bdev)
> > bdev->num_channels = val & BAM_NUM_PIPES_MASK;
> > }
> >
> > + printk(KERN_ERR "%s:%d DBG num_ees=%u num_channels=%u\n", __func__, __LINE__, bdev->num_ees, bdev->num_channels);
> > /* Reset BAM now if fully controlled locally */
> > if (!bdev->controlled_remotely && !bdev->powered_remotely)
> > bam_reset(bdev);
> > @@ -1298,6 +1301,14 @@ static int bam_dma_probe(struct platform_device *pdev)
> > return ret;
> > }
> >
> > + bdev->mem_path = devm_of_icc_get(bdev->dev, "memory");
> > + if (IS_ERR(bdev->mem_path))
> > + return PTR_ERR(bdev->mem_path);
> > +
> > + ret = icc_set_bw(bdev->mem_path, 1, 1);
>
> Probably this needs some more sensible value.
So downstream qcedev driver uses 384 for the interconnect. But this is
crypto-specific and probably different BAMs have different minimum
requirements?
#define CRYPTO_AVG_BW 384
#define CRYPTO_PEAK_BW 384
https://github.com/xiaomi-sm8450-kernel/android_kernel_platform_msm-kernel/blob/lineage-20/drivers/crypto/msm/qce.h#L57
Do you have any suggestion what to use here?
Also I'd assume that with pm_runtime suspended we'd need to clear the
votes in the driver so we don't keep the interconnect alive
unnecessarily?
If someone wants to pick up that patch, I'd be very glad since
especially for sm8350 this is just a drive-by, I don't care too much
about the SoC myself ;)
Regards
Luca
>
> > + if (ret)
> > + return ret;
> > +
> > ret = bam_init(bdev);
> > if (ret)
> > goto err_disable_clk;
> >
^ permalink raw reply [relevance 98%]
* [PATCH v3 4/4] arm64: dts: qcom: sm7225-fairphone-fp4: Enable display and GPU
2024-02-16 10:10 92% [PATCH v3 0/4] Add display support for Fairphone 4 Luca Weiss
` (2 preceding siblings ...)
2024-02-16 10:10 97% ` [PATCH v3 3/4] arm64: dts: qcom: sm6350: Remove "disabled" state of GMU Luca Weiss
@ 2024-02-16 10:10 90% ` Luca Weiss
3 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-16 10:10 UTC (permalink / raw)
To: Neil Armstrong, Jessica Zhang, Sam Ravnborg, David Airlie,
Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bjorn Andersson, Konrad Dybcio, Andy Gross
Cc: ~postmarketos/upstreaming, phone-devel, dri-devel, devicetree,
linux-kernel, linux-arm-msm, Luca Weiss
Add the description for the display panel found on this phone.
Unfortunately the LCDB module on PM6150L isn't yet supported upstream so
we need to use a dummy regulator-fixed in the meantime.
And with this done we can also enable the GPU and set the zap shader
firmware path.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
arch/arm64/boot/dts/qcom/sm6350.dtsi | 2 +-
arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts | 53 +++++++++++++++++++++++
2 files changed, 54 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 5a05f14669be..c8099b10ddc4 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -1328,7 +1328,7 @@ gpu: gpu@3d00000 {
status = "disabled";
- zap-shader {
+ gpu_zap_shader: zap-shader {
memory-region = <&pil_gpu_mem>;
};
diff --git a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts
index ade619805519..4e61da8078d1 100644
--- a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts
+++ b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts
@@ -68,6 +68,14 @@ key-volume-up {
};
};
+ /* Dummy regulator until PM6150L has LCDB VSP/VSN support */
+ lcdb_dummy: regulator-lcdb-dummy {
+ compatible = "regulator-fixed";
+ regulator-name = "lcdb_dummy";
+ regulator-min-microvolt = <5500000>;
+ regulator-max-microvolt = <5500000>;
+ };
+
reserved-memory {
/*
* The rmtfs memory region in downstream is 'dynamically allocated'
@@ -373,6 +381,14 @@ &gpi_dma1 {
status = "okay";
};
+&gpu {
+ status = "okay";
+};
+
+&gpu_zap_shader {
+ firmware-name = "qcom/sm7225/fairphone4/a615_zap.mbn";
+};
+
&i2c0 {
clock-frequency = <400000>;
status = "okay";
@@ -404,6 +420,43 @@ &ipa {
status = "okay";
};
+&mdss {
+ status = "okay";
+};
+
+&mdss_dsi0 {
+ vdda-supply = <&vreg_l22a>;
+ status = "okay";
+
+ panel@0 {
+ compatible = "djn,9a-3r063-1102b";
+ reg = <0>;
+
+ backlight = <&pm6150l_wled>;
+ reset-gpios = <&pm6150l_gpios 9 GPIO_ACTIVE_LOW>;
+
+ vdd1-supply = <&vreg_l1e>;
+ vsn-supply = <&lcdb_dummy>;
+ vsp-supply = <&lcdb_dummy>;
+
+ port {
+ panel_in: endpoint {
+ remote-endpoint = <&mdss_dsi0_out>;
+ };
+ };
+ };
+};
+
+&mdss_dsi0_out {
+ data-lanes = <0 1 2 3>;
+ remote-endpoint = <&panel_in>;
+};
+
+&mdss_dsi0_phy {
+ vdds-supply = <&vreg_l18a>;
+ status = "okay";
+};
+
&mpss {
firmware-name = "qcom/sm7225/fairphone4/modem.mdt";
status = "okay";
--
2.43.2
^ permalink raw reply related [relevance 90%]
* [PATCH v3 3/4] arm64: dts: qcom: sm6350: Remove "disabled" state of GMU
2024-02-16 10:10 92% [PATCH v3 0/4] Add display support for Fairphone 4 Luca Weiss
2024-02-16 10:10 92% ` [PATCH v3 1/4] dt-bindings: display: panel: Add Himax HX83112A Luca Weiss
2024-02-16 10:10 65% ` [PATCH v3 2/4] drm/panel: Add driver for DJN HX83112A LCD panel Luca Weiss
@ 2024-02-16 10:10 97% ` Luca Weiss
2024-02-16 10:10 90% ` [PATCH v3 4/4] arm64: dts: qcom: sm7225-fairphone-fp4: Enable display and GPU Luca Weiss
3 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-16 10:10 UTC (permalink / raw)
To: Neil Armstrong, Jessica Zhang, Sam Ravnborg, David Airlie,
Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bjorn Andersson, Konrad Dybcio, Andy Gross
Cc: ~postmarketos/upstreaming, phone-devel, dri-devel, devicetree,
linux-kernel, linux-arm-msm, Luca Weiss
The GMU won't probe without GPU being enabled, so we can remove the
disabled status so we don't have to explicitly enable the GMU in all the
devices that enable GPU.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
arch/arm64/boot/dts/qcom/sm6350.dtsi | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 43cffe8e1247..5a05f14669be 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -1439,8 +1439,6 @@ gmu: gmu@3d6a000 {
operating-points-v2 = <&gmu_opp_table>;
- status = "disabled";
-
gmu_opp_table: opp-table {
compatible = "operating-points-v2";
--
2.43.2
^ permalink raw reply related [relevance 97%]
* [PATCH v3 1/4] dt-bindings: display: panel: Add Himax HX83112A
2024-02-16 10:10 92% [PATCH v3 0/4] Add display support for Fairphone 4 Luca Weiss
@ 2024-02-16 10:10 92% ` Luca Weiss
2024-02-16 10:10 65% ` [PATCH v3 2/4] drm/panel: Add driver for DJN HX83112A LCD panel Luca Weiss
` (2 subsequent siblings)
3 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-16 10:10 UTC (permalink / raw)
To: Neil Armstrong, Jessica Zhang, Sam Ravnborg, David Airlie,
Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bjorn Andersson, Konrad Dybcio, Andy Gross
Cc: ~postmarketos/upstreaming, phone-devel, dri-devel, devicetree,
linux-kernel, linux-arm-msm, Luca Weiss, Krzysztof Kozlowski
Himax HX83112A is a display driver IC used to drive LCD DSI panels.
Describe it and the DJN 9A-3R063-1102B using it.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
.../bindings/display/panel/himax,hx83112a.yaml | 74 ++++++++++++++++++++++
1 file changed, 74 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/panel/himax,hx83112a.yaml b/Documentation/devicetree/bindings/display/panel/himax,hx83112a.yaml
new file mode 100644
index 000000000000..174661d13811
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/himax,hx83112a.yaml
@@ -0,0 +1,74 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/himax,hx83112a.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Himax HX83112A-based DSI display panels
+
+maintainers:
+ - Luca Weiss <luca.weiss@fairphone.com>
+
+description:
+ The Himax HX83112A is a generic DSI Panel IC used to control
+ LCD panels.
+
+allOf:
+ - $ref: panel-common.yaml#
+
+properties:
+ compatible:
+ contains:
+ const: djn,9a-3r063-1102b
+
+ vdd1-supply:
+ description: Digital voltage rail
+
+ vsn-supply:
+ description: Positive source voltage rail
+
+ vsp-supply:
+ description: Negative source voltage rail
+
+ reg: true
+ port: true
+
+required:
+ - compatible
+ - reg
+ - reset-gpios
+ - vdd1-supply
+ - vsn-supply
+ - vsp-supply
+ - port
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+
+ dsi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ panel@0 {
+ compatible = "djn,9a-3r063-1102b";
+ reg = <0>;
+
+ backlight = <&pm6150l_wled>;
+ reset-gpios = <&pm6150l_gpios 9 GPIO_ACTIVE_LOW>;
+
+ vdd1-supply = <&vreg_l1e>;
+ vsn-supply = <&pm6150l_lcdb_ncp>;
+ vsp-supply = <&pm6150l_lcdb_ldo>;
+
+ port {
+ panel_in_0: endpoint {
+ remote-endpoint = <&dsi0_out>;
+ };
+ };
+ };
+ };
+
+...
--
2.43.2
^ permalink raw reply related [relevance 92%]
* [PATCH v3 2/4] drm/panel: Add driver for DJN HX83112A LCD panel
2024-02-16 10:10 92% [PATCH v3 0/4] Add display support for Fairphone 4 Luca Weiss
2024-02-16 10:10 92% ` [PATCH v3 1/4] dt-bindings: display: panel: Add Himax HX83112A Luca Weiss
@ 2024-02-16 10:10 65% ` Luca Weiss
2024-02-16 10:10 97% ` [PATCH v3 3/4] arm64: dts: qcom: sm6350: Remove "disabled" state of GMU Luca Weiss
2024-02-16 10:10 90% ` [PATCH v3 4/4] arm64: dts: qcom: sm7225-fairphone-fp4: Enable display and GPU Luca Weiss
3 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-16 10:10 UTC (permalink / raw)
To: Neil Armstrong, Jessica Zhang, Sam Ravnborg, David Airlie,
Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bjorn Andersson, Konrad Dybcio, Andy Gross
Cc: ~postmarketos/upstreaming, phone-devel, dri-devel, devicetree,
linux-kernel, linux-arm-msm, Luca Weiss
Add support for the 2340x1080 LCD panel (DJN 9A-3R063-1102B) bundled
with a HX83112A driver IC, as found on the Fairphone 4 smartphone.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
drivers/gpu/drm/panel/Kconfig | 10 +
drivers/gpu/drm/panel/Makefile | 1 +
drivers/gpu/drm/panel/panel-himax-hx83112a.c | 372 +++++++++++++++++++++++++++
3 files changed, 383 insertions(+)
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 8f3783742208..7e25a4609682 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -162,6 +162,16 @@ config DRM_PANEL_FEIYANG_FY07024DI26A30D
Say Y if you want to enable support for panels based on the
Feiyang FY07024DI26A30-D MIPI-DSI interface.
+config DRM_PANEL_HIMAX_HX83112A
+ tristate "Himax HX83112A-based DSI panel"
+ depends on OF
+ depends on DRM_MIPI_DSI
+ depends on BACKLIGHT_CLASS_DEVICE
+ select DRM_KMS_HELPER
+ help
+ Say Y here if you want to enable support for Himax HX83112A-based
+ display panels, such as the one found in the Fairphone 4 smartphone.
+
config DRM_PANEL_HIMAX_HX8394
tristate "HIMAX HX8394 MIPI-DSI LCD panels"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index d94a644d0a6c..f3e40f24d516 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_DRM_PANEL_EBBG_FT8719) += panel-ebbg-ft8719.o
obj-$(CONFIG_DRM_PANEL_ELIDA_KD35T133) += panel-elida-kd35t133.o
obj-$(CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02) += panel-feixin-k101-im2ba02.o
obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) += panel-feiyang-fy07024di26a30d.o
+obj-$(CONFIG_DRM_PANEL_HIMAX_HX83112A) += panel-himax-hx83112a.o
obj-$(CONFIG_DRM_PANEL_HIMAX_HX8394) += panel-himax-hx8394.o
obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9341) += panel-ilitek-ili9341.o
diff --git a/drivers/gpu/drm/panel/panel-himax-hx83112a.c b/drivers/gpu/drm/panel/panel-himax-hx83112a.c
new file mode 100644
index 000000000000..466c27012abf
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-himax-hx83112a.c
@@ -0,0 +1,372 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Generated with linux-mdss-dsi-panel-driver-generator from vendor device tree.
+ * Copyright (c) 2024 Luca Weiss <luca.weiss@fairphone.com>
+ */
+
+#include <linux/delay.h>
+#include <linux/gpio/consumer.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/regulator/consumer.h>
+
+#include <drm/drm_mipi_dsi.h>
+#include <drm/drm_modes.h>
+#include <drm/drm_panel.h>
+#include <drm/drm_probe_helper.h>
+
+/* Manufacturer specific DSI commands */
+#define HX83112A_SETPOWER1 0xb1
+#define HX83112A_SETDISP 0xb2
+#define HX83112A_SETDRV 0xb4
+#define HX83112A_SETEXTC 0xb9
+#define HX83112A_SETBANK 0xbd
+#define HX83112A_SETPTBA 0xbf
+#define HX83112A_SETDGCLUT 0xc1
+#define HX83112A_SETTCON 0xc7
+#define HX83112A_SETCLOCK 0xcb
+#define HX83112A_SETPANEL 0xcc
+#define HX83112A_SETPOWER2 0xd2
+#define HX83112A_SETGIP0 0xd3
+#define HX83112A_SETGIP1 0xd5
+#define HX83112A_SETGIP2 0xd6
+#define HX83112A_SETGIP3 0xd8
+#define HX83112A_SETTP1 0xe7
+#define HX83112A_UNKNOWN1 0xe9
+
+struct hx83112a_panel {
+ struct drm_panel panel;
+ struct mipi_dsi_device *dsi;
+ struct regulator_bulk_data supplies[3];
+ struct gpio_desc *reset_gpio;
+};
+
+static inline struct hx83112a_panel *to_hx83112a_panel(struct drm_panel *panel)
+{
+ return container_of(panel, struct hx83112a_panel, panel);
+}
+
+static void hx83112a_reset(struct hx83112a_panel *ctx)
+{
+ gpiod_set_value_cansleep(ctx->reset_gpio, 0);
+ msleep(20);
+ gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+ msleep(20);
+ gpiod_set_value_cansleep(ctx->reset_gpio, 0);
+ msleep(50);
+}
+
+static int hx83112a_on(struct hx83112a_panel *ctx)
+{
+ struct mipi_dsi_device *dsi = ctx->dsi;
+ struct device *dev = &dsi->dev;
+ int ret;
+
+ dsi->mode_flags |= MIPI_DSI_MODE_LPM;
+
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETEXTC, 0x83, 0x11, 0x2a);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETPOWER1,
+ 0x08, 0x28, 0x28, 0x83, 0x83, 0x4c, 0x4f, 0x33);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETDISP,
+ 0x00, 0x02, 0x00, 0x90, 0x24, 0x00, 0x08, 0x19,
+ 0xea, 0x11, 0x11, 0x00, 0x11, 0xa3);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETDRV,
+ 0x58, 0x68, 0x58, 0x68, 0x0f, 0xef, 0x0b, 0xc0,
+ 0x0b, 0xc0, 0x0b, 0xc0, 0x00, 0xff, 0x00, 0xff,
+ 0x00, 0x00, 0x14, 0x15, 0x00, 0x29, 0x11, 0x07,
+ 0x12, 0x00, 0x29);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETBANK, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETDRV,
+ 0x00, 0x12, 0x12, 0x11, 0x88, 0x12, 0x12, 0x00,
+ 0x53);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETBANK, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETBANK, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETDGCLUT,
+ 0xff, 0xfe, 0xfb, 0xf8, 0xf4, 0xf1, 0xed, 0xe6,
+ 0xe2, 0xde, 0xdb, 0xd6, 0xd3, 0xcf, 0xca, 0xc6,
+ 0xc2, 0xbe, 0xb9, 0xb0, 0xa7, 0x9e, 0x96, 0x8d,
+ 0x84, 0x7c, 0x74, 0x6b, 0x62, 0x5a, 0x51, 0x49,
+ 0x41, 0x39, 0x31, 0x29, 0x21, 0x19, 0x12, 0x0a,
+ 0x06, 0x05, 0x02, 0x01, 0x00, 0x00, 0xc9, 0xb3,
+ 0x08, 0x0e, 0xf2, 0xe1, 0x59, 0xf4, 0x22, 0xad,
+ 0x40);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETBANK, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETDGCLUT,
+ 0xff, 0xfe, 0xfb, 0xf8, 0xf4, 0xf1, 0xed, 0xe6,
+ 0xe2, 0xde, 0xdb, 0xd6, 0xd3, 0xcf, 0xca, 0xc6,
+ 0xc2, 0xbe, 0xb9, 0xb0, 0xa7, 0x9e, 0x96, 0x8d,
+ 0x84, 0x7c, 0x74, 0x6b, 0x62, 0x5a, 0x51, 0x49,
+ 0x41, 0x39, 0x31, 0x29, 0x21, 0x19, 0x12, 0x0a,
+ 0x06, 0x05, 0x02, 0x01, 0x00, 0x00, 0xc9, 0xb3,
+ 0x08, 0x0e, 0xf2, 0xe1, 0x59, 0xf4, 0x22, 0xad,
+ 0x40);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETBANK, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETDGCLUT,
+ 0xff, 0xfe, 0xfb, 0xf8, 0xf4, 0xf1, 0xed, 0xe6,
+ 0xe2, 0xde, 0xdb, 0xd6, 0xd3, 0xcf, 0xca, 0xc6,
+ 0xc2, 0xbe, 0xb9, 0xb0, 0xa7, 0x9e, 0x96, 0x8d,
+ 0x84, 0x7c, 0x74, 0x6b, 0x62, 0x5a, 0x51, 0x49,
+ 0x41, 0x39, 0x31, 0x29, 0x21, 0x19, 0x12, 0x0a,
+ 0x06, 0x05, 0x02, 0x01, 0x00, 0x00, 0xc9, 0xb3,
+ 0x08, 0x0e, 0xf2, 0xe1, 0x59, 0xf4, 0x22, 0xad,
+ 0x40);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETBANK, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETDGCLUT, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETTCON,
+ 0x70, 0x00, 0x04, 0xe0, 0x33, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETPANEL, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETPOWER2, 0x2b, 0x2b);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETGIP0,
+ 0x80, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x08,
+ 0x08, 0x03, 0x03, 0x22, 0x18, 0x07, 0x07, 0x07,
+ 0x07, 0x32, 0x10, 0x06, 0x00, 0x06, 0x32, 0x10,
+ 0x07, 0x00, 0x07, 0x32, 0x19, 0x31, 0x09, 0x31,
+ 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x08,
+ 0x09, 0x30, 0x00, 0x00, 0x00, 0x06, 0x0d, 0x00,
+ 0x0f);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETBANK, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETGIP0,
+ 0x00, 0x00, 0x19, 0x10, 0x00, 0x0a, 0x00, 0x81);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETBANK, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETGIP1,
+ 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+ 0xc0, 0xc0, 0x18, 0x18, 0x19, 0x19, 0x18, 0x18,
+ 0x40, 0x40, 0x18, 0x18, 0x18, 0x18, 0x3f, 0x3f,
+ 0x28, 0x28, 0x24, 0x24, 0x02, 0x03, 0x02, 0x03,
+ 0x00, 0x01, 0x00, 0x01, 0x31, 0x31, 0x31, 0x31,
+ 0x30, 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETGIP2,
+ 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+ 0x40, 0x40, 0x18, 0x18, 0x18, 0x18, 0x19, 0x19,
+ 0x40, 0x40, 0x18, 0x18, 0x18, 0x18, 0x3f, 0x3f,
+ 0x24, 0x24, 0x28, 0x28, 0x01, 0x00, 0x01, 0x00,
+ 0x03, 0x02, 0x03, 0x02, 0x31, 0x31, 0x31, 0x31,
+ 0x30, 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETGIP3,
+ 0xaa, 0xea, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xea,
+ 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xea, 0xab, 0xaa,
+ 0xaa, 0xaa, 0xaa, 0xea, 0xab, 0xaa, 0xaa, 0xaa);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETBANK, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETGIP3,
+ 0xaa, 0x2e, 0x28, 0x00, 0x00, 0x00, 0xaa, 0x2e,
+ 0x28, 0x00, 0x00, 0x00, 0xaa, 0xee, 0xaa, 0xaa,
+ 0xaa, 0xaa, 0xaa, 0xee, 0xaa, 0xaa, 0xaa, 0xaa);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETBANK, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETGIP3,
+ 0xaa, 0xff, 0xff, 0xff, 0xff, 0xff, 0xaa, 0xff,
+ 0xff, 0xff, 0xff, 0xff);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETBANK, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETGIP3,
+ 0xaa, 0xaa, 0xea, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
+ 0xea, 0xaa, 0xaa, 0xaa, 0xaa, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xaa, 0xff, 0xff, 0xff, 0xff, 0xff);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETBANK, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETTP1,
+ 0x0e, 0x0e, 0x1e, 0x65, 0x1c, 0x65, 0x00, 0x50,
+ 0x20, 0x20, 0x00, 0x00, 0x02, 0x02, 0x02, 0x05,
+ 0x14, 0x14, 0x32, 0xb9, 0x23, 0xb9, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETBANK, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETTP1,
+ 0x02, 0x00, 0xa8, 0x01, 0xa8, 0x0d, 0xa4, 0x0e);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETBANK, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETTP1,
+ 0x00, 0x00, 0x08, 0x00, 0x01, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00,
+ 0x00, 0x00, 0x00, 0x02, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETBANK, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_UNKNOWN1, 0xc3);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETCLOCK, 0xd1, 0xd6);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_UNKNOWN1, 0x3f);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_UNKNOWN1, 0xc6);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_SETPTBA, 0x37);
+ mipi_dsi_dcs_write_seq(dsi, HX83112A_UNKNOWN1, 0x3f);
+
+ ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
+ if (ret < 0) {
+ dev_err(dev, "Failed to exit sleep mode: %d\n", ret);
+ return ret;
+ }
+ msleep(150);
+
+ ret = mipi_dsi_dcs_set_display_on(dsi);
+ if (ret < 0) {
+ dev_err(dev, "Failed to set display on: %d\n", ret);
+ return ret;
+ }
+ msleep(50);
+
+ return 0;
+}
+
+static int hx83112a_disable(struct drm_panel *panel)
+{
+ struct hx83112a_panel *ctx = to_hx83112a_panel(panel);
+ struct mipi_dsi_device *dsi = ctx->dsi;
+ struct device *dev = &dsi->dev;
+ int ret;
+
+ dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
+
+ ret = mipi_dsi_dcs_set_display_off(dsi);
+ if (ret < 0) {
+ dev_err(dev, "Failed to set display off: %d\n", ret);
+ return ret;
+ }
+ msleep(20);
+
+ ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
+ if (ret < 0) {
+ dev_err(dev, "Failed to enter sleep mode: %d\n", ret);
+ return ret;
+ }
+ msleep(120);
+
+ return 0;
+}
+
+static int hx83112a_prepare(struct drm_panel *panel)
+{
+ struct hx83112a_panel *ctx = to_hx83112a_panel(panel);
+ struct device *dev = &ctx->dsi->dev;
+ int ret;
+
+ ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
+ if (ret < 0) {
+ dev_err(dev, "Failed to enable regulators: %d\n", ret);
+ return ret;
+ }
+
+ hx83112a_reset(ctx);
+
+ ret = hx83112a_on(ctx);
+ if (ret < 0) {
+ dev_err(dev, "Failed to initialize panel: %d\n", ret);
+ gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+ regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int hx83112a_unprepare(struct drm_panel *panel)
+{
+ struct hx83112a_panel *ctx = to_hx83112a_panel(panel);
+
+ gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+ regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
+
+ return 0;
+}
+
+static const struct drm_display_mode hx83112a_mode = {
+ .clock = (1080 + 28 + 8 + 8) * (2340 + 27 + 5 + 5) * 60 / 1000,
+ .hdisplay = 1080,
+ .hsync_start = 1080 + 28,
+ .hsync_end = 1080 + 28 + 8,
+ .htotal = 1080 + 28 + 8 + 8,
+ .vdisplay = 2340,
+ .vsync_start = 2340 + 27,
+ .vsync_end = 2340 + 27 + 5,
+ .vtotal = 2340 + 27 + 5 + 5,
+ .width_mm = 67,
+ .height_mm = 145,
+ .type = DRM_MODE_TYPE_DRIVER,
+};
+
+static int hx83112a_get_modes(struct drm_panel *panel,
+ struct drm_connector *connector)
+{
+ return drm_connector_helper_get_modes_fixed(connector, &hx83112a_mode);
+}
+
+static const struct drm_panel_funcs hx83112a_panel_funcs = {
+ .prepare = hx83112a_prepare,
+ .unprepare = hx83112a_unprepare,
+ .disable = hx83112a_disable,
+ .get_modes = hx83112a_get_modes,
+};
+
+static int hx83112a_probe(struct mipi_dsi_device *dsi)
+{
+ struct device *dev = &dsi->dev;
+ struct hx83112a_panel *ctx;
+ int ret;
+
+ ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
+ if (!ctx)
+ return -ENOMEM;
+
+ ctx->supplies[0].supply = "vdd1";
+ ctx->supplies[1].supply = "vsn";
+ ctx->supplies[2].supply = "vsp";
+ ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(ctx->supplies),
+ ctx->supplies);
+ if (ret < 0)
+ return dev_err_probe(dev, ret, "Failed to get regulators\n");
+
+ ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
+ if (IS_ERR(ctx->reset_gpio))
+ return dev_err_probe(dev, PTR_ERR(ctx->reset_gpio),
+ "Failed to get reset-gpios\n");
+
+ ctx->dsi = dsi;
+ mipi_dsi_set_drvdata(dsi, ctx);
+
+ dsi->lanes = 4;
+ dsi->format = MIPI_DSI_FMT_RGB888;
+ dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+ MIPI_DSI_MODE_VIDEO_HSE |
+ MIPI_DSI_CLOCK_NON_CONTINUOUS;
+
+ drm_panel_init(&ctx->panel, dev, &hx83112a_panel_funcs,
+ DRM_MODE_CONNECTOR_DSI);
+ ctx->panel.prepare_prev_first = true;
+
+ ret = drm_panel_of_backlight(&ctx->panel);
+ if (ret)
+ return dev_err_probe(dev, ret, "Failed to get backlight\n");
+
+ drm_panel_add(&ctx->panel);
+
+ ret = mipi_dsi_attach(dsi);
+ if (ret < 0) {
+ dev_err_probe(dev, ret, "Failed to attach to DSI host\n");
+ drm_panel_remove(&ctx->panel);
+ return ret;
+ }
+
+ return 0;
+}
+
+static void hx83112a_remove(struct mipi_dsi_device *dsi)
+{
+ struct hx83112a_panel *ctx = mipi_dsi_get_drvdata(dsi);
+ int ret;
+
+ ret = mipi_dsi_detach(dsi);
+ if (ret < 0)
+ dev_err(&dsi->dev, "Failed to detach from DSI host: %d\n", ret);
+
+ drm_panel_remove(&ctx->panel);
+}
+
+static const struct of_device_id hx83112a_of_match[] = {
+ { .compatible = "djn,9a-3r063-1102b" },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, hx83112a_of_match);
+
+static struct mipi_dsi_driver hx83112a_driver = {
+ .probe = hx83112a_probe,
+ .remove = hx83112a_remove,
+ .driver = {
+ .name = "panel-himax-hx83112a",
+ .of_match_table = hx83112a_of_match,
+ },
+};
+module_mipi_dsi_driver(hx83112a_driver);
+
+MODULE_DESCRIPTION("DRM driver for hx83112a-equipped DSI panels");
+MODULE_LICENSE("GPL");
--
2.43.2
^ permalink raw reply related [relevance 65%]
* [PATCH v3 0/4] Add display support for Fairphone 4
@ 2024-02-16 10:10 92% Luca Weiss
2024-02-16 10:10 92% ` [PATCH v3 1/4] dt-bindings: display: panel: Add Himax HX83112A Luca Weiss
` (3 more replies)
0 siblings, 4 replies; 200+ results
From: Luca Weiss @ 2024-02-16 10:10 UTC (permalink / raw)
To: Neil Armstrong, Jessica Zhang, Sam Ravnborg, David Airlie,
Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bjorn Andersson, Konrad Dybcio, Andy Gross
Cc: ~postmarketos/upstreaming, phone-devel, dri-devel, devicetree,
linux-kernel, linux-arm-msm, Luca Weiss, Krzysztof Kozlowski
Introduce the bindings and panel driver for the LCD panel with the model
number 9A-3R063-1102B from DJN which is using the HX83112A driver IC. It
is used on the Fairphone 4 smartphone.
Then we can add the panel to the device dts and also enable the GPU.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
Changes in v3:
- Update compatible to djn,9a-3r063-1102b
- Add defines for manufacturer-specific DSI commands
- Pick up tags
- Link to v2: https://lore.kernel.org/r/20240110-fp4-panel-v2-0-8ad11174f65b@fairphone.com
Changes in v2:
- Driver:
- Drop "bool prepared" from driver (Dmitry)
- Use drm_connector_helper_get_modes_fixed (Dmitry)
- Use dev_err_probe in error path (Dmitry)
- Fix width/height variables (myself)
- Dts:
- Don't drop simple-framebuffer (Konrad)
- Drop disablement of gmu in dtsi (Konrad)
- Set zap shader path (myself)
- Pick up tags
- Link to v1: https://lore.kernel.org/r/20240105-fp4-panel-v1-0-1afbabc55276@fairphone.com
---
Luca Weiss (4):
dt-bindings: display: panel: Add Himax HX83112A
drm/panel: Add driver for DJN HX83112A LCD panel
arm64: dts: qcom: sm6350: Remove "disabled" state of GMU
arm64: dts: qcom: sm7225-fairphone-fp4: Enable display and GPU
.../bindings/display/panel/himax,hx83112a.yaml | 74 ++++
arch/arm64/boot/dts/qcom/sm6350.dtsi | 4 +-
arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts | 53 +++
drivers/gpu/drm/panel/Kconfig | 10 +
drivers/gpu/drm/panel/Makefile | 1 +
drivers/gpu/drm/panel/panel-himax-hx83112a.c | 372 +++++++++++++++++++++
6 files changed, 511 insertions(+), 3 deletions(-)
---
base-commit: 91f11e5814cfbad83ee22fbcf96b0eb41302d889
change-id: 20240105-fp4-panel-50aba8536a0a
Best regards,
--
Luca Weiss <luca.weiss@fairphone.com>
^ permalink raw reply [relevance 92%]
* Re: [PATCH v2 2/2] ARM: dts: qcom: Add support for Samsung Galaxy Tab 4 8.0 Wi-Fi
@ 2024-02-15 17:55 88% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-15 17:55 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, linux-arm-msm, devicetree, linux-kernel,
Bryant Mairs
Cc: ~postmarketos/upstreaming, phone-devel, Linus Walleij
On Donnerstag, 15. Februar 2024 18:19:49 CET Bryant Mairs wrote:
> Add support for this tablet based on the MSM8226 SoC, codenamed
> "milletwifi".
>
> Signed-off-by: Bryant Mairs <bryant@mai.rs>
> Acked-by: Linus Walleij <linus.walleij@linaro.org>
afaik Acked-by should come before Signed-off-by (in other words your S-o-b
should be the last tag when you send patches)
> ---
> arch/arm/boot/dts/qcom/Makefile | 1 +
> .../qcom/qcom-apq8026-samsung-milletwifi.dts | 568 ++++++++++++++++++
> 2 files changed, 569 insertions(+)
> create mode 100644
> arch/arm/boot/dts/qcom/qcom-apq8026-samsung-milletwifi.dts
>
> diff --git a/arch/arm/boot/dts/qcom/Makefile
> b/arch/arm/boot/dts/qcom/Makefile index 9cc1e14e6cd0..730d98c2c715 100644
> --- a/arch/arm/boot/dts/qcom/Makefile
> +++ b/arch/arm/boot/dts/qcom/Makefile
> @@ -5,6 +5,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
> qcom-apq8026-huawei-sturgeon.dtb \
> qcom-apq8026-lg-lenok.dtb \
> qcom-apq8026-samsung-matisse-wifi.dtb \
> + qcom-apq8026-samsung-milletwifi.dtb \
> qcom-apq8060-dragonboard.dtb \
> qcom-apq8064-cm-qs600.dtb \
> qcom-apq8064-ifc6410.dtb \
> diff --git a/arch/arm/boot/dts/qcom/qcom-apq8026-samsung-milletwifi.dts
> b/arch/arm/boot/dts/qcom/qcom-apq8026-samsung-milletwifi.dts new file mode
> 100644
> index 000000000000..a9c38bc8aa01
> --- /dev/null
> +++ b/arch/arm/boot/dts/qcom/qcom-apq8026-samsung-milletwifi.dts
> @@ -0,0 +1,568 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2022, Matti Lehtimäki <matti.lehtimaki@gmail.com>
> + * Copyright (c) 2023, Bryant Mairs <bryant@mai.rs>
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/power/summit,smb347-charger.h>
> +#include "qcom-msm8226.dtsi"
> +#include "pm8226.dtsi"
> +
> +/delete-node/ &adsp_region;
> +/delete-node/ &smem_region;
> +
> +/ {
> + model = "Samsung Galaxy Tab 4 8.0 Wi-Fi";
> + compatible = "samsung,milletwifi", "qcom,apq8026";
> + chassis-type = "tablet";
> +
> + aliases {
> + display0 = &framebuffer0;
> + mmc0 = &sdhc_1; /* SDC1 eMMC slot */
> + mmc1 = &sdhc_2; /* SDC2 SD card slot */
> + };
> +
> + chosen {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + stdout-path = "display0";
> +
> + framebuffer0: framebuffer@3200000 {
> + compatible = "simple-framebuffer";
> + reg = <0x03200000 0x800000>;
> + width = <800>;
> + height = <1280>;
> + stride = <(800 * 3)>;
> + format = "r8g8b8";
> + };
> + };
> +
> + gpio-hall-sensor {
> + compatible = "gpio-keys";
> +
> + event-hall-sensor {
> + label = "Cover";
> + gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
> + linux,input-type = <EV_SW>;
> + linux,code = <SW_LID>;
> + debounce-interval = <15>;
> + linux,can-disable;
> + wakeup-source;
> + };
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> + autorepeat;
> +
> + key-home {
> + label = "Home";
> + gpios = <&tlmm 108 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_HOMEPAGE>;
> + debounce-interval = <15>;
> + };
> +
> + key-volume-down {
> + label = "Volume Down";
> + gpios = <&tlmm 107 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_VOLUMEDOWN>;
> + debounce-interval = <15>;
> + };
> +
> + key-volume-up {
> + label = "Volume Up";
> + gpios = <&tlmm 106 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_VOLUMEUP>;
> + debounce-interval = <15>;
> + };
> + };
> +
> + i2c-backlight {
> + compatible = "i2c-gpio";
> + sda-gpios = <&tlmm 20 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
> + scl-gpios = <&tlmm 21 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
> +
> + pinctrl-0 = <&backlight_i2c_default_state>;
> + pinctrl-names = "default";
> +
> + i2c-gpio,delay-us = <4>;
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + backlight@2c {
> + compatible = "ti,lp8556";
> + reg = <0x2c>;
> + enable-supply = <®_backlight_vddio>;
> +
> + dev-ctrl = /bits/ 8 <0x80>;
> + init-brt = /bits/ 8 <0x3f>;
> +
> + /*
> + * Change transition duration: 200ms, Change
transition strength: heavy,
> + * PWM hysteresis: 1-bit w/ 8-bit resolution
> + */
> + rom-a3h {
> + rom-addr = /bits/ 8 <0xa3>;
> + rom-val = /bits/ 8 <0x5e>;
> + };
> +
> + /*
> + * PWM phase configuration: 3-phase/3 drivers
(0, 120deg, 240deg, -, -,
> -), + * PWM frequency: 9616Hz (10-bit)
> + */
> + rom-a5h {
> + rom-addr = /bits/ 8 <0xa5>;
> + rom-val = /bits/ 8 <0x34>;
> + };
> +
> + /* Enable LED drivers 2 & 3, Boot inductor
current limit: 1.5A/2.6A */
> + rom-a7h {
> + rom-addr = /bits/ 8 <0xa7>;
> + rom-val = /bits/ 8 <0xfa>;
> + };
> + };
> + };
> +
> + reg_backlight_vddio: regulator-backlight-vddio {
> + compatible = "regulator-fixed";
> + regulator-name = "backlight_vddio";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +
> + gpio = <&tlmm 74 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&backlight_vddio_default_state>;
Use this order:
pinctrl-0
pinctrl-names
Also applies a few more times below.
> + };
> +
> + reg_tsp_1p8v: regulator-tsp-1p8v {
> + compatible = "regulator-fixed";
> + regulator-name = "tsp_1p8v";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +
> + gpio = <&tlmm 114 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&tsp_en1_default_state>;
> + };
> +
> + reg_tsp_3p3v: regulator-tsp-3p3v {
> + compatible = "regulator-fixed";
> + regulator-name = "tsp_3p3v";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + gpio = <&tlmm 31 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&tsp_en_default_state>;
> + };
> +
> + reserved-memory {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + framebuffer@3200000 {
> + reg = <0x03200000 0x800000>;
> + no-map;
> + };
> +
> + mpss_region: mpss@8400000 {
> + reg = <0x08400000 0x1f00000>;
> + no-map;
> + };
> +
> + mba_region: mba@a300000 {
> + reg = <0x0a300000 0x100000>;
> + no-map;
> + };
> +
> + reserved@cb00000 {
> + reg = <0x0cb00000 0x700000>;
> + no-map;
> + };
> +
> + wcnss_region: wcnss@d200000 {
> + reg = <0x0d200000 0x700000>;
> + no-map;
> + };
> +
> + adsp_region: adsp@d900000 {
> + reg = <0x0d900000 0x1800000>;
> + no-map;
> + };
> +
> + venus@f100000 {
> + reg = <0x0f100000 0x500000>;
> + no-map;
> + };
> +
> + smem_region: smem@fa00000 {
> + reg = <0x0fa00000 0x100000>;
> + no-map;
> + };
> +
> + reserved@fb00000 {
> + reg = <0x0fb00000 0x260000>;
> + no-map;
> + };
> +
> + rfsa@fd60000 {
> + reg = <0x0fd60000 0x20000>;
> + no-map;
> + };
> +
> + rmtfs@fd80000 {
> + compatible = "qcom,rmtfs-mem";
> + reg = <0x0fd80000 0x180000>;
> + no-map;
> +
> + qcom,client-id = <1>;
> + };
> + };
> +};
> +
> +&blsp1_i2c2 {
> + status = "okay";
> +
> + accelerometer@1d {
> + compatible = "st,lis2hh12";
> + reg = <0x1d>;
> +
> + interrupts-extended = <&tlmm 54 IRQ_TYPE_LEVEL_HIGH>;
> +
> + pinctrl-0 = <&accel_int_default_state>;
> + pinctrl-names = "default";
> +
> + st,drdy-int-pin = <1>;
This should move lower in this node if I read the style guide correctly :)
"Vendor-specific properties"
https://www.kernel.org/doc/html/next/devicetree/bindings/dts-coding-style.html#order-of-properties-in-device-node
Rest looks fine, so with that fixed you can add my:
Reviewed-by: Luca Weiss <luca@z3ntu.xyz>
> +
> + vdd-supply = <&pm8226_l19>;
> + vddio-supply = <&pm8226_lvs1>;
> +
> + mount-matrix = "0", "1", "0",
> + "-1", "0", "0",
> + "0", "0", "1";
> + };
> +};
> +
> +&blsp1_i2c3 {
> + status = "okay";
> +
> + charger@6a {
> + compatible = "summit,smb358";
> + reg = <0x6a>;
> +
> + interrupts-extended = <&tlmm 115 IRQ_TYPE_EDGE_FALLING>;
> +
> + pinctrl-0 = <&charger_int_default_state>;
> + pinctrl-names = "default";
> +
> + summit,enable-usb-charging;
> + summit,enable-charge-control = <SMB3XX_CHG_ENABLE_SW>;
> + summit,fast-voltage-threshold-microvolt = <3000000>;
> + summit,chip-temperature-threshold-celsius = <130>;
> + summit,usb-current-limit-microamp = <1500000>;
> + };
> +};
> +
> +&blsp1_i2c4 {
> + status = "okay";
> +
> + muic: usb-switch@25 {
> + compatible = "siliconmitus,sm5502-muic";
> + reg = <0x25>;
> +
> + interrupts-extended = <&tlmm 67 IRQ_TYPE_EDGE_FALLING>;
> +
> + pinctrl-0 = <&muic_int_default_state>;
> + pinctrl-names = "default";
> + };
> +};
> +
> +&blsp1_i2c5 {
> + status = "okay";
> +
> + touchscreen@48 {
> + compatible = "melfas,mms252", "melfas,mms114";
> + reg = <0x48>;
> + interrupts-extended = <&tlmm 17 IRQ_TYPE_EDGE_FALLING>;
> + touchscreen-size-x = <800>;
> + touchscreen-size-y = <1280>;
> + avdd-supply = <®_tsp_3p3v>;
> + vdd-supply = <®_tsp_1p8v>;
> + linux,keycodes = <KEY_APPSELECT KEY_BACK>;
> +
> + pinctrl-0 = <&tsp_int_rst_default_state>;
> + pinctrl-names = "default";
> + };
> +};
> +
> +&rpm_requests {
> + regulators {
> + compatible = "qcom,rpm-pm8226-regulators";
> +
> + pm8226_s3: s3 {
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1300000>;
> + };
> +
> + pm8226_s4: s4 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + };
> +
> + pm8226_s5: s5 {
> + regulator-min-microvolt = <1150000>;
> + regulator-max-microvolt = <1150000>;
> + };
> +
> + pm8226_l1: l1 {
> + regulator-min-microvolt = <1225000>;
> + regulator-max-microvolt = <1225000>;
> + };
> +
> + pm8226_l2: l2 {
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + };
> +
> + pm8226_l3: l3 {
> + regulator-min-microvolt = <750000>;
> + regulator-max-microvolt = <1337500>;
> + regulator-always-on;
> + };
> +
> + pm8226_l4: l4 {
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + };
> +
> + pm8226_l5: l5 {
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + };
> +
> + pm8226_l6: l6 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + };
> +
> + pm8226_l7: l7 {
> + regulator-min-microvolt = <1850000>;
> + regulator-max-microvolt = <1850000>;
> + };
> +
> + pm8226_l8: l8 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + };
> +
> + pm8226_l9: l9 {
> + regulator-min-microvolt = <2050000>;
> + regulator-max-microvolt = <2050000>;
> + };
> +
> + pm8226_l10: l10 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + };
> +
> + pm8226_l12: l12 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + };
> +
> + pm8226_l14: l14 {
> + regulator-min-microvolt = <2750000>;
> + regulator-max-microvolt = <2750000>;
> + };
> +
> + pm8226_l15: l15 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + };
> +
> + pm8226_l16: l16 {
> + regulator-min-microvolt = <3000000>;
> + regulator-max-microvolt = <3350000>;
> + };
> +
> + pm8226_l17: l17 {
> + regulator-min-microvolt = <2950000>;
> + regulator-max-microvolt = <2950000>;
> +
> + regulator-system-load = <200000>;
> + regulator-allow-set-load;
> + regulator-always-on;
> + };
> +
> + pm8226_l18: l18 {
> + regulator-min-microvolt = <2950000>;
> + regulator-max-microvolt = <2950000>;
> + };
> +
> + pm8226_l19: l19 {
> + regulator-min-microvolt = <2850000>;
> + regulator-max-microvolt = <3000000>;
> + };
> +
> + pm8226_l20: l20 {
> + regulator-min-microvolt = <3075000>;
> + regulator-max-microvolt = <3075000>;
> + };
> +
> + pm8226_l21: l21 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <2950000>;
> + };
> +
> + pm8226_l22: l22 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3000000>;
> + };
> +
> + pm8226_l23: l23 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + };
> +
> + pm8226_l24: l24 {
> + regulator-min-microvolt = <1300000>;
> + regulator-max-microvolt = <1350000>;
> + };
> +
> + pm8226_l25: l25 {
> + regulator-min-microvolt = <1775000>;
> + regulator-max-microvolt = <2125000>;
> + };
> +
> + pm8226_l26: l26 {
> + regulator-min-microvolt = <1225000>;
> + regulator-max-microvolt = <1300000>;
> + };
> +
> + pm8226_l27: l27 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + };
> +
> + pm8226_l28: l28 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <2950000>;
> + };
> +
> + pm8226_lvs1: lvs1 {};
> + };
> +};
> +
> +&sdhc_1 {
> + vmmc-supply = <&pm8226_l17>;
> + vqmmc-supply = <&pm8226_l6>;
> +
> + bus-width = <8>;
> + non-removable;
> +
> + status = "okay";
> +};
> +
> +&sdhc_2 {
> + vmmc-supply = <&pm8226_l18>;
> + vqmmc-supply = <&pm8226_l21>;
> +
> + bus-width = <4>;
> + cd-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
> +
> + pinctrl-0 = <&sdhc2_default_state>, <&sdc2_cd_default_state>;
> + pinctrl-names = "default";
> +
> + status = "okay";
> +};
> +
> +&tlmm {
> + accel_int_default_state: accel-int-default-state {
> + pins = "gpio54";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-disable;
> + };
> +
> + backlight_i2c_default_state: backlight-i2c-default-state {
> + pins = "gpio20", "gpio21";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-disable;
> + };
> +
> + backlight_vddio_default_state: backlight-vddio-default-state {
> + pins = "gpio74";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-disable;
> + };
> +
> + charger_int_default_state: charger-int-default-state {
> + pins = "gpio115";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-disable;
> + };
> +
> + muic_int_default_state: muic-int-default-state {
> + pins = "gpio67";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-disable;
> + };
> +
> + sdc2_cd_default_state: sdc2-cd-default-state {
> + pins = "gpio38";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-disable;
> + };
> +
> + tsp_en_default_state: tsp-en-default-state {
> + pins = "gpio31";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-disable;
> + };
> +
> + tsp_en1_default_state: tsp-en1-default-state {
> + pins = "gpio114";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-disable;
> + };
> +
> + tsp_int_rst_default_state: tsp-int-rst-default-state {
> + pins = "gpio17";
> + function = "gpio";
> + drive-strength = <10>;
> + bias-pull-up;
> + };
> +};
> +
> +&usb {
> + extcon = <&muic>, <&muic>;
> + status = "okay";
> +};
> +
> +&usb_hs_phy {
> + extcon = <&muic>;
> + v1p8-supply = <&pm8226_l10>;
> + v3p3-supply = <&pm8226_l20>;
> +};
^ permalink raw reply [relevance 88%]
* [PATCH v2] ARM: dts: qcom: msm8226: Add watchdog node
@ 2024-02-14 21:46 84% Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-14 21:46 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Andy Gross,
Bjorn Andersson, Konrad Dybcio, Wim Van Sebroeck, Guenter Roeck,
Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Sai Prakash Ranjan
Cc: linux-arm-msm, linux-watchdog, devicetree, linux-kernel,
Matti Lehtimäki, Luca Weiss
From: Matti Lehtimäki <matti.lehtimaki@gmail.com>
Add watchdog for MSM8226 platform.
Signed-off-by: Matti Lehtimäki <matti.lehtimaki@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Changes in v2:
- Rebase on qcom for-next
- Pick up tags
- Link to v1: https://lore.kernel.org/r/20231011-msm8226-msm8974-watchdog-v1-0-2c472818fbce@z3ntu.xyz
---
arch/arm/boot/dts/qcom/qcom-msm8226.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi
index 8fae6058bf58..270973e85625 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi
@@ -241,6 +241,14 @@ saw_l2: power-manager@f9012000 {
reg = <0xf9012000 0x1000>;
};
+ watchdog@f9017000 {
+ compatible = "qcom,apss-wdt-msm8226", "qcom,kpss-wdt";
+ reg = <0xf9017000 0x1000>;
+ interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&sleep_clk>;
+ };
+
timer@f9020000 {
compatible = "arm,armv7-timer-mem";
reg = <0xf9020000 0x1000>;
---
base-commit: 2b3f57690f30a70ea87aab7169388956fd1932db
change-id: 20231011-msm8226-msm8974-watchdog-a88e45f4e2a4
Best regards,
--
Luca Weiss <luca@z3ntu.xyz>
^ permalink raw reply related [relevance 84%]
* Re: [PATCH v2 2/4] drm/panel: Add driver for DJN HX83112A LCD panel
2024-01-22 11:27 99% ` Luca Weiss
@ 2024-02-14 9:33 99% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-14 9:33 UTC (permalink / raw)
To: Luca Weiss, neil.armstrong, Linus Walleij
Cc: Jessica Zhang, Sam Ravnborg, David Airlie, Daniel Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson,
Konrad Dybcio, Andy Gross, devicetree, linux-arm-msm,
linux-kernel, dri-devel, ~postmarketos/upstreaming, phone-devel
On Mon Jan 22, 2024 at 12:27 PM CET, Luca Weiss wrote:
> On Fri Jan 12, 2024 at 11:26 AM CET, wrote:
> > On 12/01/2024 11:23, Linus Walleij wrote:
> > > On Fri, Jan 12, 2024 at 10:52 AM Luca Weiss <luca.weiss@fairphone.com> wrote:
> > >
> > >> Since there's zero indication Truly is involved in this panel in my
> > >> documentation - much less the number 5P65 - I'm not going to add that.
> >
> > Ack
> >
> > >
> > > OK then, I fold, thanks for looking into it.
> > > Keep the Himax hx83112a file name and symbols.
> > >
> > >> So in short this panel is the model 9A-3R063-1102B from DJN, which uses
> > >> a Himax HX83112A driver IC.
> > >
> > > So compatible = "djn,9a-3r063-1102b" since the setup sequences for
> > > hx83112a are clearly for this one display?
> >
> > Yep let's settle on that!
>
Hi Neil and Linus,
Any feedback about the below question?
Regards
Luca
> It's clear to me to use "djn,9a-3r063-1102b" in the driver now but what
> about dts?
>
> Currently here in v2 we have this:
> compatible = "fairphone,fp4-hx83112a-djn", "himax,hx83112a";
>
> Should this just become this?
> compatible = "djn,9a-3r063-1102b";
>
> Or e.g. this?
> compatible = "djn,9a-3r063-1102b", "himax,hx83112a";
>
> Or something else completely? Do we have some documentation / best
> practises around this maybe?
>
> Regards
> Luca
>
> >
> > Thanks,
> > Neil
> >
> > >
> > > Yours,
> > > Linus Walleij
^ permalink raw reply [relevance 99%]
* Re: [PATCH v2 1/3] dt-bindings: power: rpmpd: Add MSM8974 power domains
@ 2024-02-11 11:19 88% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-11 11:19 UTC (permalink / raw)
To: Stephan Gerhold
Cc: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Ulf Hansson, Matti Lehtimäki, linux-arm-msm, devicetree,
linux-kernel, linux-pm
On Sonntag, 11. Februar 2024 12:03:15 CET Stephan Gerhold wrote:
> On Sat, Feb 10, 2024 at 05:38:56PM +0100, Luca Weiss wrote:
> > Add the compatibles and indexes for the rpmpd in MSM8974, both with the
> > standard PM8841+PM8941 PMICs but also devices found with PMA8084.
> >
> > Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
> > ---
> >
> > Documentation/devicetree/bindings/power/qcom,rpmpd.yaml | 2 ++
> > include/dt-bindings/power/qcom-rpmpd.h | 7 +++++++
> > 2 files changed, 9 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml
> > b/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml index
> > 2ff246cf8b81..929b7ef9c1bc 100644
> > --- a/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml
> > +++ b/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml
> >
> > @@ -24,6 +24,8 @@ properties:
> > - qcom,msm8917-rpmpd
> > - qcom,msm8939-rpmpd
> > - qcom,msm8953-rpmpd
> >
> > + - qcom,msm8974-rpmpd
> > + - qcom,msm8974pro-pma8084-rpmpd
> >
> > - qcom,msm8976-rpmpd
> > - qcom,msm8994-rpmpd
> > - qcom,msm8996-rpmpd
>
> This is maybe more something for the DT reviewers to decide but I wonder
> if it is a bit confusing/misleading to describe one particular PMIC with
> a generic compatible, and the other with a more specific one. Perhaps it
> would be clearer to include the PMIC name in both compatibles, i.e.
> "qcom,msm8974-pm8941-rpmpd" instead of "qcom,msm8974-rpmpd".
FWIW if we'd do that it should be qcom,msm8974-pm8841-rpmpd (so pm8841 instead
of pm8941)
But also in the same vain, it was maybe a bit of a bad decision originally to
make the compatibles SoC-specific and not SoC+PMIC-specific - though in nearly
all cases this combo is fixed for a given SoC?
Anyways, I'll wait for more comments about this, I'm open to changing it
either way.
Regards
Luca
>
> The "qcom,msm8974-rpmpd" compatible could be maybe added as fallback.
> While it wouldn't be used for matching in the (Linux) driver the DT
> binding itself *is* "compatible" between the two PMICs because they both
> have the same power domain indexes.
>
> i.e.
> compatible = "qcom,msm8974-pm8941-rpmpd", "qcom,msm8974-rpmpd";
> compatible = "qcom,msm8974pro-pma8084-rpmpd", "qcom,msm8974-rpmpd";
>
> Thanks,
> Stephan
^ permalink raw reply [relevance 88%]
* [PATCH v3] ARM: dts: qcom: msm8974: correct qfprom node size
@ 2024-02-10 16:45 82% Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-10 16:45 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Andy Gross,
Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Eduardo Valentin, Conor Dooley, Rajendra Nayak
Cc: Rob Herring, Andy Gross, linux-arm-msm, devicetree, linux-kernel,
Craig Tatlor, Luca Weiss
From: Craig Tatlor <ctatlor97@gmail.com>
The qfprom actually is bigger than 0x1000, so adjust the reg.
Note that the non-ECC-corrected qfprom can be found at 0xfc4b8000
(-0x4000). The current reg points to the ECC-corrected qfprom block
which should have equivalent values at all offsets compared to the
non-corrected version.
[luca@z3ntu.xyz: extract to standalone patch and adjust for review
comments]
Fixes: c59ffb519357 ("arm: dts: msm8974: Add thermal zones, tsens and qfprom nodes")
Signed-off-by: Craig Tatlor <ctatlor97@gmail.com>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Changes in v3:
- Update size from 0x3000 to 0x2100 (Dmitry)
- Link to v2: https://lore.kernel.org/r/20230130-msm8974-qfprom-v2-1-3839cf41d9ee@z3ntu.xyz
Changes in v2:
- Keep base offset but expand reg from 0x1000 to 0x3000 (Konrad)
- Link to v1: https://lore.kernel.org/r/20230130-msm8974-qfprom-v1-1-975aa0e5e083@z3ntu.xyz
---
arch/arm/boot/dts/qcom/qcom-msm8974.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
index b1413983787c..083ab780ab7e 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
@@ -1234,7 +1234,7 @@ restart@fc4ab000 {
qfprom: qfprom@fc4bc000 {
compatible = "qcom,msm8974-qfprom", "qcom,qfprom";
- reg = <0xfc4bc000 0x1000>;
+ reg = <0xfc4bc000 0x2100>;
#address-cells = <1>;
#size-cells = <1>;
---
base-commit: 54be6c6c5ae8e0d93a6c4641cb7528eb0b6ba478
change-id: 20230130-msm8974-qfprom-619c0e8f26eb
Best regards,
--
Luca Weiss <luca@z3ntu.xyz>
^ permalink raw reply related [relevance 82%]
* [PATCH v2 3/3] pmdomain: qcom: rpmpd: Add MSM8974PRO+PMA8084 power domains
2024-02-10 16:38 85% [PATCH v2 0/3] Add RPMPD support for MSM8974 Luca Weiss
2024-02-10 16:38 84% ` [PATCH v2 1/3] dt-bindings: power: rpmpd: Add MSM8974 power domains Luca Weiss
2024-02-10 16:38 81% ` [PATCH v2 2/3] pmdomain: qcom: rpmpd: Add MSM8974+PM8841 " Luca Weiss
@ 2024-02-10 16:38 83% ` Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-10 16:38 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Ulf Hansson, Stephan Gerhold, Matti Lehtimäki
Cc: linux-arm-msm, devicetree, linux-kernel, linux-pm, Luca Weiss
Add the power domains CX & GFX found on MSM8974 devices that use PMA8084
instead of the standard PM8841+PM8941 combo.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
drivers/pmdomain/qcom/rpmpd.c | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/drivers/pmdomain/qcom/rpmpd.c b/drivers/pmdomain/qcom/rpmpd.c
index 3fa6a0325fc0..2d47e3357f10 100644
--- a/drivers/pmdomain/qcom/rpmpd.c
+++ b/drivers/pmdomain/qcom/rpmpd.c
@@ -252,6 +252,20 @@ static struct rpmpd cx_s2b_vfc = {
};
/* G(F)X */
+static struct rpmpd gfx_s7a_corner = {
+ .pd = { .name = "gfx", },
+ .res_type = RPMPD_SMPA,
+ .res_id = 7,
+ .key = KEY_CORNER,
+};
+
+static struct rpmpd gfx_s7a_vfc = {
+ .pd = { .name = "gfx_vfc", },
+ .res_type = RPMPD_SMPA,
+ .res_id = 7,
+ .key = KEY_FLOOR_CORNER,
+};
+
static struct rpmpd gfx_s2b_corner = {
.pd = { .name = "gfx", },
.res_type = RPMPD_SMPB,
@@ -716,6 +730,20 @@ static const struct rpmpd_desc msm8974_desc = {
.max_state = MAX_CORNER_RPMPD_STATE,
};
+static struct rpmpd *msm8974pro_pma8084_rpmpds[] = {
+ [MSM8974_VDDCX] = &cx_s2a_corner,
+ [MSM8974_VDDCX_AO] = &cx_s2a_corner_ao,
+ [MSM8974_VDDCX_VFC] = &cx_s2a_vfc,
+ [MSM8974_VDDGFX] = &gfx_s7a_corner,
+ [MSM8974_VDDGFX_VFC] = &gfx_s7a_vfc,
+};
+
+static const struct rpmpd_desc msm8974pro_pma8084_desc = {
+ .rpmpds = msm8974pro_pma8084_rpmpds,
+ .num_pds = ARRAY_SIZE(msm8974pro_pma8084_rpmpds),
+ .max_state = MAX_CORNER_RPMPD_STATE,
+};
+
static struct rpmpd *msm8976_rpmpds[] = {
[MSM8976_VDDCX] = &cx_s2a_lvl,
[MSM8976_VDDCX_AO] = &cx_s2a_lvl_ao,
@@ -910,6 +938,7 @@ static const struct of_device_id rpmpd_match_table[] = {
{ .compatible = "qcom,msm8939-rpmpd", .data = &msm8939_desc },
{ .compatible = "qcom,msm8953-rpmpd", .data = &msm8953_desc },
{ .compatible = "qcom,msm8974-rpmpd", .data = &msm8974_desc },
+ { .compatible = "qcom,msm8974pro-pma8084-rpmpd", .data = &msm8974pro_pma8084_desc },
{ .compatible = "qcom,msm8976-rpmpd", .data = &msm8976_desc },
{ .compatible = "qcom,msm8994-rpmpd", .data = &msm8994_desc },
{ .compatible = "qcom,msm8996-rpmpd", .data = &msm8996_desc },
--
2.43.0
^ permalink raw reply related [relevance 83%]
* [PATCH v2 2/3] pmdomain: qcom: rpmpd: Add MSM8974+PM8841 power domains
2024-02-10 16:38 85% [PATCH v2 0/3] Add RPMPD support for MSM8974 Luca Weiss
2024-02-10 16:38 84% ` [PATCH v2 1/3] dt-bindings: power: rpmpd: Add MSM8974 power domains Luca Weiss
@ 2024-02-10 16:38 81% ` Luca Weiss
2024-02-10 16:38 83% ` [PATCH v2 3/3] pmdomain: qcom: rpmpd: Add MSM8974PRO+PMA8084 " Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-10 16:38 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Ulf Hansson, Stephan Gerhold, Matti Lehtimäki
Cc: linux-arm-msm, devicetree, linux-kernel, linux-pm, Luca Weiss
Add the power domains CX & GFX found on devices with MSM8974 and PM8841.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
drivers/pmdomain/qcom/rpmpd.c | 54 +++++++++++++++++++++++++++++++++++++++++++
1 file changed, 54 insertions(+)
diff --git a/drivers/pmdomain/qcom/rpmpd.c b/drivers/pmdomain/qcom/rpmpd.c
index 7796d65f96e8..3fa6a0325fc0 100644
--- a/drivers/pmdomain/qcom/rpmpd.c
+++ b/drivers/pmdomain/qcom/rpmpd.c
@@ -226,6 +226,31 @@ static struct rpmpd cx_s3a_vfl = {
.key = KEY_FLOOR_LEVEL,
};
+static struct rpmpd cx_s2b_corner_ao;
+static struct rpmpd cx_s2b_corner = {
+ .pd = { .name = "cx", },
+ .peer = &cx_s2b_corner_ao,
+ .res_type = RPMPD_SMPB,
+ .res_id = 2,
+ .key = KEY_CORNER,
+};
+
+static struct rpmpd cx_s2b_corner_ao = {
+ .pd = { .name = "cx_ao", },
+ .peer = &cx_s2b_corner,
+ .active_only = true,
+ .res_type = RPMPD_SMPB,
+ .res_id = 2,
+ .key = KEY_CORNER,
+};
+
+static struct rpmpd cx_s2b_vfc = {
+ .pd = { .name = "cx_vfc", },
+ .res_type = RPMPD_SMPB,
+ .res_id = 2,
+ .key = KEY_FLOOR_CORNER,
+};
+
/* G(F)X */
static struct rpmpd gfx_s2b_corner = {
.pd = { .name = "gfx", },
@@ -241,6 +266,20 @@ static struct rpmpd gfx_s2b_vfc = {
.key = KEY_FLOOR_CORNER,
};
+static struct rpmpd gfx_s4b_corner = {
+ .pd = { .name = "gfx", },
+ .res_type = RPMPD_SMPB,
+ .res_id = 4,
+ .key = KEY_CORNER,
+};
+
+static struct rpmpd gfx_s4b_vfc = {
+ .pd = { .name = "gfx_vfc", },
+ .res_type = RPMPD_SMPB,
+ .res_id = 4,
+ .key = KEY_FLOOR_CORNER,
+};
+
static struct rpmpd mx_rwmx0_lvl;
static struct rpmpd gx_rwgx0_lvl_ao;
static struct rpmpd gx_rwgx0_lvl = {
@@ -663,6 +702,20 @@ static const struct rpmpd_desc msm8953_desc = {
.max_state = RPM_SMD_LEVEL_TURBO,
};
+static struct rpmpd *msm8974_rpmpds[] = {
+ [MSM8974_VDDCX] = &cx_s2b_corner,
+ [MSM8974_VDDCX_AO] = &cx_s2b_corner_ao,
+ [MSM8974_VDDCX_VFC] = &cx_s2b_vfc,
+ [MSM8974_VDDGFX] = &gfx_s4b_corner,
+ [MSM8974_VDDGFX_VFC] = &gfx_s4b_vfc,
+};
+
+static const struct rpmpd_desc msm8974_desc = {
+ .rpmpds = msm8974_rpmpds,
+ .num_pds = ARRAY_SIZE(msm8974_rpmpds),
+ .max_state = MAX_CORNER_RPMPD_STATE,
+};
+
static struct rpmpd *msm8976_rpmpds[] = {
[MSM8976_VDDCX] = &cx_s2a_lvl,
[MSM8976_VDDCX_AO] = &cx_s2a_lvl_ao,
@@ -856,6 +909,7 @@ static const struct of_device_id rpmpd_match_table[] = {
{ .compatible = "qcom,msm8917-rpmpd", .data = &msm8917_desc },
{ .compatible = "qcom,msm8939-rpmpd", .data = &msm8939_desc },
{ .compatible = "qcom,msm8953-rpmpd", .data = &msm8953_desc },
+ { .compatible = "qcom,msm8974-rpmpd", .data = &msm8974_desc },
{ .compatible = "qcom,msm8976-rpmpd", .data = &msm8976_desc },
{ .compatible = "qcom,msm8994-rpmpd", .data = &msm8994_desc },
{ .compatible = "qcom,msm8996-rpmpd", .data = &msm8996_desc },
--
2.43.0
^ permalink raw reply related [relevance 81%]
* [PATCH v2 1/3] dt-bindings: power: rpmpd: Add MSM8974 power domains
2024-02-10 16:38 85% [PATCH v2 0/3] Add RPMPD support for MSM8974 Luca Weiss
@ 2024-02-10 16:38 84% ` Luca Weiss
2024-02-10 16:38 81% ` [PATCH v2 2/3] pmdomain: qcom: rpmpd: Add MSM8974+PM8841 " Luca Weiss
2024-02-10 16:38 83% ` [PATCH v2 3/3] pmdomain: qcom: rpmpd: Add MSM8974PRO+PMA8084 " Luca Weiss
2 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-02-10 16:38 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Ulf Hansson, Stephan Gerhold, Matti Lehtimäki
Cc: linux-arm-msm, devicetree, linux-kernel, linux-pm, Luca Weiss
Add the compatibles and indexes for the rpmpd in MSM8974, both with the
standard PM8841+PM8941 PMICs but also devices found with PMA8084.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Documentation/devicetree/bindings/power/qcom,rpmpd.yaml | 2 ++
include/dt-bindings/power/qcom-rpmpd.h | 7 +++++++
2 files changed, 9 insertions(+)
diff --git a/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml b/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml
index 2ff246cf8b81..929b7ef9c1bc 100644
--- a/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml
+++ b/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml
@@ -24,6 +24,8 @@ properties:
- qcom,msm8917-rpmpd
- qcom,msm8939-rpmpd
- qcom,msm8953-rpmpd
+ - qcom,msm8974-rpmpd
+ - qcom,msm8974pro-pma8084-rpmpd
- qcom,msm8976-rpmpd
- qcom,msm8994-rpmpd
- qcom,msm8996-rpmpd
diff --git a/include/dt-bindings/power/qcom-rpmpd.h b/include/dt-bindings/power/qcom-rpmpd.h
index 7f4e2983a4c5..608087fb9a3d 100644
--- a/include/dt-bindings/power/qcom-rpmpd.h
+++ b/include/dt-bindings/power/qcom-rpmpd.h
@@ -308,6 +308,13 @@
#define MSM8953_VDDMX 5
#define MSM8953_VDDMX_AO 6
+/* MSM8974 Power Domain Indexes */
+#define MSM8974_VDDCX 0
+#define MSM8974_VDDCX_AO 1
+#define MSM8974_VDDCX_VFC 2
+#define MSM8974_VDDGFX 3
+#define MSM8974_VDDGFX_VFC 4
+
/* MSM8976 Power Domain Indexes */
#define MSM8976_VDDCX 0
#define MSM8976_VDDCX_AO 1
--
2.43.0
^ permalink raw reply related [relevance 84%]
* [PATCH v2 0/3] Add RPMPD support for MSM8974
@ 2024-02-10 16:38 85% Luca Weiss
2024-02-10 16:38 84% ` [PATCH v2 1/3] dt-bindings: power: rpmpd: Add MSM8974 power domains Luca Weiss
` (2 more replies)
0 siblings, 3 replies; 200+ results
From: Luca Weiss @ 2024-02-10 16:38 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Ulf Hansson, Stephan Gerhold, Matti Lehtimäki
Cc: linux-arm-msm, devicetree, linux-kernel, linux-pm, Luca Weiss
Add driver support for the RPM power domains found on the different
MSM8974 devices.
Devicetree integration will come at a later point since also some
mostly remoteproc drivers need to be adjusted.
Also the MX power domains on this SoC seems to work quite a bit
differently, we'd need to send raw voltages to it, so these are ignored
in this series.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Changes in v2:
- Drop MSM8974_VDDGFX_AO in all patches
- Link to v1: https://lore.kernel.org/r/20240210-msm8974-rpmpd-v1-0-de9355e6842a@z3ntu.xyz
---
Luca Weiss (3):
dt-bindings: power: rpmpd: Add MSM8974 power domains
pmdomain: qcom: rpmpd: Add MSM8974+PM8841 power domains
pmdomain: qcom: rpmpd: Add MSM8974PRO+PMA8084 power domains
.../devicetree/bindings/power/qcom,rpmpd.yaml | 2 +
drivers/pmdomain/qcom/rpmpd.c | 83 ++++++++++++++++++++++
include/dt-bindings/power/qcom-rpmpd.h | 7 ++
3 files changed, 92 insertions(+)
---
base-commit: 6e3fa474051f3d276ea708bdb8e8e1f66d1d3ee5
change-id: 20240210-msm8974-rpmpd-6e48fe374275
Best regards,
--
Luca Weiss <luca@z3ntu.xyz>
^ permalink raw reply [relevance 85%]
* Re: [PATCH 2/3] pmdomain: qcom: rpmpd: Add MSM8974+PM8841 power domains
@ 2024-02-10 16:31 88% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-10 16:31 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Ulf Hansson,
Stephan Gerhold, Matti Lehtimäki, Konrad Dybcio
Cc: linux-arm-msm, devicetree, linux-kernel, linux-pm
On Samstag, 10. Februar 2024 15:19:54 CET Konrad Dybcio wrote:
> On 2/10/24 15:12, Luca Weiss wrote:
> > Add the power domains CX & GFX found on devices with MSM8974 and PM8841.
> >
> > Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
> > ---
>
> [...]
>
> > +static struct rpmpd gfx_s4b_corner_ao;
> > +static struct rpmpd gfx_s4b_corner = {
> > + .pd = { .name = "gfx", },
> > + .peer = &gfx_s4b_corner_ao,
> > + .res_type = RPMPD_SMPB,
> > + .res_id = 4,
> > + .key = KEY_CORNER,
> > +};
> > +
> > +static struct rpmpd gfx_s4b_corner_ao = {
> > + .pd = { .name = "gfx_ao", },
> > + .peer = &gfx_s4b_corner,
> > + .active_only = true,
> > + .res_type = RPMPD_SMPB,
> > + .res_id = 4,
> > + .key = KEY_CORNER,
> > +};
>
> I don't see a s4b_ao downstream.. Though it's very unfortunate we
> didn't choose to add power-domain-cells or sth and set the bucket
> through that..
Right, overlooked that. Will drop gfx_ao for both this and the other patch.
Regards
Luca
>
> Konrad
^ permalink raw reply [relevance 88%]
* [PATCH v2 3/3] ARM: dts: qcom: msm8226: Add CPU and SAW/ACC nodes
2024-02-10 16:28 85% [PATCH v2 0/3] Bring up more CPU cores on MSM8226 Luca Weiss
2024-02-10 16:28 88% ` [PATCH v2 1/3] dt-bindings: soc: qcom: qcom,saw2: add msm8226 l2 compatible Luca Weiss
2024-02-10 16:28 47% ` [PATCH v2 2/3] ARM: dts: qcom: msm8226: Sort and clean up nodes Luca Weiss
@ 2024-02-10 16:28 77% ` Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-10 16:28 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Andy Gross,
Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss, Ivaylo Ivanov
From: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
Add CPU and SAW/ACC nodes to enable SMP on MSM8226.
Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
[luca: update some nodes to fix dtbs_check errors, reorder, cleanup]
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
arch/arm/boot/dts/qcom/qcom-msm8226.dtsi | 96 ++++++++++++++++++++++++++++++++
1 file changed, 96 insertions(+)
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi
index 6896318e6612..8fae6058bf58 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi
@@ -34,6 +34,57 @@ sleep_clk: sleep_clk {
};
};
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ CPU0: cpu@0 {
+ compatible = "arm,cortex-a7";
+ enable-method = "qcom,msm8226-smp";
+ device_type = "cpu";
+ reg = <0>;
+ next-level-cache = <&L2>;
+ qcom,acc = <&acc0>;
+ qcom,saw = <&saw0>;
+ };
+
+ CPU1: cpu@1 {
+ compatible = "arm,cortex-a7";
+ enable-method = "qcom,msm8226-smp";
+ device_type = "cpu";
+ reg = <1>;
+ next-level-cache = <&L2>;
+ qcom,acc = <&acc1>;
+ qcom,saw = <&saw1>;
+ };
+
+ CPU2: cpu@2 {
+ compatible = "arm,cortex-a7";
+ enable-method = "qcom,msm8226-smp";
+ device_type = "cpu";
+ reg = <2>;
+ next-level-cache = <&L2>;
+ qcom,acc = <&acc2>;
+ qcom,saw = <&saw2>;
+ };
+
+ CPU3: cpu@3 {
+ compatible = "arm,cortex-a7";
+ enable-method = "qcom,msm8226-smp";
+ device_type = "cpu";
+ reg = <3>;
+ next-level-cache = <&L2>;
+ qcom,acc = <&acc3>;
+ qcom,saw = <&saw3>;
+ };
+
+ L2: l2-cache {
+ compatible = "cache";
+ cache-level = <2>;
+ cache-unified;
+ };
+ };
+
firmware {
scm {
compatible = "qcom,scm-msm8226", "qcom,scm";
@@ -185,6 +236,11 @@ apcs: syscon@f9011000 {
reg = <0xf9011000 0x1000>;
};
+ saw_l2: power-manager@f9012000 {
+ compatible = "qcom,msm8226-saw2-v2.1-l2", "qcom,saw2";
+ reg = <0xf9012000 0x1000>;
+ };
+
timer@f9020000 {
compatible = "arm,armv7-timer-mem";
reg = <0xf9020000 0x1000>;
@@ -243,6 +299,46 @@ frame@f9028000 {
};
};
+ acc0: power-manager@f9088000 {
+ compatible = "qcom,kpss-acc-v2";
+ reg = <0xf9088000 0x1000>, <0xf9008000 0x1000>;
+ };
+
+ saw0: power-manager@f9089000 {
+ compatible = "qcom,msm8226-saw2-v2.1-cpu", "qcom,saw2";
+ reg = <0xf9089000 0x1000>;
+ };
+
+ acc1: power-manager@f9098000 {
+ compatible = "qcom,kpss-acc-v2";
+ reg = <0xf9098000 0x1000>, <0xf9008000 0x1000>;
+ };
+
+ saw1: power-manager@f9099000 {
+ compatible = "qcom,msm8226-saw2-v2.1-cpu", "qcom,saw2";
+ reg = <0xf9099000 0x1000>;
+ };
+
+ acc2: power-manager@f90a8000 {
+ compatible = "qcom,kpss-acc-v2";
+ reg = <0xf90a8000 0x1000>, <0xf9008000 0x1000>;
+ };
+
+ saw2: power-manager@f90a9000 {
+ compatible = "qcom,msm8226-saw2-v2.1-cpu", "qcom,saw2";
+ reg = <0xf90a9000 0x1000>;
+ };
+
+ acc3: power-manager@f90b8000 {
+ compatible = "qcom,kpss-acc-v2";
+ reg = <0xf90b8000 0x1000>, <0xf9008000 0x1000>;
+ };
+
+ saw3: power-manager@f90b9000 {
+ compatible = "qcom,msm8226-saw2-v2.1-cpu", "qcom,saw2";
+ reg = <0xf90b9000 0x1000>;
+ };
+
sdhc_1: mmc@f9824900 {
compatible = "qcom,msm8226-sdhci", "qcom,sdhci-msm-v4";
reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
--
2.43.0
^ permalink raw reply related [relevance 77%]
* [PATCH v2 1/3] dt-bindings: soc: qcom: qcom,saw2: add msm8226 l2 compatible
2024-02-10 16:28 85% [PATCH v2 0/3] Bring up more CPU cores on MSM8226 Luca Weiss
@ 2024-02-10 16:28 88% ` Luca Weiss
2024-02-10 16:28 47% ` [PATCH v2 2/3] ARM: dts: qcom: msm8226: Sort and clean up nodes Luca Weiss
2024-02-10 16:28 77% ` [PATCH v2 3/3] ARM: dts: qcom: msm8226: Add CPU and SAW/ACC nodes Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-10 16:28 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Andy Gross,
Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss
Add the compatible for the SAW2 for L2 cache found on MSM8226.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml
index f9306f2a6e99..ca4bce817273 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml
@@ -36,6 +36,7 @@ properties:
- qcom,msm8916-saw2-v3.0-cpu
- qcom,msm8939-saw2-v3.0-cpu
- qcom,msm8226-saw2-v2.1-cpu
+ - qcom,msm8226-saw2-v2.1-l2
- qcom,msm8960-saw2-cpu
- qcom,msm8974-saw2-v2.1-cpu
- qcom,msm8974-saw2-v2.1-l2
--
2.43.0
^ permalink raw reply related [relevance 88%]
* [PATCH v2 0/3] Bring up more CPU cores on MSM8226
@ 2024-02-10 16:28 85% Luca Weiss
2024-02-10 16:28 88% ` [PATCH v2 1/3] dt-bindings: soc: qcom: qcom,saw2: add msm8226 l2 compatible Luca Weiss
` (2 more replies)
0 siblings, 3 replies; 200+ results
From: Luca Weiss @ 2024-02-10 16:28 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Andy Gross,
Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss,
Matti Lehtimäki, Ivaylo Ivanov
Add some nodes to bring up SMP on msm8226 SoC. Another commit to fix the
sorting of the nodes is also included since the ordering is currently a
bit all over the place.
The bindings patch depends on the following series:
https://lore.kernel.org/linux-arm-msm/20240102-saw2-spm-regulator-v7-0-0472ec237f49@linaro.org/
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Changes in v2:
- Add saw_l2 node with bindings
- Rebase on linux-next
- Pick up tags
- Link to v1: https://lore.kernel.org/r/20231203-msm8226-cpu-v1-0-d18e83340b32@z3ntu.xyz
---
Ivaylo Ivanov (1):
ARM: dts: qcom: msm8226: Add CPU and SAW/ACC nodes
Luca Weiss (1):
dt-bindings: soc: qcom: qcom,saw2: add msm8226 l2 compatible
Matti Lehtimäki (1):
ARM: dts: qcom: msm8226: Sort and clean up nodes
.../devicetree/bindings/soc/qcom/qcom,saw2.yaml | 1 +
arch/arm/boot/dts/qcom/qcom-msm8226.dtsi | 756 ++++++++++++---------
2 files changed, 427 insertions(+), 330 deletions(-)
---
base-commit: b9fed7419cce45b97bc3217f07920751a6ff9a18
change-id: 20231203-msm8226-cpu-801bebbed886
Best regards,
--
Luca Weiss <luca@z3ntu.xyz>
^ permalink raw reply [relevance 85%]
* [PATCH v2 2/3] ARM: dts: qcom: msm8226: Sort and clean up nodes
2024-02-10 16:28 85% [PATCH v2 0/3] Bring up more CPU cores on MSM8226 Luca Weiss
2024-02-10 16:28 88% ` [PATCH v2 1/3] dt-bindings: soc: qcom: qcom,saw2: add msm8226 l2 compatible Luca Weiss
@ 2024-02-10 16:28 47% ` Luca Weiss
2024-02-10 16:28 77% ` [PATCH v2 3/3] ARM: dts: qcom: msm8226: Add CPU and SAW/ACC nodes Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-10 16:28 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Andy Gross,
Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss,
Matti Lehtimäki
From: Matti Lehtimäki <matti.lehtimaki@gmail.com>
Quite a few nodes haven't been sorted correctly by reg, so let's do this
now so that future nodes can be added at the correct place.
Also at the same time, move the status property last.
No functional change intended.
Signed-off-by: Matti Lehtimäki <matti.lehtimaki@gmail.com>
[luca: add more text to commit message]
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
arch/arm/boot/dts/qcom/qcom-msm8226.dtsi | 660 +++++++++++++++----------------
1 file changed, 330 insertions(+), 330 deletions(-)
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi
index b492c95e5d30..6896318e6612 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi
@@ -20,11 +20,6 @@ / {
chosen { };
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0>;
- };
-
clocks {
xo_board: xo_board {
compatible = "fixed-clock";
@@ -47,6 +42,11 @@ scm {
};
};
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0>;
+ };
+
pmu {
compatible = "arm,cortex-a7-pmu";
interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) |
@@ -185,6 +185,64 @@ apcs: syscon@f9011000 {
reg = <0xf9011000 0x1000>;
};
+ timer@f9020000 {
+ compatible = "arm,armv7-timer-mem";
+ reg = <0xf9020000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ frame@f9021000 {
+ frame-number = <0>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0xf9021000 0x1000>,
+ <0xf9022000 0x1000>;
+ };
+
+ frame@f9023000 {
+ frame-number = <1>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0xf9023000 0x1000>;
+ status = "disabled";
+ };
+
+ frame@f9024000 {
+ frame-number = <2>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0xf9024000 0x1000>;
+ status = "disabled";
+ };
+
+ frame@f9025000 {
+ frame-number = <3>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0xf9025000 0x1000>;
+ status = "disabled";
+ };
+
+ frame@f9026000 {
+ frame-number = <4>;
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0xf9026000 0x1000>;
+ status = "disabled";
+ };
+
+ frame@f9027000 {
+ frame-number = <5>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0xf9027000 0x1000>;
+ status = "disabled";
+ };
+
+ frame@f9028000 {
+ frame-number = <6>;
+ interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0xf9028000 0x1000>;
+ status = "disabled";
+ };
+ };
+
sdhc_1: mmc@f9824900 {
compatible = "qcom,msm8226-sdhci", "qcom,sdhci-msm-v4";
reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
@@ -201,22 +259,6 @@ sdhc_1: mmc@f9824900 {
status = "disabled";
};
- sdhc_2: mmc@f98a4900 {
- compatible = "qcom,msm8226-sdhci", "qcom,sdhci-msm-v4";
- reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
- reg-names = "hc", "core";
- interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "hc_irq", "pwr_irq";
- clocks = <&gcc GCC_SDCC2_AHB_CLK>,
- <&gcc GCC_SDCC2_APPS_CLK>,
- <&rpmcc RPM_SMD_XO_CLK_SRC>;
- clock-names = "iface", "core", "xo";
- pinctrl-names = "default";
- pinctrl-0 = <&sdhc2_default_state>;
- status = "disabled";
- };
-
sdhc_3: mmc@f9864900 {
compatible = "qcom,msm8226-sdhci", "qcom,sdhci-msm-v4";
reg = <0xf9864900 0x11c>, <0xf9864000 0x800>;
@@ -233,6 +275,22 @@ sdhc_3: mmc@f9864900 {
status = "disabled";
};
+ sdhc_2: mmc@f98a4900 {
+ compatible = "qcom,msm8226-sdhci", "qcom,sdhci-msm-v4";
+ reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
+ reg-names = "hc", "core";
+ interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "hc_irq", "pwr_irq";
+ clocks = <&gcc GCC_SDCC2_AHB_CLK>,
+ <&gcc GCC_SDCC2_APPS_CLK>,
+ <&rpmcc RPM_SMD_XO_CLK_SRC>;
+ clock-names = "iface", "core", "xo";
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdhc2_default_state>;
+ status = "disabled";
+ };
+
blsp1_uart1: serial@f991d000 {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0xf991d000 0x1000>;
@@ -272,7 +330,6 @@ blsp1_uart4: serial@f9920000 {
};
blsp1_i2c1: i2c@f9923000 {
- status = "disabled";
compatible = "qcom,i2c-qup-v2.1.1";
reg = <0xf9923000 0x1000>;
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
@@ -282,10 +339,10 @@ blsp1_i2c1: i2c@f9923000 {
pinctrl-0 = <&blsp1_i2c1_pins>;
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
};
blsp1_i2c2: i2c@f9924000 {
- status = "disabled";
compatible = "qcom,i2c-qup-v2.1.1";
reg = <0xf9924000 0x1000>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
@@ -295,10 +352,10 @@ blsp1_i2c2: i2c@f9924000 {
pinctrl-0 = <&blsp1_i2c2_pins>;
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
};
blsp1_i2c3: i2c@f9925000 {
- status = "disabled";
compatible = "qcom,i2c-qup-v2.1.1";
reg = <0xf9925000 0x1000>;
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
@@ -308,10 +365,10 @@ blsp1_i2c3: i2c@f9925000 {
pinctrl-0 = <&blsp1_i2c3_pins>;
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
};
blsp1_i2c4: i2c@f9926000 {
- status = "disabled";
compatible = "qcom,i2c-qup-v2.1.1";
reg = <0xf9926000 0x1000>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
@@ -321,10 +378,10 @@ blsp1_i2c4: i2c@f9926000 {
pinctrl-0 = <&blsp1_i2c4_pins>;
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
};
blsp1_i2c5: i2c@f9927000 {
- status = "disabled";
compatible = "qcom,i2c-qup-v2.1.1";
reg = <0xf9927000 0x1000>;
interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
@@ -334,6 +391,7 @@ blsp1_i2c5: i2c@f9927000 {
pinctrl-0 = <&blsp1_i2c5_pins>;
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
};
blsp1_i2c6: i2c@f9928000 {
@@ -351,33 +409,6 @@ blsp1_i2c6: i2c@f9928000 {
status = "disabled";
};
- cci: cci@fda0c000 {
- compatible = "qcom,msm8226-cci";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0xfda0c000 0x1000>;
- interrupts = <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
- clocks = <&mmcc CAMSS_TOP_AHB_CLK>,
- <&mmcc CAMSS_CCI_CCI_AHB_CLK>,
- <&mmcc CAMSS_CCI_CCI_CLK>;
- clock-names = "camss_top_ahb",
- "cci_ahb",
- "cci";
-
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&cci_default>;
- pinctrl-1 = <&cci_sleep>;
-
- status = "disabled";
-
- cci_i2c0: i2c-bus@0 {
- reg = <0>;
- clock-frequency = <400000>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
- };
-
usb: usb@f9a55000 {
compatible = "qcom,ci-hdrc";
reg = <0xf9a55000 0x200>,
@@ -417,6 +448,18 @@ usb_hs_phy: phy {
};
};
+ rng@f9bff000 {
+ compatible = "qcom,prng";
+ reg = <0xf9bff000 0x200>;
+ clocks = <&gcc GCC_PRNG_AHB_CLK>;
+ clock-names = "core";
+ };
+
+ sram@fc190000 {
+ compatible = "qcom,msm8226-rpm-stats";
+ reg = <0xfc190000 0x10000>;
+ };
+
gcc: clock-controller@fc400000 {
compatible = "qcom,gcc-msm8226";
reg = <0xfc400000 0x4000>;
@@ -430,146 +473,28 @@ gcc: clock-controller@fc400000 {
"sleep_clk";
};
- mmcc: clock-controller@fd8c0000 {
- compatible = "qcom,mmcc-msm8226";
- reg = <0xfd8c0000 0x6000>;
- #clock-cells = <1>;
- #reset-cells = <1>;
- #power-domain-cells = <1>;
+ rpm_msg_ram: sram@fc428000 {
+ compatible = "qcom,rpm-msg-ram";
+ reg = <0xfc428000 0x4000>;
- clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
- <&gcc GCC_MMSS_GPLL0_CLK_SRC>,
- <&gcc GPLL0_VOTE>,
- <&gcc GPLL1_VOTE>,
- <&rpmcc RPM_SMD_GFX3D_CLK_SRC>,
- <&mdss_dsi0_phy 1>,
- <&mdss_dsi0_phy 0>;
- clock-names = "xo",
- "mmss_gpll0_vote",
- "gpll0_vote",
- "gpll1_vote",
- "gfx3d_clk_src",
- "dsi0pll",
- "dsi0pllbyte";
- };
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0xfc428000 0x4000>;
- tlmm: pinctrl@fd510000 {
- compatible = "qcom,msm8226-pinctrl";
- reg = <0xfd510000 0x4000>;
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = <&tlmm 0 0 117>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
-
- blsp1_i2c1_pins: blsp1-i2c1-state {
- pins = "gpio2", "gpio3";
- function = "blsp_i2c1";
- drive-strength = <2>;
- bias-disable;
+ apss_master_stats: sram@150 {
+ reg = <0x150 0x14>;
};
- blsp1_i2c2_pins: blsp1-i2c2-state {
- pins = "gpio6", "gpio7";
- function = "blsp_i2c2";
- drive-strength = <2>;
- bias-disable;
+ mpss_master_stats: sram@b50 {
+ reg = <0xb50 0x14>;
};
- blsp1_i2c3_pins: blsp1-i2c3-state {
- pins = "gpio10", "gpio11";
- function = "blsp_i2c3";
- drive-strength = <2>;
- bias-disable;
+ lpss_master_stats: sram@1550 {
+ reg = <0x1550 0x14>;
};
- blsp1_i2c4_pins: blsp1-i2c4-state {
- pins = "gpio14", "gpio15";
- function = "blsp_i2c4";
- drive-strength = <2>;
- bias-disable;
- };
-
- blsp1_i2c5_pins: blsp1-i2c5-state {
- pins = "gpio18", "gpio19";
- function = "blsp_i2c5";
- drive-strength = <2>;
- bias-disable;
- };
-
- blsp1_i2c6_pins: blsp1-i2c6-state {
- pins = "gpio22", "gpio23";
- function = "blsp_i2c6";
- drive-strength = <2>;
- bias-disable;
- };
-
- cci_default: cci-default-state {
- pins = "gpio29", "gpio30";
- function = "cci_i2c0";
-
- drive-strength = <2>;
- bias-disable;
- };
-
- cci_sleep: cci-sleep-state {
- pins = "gpio29", "gpio30";
- function = "gpio";
-
- drive-strength = <2>;
- bias-disable;
- };
-
- sdhc1_default_state: sdhc1-default-state {
- clk-pins {
- pins = "sdc1_clk";
- drive-strength = <10>;
- bias-disable;
- };
-
- cmd-data-pins {
- pins = "sdc1_cmd", "sdc1_data";
- drive-strength = <10>;
- bias-pull-up;
- };
- };
-
- sdhc2_default_state: sdhc2-default-state {
- clk-pins {
- pins = "sdc2_clk";
- drive-strength = <10>;
- bias-disable;
- };
-
- cmd-data-pins {
- pins = "sdc2_cmd", "sdc2_data";
- drive-strength = <10>;
- bias-pull-up;
- };
- };
-
- sdhc3_default_state: sdhc3-default-state {
- clk-pins {
- pins = "gpio44";
- function = "sdc3";
- drive-strength = <8>;
- bias-disable;
- };
-
- cmd-pins {
- pins = "gpio43";
- function = "sdc3";
- drive-strength = <8>;
- bias-pull-up;
- };
-
- data-pins {
- pins = "gpio39", "gpio40", "gpio41", "gpio42";
- function = "sdc3";
- drive-strength = <8>;
- bias-pull-up;
- };
+ pronto_master_stats: sram@1f50 {
+ reg = <0x1f50 0x14>;
};
};
@@ -714,170 +639,153 @@ spmi_bus: spmi@fc4cf000 {
#interrupt-cells = <4>;
};
- rng@f9bff000 {
- compatible = "qcom,prng";
- reg = <0xf9bff000 0x200>;
- clocks = <&gcc GCC_PRNG_AHB_CLK>;
- clock-names = "core";
- };
-
- timer@f9020000 {
- compatible = "arm,armv7-timer-mem";
- reg = <0xf9020000 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- frame@f9021000 {
- frame-number = <0>;
- interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0xf9021000 0x1000>,
- <0xf9022000 0x1000>;
- };
-
- frame@f9023000 {
- frame-number = <1>;
- interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0xf9023000 0x1000>;
- status = "disabled";
- };
-
- frame@f9024000 {
- frame-number = <2>;
- interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0xf9024000 0x1000>;
- status = "disabled";
- };
-
- frame@f9025000 {
- frame-number = <3>;
- interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0xf9025000 0x1000>;
- status = "disabled";
- };
-
- frame@f9026000 {
- frame-number = <4>;
- interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0xf9026000 0x1000>;
- status = "disabled";
- };
-
- frame@f9027000 {
- frame-number = <5>;
- interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0xf9027000 0x1000>;
- status = "disabled";
- };
-
- frame@f9028000 {
- frame-number = <6>;
- interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0xf9028000 0x1000>;
- status = "disabled";
- };
- };
-
- sram@fc190000 {
- compatible = "qcom,msm8226-rpm-stats";
- reg = <0xfc190000 0x10000>;
- };
-
- rpm_msg_ram: sram@fc428000 {
- compatible = "qcom,rpm-msg-ram";
- reg = <0xfc428000 0x4000>;
-
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0xfc428000 0x4000>;
-
- apss_master_stats: sram@150 {
- reg = <0x150 0x14>;
- };
-
- mpss_master_stats: sram@b50 {
- reg = <0xb50 0x14>;
- };
-
- lpss_master_stats: sram@1550 {
- reg = <0x1550 0x14>;
- };
-
- pronto_master_stats: sram@1f50 {
- reg = <0x1f50 0x14>;
- };
- };
-
tcsr_mutex: hwlock@fd484000 {
compatible = "qcom,msm8226-tcsr-mutex", "qcom,tcsr-mutex";
reg = <0xfd484000 0x1000>;
#hwlock-cells = <1>;
};
- adsp: remoteproc@fe200000 {
- compatible = "qcom,msm8226-adsp-pil";
- reg = <0xfe200000 0x100>;
+ tlmm: pinctrl@fd510000 {
+ compatible = "qcom,msm8226-pinctrl";
+ reg = <0xfd510000 0x4000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&tlmm 0 0 117>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
- interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
- <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
- <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
- <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
- <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
+ blsp1_i2c1_pins: blsp1-i2c1-state {
+ pins = "gpio2", "gpio3";
+ function = "blsp_i2c1";
+ drive-strength = <2>;
+ bias-disable;
+ };
- power-domains = <&rpmpd MSM8226_VDDCX>;
- power-domain-names = "cx";
+ blsp1_i2c2_pins: blsp1-i2c2-state {
+ pins = "gpio6", "gpio7";
+ function = "blsp_i2c2";
+ drive-strength = <2>;
+ bias-disable;
+ };
- clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;
- clock-names = "xo";
+ blsp1_i2c3_pins: blsp1-i2c3-state {
+ pins = "gpio10", "gpio11";
+ function = "blsp_i2c3";
+ drive-strength = <2>;
+ bias-disable;
+ };
- memory-region = <&adsp_region>;
+ blsp1_i2c4_pins: blsp1-i2c4-state {
+ pins = "gpio14", "gpio15";
+ function = "blsp_i2c4";
+ drive-strength = <2>;
+ bias-disable;
+ };
- qcom,smem-states = <&adsp_smp2p_out 0>;
- qcom,smem-state-names = "stop";
+ blsp1_i2c5_pins: blsp1-i2c5-state {
+ pins = "gpio18", "gpio19";
+ function = "blsp_i2c5";
+ drive-strength = <2>;
+ bias-disable;
+ };
- status = "disabled";
+ blsp1_i2c6_pins: blsp1-i2c6-state {
+ pins = "gpio22", "gpio23";
+ function = "blsp_i2c6";
+ drive-strength = <2>;
+ bias-disable;
+ };
- smd-edge {
- interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>;
+ cci_default: cci-default-state {
+ pins = "gpio29", "gpio30";
+ function = "cci_i2c0";
- qcom,ipc = <&apcs 8 8>;
- qcom,smd-edge = <1>;
+ drive-strength = <2>;
+ bias-disable;
+ };
- label = "lpass";
+ cci_sleep: cci-sleep-state {
+ pins = "gpio29", "gpio30";
+ function = "gpio";
+
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ sdhc1_default_state: sdhc1-default-state {
+ clk-pins {
+ pins = "sdc1_clk";
+ drive-strength = <10>;
+ bias-disable;
+ };
+
+ cmd-data-pins {
+ pins = "sdc1_cmd", "sdc1_data";
+ drive-strength = <10>;
+ bias-pull-up;
+ };
+ };
+
+ sdhc2_default_state: sdhc2-default-state {
+ clk-pins {
+ pins = "sdc2_clk";
+ drive-strength = <10>;
+ bias-disable;
+ };
+
+ cmd-data-pins {
+ pins = "sdc2_cmd", "sdc2_data";
+ drive-strength = <10>;
+ bias-pull-up;
+ };
+ };
+
+ sdhc3_default_state: sdhc3-default-state {
+ clk-pins {
+ pins = "gpio44";
+ function = "sdc3";
+ drive-strength = <8>;
+ bias-disable;
+ };
+
+ cmd-pins {
+ pins = "gpio43";
+ function = "sdc3";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+
+ data-pins {
+ pins = "gpio39", "gpio40", "gpio41", "gpio42";
+ function = "sdc3";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
};
};
- sram@fdd00000 {
- compatible = "qcom,msm8226-ocmem";
- reg = <0xfdd00000 0x2000>,
- <0xfec00000 0x20000>;
- reg-names = "ctrl", "mem";
- ranges = <0 0xfec00000 0x20000>;
- clocks = <&rpmcc RPM_SMD_OCMEMGX_CLK>;
- clock-names = "core";
+ mmcc: clock-controller@fd8c0000 {
+ compatible = "qcom,mmcc-msm8226";
+ reg = <0xfd8c0000 0x6000>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ #power-domain-cells = <1>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- gmu_sram: gmu-sram@0 {
- reg = <0x0 0x20000>;
- };
- };
-
- sram@fe805000 {
- compatible = "qcom,msm8226-imem", "syscon", "simple-mfd";
- reg = <0xfe805000 0x1000>;
-
- reboot-mode {
- compatible = "syscon-reboot-mode";
- offset = <0x65c>;
-
- mode-bootloader = <0x77665500>;
- mode-normal = <0x77665501>;
- mode-recovery = <0x77665502>;
- };
+ clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
+ <&gcc GCC_MMSS_GPLL0_CLK_SRC>,
+ <&gcc GPLL0_VOTE>,
+ <&gcc GPLL1_VOTE>,
+ <&rpmcc RPM_SMD_GFX3D_CLK_SRC>,
+ <&mdss_dsi0_phy 1>,
+ <&mdss_dsi0_phy 0>;
+ clock-names = "xo",
+ "mmss_gpll0_vote",
+ "gpll0_vote",
+ "gpll1_vote",
+ "gfx3d_clk_src",
+ "dsi0pll",
+ "dsi0pllbyte";
};
mdss: display-subsystem@fd900000 {
@@ -1007,6 +915,33 @@ mdss_dsi0_phy: phy@fd922a00 {
};
};
+ cci: cci@fda0c000 {
+ compatible = "qcom,msm8226-cci";
+ reg = <0xfda0c000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&mmcc CAMSS_TOP_AHB_CLK>,
+ <&mmcc CAMSS_CCI_CCI_AHB_CLK>,
+ <&mmcc CAMSS_CCI_CCI_CLK>;
+ clock-names = "camss_top_ahb",
+ "cci_ahb",
+ "cci";
+
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&cci_default>;
+ pinctrl-1 = <&cci_sleep>;
+
+ status = "disabled";
+
+ cci_i2c0: i2c-bus@0 {
+ reg = <0>;
+ clock-frequency = <400000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
gpu: adreno@fdb00000 {
compatible = "qcom,adreno-305.18", "qcom,adreno";
reg = <0xfdb00000 0x10000>;
@@ -1046,6 +981,71 @@ opp-19000000 {
};
};
};
+
+ sram@fdd00000 {
+ compatible = "qcom,msm8226-ocmem";
+ reg = <0xfdd00000 0x2000>,
+ <0xfec00000 0x20000>;
+ reg-names = "ctrl", "mem";
+ ranges = <0 0xfec00000 0x20000>;
+ clocks = <&rpmcc RPM_SMD_OCMEMGX_CLK>;
+ clock-names = "core";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ gmu_sram: gmu-sram@0 {
+ reg = <0x0 0x20000>;
+ };
+ };
+
+ adsp: remoteproc@fe200000 {
+ compatible = "qcom,msm8226-adsp-pil";
+ reg = <0xfe200000 0x100>;
+
+ interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
+ <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
+
+ power-domains = <&rpmpd MSM8226_VDDCX>;
+ power-domain-names = "cx";
+
+ clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;
+ clock-names = "xo";
+
+ memory-region = <&adsp_region>;
+
+ qcom,smem-states = <&adsp_smp2p_out 0>;
+ qcom,smem-state-names = "stop";
+
+ status = "disabled";
+
+ smd-edge {
+ interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>;
+
+ qcom,ipc = <&apcs 8 8>;
+ qcom,smd-edge = <1>;
+
+ label = "lpass";
+ };
+ };
+
+ sram@fe805000 {
+ compatible = "qcom,msm8226-imem", "syscon", "simple-mfd";
+ reg = <0xfe805000 0x1000>;
+
+ reboot-mode {
+ compatible = "syscon-reboot-mode";
+ offset = <0x65c>;
+
+ mode-bootloader = <0x77665500>;
+ mode-normal = <0x77665501>;
+ mode-recovery = <0x77665502>;
+ };
+ };
};
thermal-zones {
--
2.43.0
^ permalink raw reply related [relevance 47%]
* [PATCH 3/3] pmdomain: qcom: rpmpd: Add MSM8974PRO+PMA8084 power domains
2024-02-10 14:12 86% [PATCH 0/3] Add RPMPD support for MSM8974 Luca Weiss
2024-02-10 14:12 84% ` [PATCH 1/3] dt-bindings: power: rpmpd: Add MSM8974 power domains Luca Weiss
2024-02-10 14:12 80% ` [PATCH 2/3] pmdomain: qcom: rpmpd: Add MSM8974+PM8841 " Luca Weiss
@ 2024-02-10 14:12 82% ` Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-10 14:12 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Ulf Hansson, Stephan Gerhold, Matti Lehtimäki
Cc: linux-arm-msm, devicetree, linux-kernel, linux-pm, Luca Weiss
Add the power domains CX & GFX found on MSM8974 devices that use PMA8084
instead of the standard PM8841+PM8941 combo.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
drivers/pmdomain/qcom/rpmpd.c | 41 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/drivers/pmdomain/qcom/rpmpd.c b/drivers/pmdomain/qcom/rpmpd.c
index bb28a7319bed..3cd0d1ad6188 100644
--- a/drivers/pmdomain/qcom/rpmpd.c
+++ b/drivers/pmdomain/qcom/rpmpd.c
@@ -252,6 +252,31 @@ static struct rpmpd cx_s2b_vfc = {
};
/* G(F)X */
+static struct rpmpd gfx_s7a_corner_ao;
+static struct rpmpd gfx_s7a_corner = {
+ .pd = { .name = "gfx", },
+ .peer = &gfx_s7a_corner_ao,
+ .res_type = RPMPD_SMPA,
+ .res_id = 7,
+ .key = KEY_CORNER,
+};
+
+static struct rpmpd gfx_s7a_corner_ao = {
+ .pd = { .name = "gfx_ao", },
+ .peer = &gfx_s7a_corner,
+ .active_only = true,
+ .res_type = RPMPD_SMPA,
+ .res_id = 7,
+ .key = KEY_CORNER,
+};
+
+static struct rpmpd gfx_s7a_vfc = {
+ .pd = { .name = "gfx_vfc", },
+ .res_type = RPMPD_SMPA,
+ .res_id = 7,
+ .key = KEY_FLOOR_CORNER,
+};
+
static struct rpmpd gfx_s2b_corner = {
.pd = { .name = "gfx", },
.res_type = RPMPD_SMPB,
@@ -728,6 +753,21 @@ static const struct rpmpd_desc msm8974_desc = {
.max_state = MAX_CORNER_RPMPD_STATE,
};
+static struct rpmpd *msm8974pro_pma8084_rpmpds[] = {
+ [MSM8974_VDDCX] = &cx_s2a_corner,
+ [MSM8974_VDDCX_AO] = &cx_s2a_corner_ao,
+ [MSM8974_VDDCX_VFC] = &cx_s2a_vfc,
+ [MSM8974_VDDGFX] = &gfx_s7a_corner,
+ [MSM8974_VDDGFX_AO] = &gfx_s7a_corner_ao,
+ [MSM8974_VDDGFX_VFC] = &gfx_s7a_vfc,
+};
+
+static const struct rpmpd_desc msm8974pro_pma8084_desc = {
+ .rpmpds = msm8974pro_pma8084_rpmpds,
+ .num_pds = ARRAY_SIZE(msm8974pro_pma8084_rpmpds),
+ .max_state = MAX_CORNER_RPMPD_STATE,
+};
+
static struct rpmpd *msm8976_rpmpds[] = {
[MSM8976_VDDCX] = &cx_s2a_lvl,
[MSM8976_VDDCX_AO] = &cx_s2a_lvl_ao,
@@ -922,6 +962,7 @@ static const struct of_device_id rpmpd_match_table[] = {
{ .compatible = "qcom,msm8939-rpmpd", .data = &msm8939_desc },
{ .compatible = "qcom,msm8953-rpmpd", .data = &msm8953_desc },
{ .compatible = "qcom,msm8974-rpmpd", .data = &msm8974_desc },
+ { .compatible = "qcom,msm8974pro-pma8084-rpmpd", .data = &msm8974pro_pma8084_desc },
{ .compatible = "qcom,msm8976-rpmpd", .data = &msm8976_desc },
{ .compatible = "qcom,msm8994-rpmpd", .data = &msm8994_desc },
{ .compatible = "qcom,msm8996-rpmpd", .data = &msm8996_desc },
--
2.43.0
^ permalink raw reply related [relevance 82%]
* [PATCH 2/3] pmdomain: qcom: rpmpd: Add MSM8974+PM8841 power domains
2024-02-10 14:12 86% [PATCH 0/3] Add RPMPD support for MSM8974 Luca Weiss
2024-02-10 14:12 84% ` [PATCH 1/3] dt-bindings: power: rpmpd: Add MSM8974 power domains Luca Weiss
@ 2024-02-10 14:12 80% ` Luca Weiss
2024-02-10 14:12 82% ` [PATCH 3/3] pmdomain: qcom: rpmpd: Add MSM8974PRO+PMA8084 " Luca Weiss
2 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-02-10 14:12 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Ulf Hansson, Stephan Gerhold, Matti Lehtimäki
Cc: linux-arm-msm, devicetree, linux-kernel, linux-pm, Luca Weiss
Add the power domains CX & GFX found on devices with MSM8974 and PM8841.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
drivers/pmdomain/qcom/rpmpd.c | 66 +++++++++++++++++++++++++++++++++++++++++++
1 file changed, 66 insertions(+)
diff --git a/drivers/pmdomain/qcom/rpmpd.c b/drivers/pmdomain/qcom/rpmpd.c
index 7796d65f96e8..bb28a7319bed 100644
--- a/drivers/pmdomain/qcom/rpmpd.c
+++ b/drivers/pmdomain/qcom/rpmpd.c
@@ -226,6 +226,31 @@ static struct rpmpd cx_s3a_vfl = {
.key = KEY_FLOOR_LEVEL,
};
+static struct rpmpd cx_s2b_corner_ao;
+static struct rpmpd cx_s2b_corner = {
+ .pd = { .name = "cx", },
+ .peer = &cx_s2b_corner_ao,
+ .res_type = RPMPD_SMPB,
+ .res_id = 2,
+ .key = KEY_CORNER,
+};
+
+static struct rpmpd cx_s2b_corner_ao = {
+ .pd = { .name = "cx_ao", },
+ .peer = &cx_s2b_corner,
+ .active_only = true,
+ .res_type = RPMPD_SMPB,
+ .res_id = 2,
+ .key = KEY_CORNER,
+};
+
+static struct rpmpd cx_s2b_vfc = {
+ .pd = { .name = "cx_vfc", },
+ .res_type = RPMPD_SMPB,
+ .res_id = 2,
+ .key = KEY_FLOOR_CORNER,
+};
+
/* G(F)X */
static struct rpmpd gfx_s2b_corner = {
.pd = { .name = "gfx", },
@@ -241,6 +266,31 @@ static struct rpmpd gfx_s2b_vfc = {
.key = KEY_FLOOR_CORNER,
};
+static struct rpmpd gfx_s4b_corner_ao;
+static struct rpmpd gfx_s4b_corner = {
+ .pd = { .name = "gfx", },
+ .peer = &gfx_s4b_corner_ao,
+ .res_type = RPMPD_SMPB,
+ .res_id = 4,
+ .key = KEY_CORNER,
+};
+
+static struct rpmpd gfx_s4b_corner_ao = {
+ .pd = { .name = "gfx_ao", },
+ .peer = &gfx_s4b_corner,
+ .active_only = true,
+ .res_type = RPMPD_SMPB,
+ .res_id = 4,
+ .key = KEY_CORNER,
+};
+
+static struct rpmpd gfx_s4b_vfc = {
+ .pd = { .name = "gfx_vfc", },
+ .res_type = RPMPD_SMPB,
+ .res_id = 4,
+ .key = KEY_FLOOR_CORNER,
+};
+
static struct rpmpd mx_rwmx0_lvl;
static struct rpmpd gx_rwgx0_lvl_ao;
static struct rpmpd gx_rwgx0_lvl = {
@@ -663,6 +713,21 @@ static const struct rpmpd_desc msm8953_desc = {
.max_state = RPM_SMD_LEVEL_TURBO,
};
+static struct rpmpd *msm8974_rpmpds[] = {
+ [MSM8974_VDDCX] = &cx_s2b_corner,
+ [MSM8974_VDDCX_AO] = &cx_s2b_corner_ao,
+ [MSM8974_VDDCX_VFC] = &cx_s2b_vfc,
+ [MSM8974_VDDGFX] = &gfx_s4b_corner,
+ [MSM8974_VDDGFX_AO] = &gfx_s4b_corner_ao,
+ [MSM8974_VDDGFX_VFC] = &gfx_s4b_vfc,
+};
+
+static const struct rpmpd_desc msm8974_desc = {
+ .rpmpds = msm8974_rpmpds,
+ .num_pds = ARRAY_SIZE(msm8974_rpmpds),
+ .max_state = MAX_CORNER_RPMPD_STATE,
+};
+
static struct rpmpd *msm8976_rpmpds[] = {
[MSM8976_VDDCX] = &cx_s2a_lvl,
[MSM8976_VDDCX_AO] = &cx_s2a_lvl_ao,
@@ -856,6 +921,7 @@ static const struct of_device_id rpmpd_match_table[] = {
{ .compatible = "qcom,msm8917-rpmpd", .data = &msm8917_desc },
{ .compatible = "qcom,msm8939-rpmpd", .data = &msm8939_desc },
{ .compatible = "qcom,msm8953-rpmpd", .data = &msm8953_desc },
+ { .compatible = "qcom,msm8974-rpmpd", .data = &msm8974_desc },
{ .compatible = "qcom,msm8976-rpmpd", .data = &msm8976_desc },
{ .compatible = "qcom,msm8994-rpmpd", .data = &msm8994_desc },
{ .compatible = "qcom,msm8996-rpmpd", .data = &msm8996_desc },
--
2.43.0
^ permalink raw reply related [relevance 80%]
* [PATCH 0/3] Add RPMPD support for MSM8974
@ 2024-02-10 14:12 86% Luca Weiss
2024-02-10 14:12 84% ` [PATCH 1/3] dt-bindings: power: rpmpd: Add MSM8974 power domains Luca Weiss
` (2 more replies)
0 siblings, 3 replies; 200+ results
From: Luca Weiss @ 2024-02-10 14:12 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Ulf Hansson, Stephan Gerhold, Matti Lehtimäki
Cc: linux-arm-msm, devicetree, linux-kernel, linux-pm, Luca Weiss
Add driver support for the RPM power domains found on the different
MSM8974 devices.
Devicetree integration will come at a later point since also some
mostly remoteproc drivers need to be adjusted.
Also the MX power domains on this SoC seems to work quite a bit
differently, we'd need to send raw voltages to it, so these are ignored
in this series.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Luca Weiss (3):
dt-bindings: power: rpmpd: Add MSM8974 power domains
pmdomain: qcom: rpmpd: Add MSM8974+PM8841 power domains
pmdomain: qcom: rpmpd: Add MSM8974PRO+PMA8084 power domains
.../devicetree/bindings/power/qcom,rpmpd.yaml | 2 +
drivers/pmdomain/qcom/rpmpd.c | 107 +++++++++++++++++++++
include/dt-bindings/power/qcom-rpmpd.h | 8 ++
3 files changed, 117 insertions(+)
---
base-commit: 6e3fa474051f3d276ea708bdb8e8e1f66d1d3ee5
change-id: 20240210-msm8974-rpmpd-6e48fe374275
Best regards,
--
Luca Weiss <luca@z3ntu.xyz>
^ permalink raw reply [relevance 86%]
* [PATCH 1/3] dt-bindings: power: rpmpd: Add MSM8974 power domains
2024-02-10 14:12 86% [PATCH 0/3] Add RPMPD support for MSM8974 Luca Weiss
@ 2024-02-10 14:12 84% ` Luca Weiss
2024-02-10 14:12 80% ` [PATCH 2/3] pmdomain: qcom: rpmpd: Add MSM8974+PM8841 " Luca Weiss
2024-02-10 14:12 82% ` [PATCH 3/3] pmdomain: qcom: rpmpd: Add MSM8974PRO+PMA8084 " Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-10 14:12 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Ulf Hansson, Stephan Gerhold, Matti Lehtimäki
Cc: linux-arm-msm, devicetree, linux-kernel, linux-pm, Luca Weiss
Add the compatibles and indexes for the rpmpd in MSM8974, both with the
standard PM8841+PM8941 PMICs but also devices found with PMA8084.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Documentation/devicetree/bindings/power/qcom,rpmpd.yaml | 2 ++
include/dt-bindings/power/qcom-rpmpd.h | 8 ++++++++
2 files changed, 10 insertions(+)
diff --git a/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml b/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml
index 2ff246cf8b81..929b7ef9c1bc 100644
--- a/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml
+++ b/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml
@@ -24,6 +24,8 @@ properties:
- qcom,msm8917-rpmpd
- qcom,msm8939-rpmpd
- qcom,msm8953-rpmpd
+ - qcom,msm8974-rpmpd
+ - qcom,msm8974pro-pma8084-rpmpd
- qcom,msm8976-rpmpd
- qcom,msm8994-rpmpd
- qcom,msm8996-rpmpd
diff --git a/include/dt-bindings/power/qcom-rpmpd.h b/include/dt-bindings/power/qcom-rpmpd.h
index 7f4e2983a4c5..9f0fe60ba745 100644
--- a/include/dt-bindings/power/qcom-rpmpd.h
+++ b/include/dt-bindings/power/qcom-rpmpd.h
@@ -308,6 +308,14 @@
#define MSM8953_VDDMX 5
#define MSM8953_VDDMX_AO 6
+/* MSM8974 Power Domain Indexes */
+#define MSM8974_VDDCX 0
+#define MSM8974_VDDCX_AO 1
+#define MSM8974_VDDCX_VFC 2
+#define MSM8974_VDDGFX 3
+#define MSM8974_VDDGFX_AO 4
+#define MSM8974_VDDGFX_VFC 5
+
/* MSM8976 Power Domain Indexes */
#define MSM8976_VDDCX 0
#define MSM8976_VDDCX_AO 1
--
2.43.0
^ permalink raw reply related [relevance 84%]
* Re: [PATCH] arm64: dts: qcom: qcs6490-rb3gen2: Declare GCC clocks protected
@ 2024-02-09 16:47 99% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-09 16:47 UTC (permalink / raw)
To: Bjorn Andersson, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Taniya Das
Cc: Dmitry Baryshkov, linux-arm-msm, devicetree, linux-kernel
On Fri Feb 9, 2024 at 5:21 PM CET, Bjorn Andersson wrote:
> The SC7180 GCC binding describes clocks which, due to the difference in
SC7180 -> SC7280?
With that fixed:
Reviewed-by: Luca Weiss <luca.weiss@fairphone.com>
> security model, are not accessible on the RB3gen2 - in the same way seen
> on QCM6490.
>
> Mark these clocks as protected, to allow the board to boot.
So the board never was able to boot before this patch?
>
> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
> ---
> I did notice Taniya's patch [1] after writing this patch. I'd prefer to
> merge this minimal set asap, to make the board boot, unless there's a
> strong argument for including those other clocks in the protected list.
>
> [1] https://lore.kernel.org/linux-arm-msm/20240208062836.19767-6-quic_tdas@quicinc.com/
> ---
> arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 18 ++++++++++++++++++
> 1 file changed, 18 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
> index 8bb7d13d85f6..97b1586f9f19 100644
> --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
> +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
> @@ -413,6 +413,24 @@ vreg_bob_3p296: bob {
> };
> };
>
> +&gcc {
> + protected-clocks = <GCC_CFG_NOC_LPASS_CLK>,
> + <GCC_EDP_CLKREF_EN>,
> + <GCC_MSS_CFG_AHB_CLK>,
> + <GCC_MSS_GPLL0_MAIN_DIV_CLK_SRC>,
> + <GCC_MSS_OFFLINE_AXI_CLK>,
> + <GCC_MSS_Q6SS_BOOT_CLK_SRC>,
> + <GCC_MSS_Q6_MEMNOC_AXI_CLK>,
> + <GCC_MSS_SNOC_AXI_CLK>,
> + <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
> + <GCC_QSPI_CORE_CLK>,
> + <GCC_QSPI_CORE_CLK_SRC>,
> + <GCC_SEC_CTRL_CLK_SRC>,
> + <GCC_WPSS_AHB_BDG_MST_CLK>,
> + <GCC_WPSS_AHB_CLK>,
> + <GCC_WPSS_RSCP_CLK>;
> +};
> +
> &qupv3_id_0 {
> status = "okay";
> };
>
> ---
> base-commit: b1d3a0e70c3881d2f8cf6692ccf7c2a4fb2d030d
> change-id: 20240209-qcm6490-gcc-protected-clocks-ee5fafdb76b3
>
> Best regards,
^ permalink raw reply [relevance 99%]
* [PATCH v2 2/2] usb: typec: ucsi: Add qcm6490-pmic-glink as needing PDOS quirk
2024-02-08 9:52 97% [PATCH v2 0/2] Fairphone 5 PMIC-GLINK support (USB-C, charger, fuel gauge) Luca Weiss
2024-02-08 9:52 98% ` [PATCH v2 1/2] dt-bindings: soc: qcom: qcom,pmic-glink: document QCM6490 compatible Luca Weiss
@ 2024-02-08 9:52 97% ` Luca Weiss
1 sibling, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-08 9:52 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Heikki Krogerus, Greg Kroah-Hartman,
cros-qcom-dts-watchers, Rob Herring
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel, linux-usb, Luca Weiss,
Dmitry Baryshkov
The QCM6490 Linux Android firmware needs this workaround as well. Add it
to the list.
Acked-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
drivers/usb/typec/ucsi/ucsi_glink.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/typec/ucsi/ucsi_glink.c b/drivers/usb/typec/ucsi/ucsi_glink.c
index 53a7ede8556d..0bd3f6dee678 100644
--- a/drivers/usb/typec/ucsi/ucsi_glink.c
+++ b/drivers/usb/typec/ucsi/ucsi_glink.c
@@ -298,6 +298,7 @@ static void pmic_glink_ucsi_destroy(void *data)
}
static const struct of_device_id pmic_glink_ucsi_of_quirks[] = {
+ { .compatible = "qcom,qcm6490-pmic-glink", .data = (void *)UCSI_NO_PARTNER_PDOS, },
{ .compatible = "qcom,sc8180x-pmic-glink", .data = (void *)UCSI_NO_PARTNER_PDOS, },
{ .compatible = "qcom,sc8280xp-pmic-glink", .data = (void *)UCSI_NO_PARTNER_PDOS, },
{ .compatible = "qcom,sm8350-pmic-glink", .data = (void *)UCSI_NO_PARTNER_PDOS, },
--
2.43.0
^ permalink raw reply related [relevance 97%]
* [PATCH v2 1/2] dt-bindings: soc: qcom: qcom,pmic-glink: document QCM6490 compatible
2024-02-08 9:52 97% [PATCH v2 0/2] Fairphone 5 PMIC-GLINK support (USB-C, charger, fuel gauge) Luca Weiss
@ 2024-02-08 9:52 98% ` Luca Weiss
2024-02-08 9:52 97% ` [PATCH v2 2/2] usb: typec: ucsi: Add qcm6490-pmic-glink as needing PDOS quirk Luca Weiss
1 sibling, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-08 9:52 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Heikki Krogerus, Greg Kroah-Hartman,
cros-qcom-dts-watchers, Rob Herring
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel, linux-usb, Luca Weiss,
Krzysztof Kozlowski
Document the QCM6490 compatible used to describe the pmic glink on this
platform.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
index 61df97ffe1e4..101c09554b80 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
@@ -23,6 +23,7 @@ properties:
oneOf:
- items:
- enum:
+ - qcom,qcm6490-pmic-glink
- qcom,sc8180x-pmic-glink
- qcom,sc8280xp-pmic-glink
- qcom,sm8350-pmic-glink
--
2.43.0
^ permalink raw reply related [relevance 98%]
* [PATCH v2 0/2] Fairphone 5 PMIC-GLINK support (USB-C, charger, fuel gauge)
@ 2024-02-08 9:52 97% Luca Weiss
2024-02-08 9:52 98% ` [PATCH v2 1/2] dt-bindings: soc: qcom: qcom,pmic-glink: document QCM6490 compatible Luca Weiss
2024-02-08 9:52 97% ` [PATCH v2 2/2] usb: typec: ucsi: Add qcm6490-pmic-glink as needing PDOS quirk Luca Weiss
0 siblings, 2 replies; 200+ results
From: Luca Weiss @ 2024-02-08 9:52 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Heikki Krogerus, Greg Kroah-Hartman,
cros-qcom-dts-watchers, Rob Herring
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel, linux-usb, Luca Weiss,
Krzysztof Kozlowski, Dmitry Baryshkov
This series adds all the necessary bits to enable USB-C role switching,
charger and fuel gauge (all via pmic-glink) on Fairphone 5.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
Changes in v2:
- Rebase on -next, drop applied patch
- Pick up tags
- Link to v1: https://lore.kernel.org/r/20231220-fp5-pmic-glink-v1-0-2a1f8e3c661c@fairphone.com
---
Luca Weiss (2):
dt-bindings: soc: qcom: qcom,pmic-glink: document QCM6490 compatible
usb: typec: ucsi: Add qcm6490-pmic-glink as needing PDOS quirk
Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml | 1 +
drivers/usb/typec/ucsi/ucsi_glink.c | 1 +
2 files changed, 2 insertions(+)
---
base-commit: d36e89e4c25c15302eb1820d45680f765847dad9
change-id: 20231220-fp5-pmic-glink-b01d4fa1c7ea
Best regards,
--
Luca Weiss <luca.weiss@fairphone.com>
^ permalink raw reply [relevance 97%]
* Re: [PATCH 0/3] Fairphone 5 PMIC-GLINK support (USB-C, charger, fuel gauge)
@ 2024-02-06 23:20 99% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-06 23:20 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Konrad Dybcio, Dmitry Baryshkov, Bjorn Andersson, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Heikki Krogerus,
cros-qcom-dts-watchers, ~postmarketos/upstreaming, phone-devel,
linux-arm-msm, devicetree, linux-kernel, linux-usb
On Tue Jan 2, 2024 at 2:53 PM CET, Greg Kroah-Hartman wrote:
> On Tue, Jan 02, 2024 at 02:43:24PM +0100, Luca Weiss wrote:
> > On Tue Jan 2, 2024 at 2:36 PM CET, Greg Kroah-Hartman wrote:
> > > On Thu, Dec 21, 2023 at 02:45:26PM +0100, Luca Weiss wrote:
> > > > On Thu Dec 21, 2023 at 1:53 PM CET, Konrad Dybcio wrote:
> > > > > On 21.12.2023 11:34, Dmitry Baryshkov wrote:
> > > > > > On Thu, 21 Dec 2023 at 09:33, Luca Weiss <luca.weiss@fairphone.com> wrote:
> > > > > >>
> > > > > >> On Wed Dec 20, 2023 at 1:32 PM CET, Konrad Dybcio wrote:
> > > > > >>> On 20.12.2023 11:02, Luca Weiss wrote:
> > > > > >>>> This series adds all the necessary bits to enable USB-C role switching,
> > > > > >>>> charger and fuel gauge (all via pmic-glink) on Fairphone 5.
> > > > > >>>>
> > > > > >>>> One thing that could be made different is the pmic-glink compatible.
> > > > > >>>> I've chosen to use qcm6490 compatible for it and not sc7280 since
> > > > > >>>> there's plenty of firmware variety on sc7280-based platforms and they
> > > > > >>>> might require different quirks in the future, so limit this PDOS quirk
> > > > > >>>> to just qcm6490 for now.
> > > > > >>>>
> > > > > >>>> If someone thinks it should be qcom,sc7280-pmic-glink, please let me
> > > > > >>>> know :)
> > > > > >>> IMO it's best to continue using the "base soc" (which just so happened
> > > > > >>> to fall onto sc7280 this time around) for all compatibles, unless the
> > > > > >>> derivatives actually had changes
> > > > > >>
> > > > > >> Hi Konrad,
> > > > > >>
> > > > > >> I think at some point I asked Dmitry what he thought and he mentioned
> > > > > >> qcm6490. Even found the message again:
> > > > > >>
> > > > > >>> well, since it is a firmware thing, you might want to emphasise that.
> > > > > >>> So from my POV qcm6490 makes more sense
> > > > > >>
> > > > > >> But yeah since it's likely that sc7280 firmware behaves the same as
> > > > > >> qcm6490 firmware it's probably okay to use sc7280 compatible, worst case
> > > > > >> we change it later :) I'll send a v2 with those changes.
> > > > > >
> > > > > > Worst case we end up with sc7280 which has yet another slightly
> > > > > > different UCSI / PMIC GLINK implementation, but the compatible string
> > > > > > is already taken.
> > > > > > I still suppose that this should be a qcm6490-related string.
> > > > > Right, let's keep qcm then
> > > >
> > > > Ack from my side also. Thanks for the feedback!
> > >
> > > This doesn't apply to my tree, where should it be going through?
> >
> > As far as I can see the dependency for the driver commit 1d103d6af241
> > ("usb: typec: ucsi: fix UCSI on buggy Qualcomm devices") was applied to
> > Bjorn's qcom tree, so 2/3 should also go there then.
> >
> > Patch 3/3 (arm64 dts) definitely also Bjorn's qcom tree.
> >
> > So that leaves patch 1/3 which Bjorn can probably pick up as well but
> > looking at git log you also picked up some for that file in the past,
> > dunno.
>
> Ok, for any remaining ones that want to be merged before 6.8-rc1 is out,
> feel free to add my:
>
> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
>
> If they don't get picked up by 6.8-rc1, feel free to rebase and send it
> for me to take through my tree.
Hi Greg,
This applies cleanly on -next as of next-20240206 still.
Could you please pick it up for v6.9? I can also send a v2 with only
the two remaining patches (dts was applied to qcom by Bjorn already).
Regards
Luca
>
> thanks,
>
> greg k-h
^ permalink raw reply [relevance 99%]
* Re: [PATCH 1/3] dt-bindings: mfd: qcom,spmi-pmic: Add pbs to SPMI device types
@ 2024-02-05 15:44 88% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-05 15:44 UTC (permalink / raw)
To: Luca Weiss, ~postmarketos/upstreaming
Cc: Krzysztof Kozlowski, linux-kernel, linux-arm-kernel,
linux-arm-msm, Conor Dooley, phone-devel, Lee Jones,
Konrad Dybcio, Bjorn Andersson, Will Deacon,
~postmarketos/upstreaming, Stephen Boyd, devicetree,
Catalin Marinas, Rob Herring
On Montag, 5. Februar 2024 14:46:45 CET Rob Herring wrote:
> On Mon, 05 Feb 2024 10:51:38 +0100, Luca Weiss wrote:
> > Add the PBS (Programmable Boot Sequencer) to the list of devices.
> >
> > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
> > ---
> >
> > Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml | 4 ++++
> > 1 file changed, 4 insertions(+)
>
> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> on your patch (DT_CHECKER_FLAGS is new in v5.13):
>
> yamllint warnings/errors:
>
> dtschema/dtc warnings/errors:
> /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/mfd/
> qcom,spmi-pmic.yaml: Error in referenced schema matching $id:
> http://devicetree.org/schemas/soc/qcom/qcom,pbs.yaml
These patches have been merged into linux-next recently, so should get into
the next release.
>
> doc reference errors (make refcheckdocs):
>
> See
> https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20240205-pmi
> 632-ppg-v1-1-e236c95a2099@fairphone.com
>
> The base for the series is generally the latest rc1. A different dependency
> should be noted in *this* patch.
>
> If you already ran 'make dt_binding_check' and didn't see the above
> error(s), then make sure 'yamllint' is installed and dt-schema is up to
> date:
>
> pip3 install dtschema --upgrade
>
> Please check and re-submit after running the above command yourself. Note
> that DT_SCHEMA_FILES can be set to your schema file to speed up checking
> your schema. However, it must be unset to test all examples with your
> schema.
^ permalink raw reply [relevance 88%]
* [PATCH 3/3] arm64: defconfig: Enable QCOM PBS
2024-02-05 9:51 99% [PATCH 0/3] Add PPG support for PMI632 LPG dtsi Luca Weiss
2024-02-05 9:51 99% ` [PATCH 1/3] dt-bindings: mfd: qcom,spmi-pmic: Add pbs to SPMI device types Luca Weiss
2024-02-05 9:51 98% ` [PATCH 2/3] arm64: dts: qcom: pmi632: Add PBS client and use in LPG node Luca Weiss
@ 2024-02-05 9:51 99% ` Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-05 9:51 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Lee Jones, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Stephen Boyd, Catalin Marinas,
Will Deacon
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel, linux-arm-kernel, Luca Weiss
Enable the PBS driver used on e.g. PMI632.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index cfa3e00def09..e92a5fd9f660 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -1375,6 +1375,7 @@ CONFIG_QCOM_STATS=m
CONFIG_QCOM_WCNSS_CTRL=m
CONFIG_QCOM_APR=m
CONFIG_QCOM_ICC_BWMON=m
+CONFIG_QCOM_PBS=m
CONFIG_ARCH_R8A77995=y
CONFIG_ARCH_R8A77990=y
CONFIG_ARCH_R8A77951=y
--
2.43.0
^ permalink raw reply related [relevance 99%]
* [PATCH 2/3] arm64: dts: qcom: pmi632: Add PBS client and use in LPG node
2024-02-05 9:51 99% [PATCH 0/3] Add PPG support for PMI632 LPG dtsi Luca Weiss
2024-02-05 9:51 99% ` [PATCH 1/3] dt-bindings: mfd: qcom,spmi-pmic: Add pbs to SPMI device types Luca Weiss
@ 2024-02-05 9:51 98% ` Luca Weiss
2024-02-05 9:51 99% ` [PATCH 3/3] arm64: defconfig: Enable QCOM PBS Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-02-05 9:51 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Lee Jones, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Stephen Boyd, Catalin Marinas,
Will Deacon
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel, linux-arm-kernel, Luca Weiss
With SDAM + PBS the LPG driver can configure the LED pattern in
hardware.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
arch/arm64/boot/dts/qcom/pmi632.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/pmi632.dtsi b/arch/arm64/boot/dts/qcom/pmi632.dtsi
index 4eb79e0ce40a..d2bb49a619d7 100644
--- a/arch/arm64/boot/dts/qcom/pmi632.dtsi
+++ b/arch/arm64/boot/dts/qcom/pmi632.dtsi
@@ -127,6 +127,11 @@ pmi632_adc_tm: adc-tm@3500 {
status = "disabled";
};
+ pmi632_pbs_client3: pbs@7400 {
+ compatible = "qcom,pmi632-pbs", "qcom,pbs";
+ reg = <0x7400>;
+ };
+
pmi632_sdam_7: nvram@b600 {
compatible = "qcom,spmi-sdam";
reg = <0xb600>;
@@ -155,6 +160,10 @@ pmic@3 {
pmi632_lpg: pwm {
compatible = "qcom,pmi632-lpg";
+ nvmem = <&pmi632_sdam_7>;
+ nvmem-names = "lpg_chan_sdam";
+ qcom,pbs = <&pmi632_pbs_client3>;
+
#address-cells = <1>;
#size-cells = <0>;
#pwm-cells = <2>;
--
2.43.0
^ permalink raw reply related [relevance 98%]
* [PATCH 1/3] dt-bindings: mfd: qcom,spmi-pmic: Add pbs to SPMI device types
2024-02-05 9:51 99% [PATCH 0/3] Add PPG support for PMI632 LPG dtsi Luca Weiss
@ 2024-02-05 9:51 99% ` Luca Weiss
2024-02-05 9:51 98% ` [PATCH 2/3] arm64: dts: qcom: pmi632: Add PBS client and use in LPG node Luca Weiss
2024-02-05 9:51 99% ` [PATCH 3/3] arm64: defconfig: Enable QCOM PBS Luca Weiss
2 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-02-05 9:51 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Lee Jones, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Stephen Boyd, Catalin Marinas,
Will Deacon
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel, linux-arm-kernel, Luca Weiss
Add the PBS (Programmable Boot Sequencer) to the list of devices.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml
index 8103fb61a16c..b7f01cbb8fff 100644
--- a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml
+++ b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml
@@ -160,6 +160,10 @@ patternProperties:
type: object
$ref: /schemas/nvmem/qcom,spmi-sdam.yaml#
+ "^pbs@[0-9a-f]+$":
+ type: object
+ $ref: /schemas/soc/qcom/qcom,pbs.yaml#
+
"phy@[0-9a-f]+$":
type: object
$ref: /schemas/phy/qcom,snps-eusb2-repeater.yaml#
--
2.43.0
^ permalink raw reply related [relevance 99%]
* [PATCH 0/3] Add PPG support for PMI632 LPG dtsi
@ 2024-02-05 9:51 99% Luca Weiss
2024-02-05 9:51 99% ` [PATCH 1/3] dt-bindings: mfd: qcom,spmi-pmic: Add pbs to SPMI device types Luca Weiss
` (2 more replies)
0 siblings, 3 replies; 200+ results
From: Luca Weiss @ 2024-02-05 9:51 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Lee Jones, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Stephen Boyd, Catalin Marinas,
Will Deacon
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel, linux-arm-kernel, Luca Weiss
Hook up the PBS & SDAM to the PMI632 LPG so that we can use the
hw_pattern for the LEDs.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
Luca Weiss (3):
dt-bindings: mfd: qcom,spmi-pmic: Add pbs to SPMI device types
arm64: dts: qcom: pmi632: Add PBS client and use in LPG node
arm64: defconfig: Enable QCOM PBS
Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml | 4 ++++
arch/arm64/boot/dts/qcom/pmi632.dtsi | 9 +++++++++
arch/arm64/configs/defconfig | 1 +
3 files changed, 14 insertions(+)
---
base-commit: 1f790ac9c84028d89ef4dbb28ecc5771fc352e25
change-id: 20240117-pmi632-ppg-f1efb4318722
Best regards,
--
Luca Weiss <luca.weiss@fairphone.com>
^ permalink raw reply [relevance 99%]
* Re: [PATCH v3 0/6] usb: typec: qcom-pmic-typec: enable support for PMI632 PMIC
@ 2024-01-31 7:49 99% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-01-31 7:49 UTC (permalink / raw)
To: Dmitry Baryshkov, Bjorn Andersson, Konrad Dybcio, Liam Girdwood,
Mark Brown, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Wesley Cheng, Bryan O'Donoghue, Greg Kroah-Hartman,
Guenter Roeck, Heikki Krogerus
Cc: linux-arm-msm, linux-kernel, devicetree, linux-usb,
Krzysztof Kozlowski, Vladimir Zapolskiy
On Tue Jan 30, 2024 at 8:32 PM CET, Dmitry Baryshkov wrote:
> The Qualcomm PMI632 PMIC (found on Qualcomm Robotics RB2 platform)
> doesn't support USB Power Delivery. However this PMIC still supports
> handling of the Type-C port (orientation detection, etc). Reuse exiting
> qcom-pmic-typec driver to support Type-C related functionality of this
> PMIC. Use this to enable USB-C connector support on the RB2 platform.
Hi Dmitry,
In case you send a new revision you can drop my Tested-by on the RB2
patches since it's a different platform, and the tag on the dt-bindings
patches also don't make too much sense I think?
Thanks!
Regards
Luca
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> Changes in v3:
> - Added constraints to qcom,pmic-typec / reg property (Krzysztof)
> - Dropped merged TCPM and Qualcomm PHY patches
> - Link to v2: https://lore.kernel.org/r/20240113-pmi632-typec-v2-0-182d9aa0a5b3@linaro.org
>
> Changes in v2:
> - Split qcom_pmic_typec_pdphy_set_roles() changes to separate patch
> (Konrad)
> - Simplified devm_kzalloc / sizeof() argument (Konrad)
> - Made start / stop callbacks mandatory (Bryan)
> - Reworked Type-C port handling into a backend similar to PD PHY (Bryan)
> - Made more qcom-pmic-typec data static const (Bryan)
> - Squashed usbc PHY single-lane removal patch (Konrad)
> - Further usbc PHY cleanup (Konrad)
> - Fixed order of DT properties in pmi632.dtsi (Konrad)
> - Instead of specifying bogus PDOs for the port, specify pd-disable and
> typec-power-opmode properties for the connector
> - Moved orientation-switch / usb-dual-role properties to sm6115.dtsi
> (Konrad)
> - Linked usb_dwc3_ss and usb_qmpphy_usb_ss_in
> - Link to v1: https://lore.kernel.org/r/20240113-pmi632-typec-v1-0-de7dfd459353@linaro.org
>
> ---
> Dmitry Baryshkov (5):
> dt-bindings: regulator: qcom,usb-vbus-regulator: add support for PMI632
> dt-bindings: usb: qcom,pmic-typec: add support for the PMI632 block
> usb: typec: qcom-pmic-typec: add support for PMI632 PMIC
> arm64: dts: qcom: pmi632: define USB-C related blocks
> arm64: dts: qcom: qrb4210-rb2: enable USB-C port handling
>
> Vladimir Zapolskiy (1):
> arm64: dts: qcom: sm6115: drop pipe clock selection
>
> .../regulator/qcom,usb-vbus-regulator.yaml | 9 ++-
> .../devicetree/bindings/usb/qcom,pmic-typec.yaml | 32 ++++++++-
> arch/arm64/boot/dts/qcom/pmi632.dtsi | 30 ++++++++
> arch/arm64/boot/dts/qcom/qrb4210-rb2.dts | 50 +++++++++++++-
> arch/arm64/boot/dts/qcom/sm6115.dtsi | 44 +++++++++++-
> drivers/usb/typec/tcpm/qcom/Makefile | 3 +-
> drivers/usb/typec/tcpm/qcom/qcom_pmic_typec.c | 30 ++++++--
> .../usb/typec/tcpm/qcom/qcom_pmic_typec_pdphy.h | 2 +
> .../typec/tcpm/qcom/qcom_pmic_typec_pdphy_stub.c | 80 ++++++++++++++++++++++
> 9 files changed, 266 insertions(+), 14 deletions(-)
> ---
> base-commit: 41d66f96d0f15a0a2ad6fa2208f6bac1a66cbd52
> change-id: 20240112-pmi632-typec-4c7533092387
>
> Best regards,
^ permalink raw reply [relevance 99%]
* Re: [PATCH] media: dt-bindings: qcom,sc7280-venus: Allow one IOMMU entry
@ 2024-01-30 7:47 99% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-01-30 7:47 UTC (permalink / raw)
To: Conor Dooley, Vikash Garodia
Cc: Bjorn Andersson, Konrad Dybcio, Stanimir Varbanov,
Vikash Garodia, Bryan O'Donoghue, Mauro Carvalho Chehab,
Rob Herring, Krzysztof Kozlowski, Conor Dooley,
~postmarketos/upstreaming, phone-devel, Stanimir Varbanov,
linux-arm-msm, linux-media, devicetree, linux-kernel
On Mon Jan 29, 2024 at 6:37 PM CET, Conor Dooley wrote:
> On Mon, Jan 29, 2024 at 08:48:54AM +0100, Luca Weiss wrote:
> > Some SC7280-based boards crash when providing the "secure_non_pixel"
> > context bank, so allow only one iommu in the bindings also.
> >
> > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
>
> Do we have any idea why this happens? How is someone supposed to know
> whether or not their system requires you to only provide one iommu?
> Yes, a crash might be the obvious answer, but is there a way of knowing
> without the crashes?
+CC Vikash Garodia
Unfortunately I don't really have much more information than this
message here:
https://lore.kernel.org/linux-arm-msm/ff021f49-f81b-0fd1-bd2c-895dbbb03d56@quicinc.com/
And see also the following replies for a bit more context, like this
one:
https://lore.kernel.org/linux-arm-msm/a4e8b531-49f9-f4a1-51cb-e422c56281cc@quicinc.com/
Maybe Vikash can add some more info regarding this.
Regards
Luca
>
> Cheers,
> Conor.
>
> > ---
> > Reference:
> > https://lore.kernel.org/linux-arm-msm/20231201-sc7280-venus-pas-v3-2-bc132dc5fc30@fairphone.com/
> > ---
> > Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml b/Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml
> > index 8f9b6433aeb8..10c334e6b3dc 100644
> > --- a/Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml
> > +++ b/Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml
> > @@ -43,6 +43,7 @@ properties:
> > - const: vcodec_bus
> >
> > iommus:
> > + minItems: 1
> > maxItems: 2
> >
> > interconnects:
> >
> > ---
> > base-commit: 596764183be8ebb13352b281a442a1f1151c9b06
> > change-id: 20240129-sc7280-venus-bindings-6e62a99620de
> >
> > Best regards,
> > --
> > Luca Weiss <luca.weiss@fairphone.com>
> >
^ permalink raw reply [relevance 99%]
* [PATCH] media: dt-bindings: qcom,sc7280-venus: Allow one IOMMU entry
@ 2024-01-29 7:48 98% Luca Weiss
0 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-01-29 7:48 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Stanimir Varbanov,
Vikash Garodia, Bryan O'Donoghue, Mauro Carvalho Chehab,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: ~postmarketos/upstreaming, phone-devel, Stanimir Varbanov,
linux-arm-msm, linux-media, devicetree, linux-kernel, Luca Weiss
Some SC7280-based boards crash when providing the "secure_non_pixel"
context bank, so allow only one iommu in the bindings also.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
Reference:
https://lore.kernel.org/linux-arm-msm/20231201-sc7280-venus-pas-v3-2-bc132dc5fc30@fairphone.com/
---
Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml b/Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml
index 8f9b6433aeb8..10c334e6b3dc 100644
--- a/Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml
+++ b/Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml
@@ -43,6 +43,7 @@ properties:
- const: vcodec_bus
iommus:
+ minItems: 1
maxItems: 2
interconnects:
---
base-commit: 596764183be8ebb13352b281a442a1f1151c9b06
change-id: 20240129-sc7280-venus-bindings-6e62a99620de
Best regards,
--
Luca Weiss <luca.weiss@fairphone.com>
^ permalink raw reply related [relevance 98%]
* Re: [PATCH RFC 2/2] arm64: dts: qcom: msm8953: Add GPU
@ 2024-01-27 17:32 88% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-01-27 17:32 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Vladimir Lypak,
Konrad Dybcio
Cc: linux-arm-msm, devicetree, linux-kernel
On Freitag, 26. Jänner 2024 00:50:43 CET Konrad Dybcio wrote:
> On 1/25/24 22:56, Luca Weiss wrote:
> > From: Vladimir Lypak <vladimir.lypak@gmail.com>
> >
> > Add the GPU node for the Adreno 506 found on this family of SoCs. The
> > clock speeds are a bit different per SoC variant, SDM450 maxes out at
> > 600MHz while MSM8953 (= SDM625) goes up to 650MHz and SDM632 goes up to
> > 725MHz.
> >
> > To achieve this, create a new sdm450.dtsi to hold the 600MHz OPP and
> > use the new dtsi for sdm450-motorola-ali.
> >
> > Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
> > Co-developed-by: Luca Weiss <luca@z3ntu.xyz>
> > Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
> > ---
> >
> > arch/arm64/boot/dts/qcom/msm8953.dtsi | 115
> > +++++++++++++++++++++++
> > arch/arm64/boot/dts/qcom/sdm450-motorola-ali.dts | 2 +-
> > arch/arm64/boot/dts/qcom/sdm450.dtsi | 14 +++
> > arch/arm64/boot/dts/qcom/sdm632.dtsi | 8 ++
> > 4 files changed, 138 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi
> > b/arch/arm64/boot/dts/qcom/msm8953.dtsi index 91d083871ab0..1fe0c0c4fd15
> > 100644
> > --- a/arch/arm64/boot/dts/qcom/msm8953.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi
> > @@ -1046,6 +1046,94 @@ mdss_dsi1_phy: phy@1a96400 {
> >
> > };
> >
> > };
> >
> > + gpu: gpu@1c00000 {
> > + compatible = "qcom,adreno-506.0", "qcom,adreno";
> > + reg = <0x01c00000 0x40000>;
> > + reg-names = "kgsl_3d0_reg_memory";
> > + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
> > +
> > + clocks = <&gcc GCC_OXILI_GFX3D_CLK>,
> > + <&gcc GCC_OXILI_AHB_CLK>,
> > + <&gcc GCC_BIMC_GFX_CLK>,
> > + <&gcc GCC_BIMC_GPU_CLK>,
> > + <&gcc GCC_OXILI_TIMER_CLK>,
> > + <&gcc GCC_OXILI_AON_CLK>;
> > + clock-names = "core",
> > + "iface",
> > + "mem_iface",
> > + "alt_mem_iface",
> > + "rbbmtimer",
> > + "alwayson";
> > + power-domains = <&gcc OXILI_GX_GDSC>;
> > +
> > + iommus = <&gpu_iommu 0>;
> > + operating-points-v2 = <&gpu_opp_table>;
> > +
> > + #cooling-cells = <2>;
> > +
> > + status = "disabled";
> > +
> > + zap-shader {
> > + memory-region = <&zap_shader_region>;
> > + };
> > +
> > + gpu_opp_table: opp-table {
> > + compatible = "operating-points-v2";
> > +
> > + opp-19200000 {
> > + opp-hz = /bits/ 64 <19200000>;
> > + opp-supported-hw = <0xff>;
> > + required-opps = <&rpmpd_opp_min_svs>;
> > + };
>
> If you remove all OPPs but this one, can the GPU still spit out pixels?
Yep, phosh is starting and is rendering at a few fps.
fairphone-fp3:~$ cat /sys/devices/platform/soc@0/1c00000.gpu/devfreq/1c00000.gpu/min_freq
19200000
fairphone-fp3:~$ cat /sys/devices/platform/soc@0/1c00000.gpu/devfreq/1c00000.gpu/max_freq
19200000
fairphone-fp3:~$ cat /sys/devices/platform/soc@0/1c00000.gpu/devfreq/1c00000.gpu/cur_freq
19200000
Regards
Luca
>
> Konrad
^ permalink raw reply [relevance 88%]
* Re: [PATCH RFC 1/2] arm64: dts: qcom: msm8953: Add GPU IOMMU
@ 2024-01-27 17:24 88% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-01-27 17:24 UTC (permalink / raw)
To: Dmitry Baryshkov, ~postmarketos/upstreaming, phone-devel,
Bjorn Andersson, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Vladimir Lypak, Konrad Dybcio
Cc: linux-arm-msm, devicetree, linux-kernel
On Freitag, 26. Jänner 2024 00:49:55 CET Konrad Dybcio wrote:
> On 1/25/24 23:24, Dmitry Baryshkov wrote:
> > On 25/01/2024 23:56, Luca Weiss wrote:
> >> From: Vladimir Lypak <vladimir.lypak@gmail.com>
> >>
> >> Add the IOMMU used for the GPU on MSM8953.
> >>
> >> Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
> >> ---
> >> arch/arm64/boot/dts/qcom/msm8953.dtsi | 31
> >> +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+)
> >>
> >> diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi
> >> b/arch/arm64/boot/dts/qcom/msm8953.dtsi index dcb5c98b793c..91d083871ab0
> >> 100644
> >> --- a/arch/arm64/boot/dts/qcom/msm8953.dtsi
> >> +++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi
> >> @@ -1046,6 +1046,37 @@ mdss_dsi1_phy: phy@1a96400 {
> >> };
> >> };
> >> + gpu_iommu: iommu@1c48000 {
> >
> > Nit: most of the platforms use the adreno_smmu label. But maybe the
> > msm-iommu vs arm-smmu makes difference here.
> Not really :)
>
> Please keep the labels unified
Ack, renaming to adreno_smmu
>
> > Nevertheless:
> >
> > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> >
> >> + compatible = "qcom,msm8953-iommu", "qcom,msm-iommu-v2";
> >> + ranges = <0 0x01c48000 0x8000>;
> >> +
> >> + clocks = <&gcc GCC_OXILI_AHB_CLK>,
> >> + <&gcc GCC_BIMC_GFX_CLK>;
>
> And align these
They are?
Also any comment about the issues listed in the cover letter?
Regards
Luca
>
> Konrad
^ permalink raw reply [relevance 88%]
* Re: [PATCH] arm64: dts: qcom: sm6350: Add tsens thermal zones
@ 2024-01-26 7:49 99% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-01-26 7:49 UTC (permalink / raw)
To: Konrad Dybcio, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel
On Thu Jan 25, 2024 at 5:30 PM CET, Konrad Dybcio wrote:
>
>
> On 1/24/24 16:31, Luca Weiss wrote:
> > Add the definitions for the various thermal zones found on the SM6350
> > SoC. Hooking up GPU and CPU cooling can limit the clock speeds there to
> > reduce the temperature again to good levels.
> >
> > Most thermal zones only have one critical temperature configured at
> > 125°C which can be mostly considered a placeholder until those zones can
> > be hooked up to cooling.
> >
> > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
> > ---
>
> [...]
>
> > + cpuss0-thermal {
> > + polling-delay-passive = <0>;
> > + polling-delay = <0>;
> > +
> > + thermal-sensors = <&tsens0 7>;
>
> cpuss0-thermal and cpuss1-thermal are very likely the sensors for
> cluster0/1, can you test that out, perhaps with corepinning+stress?
Not really, according to my docs the CPUs aren't placed symmetrically on
the SoC and cpuss0 and cpuss1 are just somewhere inbetween all of the 6x
LITTLE cores, the 2x big cores are a little bit further away. So apart
from hooking up all of the cores for cooling for cpuss0 & cpuss1 I don't
have a great idea what to do here. Shall I do that?
Regards
Luca
> You can then assign multiple cpu cooling devices.
>
> LGTM otherwise!
>
>
> Konrad
^ permalink raw reply [relevance 99%]
* [PATCH RFC 2/2] arm64: dts: qcom: msm8953: Add GPU
2024-01-25 21:56 77% [PATCH RFC 0/2] Add GPU support to MSM8953 SoC Luca Weiss
2024-01-25 21:56 86% ` [PATCH RFC 1/2] arm64: dts: qcom: msm8953: Add GPU IOMMU Luca Weiss
@ 2024-01-25 21:56 71% ` Luca Weiss
2 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-01-25 21:56 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Vladimir Lypak
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss
From: Vladimir Lypak <vladimir.lypak@gmail.com>
Add the GPU node for the Adreno 506 found on this family of SoCs. The
clock speeds are a bit different per SoC variant, SDM450 maxes out at
600MHz while MSM8953 (= SDM625) goes up to 650MHz and SDM632 goes up to
725MHz.
To achieve this, create a new sdm450.dtsi to hold the 600MHz OPP and
use the new dtsi for sdm450-motorola-ali.
Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
Co-developed-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
arch/arm64/boot/dts/qcom/msm8953.dtsi | 115 +++++++++++++++++++++++
arch/arm64/boot/dts/qcom/sdm450-motorola-ali.dts | 2 +-
arch/arm64/boot/dts/qcom/sdm450.dtsi | 14 +++
arch/arm64/boot/dts/qcom/sdm632.dtsi | 8 ++
4 files changed, 138 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi
index 91d083871ab0..1fe0c0c4fd15 100644
--- a/arch/arm64/boot/dts/qcom/msm8953.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi
@@ -1046,6 +1046,94 @@ mdss_dsi1_phy: phy@1a96400 {
};
};
+ gpu: gpu@1c00000 {
+ compatible = "qcom,adreno-506.0", "qcom,adreno";
+ reg = <0x01c00000 0x40000>;
+ reg-names = "kgsl_3d0_reg_memory";
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+
+ clocks = <&gcc GCC_OXILI_GFX3D_CLK>,
+ <&gcc GCC_OXILI_AHB_CLK>,
+ <&gcc GCC_BIMC_GFX_CLK>,
+ <&gcc GCC_BIMC_GPU_CLK>,
+ <&gcc GCC_OXILI_TIMER_CLK>,
+ <&gcc GCC_OXILI_AON_CLK>;
+ clock-names = "core",
+ "iface",
+ "mem_iface",
+ "alt_mem_iface",
+ "rbbmtimer",
+ "alwayson";
+ power-domains = <&gcc OXILI_GX_GDSC>;
+
+ iommus = <&gpu_iommu 0>;
+ operating-points-v2 = <&gpu_opp_table>;
+
+ #cooling-cells = <2>;
+
+ status = "disabled";
+
+ zap-shader {
+ memory-region = <&zap_shader_region>;
+ };
+
+ gpu_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-19200000 {
+ opp-hz = /bits/ 64 <19200000>;
+ opp-supported-hw = <0xff>;
+ required-opps = <&rpmpd_opp_min_svs>;
+ };
+
+ opp-133300000 {
+ opp-hz = /bits/ 64 <133300000>;
+ opp-supported-hw = <0xff>;
+ required-opps = <&rpmpd_opp_min_svs>;
+ };
+
+ opp-216000000 {
+ opp-hz = /bits/ 64 <216000000>;
+ opp-supported-hw = <0xff>;
+ required-opps = <&rpmpd_opp_low_svs>;
+ };
+
+ opp-320000000 {
+ opp-hz = /bits/ 64 <320000000>;
+ opp-supported-hw = <0xff>;
+ required-opps = <&rpmpd_opp_svs>;
+ };
+
+ opp-400000000 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-supported-hw = <0xff>;
+ required-opps = <&rpmpd_opp_svs_plus>;
+ };
+
+ opp-510000000 {
+ opp-hz = /bits/ 64 <510000000>;
+ opp-supported-hw = <0xff>;
+ required-opps = <&rpmpd_opp_nom>;
+ };
+
+ opp-560000000 {
+ opp-hz = /bits/ 64 <560000000>;
+ opp-supported-hw = <0xff>;
+ required-opps = <&rpmpd_opp_nom_plus>;
+ };
+
+ /*
+ * This opp is only available on msm8953 and
+ * sdm632, the max for sdm450 is 600MHz.
+ */
+ opp-650000000 {
+ opp-hz = /bits/ 64 <650000000>;
+ opp-supported-hw = <0xff>;
+ required-opps = <&rpmpd_opp_turbo>;
+ };
+ };
+ };
+
gpu_iommu: iommu@1c48000 {
compatible = "qcom,msm8953-iommu", "qcom,msm-iommu-v2";
ranges = <0 0x01c48000 0x8000>;
@@ -2045,6 +2133,33 @@ map0 {
};
};
};
+
+ gpu-thermal {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&tsens0 15>;
+
+ trips {
+ gpu_alert: trip-point0 {
+ temperature = <70000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ gpu_crit: crit {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&gpu_alert>;
+ cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
};
timer {
diff --git a/arch/arm64/boot/dts/qcom/sdm450-motorola-ali.dts b/arch/arm64/boot/dts/qcom/sdm450-motorola-ali.dts
index 362be5719dd2..e27f3c5d5bba 100644
--- a/arch/arm64/boot/dts/qcom/sdm450-motorola-ali.dts
+++ b/arch/arm64/boot/dts/qcom/sdm450-motorola-ali.dts
@@ -4,7 +4,7 @@
*/
/dts-v1/;
-#include "msm8953.dtsi"
+#include "sdm450.dtsi"
#include "pm8953.dtsi"
#include "pmi8950.dtsi"
diff --git a/arch/arm64/boot/dts/qcom/sdm450.dtsi b/arch/arm64/boot/dts/qcom/sdm450.dtsi
new file mode 100644
index 000000000000..b222aeb459a3
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sdm450.dtsi
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/* Copyright (c) 2023, Luca Weiss <luca@z3ntu.xyz> */
+
+#include "msm8953.dtsi"
+
+&gpu_opp_table {
+ /delete-node/ opp-650000000;
+
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-supported-hw = <0xff>;
+ required-opps = <&rpmpd_opp_turbo>;
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/sdm632.dtsi b/arch/arm64/boot/dts/qcom/sdm632.dtsi
index 645b9f6a801f..95b025ea260b 100644
--- a/arch/arm64/boot/dts/qcom/sdm632.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm632.dtsi
@@ -79,3 +79,11 @@ &CPU7 {
compatible = "qcom,kryo250";
capacity-dmips-mhz = <1980>;
};
+
+&gpu_opp_table {
+ opp-725000000 {
+ opp-hz = /bits/ 64 <725000000>;
+ opp-supported-hw = <0xff>;
+ required-opps = <&rpmpd_opp_turbo>;
+ };
+};
--
2.43.0
^ permalink raw reply related [relevance 71%]
* [PATCH RFC 1/2] arm64: dts: qcom: msm8953: Add GPU IOMMU
2024-01-25 21:56 77% [PATCH RFC 0/2] Add GPU support to MSM8953 SoC Luca Weiss
@ 2024-01-25 21:56 86% ` Luca Weiss
2024-01-25 21:56 71% ` [PATCH RFC 2/2] arm64: dts: qcom: msm8953: Add GPU Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-01-25 21:56 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Vladimir Lypak
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss
From: Vladimir Lypak <vladimir.lypak@gmail.com>
Add the IOMMU used for the GPU on MSM8953.
Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
---
arch/arm64/boot/dts/qcom/msm8953.dtsi | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi
index dcb5c98b793c..91d083871ab0 100644
--- a/arch/arm64/boot/dts/qcom/msm8953.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi
@@ -1046,6 +1046,37 @@ mdss_dsi1_phy: phy@1a96400 {
};
};
+ gpu_iommu: iommu@1c48000 {
+ compatible = "qcom,msm8953-iommu", "qcom,msm-iommu-v2";
+ ranges = <0 0x01c48000 0x8000>;
+
+ clocks = <&gcc GCC_OXILI_AHB_CLK>,
+ <&gcc GCC_BIMC_GFX_CLK>;
+ clock-names = "iface", "bus";
+
+ power-domains = <&gcc OXILI_CX_GDSC>;
+
+ qcom,iommu-secure-id = <18>;
+
+ #address-cells = <1>;
+ #iommu-cells = <1>;
+ #size-cells = <1>;
+
+ /* gfx3d_user */
+ iommu-ctx@0 {
+ compatible = "qcom,msm-iommu-v2-ns";
+ reg = <0x0000 0x1000>;
+ interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ /* gfx3d_secure */
+ iommu-ctx@2000 {
+ compatible = "qcom,msm-iommu-v2-sec";
+ reg = <0x2000 0x1000>;
+ interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ };
+
apps_iommu: iommu@1e20000 {
compatible = "qcom,msm8953-iommu", "qcom,msm-iommu-v1";
ranges = <0 0x01e20000 0x20000>;
--
2.43.0
^ permalink raw reply related [relevance 86%]
* [PATCH RFC 0/2] Add GPU support to MSM8953 SoC
@ 2024-01-25 21:56 77% Luca Weiss
2024-01-25 21:56 86% ` [PATCH RFC 1/2] arm64: dts: qcom: msm8953: Add GPU IOMMU Luca Weiss
` (2 more replies)
0 siblings, 3 replies; 200+ results
From: Luca Weiss @ 2024-01-25 21:56 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Vladimir Lypak
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss
Add the GPU IOMMU and GPU nodes to the msm8953 dtsi so GPU can work.
First of all, functionally this series looks fine, tested on
sdm632-fairphone-fp3.
Secondly and the reason this is marked RFC for now is basically just dt
bindings check fail, and some questions regarding IOMMU compatible.
Basically I'm unsure what compatible (or even driver) IOMMU should use.
qcom,msm-iommu-v2 is now in the patchset which seems to be okay, and
also should handle the gfx3d_secure secure context correctly. Apart from
some special handling there qcom,msm-iommu-v1 compatible is equivalent
on the driver side.
Currently the dt bindings say qcom,msm8953-iommu should be followed by
qcom,msm-iommu-v1 which is the case for apps_iommu. But if we use
qcom,msm-iommu-v2 for gpu_iommu then we can't re-use the same
qcom,msm8953-iommu I think.
Possible solutions:
1. Switch apps_iommu to use qcom,msm-iommu-v2 in dts & bindings? Since
there's basically no special handling for either in the driver I
don't forsee any problems. Then we can also use -v2 for gpu_iommu no
problem.
2. Use qcom,msm-iommu-v1 for gpu_iommu? From some testing it also seems
to work, I guess because the secure context is never used?
3. Use arm_smmu driver for gpu_iommu? Vladimir Lypak has suggested that,
but that would at least need some more patching to work on msm8953.
I probably don't have the motivation to take this on myself. Also
what benefit would it bring?
Hope I haven't rambled too long here and it's somewhat understandable.
Please let me know what you think, which direction we can take to
resolve this.
(Also GPU clock-names dt-schema check fails but that seems to be the
case on more a5xx GPUs also)
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Vladimir Lypak (2):
arm64: dts: qcom: msm8953: Add GPU IOMMU
arm64: dts: qcom: msm8953: Add GPU
arch/arm64/boot/dts/qcom/msm8953.dtsi | 146 +++++++++++++++++++++++
arch/arm64/boot/dts/qcom/sdm450-motorola-ali.dts | 2 +-
arch/arm64/boot/dts/qcom/sdm450.dtsi | 14 +++
arch/arm64/boot/dts/qcom/sdm632.dtsi | 8 ++
4 files changed, 169 insertions(+), 1 deletion(-)
---
base-commit: 0e21aa976976d5fba8cd1f8f64bcce49beb5f895
change-id: 20231212-msm8953-gpu-4c085365f594
Best regards,
--
Luca Weiss <luca@z3ntu.xyz>
^ permalink raw reply [relevance 77%]
* [PATCH v2 2/3] clk: qcom: gcc-msm8953: add more resets
2024-01-25 21:35 85% [PATCH v2 0/3] Add MDSS_BCR reset (+some more) for MSM8953 Luca Weiss
2024-01-25 21:35 86% ` [PATCH v2 1/3] dt-bindings: clock: gcc-msm8953: add more resets Luca Weiss
@ 2024-01-25 21:35 87% ` Luca Weiss
2024-01-25 21:35 86% ` [PATCH v2 3/3] arm64: dts: qcom: msm8953: add reset for display subsystem Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-01-25 21:35 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-clk, devicetree, linux-kernel, Luca Weiss,
Vladimir Lypak
From: Vladimir Lypak <vladimir.lypak@gmail.com>
Add new entries in the gcc driver for some more resets found on MSM8953.
Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
[luca: expand commit message, move entry, add more entries]
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
drivers/clk/qcom/gcc-msm8953.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/clk/qcom/gcc-msm8953.c b/drivers/clk/qcom/gcc-msm8953.c
index 3e5a8cb14d4d..68359534ff25 100644
--- a/drivers/clk/qcom/gcc-msm8953.c
+++ b/drivers/clk/qcom/gcc-msm8953.c
@@ -4171,6 +4171,10 @@ static const struct qcom_reset_map gcc_msm8953_resets[] = {
[GCC_USB3PHY_PHY_BCR] = { 0x3f03c },
[GCC_USB3_PHY_BCR] = { 0x3f034 },
[GCC_USB_30_BCR] = { 0x3f070 },
+ [GCC_MDSS_BCR] = { 0x4d074 },
+ [GCC_CRYPTO_BCR] = { 0x16000 },
+ [GCC_SDCC1_BCR] = { 0x42000 },
+ [GCC_SDCC2_BCR] = { 0x43000 },
};
static const struct regmap_config gcc_msm8953_regmap_config = {
--
2.43.0
^ permalink raw reply related [relevance 87%]
* [PATCH v2 3/3] arm64: dts: qcom: msm8953: add reset for display subsystem
2024-01-25 21:35 85% [PATCH v2 0/3] Add MDSS_BCR reset (+some more) for MSM8953 Luca Weiss
2024-01-25 21:35 86% ` [PATCH v2 1/3] dt-bindings: clock: gcc-msm8953: add more resets Luca Weiss
2024-01-25 21:35 87% ` [PATCH v2 2/3] clk: qcom: " Luca Weiss
@ 2024-01-25 21:35 86% ` Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-01-25 21:35 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-clk, devicetree, linux-kernel, Luca Weiss,
Vladimir Lypak
From: Vladimir Lypak <vladimir.lypak@gmail.com>
With this reset we can avoid situations like IRQ storms from DSI host
before it even started probing (because boot-loader left DSI IRQs on).
Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
arch/arm64/boot/dts/qcom/msm8953.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi
index ad2f8cf9c966..dcb5c98b793c 100644
--- a/arch/arm64/boot/dts/qcom/msm8953.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi
@@ -859,6 +859,8 @@ mdss: display-subsystem@1a00000 {
"vsync",
"core";
+ resets = <&gcc GCC_MDSS_BCR>;
+
#address-cells = <1>;
#size-cells = <1>;
ranges;
--
2.43.0
^ permalink raw reply related [relevance 86%]
* [PATCH v2 1/3] dt-bindings: clock: gcc-msm8953: add more resets
2024-01-25 21:35 85% [PATCH v2 0/3] Add MDSS_BCR reset (+some more) for MSM8953 Luca Weiss
@ 2024-01-25 21:35 86% ` Luca Weiss
2024-01-25 21:35 87% ` [PATCH v2 2/3] clk: qcom: " Luca Weiss
2024-01-25 21:35 86% ` [PATCH v2 3/3] arm64: dts: qcom: msm8953: add reset for display subsystem Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-01-25 21:35 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-clk, devicetree, linux-kernel, Luca Weiss,
Vladimir Lypak, Krzysztof Kozlowski
From: Vladimir Lypak <vladimir.lypak@gmail.com>
Add new defines for some more BCRs found on MSM8953.
Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
[luca: expand commit message, add more resets]
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
include/dt-bindings/clock/qcom,gcc-msm8953.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/include/dt-bindings/clock/qcom,gcc-msm8953.h b/include/dt-bindings/clock/qcom,gcc-msm8953.h
index 783162da6148..13b4a62877e5 100644
--- a/include/dt-bindings/clock/qcom,gcc-msm8953.h
+++ b/include/dt-bindings/clock/qcom,gcc-msm8953.h
@@ -218,6 +218,10 @@
#define GCC_USB3PHY_PHY_BCR 3
#define GCC_USB3_PHY_BCR 4
#define GCC_USB_30_BCR 5
+#define GCC_MDSS_BCR 6
+#define GCC_CRYPTO_BCR 7
+#define GCC_SDCC1_BCR 8
+#define GCC_SDCC2_BCR 9
/* GDSCs */
#define CPP_GDSC 0
--
2.43.0
^ permalink raw reply related [relevance 86%]
* [PATCH v2 0/3] Add MDSS_BCR reset (+some more) for MSM8953
@ 2024-01-25 21:35 85% Luca Weiss
2024-01-25 21:35 86% ` [PATCH v2 1/3] dt-bindings: clock: gcc-msm8953: add more resets Luca Weiss
` (2 more replies)
0 siblings, 3 replies; 200+ results
From: Luca Weiss @ 2024-01-25 21:35 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-clk, devicetree, linux-kernel, Luca Weiss,
Vladimir Lypak, Krzysztof Kozlowski
Add the MDSS_BCR reset that is found in the GCC of MSM8953 so we can
make sure the MDSS gets properly reset before Linux starts using it.
Also add some others that have been found in the LK sources.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Changes in v2:
- Add more resets from LK sources
- Pick up tags
- Link to v1: https://lore.kernel.org/r/20240123-msm8953-mdss-reset-v1-0-bb8c6d3ce897@z3ntu.xyz
---
Vladimir Lypak (3):
dt-bindings: clock: gcc-msm8953: add more resets
clk: qcom: gcc-msm8953: add more resets
arm64: dts: qcom: msm8953: add reset for display subsystem
arch/arm64/boot/dts/qcom/msm8953.dtsi | 2 ++
drivers/clk/qcom/gcc-msm8953.c | 4 ++++
include/dt-bindings/clock/qcom,gcc-msm8953.h | 4 ++++
3 files changed, 10 insertions(+)
---
base-commit: 6613476e225e090cc9aad49be7fa504e290dd33d
change-id: 20240123-msm8953-mdss-reset-68308a03fff5
Best regards,
--
Luca Weiss <luca@z3ntu.xyz>
^ permalink raw reply [relevance 85%]
* Re: [PATCH 2/3] clk: qcom: gcc-msm8953: add MDSS_BCR reset
@ 2024-01-25 21:25 88% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-01-25 21:25 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Konrad Dybcio
Cc: linux-arm-msm, linux-clk, devicetree, linux-kernel, Vladimir Lypak
On Mittwoch, 24. Jänner 2024 13:10:53 CET Konrad Dybcio wrote:
> On 1/23/24 22:03, Luca Weiss wrote:
> > From: Vladimir Lypak <vladimir.lypak@gmail.com>
> >
> > Add an entry in the gcc driver for the MDSS_BCR reset found on MSM8953.
> >
> > Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
> > [luca: expand commit message, move entry]
> > Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
> > ---
>
> I found some more definitions in lk2nd
>
> 88:#define GCC_CRYPTO_BCR (CLK_CTL_BASE + 0x16000)
> 106:#define SDCC1_BCR (CLK_CTL_BASE + 0x42000) /*
> block reset*/ 125:#define SDCC2_BCR (CLK_CTL_BASE
> + 0x43000) /* block reset */ 150:#define USB_HS_BCR
> (CLK_CTL_BASE + 0x41000) 155:#define GCC_QUSB2_PHY_BCR
> (CLK_CTL_BASE + 0x4103C) 168:#define USB_30_BCR
> (CLK_CTL_BASE + 0x3F070)
> 189:#define USB3_PHY_BCR (CLK_CTL_BASE + 0x3F034)
> 190:#define USB3PHY_PHY_BCR (CLK_CTL_BASE + 0x3F03C)
>
> Couldn't find this one though, did you confirm that MDSS goes off
> when you assert it?
That one's defined here:
https://gerrit-public.fairphone.software/plugins/gitiles/kernel/msm-4.9/+/refs/heads/int/13/fp3/arch/arm64/boot/dts/qcom/msm8953-mdss-pll.dtsi#21
I'll add some of the others in v2.
>
> Konrad
^ permalink raw reply [relevance 88%]
* [PATCH] arm64: dts: qcom: sm6350: Add tsens thermal zones
@ 2024-01-24 15:31 74% Luca Weiss
0 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-01-24 15:31 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel, Luca Weiss
Add the definitions for the various thermal zones found on the SM6350
SoC. Hooking up GPU and CPU cooling can limit the clock speeds there to
reduce the temperature again to good levels.
Most thermal zones only have one critical temperature configured at
125°C which can be mostly considered a placeholder until those zones can
be hooked up to cooling.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
arch/arm64/boot/dts/qcom/sm6350.dtsi | 565 +++++++++++++++++++++++++++++++++++
1 file changed, 565 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 43cffe8e1247..862a80876251 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -19,6 +19,7 @@
#include <dt-bindings/phy/phy-qcom-qmp.h>
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
+#include <dt-bindings/thermal/thermal.h>
/ {
interrupt-parent = <&intc>;
@@ -1325,6 +1326,7 @@ gpu: gpu@3d00000 {
qcom,gmu = <&gmu>;
nvmem-cells = <&gpu_speed_bin>;
nvmem-cell-names = "speed_bin";
+ #cooling-cells = <2>;
status = "disabled";
@@ -2698,6 +2700,569 @@ wifi: wifi@18800000 {
};
};
+ thermal-zones {
+ aoss0-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens0 0>;
+
+ trips {
+ aoss0-crit {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ aoss1-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens1 0>;
+
+ trips {
+ aoss1-crit {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ audio-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens1 2>;
+
+ trips {
+ audio-crit {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ camera-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens1 5>;
+
+ trips {
+ camera-crit {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu0-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens0 1>;
+
+ trips {
+ cpu0_alert0: trip-point0 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu0-crit {
+ temperature = <115000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu0_alert0>;
+ cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ cpu1-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens0 2>;
+
+ trips {
+ cpu1_alert0: trip-point0 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu1-crit {
+ temperature = <115000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu1_alert0>;
+ cooling-device = <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ cpu2-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens0 3>;
+
+ trips {
+ cpu2_alert0: trip-point0 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu2-crit {
+ temperature = <115000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu2_alert0>;
+ cooling-device = <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ cpu3-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens0 4>;
+
+ trips {
+ cpu3_alert0: trip-point0 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu3-crit {
+ temperature = <115000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu3_alert0>;
+ cooling-device = <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ cpu4-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens0 5>;
+
+ trips {
+ cpu4_alert0: trip-point0 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu4-crit {
+ temperature = <115000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu4_alert0>;
+ cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ cpu5-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens0 6>;
+
+ trips {
+ cpu5_alert0: trip-point0 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu5-crit {
+ temperature = <115000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu5_alert0>;
+ cooling-device = <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ cpu6-left-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens0 9>;
+
+ trips {
+ cpu6_left_alert0: trip-point0 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu6-left-crit {
+ temperature = <115000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu6_left_alert0>;
+ cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ cpu6-right-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens0 10>;
+
+ trips {
+ cpu6_right_alert0: trip-point0 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu6-right-crit {
+ temperature = <115000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu6_right_alert0>;
+ cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ cpu7-left-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens0 11>;
+
+ trips {
+ cpu7_left_alert0: trip-point0 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu7-left-crit {
+ temperature = <115000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu7_left_alert0>;
+ cooling-device = <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ cpu7-right-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens0 12>;
+
+ trips {
+ cpu7_right_alert0: trip-point0 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu7-right-crit {
+ temperature = <115000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu7_right_alert0>;
+ cooling-device = <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ cpuss0-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens0 7>;
+
+ trips {
+ cpuss0-crit {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpuss1-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens0 8>;
+
+ trips {
+ cpuss1-crit {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ cwlan-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens1 1>;
+
+ trips {
+ cwlan-crit {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ ddr-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens1 3>;
+
+ trips {
+ ddr-crit {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ gpuss0-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens0 13>;
+
+ trips {
+ gpuss0_alert0: trip-point0 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ gpuss0-crit {
+ temperature = <115000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&gpuss0_alert0>;
+ cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ gpuss1-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens0 14>;
+
+ trips {
+ gpuss1_alert0: trip-point0 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ gpuss1-crit {
+ temperature = <115000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&gpuss1_alert0>;
+ cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ modem-core0-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens1 6>;
+
+ trips {
+ modem-core0-crit {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ modem-core1-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens1 7>;
+
+ trips {
+ modem-core1-crit {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ modem-scl-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens1 9>;
+
+ trips {
+ modem-scl-crit {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ modem-vec-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens1 8>;
+
+ trips {
+ modem-vec-crit {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ npu-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens1 10>;
+
+ trips {
+ npu-crit {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ q6-hvx-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens1 4>;
+
+ trips {
+ q6-hvx-crit {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ video-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&tsens1 11>;
+
+ trips {
+ video-crit {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+ };
+
timer {
compatible = "arm,armv8-timer";
clock-frequency = <19200000>;
---
base-commit: 6fd66bc55f7ed910980b9cc4afe31e1bb066c7e0
change-id: 20240124-sm6350-tsens-c17692ffad3b
Best regards,
--
Luca Weiss <luca.weiss@fairphone.com>
^ permalink raw reply related [relevance 74%]
* [PATCH 2/3] clk: qcom: gcc-msm8953: add MDSS_BCR reset
2024-01-23 21:03 87% [PATCH 0/3] Add MDSS_BCR reset for MSM8953 Luca Weiss
2024-01-23 21:03 87% ` [PATCH 1/3] dt-bindings: clock: gcc-msm8953: add reset for MDSS subsystem Luca Weiss
@ 2024-01-23 21:03 87% ` Luca Weiss
2024-01-23 21:03 87% ` [PATCH 3/3] arm64: dts: qcom: msm8953: add reset for display subsystem Luca Weiss
2 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-01-23 21:03 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-clk, devicetree, linux-kernel, Luca Weiss,
Vladimir Lypak
From: Vladimir Lypak <vladimir.lypak@gmail.com>
Add an entry in the gcc driver for the MDSS_BCR reset found on MSM8953.
Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
[luca: expand commit message, move entry]
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
drivers/clk/qcom/gcc-msm8953.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/qcom/gcc-msm8953.c b/drivers/clk/qcom/gcc-msm8953.c
index 3e5a8cb14d4d..5725857faae6 100644
--- a/drivers/clk/qcom/gcc-msm8953.c
+++ b/drivers/clk/qcom/gcc-msm8953.c
@@ -4171,6 +4171,7 @@ static const struct qcom_reset_map gcc_msm8953_resets[] = {
[GCC_USB3PHY_PHY_BCR] = { 0x3f03c },
[GCC_USB3_PHY_BCR] = { 0x3f034 },
[GCC_USB_30_BCR] = { 0x3f070 },
+ [GCC_MDSS_BCR] = { 0x4d074 },
};
static const struct regmap_config gcc_msm8953_regmap_config = {
--
2.43.0
^ permalink raw reply related [relevance 87%]
* [PATCH 1/3] dt-bindings: clock: gcc-msm8953: add reset for MDSS subsystem
2024-01-23 21:03 87% [PATCH 0/3] Add MDSS_BCR reset for MSM8953 Luca Weiss
@ 2024-01-23 21:03 87% ` Luca Weiss
2024-01-23 21:03 87% ` [PATCH 2/3] clk: qcom: gcc-msm8953: add MDSS_BCR reset Luca Weiss
2024-01-23 21:03 87% ` [PATCH 3/3] arm64: dts: qcom: msm8953: add reset for display subsystem Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-01-23 21:03 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-clk, devicetree, linux-kernel, Luca Weiss,
Vladimir Lypak
From: Vladimir Lypak <vladimir.lypak@gmail.com>
Add a new define for the GCC_MDSS_BCR found on MSM8953.
Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
[luca: expand commit message]
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
include/dt-bindings/clock/qcom,gcc-msm8953.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/clock/qcom,gcc-msm8953.h b/include/dt-bindings/clock/qcom,gcc-msm8953.h
index 783162da6148..28090f9d7f24 100644
--- a/include/dt-bindings/clock/qcom,gcc-msm8953.h
+++ b/include/dt-bindings/clock/qcom,gcc-msm8953.h
@@ -218,6 +218,7 @@
#define GCC_USB3PHY_PHY_BCR 3
#define GCC_USB3_PHY_BCR 4
#define GCC_USB_30_BCR 5
+#define GCC_MDSS_BCR 6
/* GDSCs */
#define CPP_GDSC 0
--
2.43.0
^ permalink raw reply related [relevance 87%]
* [PATCH 3/3] arm64: dts: qcom: msm8953: add reset for display subsystem
2024-01-23 21:03 87% [PATCH 0/3] Add MDSS_BCR reset for MSM8953 Luca Weiss
2024-01-23 21:03 87% ` [PATCH 1/3] dt-bindings: clock: gcc-msm8953: add reset for MDSS subsystem Luca Weiss
2024-01-23 21:03 87% ` [PATCH 2/3] clk: qcom: gcc-msm8953: add MDSS_BCR reset Luca Weiss
@ 2024-01-23 21:03 87% ` Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-01-23 21:03 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-clk, devicetree, linux-kernel, Luca Weiss,
Vladimir Lypak
From: Vladimir Lypak <vladimir.lypak@gmail.com>
With this reset we can avoid situations like IRQ storms from DSI host
before it even started probing (because boot-loader left DSI IRQs on).
Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
arch/arm64/boot/dts/qcom/msm8953.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi
index ad2f8cf9c966..dcb5c98b793c 100644
--- a/arch/arm64/boot/dts/qcom/msm8953.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi
@@ -859,6 +859,8 @@ mdss: display-subsystem@1a00000 {
"vsync",
"core";
+ resets = <&gcc GCC_MDSS_BCR>;
+
#address-cells = <1>;
#size-cells = <1>;
ranges;
--
2.43.0
^ permalink raw reply related [relevance 87%]
* [PATCH 0/3] Add MDSS_BCR reset for MSM8953
@ 2024-01-23 21:03 87% Luca Weiss
2024-01-23 21:03 87% ` [PATCH 1/3] dt-bindings: clock: gcc-msm8953: add reset for MDSS subsystem Luca Weiss
` (2 more replies)
0 siblings, 3 replies; 200+ results
From: Luca Weiss @ 2024-01-23 21:03 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-clk, devicetree, linux-kernel, Luca Weiss,
Vladimir Lypak
Add the MDSS_BCR reset that is found in the GCC of MSM8953 so we can
make sure the MDSS gets properly reset before Linux starts using it.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Vladimir Lypak (3):
dt-bindings: clock: gcc-msm8953: add reset for MDSS subsystem
clk: qcom: gcc-msm8953: add MDSS_BCR reset
arm64: dts: qcom: msm8953: add reset for display subsystem
arch/arm64/boot/dts/qcom/msm8953.dtsi | 2 ++
drivers/clk/qcom/gcc-msm8953.c | 1 +
include/dt-bindings/clock/qcom,gcc-msm8953.h | 1 +
3 files changed, 4 insertions(+)
---
base-commit: 6613476e225e090cc9aad49be7fa504e290dd33d
change-id: 20240123-msm8953-mdss-reset-68308a03fff5
Best regards,
--
Luca Weiss <luca@z3ntu.xyz>
^ permalink raw reply [relevance 87%]
* Re: [PATCH] ARM: dts: qcom: msm8926-htc-memul: Add rmtfs memory node
@ 2024-01-22 17:11 88% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-01-22 17:11 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Konrad Dybcio
Cc: linux-arm-msm, devicetree, linux-kernel
On Montag, 22. Jänner 2024 11:53:33 CET Konrad Dybcio wrote:
> On 21.01.2024 11:21, Luca Weiss wrote:
> > Add the rmtfs-mem node which was part of one of the "unknown" memory
> > reservation. Split that one, make sure the reserved-memory in total
> > still covers the same space.
> >
> > Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
> > ---
>
> Could you please test dynamic rmtfs alloc, which should be possible
> on some (most?) boards after 9265bc6bce6919c771970e5a425a66551a1c78a0?
To be honest, I'd like to not continue to experiment with reserved-memory on
this board, I've already spent way too much time figuring out how to not make
the phone crash under some circumstances, and now it seems relatively stable.
I might've even put my eMMC into some weird read-only mode where any write to
it just weirdly fails (also original software) by writing to random locations
in the RAM (or well, what Linux thought was non-special RAM).
Regards
Luca
>
> Konrad
^ permalink raw reply [relevance 88%]
* Re: [PATCH v2 2/4] drm/panel: Add driver for DJN HX83112A LCD panel
@ 2024-01-22 11:27 99% ` Luca Weiss
2024-02-14 9:33 99% ` Luca Weiss
0 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-01-22 11:27 UTC (permalink / raw)
To: neil.armstrong, Linus Walleij
Cc: Jessica Zhang, Sam Ravnborg, David Airlie, Daniel Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson,
Konrad Dybcio, Andy Gross, devicetree, linux-arm-msm,
linux-kernel, dri-devel, ~postmarketos/upstreaming, phone-devel
On Fri Jan 12, 2024 at 11:26 AM CET, wrote:
> On 12/01/2024 11:23, Linus Walleij wrote:
> > On Fri, Jan 12, 2024 at 10:52 AM Luca Weiss <luca.weiss@fairphone.com> wrote:
> >
> >> Since there's zero indication Truly is involved in this panel in my
> >> documentation - much less the number 5P65 - I'm not going to add that.
>
> Ack
>
> >
> > OK then, I fold, thanks for looking into it.
> > Keep the Himax hx83112a file name and symbols.
> >
> >> So in short this panel is the model 9A-3R063-1102B from DJN, which uses
> >> a Himax HX83112A driver IC.
> >
> > So compatible = "djn,9a-3r063-1102b" since the setup sequences for
> > hx83112a are clearly for this one display?
>
> Yep let's settle on that!
It's clear to me to use "djn,9a-3r063-1102b" in the driver now but what
about dts?
Currently here in v2 we have this:
compatible = "fairphone,fp4-hx83112a-djn", "himax,hx83112a";
Should this just become this?
compatible = "djn,9a-3r063-1102b";
Or e.g. this?
compatible = "djn,9a-3r063-1102b", "himax,hx83112a";
Or something else completely? Do we have some documentation / best
practises around this maybe?
Regards
Luca
>
> Thanks,
> Neil
>
> >
> > Yours,
> > Linus Walleij
^ permalink raw reply [relevance 99%]
* [PATCH v2 2/2] drm/msm/adreno: Add A305B support
2024-01-21 10:40 84% [PATCH v2 0/2] Add GPU support for MSM8226 (Adreno A305B) Luca Weiss
2024-01-21 10:40 81% ` [PATCH v2 1/2] dt-bindings: display/msm: gpu: Allow multiple digits for patchid Luca Weiss
@ 2024-01-21 10:40 73% ` Luca Weiss
1 sibling, 0 replies; 200+ results
From: Luca Weiss @ 2024-01-21 10:40 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Rob Clark, Abhinav Kumar,
Dmitry Baryshkov, Sean Paul, Marijn Suijten, David Airlie,
Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Andy Gross, Bjorn Andersson, Konrad Dybcio
Cc: linux-arm-msm, dri-devel, freedreno, devicetree, linux-kernel,
Luca Weiss
Add support for the Adreno 305B GPU that is found in MSM8226(v2) SoC.
Previously this was mistakenly claimed to be supported but using wrong
a configuration.
In MSM8226v1 there's also a A305B but with chipid 0x03000510 which
should work with the same configuration but due to lack of hardware for
testing this is not added.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 13 ++++++++++---
drivers/gpu/drm/msm/adreno/adreno_device.c | 15 +++++++++++----
drivers/gpu/drm/msm/adreno/adreno_gpu.h | 5 +++++
3 files changed, 26 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
index c86b377f6f0d..5273dc849838 100644
--- a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
@@ -134,6 +134,13 @@ static int a3xx_hw_init(struct msm_gpu *gpu)
/* Set up AOOO: */
gpu_write(gpu, REG_A3XX_VBIF_OUT_AXI_AOOO_EN, 0x0000003c);
gpu_write(gpu, REG_A3XX_VBIF_OUT_AXI_AOOO, 0x003c003c);
+ } else if (adreno_is_a305b(adreno_gpu)) {
+ gpu_write(gpu, REG_A3XX_VBIF_IN_RD_LIM_CONF0, 0x00181818);
+ gpu_write(gpu, REG_A3XX_VBIF_IN_WR_LIM_CONF0, 0x00181818);
+ gpu_write(gpu, REG_A3XX_VBIF_OUT_RD_LIM_CONF0, 0x00000018);
+ gpu_write(gpu, REG_A3XX_VBIF_OUT_WR_LIM_CONF0, 0x00000018);
+ gpu_write(gpu, REG_A3XX_VBIF_DDR_OUT_MAX_BURST, 0x00000303);
+ gpu_write(gpu, REG_A3XX_VBIF_ROUND_ROBIN_QOS_ARB, 0x0003);
} else if (adreno_is_a306(adreno_gpu)) {
gpu_write(gpu, REG_A3XX_VBIF_ROUND_ROBIN_QOS_ARB, 0x0003);
gpu_write(gpu, REG_A3XX_VBIF_OUT_RD_LIM_CONF0, 0x0000000a);
@@ -230,7 +237,7 @@ static int a3xx_hw_init(struct msm_gpu *gpu)
gpu_write(gpu, REG_A3XX_UCHE_CACHE_MODE_CONTROL_REG, 0x00000001);
/* Enable Clock gating: */
- if (adreno_is_a306(adreno_gpu))
+ if (adreno_is_a305b(adreno_gpu) || adreno_is_a306(adreno_gpu))
gpu_write(gpu, REG_A3XX_RBBM_CLOCK_CTL, 0xaaaaaaaa);
else if (adreno_is_a320(adreno_gpu))
gpu_write(gpu, REG_A3XX_RBBM_CLOCK_CTL, 0xbfffffff);
@@ -333,7 +340,7 @@ static int a3xx_hw_init(struct msm_gpu *gpu)
AXXX_CP_QUEUE_THRESHOLDS_CSQ_IB1_START(2) |
AXXX_CP_QUEUE_THRESHOLDS_CSQ_IB2_START(6) |
AXXX_CP_QUEUE_THRESHOLDS_CSQ_ST_START(14));
- } else if (adreno_is_a330(adreno_gpu)) {
+ } else if (adreno_is_a330(adreno_gpu) || adreno_is_a305b(adreno_gpu)) {
/* NOTE: this (value take from downstream android driver)
* includes some bits outside of the known bitfields. But
* A330 has this "MERCIU queue" thing too, which might
@@ -559,7 +566,7 @@ struct msm_gpu *a3xx_gpu_init(struct drm_device *dev)
goto fail;
/* if needed, allocate gmem: */
- if (adreno_is_a330(adreno_gpu)) {
+ if (adreno_is_a330(adreno_gpu) || adreno_is_a305b(adreno_gpu)) {
ret = adreno_gpu_ocmem_init(&adreno_gpu->base.pdev->dev,
adreno_gpu, &a3xx_gpu->ocmem);
if (ret)
diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c
index 2ce7d7b1690d..f2768e52ed12 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_device.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_device.c
@@ -55,10 +55,17 @@ static const struct adreno_info gpulist[] = {
.inactive_period = DRM_MSM_INACTIVE_PERIOD,
.init = a2xx_gpu_init,
}, {
- .chip_ids = ADRENO_CHIP_IDS(
- 0x03000512,
- 0x03000520
- ),
+ .chip_ids = ADRENO_CHIP_IDS(0x03000512),
+ .family = ADRENO_3XX,
+ .fw = {
+ [ADRENO_FW_PM4] = "a330_pm4.fw",
+ [ADRENO_FW_PFP] = "a330_pfp.fw",
+ },
+ .gmem = SZ_128K,
+ .inactive_period = DRM_MSM_INACTIVE_PERIOD,
+ .init = a3xx_gpu_init,
+ }, {
+ .chip_ids = ADRENO_CHIP_IDS(0x03000520),
.family = ADRENO_3XX,
.revn = 305,
.fw = {
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
index bc14df96feb0..d3c41af706df 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
@@ -256,6 +256,11 @@ static inline bool adreno_is_a305(const struct adreno_gpu *gpu)
return adreno_is_revn(gpu, 305);
}
+static inline bool adreno_is_a305b(const struct adreno_gpu *gpu)
+{
+ return gpu->info->chip_ids[0] == 0x03000512;
+}
+
static inline bool adreno_is_a306(const struct adreno_gpu *gpu)
{
/* yes, 307, because a305c is 306 */
--
2.43.0
^ permalink raw reply related [relevance 73%]
* [PATCH v2 0/2] Add GPU support for MSM8226 (Adreno A305B)
@ 2024-01-21 10:40 84% Luca Weiss
2024-01-21 10:40 81% ` [PATCH v2 1/2] dt-bindings: display/msm: gpu: Allow multiple digits for patchid Luca Weiss
2024-01-21 10:40 73% ` [PATCH v2 2/2] drm/msm/adreno: Add A305B support Luca Weiss
0 siblings, 2 replies; 200+ results
From: Luca Weiss @ 2024-01-21 10:40 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Rob Clark, Abhinav Kumar,
Dmitry Baryshkov, Sean Paul, Marijn Suijten, David Airlie,
Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Andy Gross, Bjorn Andersson, Konrad Dybcio
Cc: linux-arm-msm, dri-devel, freedreno, devicetree, linux-kernel,
Luca Weiss, Krzysztof Kozlowski
Add the necessary bits to bring up the GPU on msm8226.
Tested on apq8026-lg-lenok.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Changes in v2:
- Drop applied patch
- Use "if (a305b || a306)" for writing REG_A3XX_RBBM_CLOCK_CTL
- Pick up tags
- Link to v1: https://lore.kernel.org/r/20231130-msm8226-gpu-v1-0-6bb2f1b29e49@z3ntu.xyz
---
Luca Weiss (2):
dt-bindings: display/msm: gpu: Allow multiple digits for patchid
drm/msm/adreno: Add A305B support
Documentation/devicetree/bindings/display/msm/gpu.yaml | 6 +++---
drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 13 ++++++++++---
drivers/gpu/drm/msm/adreno/adreno_device.c | 15 +++++++++++----
drivers/gpu/drm/msm/adreno/adreno_gpu.h | 5 +++++
4 files changed, 29 insertions(+), 10 deletions(-)
---
base-commit: bda7a2e04984237bc14ade7c9660f76fbc035686
change-id: 20231130-msm8226-gpu-c2ff8473a9ff
Best regards,
--
Luca Weiss <luca@z3ntu.xyz>
^ permalink raw reply [relevance 84%]
* [PATCH v2 1/2] dt-bindings: display/msm: gpu: Allow multiple digits for patchid
2024-01-21 10:40 84% [PATCH v2 0/2] Add GPU support for MSM8226 (Adreno A305B) Luca Weiss
@ 2024-01-21 10:40 81% ` Luca Weiss
2024-01-21 10:40 73% ` [PATCH v2 2/2] drm/msm/adreno: Add A305B support Luca Weiss
1 sibling, 0 replies; 200+ results
From: Luca Weiss @ 2024-01-21 10:40 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Rob Clark, Abhinav Kumar,
Dmitry Baryshkov, Sean Paul, Marijn Suijten, David Airlie,
Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Andy Gross, Bjorn Andersson, Konrad Dybcio
Cc: linux-arm-msm, dri-devel, freedreno, devicetree, linux-kernel,
Luca Weiss, Krzysztof Kozlowski
Some GPUs like the Adreno A305B has a patchid higher than 9, in this
case 18. Make sure the regexes can account for that.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Documentation/devicetree/bindings/display/msm/gpu.yaml | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml
index b019db954793..40b5c6bd11f8 100644
--- a/Documentation/devicetree/bindings/display/msm/gpu.yaml
+++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml
@@ -23,7 +23,7 @@ properties:
The driver is parsing the compat string for Adreno to
figure out the gpu-id and patch level.
items:
- - pattern: '^qcom,adreno-[3-7][0-9][0-9]\.[0-9]$'
+ - pattern: '^qcom,adreno-[3-7][0-9][0-9]\.[0-9]+$'
- const: qcom,adreno
- description: |
The driver is parsing the compat string for Imageon to
@@ -127,7 +127,7 @@ allOf:
properties:
compatible:
contains:
- pattern: '^qcom,adreno-[3-5][0-9][0-9]\.[0-9]$'
+ pattern: '^qcom,adreno-[3-5][0-9][0-9]\.[0-9]+$'
then:
properties:
@@ -203,7 +203,7 @@ allOf:
properties:
compatible:
contains:
- pattern: '^qcom,adreno-[67][0-9][0-9]\.[0-9]$'
+ pattern: '^qcom,adreno-[67][0-9][0-9]\.[0-9]+$'
then: # Starting with A6xx, the clocks are usually defined in the GMU node
properties:
--
2.43.0
^ permalink raw reply related [relevance 81%]
* [PATCH] ARM: dts: qcom: msm8926-htc-memul: Add rmtfs memory node
@ 2024-01-21 10:21 86% Luca Weiss
0 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-01-21 10:21 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss
Add the rmtfs-mem node which was part of one of the "unknown" memory
reservation. Split that one, make sure the reserved-memory in total
still covers the same space.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
arch/arm/boot/dts/qcom/qcom-msm8926-htc-memul.dts | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8926-htc-memul.dts b/arch/arm/boot/dts/qcom/qcom-msm8926-htc-memul.dts
index ed328b24335f..3037344eb240 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8926-htc-memul.dts
+++ b/arch/arm/boot/dts/qcom/qcom-msm8926-htc-memul.dts
@@ -107,7 +107,20 @@ smem_region: smem@fa00000 {
};
unknown@fb00000 {
- reg = <0x0fb00000 0x1b00000>;
+ reg = <0x0fb00000 0x280000>;
+ no-map;
+ };
+
+ rmtfs@fd80000 {
+ compatible = "qcom,rmtfs-mem";
+ reg = <0x0fd80000 0x180000>;
+ no-map;
+
+ qcom,client-id = <1>;
+ };
+
+ unknown@ff00000 {
+ reg = <0x0ff00000 0x1700000>;
no-map;
};
};
---
base-commit: ad5c60d66016e544c51ed98635a74073f761f45d
change-id: 20240121-memul-rmtfs-9aa9b54f200a
Best regards,
--
Luca Weiss <luca@z3ntu.xyz>
^ permalink raw reply related [relevance 86%]
* [PATCH] ARM: dts: qcom: apq8026-lg-lenok: Add vibrator support
@ 2024-01-21 10:09 84% Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-01-21 10:09 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Luca Weiss
This device has a vibrator attached to the CAMSS_GP0_CLK, use clk-pwm
and pwm-vibrator to make the vibrator work.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
arch/arm/boot/dts/qcom/qcom-apq8026-lg-lenok.dts | 38 ++++++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/arch/arm/boot/dts/qcom/qcom-apq8026-lg-lenok.dts b/arch/arm/boot/dts/qcom/qcom-apq8026-lg-lenok.dts
index 0a1fd5eb3c6d..a70de21bf139 100644
--- a/arch/arm/boot/dts/qcom/qcom-apq8026-lg-lenok.dts
+++ b/arch/arm/boot/dts/qcom/qcom-apq8026-lg-lenok.dts
@@ -7,6 +7,7 @@
#include "qcom-msm8226.dtsi"
#include "pm8226.dtsi"
+#include <dt-bindings/clock/qcom,mmcc-msm8974.h>
/delete-node/ &adsp_region;
@@ -56,6 +57,29 @@ vreg_wlan: wlan-regulator {
pinctrl-names = "default";
pinctrl-0 = <&wlan_regulator_default_state>;
};
+
+ pwm_vibrator: pwm {
+ compatible = "clk-pwm";
+ clocks = <&mmcc CAMSS_GP0_CLK>;
+
+ pinctrl-0 = <&vibrator_clk_default_state>;
+ pinctrl-names = "default";
+
+ #pwm-cells = <2>;
+ };
+
+ vibrator {
+ compatible = "pwm-vibrator";
+
+ pwms = <&pwm_vibrator 0 10000>;
+ pwm-names = "enable";
+
+ vcc-supply = <&pm8226_l28>;
+ enable-gpios = <&tlmm 62 GPIO_ACTIVE_HIGH>;
+
+ pinctrl-0 = <&vibrator_en_default_state>;
+ pinctrl-names = "default";
+ };
};
&adsp {
@@ -330,6 +354,20 @@ reset-pins {
};
};
+ vibrator_clk_default_state: vibrator-clk-default-state {
+ pins = "gpio33";
+ function = "gp0_clk";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ vibrator_en_default_state: vibrator-en-default-state {
+ pins = "gpio62";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
wlan_hostwake_default_state: wlan-hostwake-default-state {
pins = "gpio37";
function = "gpio";
---
base-commit: ad5c60d66016e544c51ed98635a74073f761f45d
change-id: 20240121-lenok-vibrator-ce5b1734e2bb
Best regards,
--
Luca Weiss <luca@z3ntu.xyz>
^ permalink raw reply related [relevance 84%]
* Re: [PATCH] drm/bridge: Select DRM_KMS_HELPER for DRM_PANEL_BRIDGE
@ 2024-01-17 8:59 13% ` Luca Weiss
2024-02-29 9:27 99% ` Luca Weiss
0 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-01-17 8:59 UTC (permalink / raw)
To: neil.armstrong, Andrzej Hajda, Robert Foss, Laurent Pinchart,
Jonas Karlman, Jernej Skrabec, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, David Airlie, Daniel Vetter
Cc: ~postmarketos/upstreaming, phone-devel, dri-devel, linux-kernel
[-- Attachment #1.1: Type: text/plain, Size: 3081 bytes --]
On Mon Jan 15, 2024 at 9:43 AM CET, Neil Armstrong wrote:
> Hi Luca,
>
> On 11/01/2024 13:38, Luca Weiss wrote:
> > Since the kconfig symbol of DRM_PANEL_BRIDGE is only adding
> > bridge/panel.o to drm_kms_helper object, we need to select
> > DRM_KMS_HELPER to make sure the file is actually getting built.
> >
> > Otherwise with certain defconfigs e.g. devm_drm_of_get_bridge will not
> > be properly available:
> >
> > aarch64-linux-gnu-ld: drivers/phy/qualcomm/phy-qcom-qmp-combo.o: in function `qmp_combo_bridge_attach':
> > drivers/phy/qualcomm/phy-qcom-qmp-combo.c:3204:(.text+0x8f4): undefined reference to `devm_drm_of_get_bridge'
> >
> > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
> > ---
> > I can see "depends on DRM_KMS_HELPER" was removed with commit
> > 3c3384050d68 ("drm: Don't make DRM_PANEL_BRIDGE dependent on DRM_KMS_HELPERS")
> >
> > I'm not too familiar with Kconfig but it feels more correct if
> > PHY_QCOM_QMP_COMBO selects DRM_PANEL_BRIDGE that that's enough; and it
> > doesn't also has to explicitly select DRM_KMS_HELPER because of how the
> > objects are built in the Makefile.
> >
> > Alternatively solution to this patch could be adjusting this line in
> > include/drm/drm_bridge.h:
> >
> > -#if defined(CONFIG_OF) && defined(CONFIG_DRM_PANEL_BRIDGE)
> > +#if defined(CONFIG_OF) && defined(CONFIG_DRM_PANEL_BRIDGE) && defined(CONFIG_DRM_KMS_HELPER)
> > struct drm_bridge *devm_drm_of_get_bridge(struct device *dev, struct device_node *node,
> > u32 port, u32 endpoint);
> >
> > .. and then selecting DRM_KMS_HELPER for PHY_QCOM_QMP_COMBO.
> >
> > But I think the solution in this patch is better. Let me know what you
> > think.
>
> I think this is no more the case after on linux-next:
> 35921910bbd0 phy: qcom: qmp-combo: switch to DRM_AUX_BRIDGE
>
> But could you still check ?
On next-20240117 the error happens in the aux-bridge file instead then.
aarch64-linux-gnu-ld: drivers/gpu/drm/bridge/aux-bridge.o: in function `drm_aux_bridge_probe':
drivers/gpu/drm/bridge/aux-bridge.c:115:(.text+0xe0): undefined reference to `devm_drm_of_get_bridge'
I'm attaching the defconfig with which I can reproduce this but it's
really just DRM_KMS_HELPER=n and PHY_QCOM_QMP_COMBO=y I believe.
Regards
Luca
>
> Neil
>
> > ---
> > drivers/gpu/drm/bridge/Kconfig | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
> > index ac9ec5073619..ae782b427829 100644
> > --- a/drivers/gpu/drm/bridge/Kconfig
> > +++ b/drivers/gpu/drm/bridge/Kconfig
> > @@ -8,6 +8,7 @@ config DRM_BRIDGE
> > config DRM_PANEL_BRIDGE
> > def_bool y
> > depends on DRM_BRIDGE
> > + select DRM_KMS_HELPER
> > select DRM_PANEL
> > help
> > DRM bridge wrapper of DRM panels
> >
> > ---
> > base-commit: b9c3a1fa6fb324e691a03cf124b79f4842e65d76
> > change-id: 20240111-drm-panel-bridge-fixup-5c2977fb969f
> >
> > Best regards,
[-- Attachment #2: .config --]
[-- Type: text/plain, Size: 145386 bytes --]
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 6.7.0 Kernel Configuration
#
CONFIG_CC_VERSION_TEXT="aarch64-linux-gnu-gcc (GCC) 13.2.0"
CONFIG_CC_IS_GCC=y
CONFIG_GCC_VERSION=130200
CONFIG_CLANG_VERSION=0
CONFIG_AS_IS_GNU=y
CONFIG_AS_VERSION=24100
CONFIG_LD_IS_BFD=y
CONFIG_LD_VERSION=24100
CONFIG_LLD_VERSION=0
CONFIG_CC_CAN_LINK=y
CONFIG_CC_CAN_LINK_STATIC=y
CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y
CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y
CONFIG_CC_HAS_ASM_INLINE=y
CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y
CONFIG_PAHOLE_VERSION=0
CONFIG_IRQ_WORK=y
CONFIG_BUILDTIME_TABLE_SORT=y
CONFIG_THREAD_INFO_IN_TASK=y
#
# General setup
#
CONFIG_INIT_ENV_ARG_LIMIT=32
# CONFIG_COMPILE_TEST is not set
# CONFIG_WERROR is not set
CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
CONFIG_BUILD_SALT=""
CONFIG_DEFAULT_INIT=""
CONFIG_DEFAULT_HOSTNAME="(none)"
CONFIG_SYSVIPC=y
CONFIG_SYSVIPC_SYSCTL=y
CONFIG_SYSVIPC_COMPAT=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_WATCH_QUEUE is not set
CONFIG_CROSS_MEMORY_ATTACH=y
# CONFIG_USELIB is not set
# CONFIG_AUDIT is not set
CONFIG_HAVE_ARCH_AUDITSYSCALL=y
#
# IRQ subsystem
#
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_GENERIC_IRQ_MIGRATION=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS=y
CONFIG_GENERIC_IRQ_IPI=y
CONFIG_GENERIC_MSI_IRQ=y
CONFIG_IRQ_MSI_IOMMU=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_SPARSE_IRQ=y
# CONFIG_GENERIC_IRQ_DEBUGFS is not set
# end of IRQ subsystem
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_ARCH_HAS_TICK_BROADCAST=y
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
CONFIG_HAVE_POSIX_CPU_TIMERS_TASK_WORK=y
CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y
CONFIG_CONTEXT_TRACKING=y
CONFIG_CONTEXT_TRACKING_IDLE=y
#
# Timers subsystem
#
CONFIG_TICK_ONESHOT=y
CONFIG_NO_HZ_COMMON=y
# CONFIG_HZ_PERIODIC is not set
CONFIG_NO_HZ_IDLE=y
# CONFIG_NO_HZ_FULL is not set
# CONFIG_NO_HZ is not set
CONFIG_HIGH_RES_TIMERS=y
# end of Timers subsystem
CONFIG_BPF=y
CONFIG_HAVE_EBPF_JIT=y
CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y
#
# BPF subsystem
#
# CONFIG_BPF_SYSCALL is not set
# CONFIG_BPF_JIT is not set
# end of BPF subsystem
CONFIG_PREEMPT_NONE_BUILD=y
CONFIG_PREEMPT_NONE=y
# CONFIG_PREEMPT_VOLUNTARY is not set
# CONFIG_PREEMPT is not set
# CONFIG_PREEMPT_DYNAMIC is not set
# CONFIG_SCHED_CORE is not set
#
# CPU/Task time and stats accounting
#
CONFIG_TICK_CPU_ACCOUNTING=y
# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set
CONFIG_IRQ_TIME_ACCOUNTING=y
CONFIG_HAVE_SCHED_AVG_IRQ=y
CONFIG_SCHED_THERMAL_PRESSURE=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_BSD_PROCESS_ACCT_V3=y
# CONFIG_TASKSTATS is not set
# CONFIG_PSI is not set
# end of CPU/Task time and stats accounting
CONFIG_CPU_ISOLATION=y
#
# RCU Subsystem
#
CONFIG_TREE_RCU=y
# CONFIG_RCU_EXPERT is not set
CONFIG_TREE_SRCU=y
CONFIG_RCU_STALL_COMMON=y
CONFIG_RCU_NEED_SEGCBLIST=y
# end of RCU Subsystem
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
# CONFIG_IKHEADERS is not set
CONFIG_LOG_BUF_SHIFT=17
CONFIG_LOG_CPU_MAX_BUF_SHIFT=12
# CONFIG_PRINTK_INDEX is not set
CONFIG_GENERIC_SCHED_CLOCK=y
#
# Scheduler features
#
# CONFIG_UCLAMP_TASK is not set
# end of Scheduler features
CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y
CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH=y
CONFIG_CC_HAS_INT128=y
CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5"
CONFIG_GCC11_NO_ARRAY_BOUNDS=y
CONFIG_CC_NO_ARRAY_BOUNDS=y
CONFIG_GCC11_NO_STRINGOP_OVERFLOW=y
CONFIG_CC_STRINGOP_OVERFLOW=y
CONFIG_ARCH_SUPPORTS_INT128=y
CONFIG_NUMA_BALANCING=y
CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y
CONFIG_CGROUPS=y
CONFIG_PAGE_COUNTER=y
# CONFIG_CGROUP_FAVOR_DYNMODS is not set
CONFIG_MEMCG=y
CONFIG_MEMCG_KMEM=y
CONFIG_BLK_CGROUP=y
CONFIG_CGROUP_WRITEBACK=y
CONFIG_CGROUP_SCHED=y
CONFIG_FAIR_GROUP_SCHED=y
# CONFIG_CFS_BANDWIDTH is not set
# CONFIG_RT_GROUP_SCHED is not set
CONFIG_SCHED_MM_CID=y
CONFIG_CGROUP_PIDS=y
# CONFIG_CGROUP_RDMA is not set
# CONFIG_CGROUP_FREEZER is not set
CONFIG_CGROUP_HUGETLB=y
CONFIG_CPUSETS=y
CONFIG_PROC_PID_CPUSET=y
CONFIG_CGROUP_DEVICE=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_CGROUP_PERF=y
# CONFIG_CGROUP_MISC is not set
# CONFIG_CGROUP_DEBUG is not set
CONFIG_NAMESPACES=y
CONFIG_UTS_NS=y
CONFIG_TIME_NS=y
CONFIG_IPC_NS=y
CONFIG_USER_NS=y
CONFIG_PID_NS=y
CONFIG_NET_NS=y
# CONFIG_CHECKPOINT_RESTORE is not set
CONFIG_SCHED_AUTOGROUP=y
# CONFIG_RELAY is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_RD_GZIP=y
# CONFIG_RD_BZIP2 is not set
# CONFIG_RD_LZMA is not set
# CONFIG_RD_XZ is not set
# CONFIG_RD_LZO is not set
# CONFIG_RD_LZ4 is not set
# CONFIG_RD_ZSTD is not set
# CONFIG_BOOT_CONFIG is not set
CONFIG_INITRAMFS_PRESERVE_MTIME=y
CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_LD_ORPHAN_WARN=y
CONFIG_LD_ORPHAN_WARN_LEVEL="warn"
CONFIG_SYSCTL=y
CONFIG_HAVE_UID16=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
# CONFIG_EXPERT is not set
CONFIG_UID16=y
CONFIG_MULTIUSER=y
CONFIG_SYSFS_SYSCALL=y
CONFIG_FHANDLE=y
CONFIG_POSIX_TIMERS=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_FUTEX_PI=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
CONFIG_SHMEM=y
CONFIG_AIO=y
CONFIG_IO_URING=y
CONFIG_ADVISE_SYSCALLS=y
CONFIG_MEMBARRIER=y
CONFIG_KCMP=y
CONFIG_RSEQ=y
CONFIG_CACHESTAT_SYSCALL=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_SELFTEST is not set
CONFIG_KALLSYMS_ALL=y
CONFIG_KALLSYMS_BASE_RELATIVE=y
CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
CONFIG_HAVE_PERF_EVENTS=y
#
# Kernel Performance Events And Counters
#
CONFIG_PERF_EVENTS=y
# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
# end of Kernel Performance Events And Counters
CONFIG_SYSTEM_DATA_VERIFICATION=y
CONFIG_PROFILING=y
#
# Kexec and crash features
#
CONFIG_CRASH_CORE=y
CONFIG_KEXEC_CORE=y
CONFIG_KEXEC=y
CONFIG_KEXEC_FILE=y
# CONFIG_KEXEC_SIG is not set
CONFIG_CRASH_DUMP=y
# end of Kexec and crash features
# end of General setup
CONFIG_ARM64=y
CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS=y
CONFIG_64BIT=y
CONFIG_MMU=y
CONFIG_ARM64_PAGE_SHIFT=12
CONFIG_ARM64_CONT_PTE_SHIFT=4
CONFIG_ARM64_CONT_PMD_SHIFT=4
CONFIG_ARCH_MMAP_RND_BITS_MIN=18
CONFIG_ARCH_MMAP_RND_BITS_MAX=33
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16
CONFIG_NO_IOPORT_MAP=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CSUM=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_SMP=y
CONFIG_KERNEL_MODE_NEON=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_PGTABLE_LEVELS=4
CONFIG_ARCH_SUPPORTS_UPROBES=y
CONFIG_ARCH_PROC_KCORE_TEXT=y
CONFIG_BUILTIN_RETURN_ADDRESS_STRIPS_PAC=y
#
# Platform selection
#
# CONFIG_ARCH_ACTIONS is not set
# CONFIG_ARCH_SUNXI is not set
# CONFIG_ARCH_ALPINE is not set
# CONFIG_ARCH_APPLE is not set
# CONFIG_ARCH_BCM is not set
# CONFIG_ARCH_BERLIN is not set
# CONFIG_ARCH_BITMAIN is not set
# CONFIG_ARCH_EXYNOS is not set
# CONFIG_ARCH_SPARX5 is not set
# CONFIG_ARCH_K3 is not set
# CONFIG_ARCH_LG1K is not set
# CONFIG_ARCH_HISI is not set
# CONFIG_ARCH_KEEMBAY is not set
# CONFIG_ARCH_MEDIATEK is not set
# CONFIG_ARCH_MESON is not set
# CONFIG_ARCH_MVEBU is not set
# CONFIG_ARCH_NXP is not set
# CONFIG_ARCH_MA35 is not set
# CONFIG_ARCH_NPCM is not set
# CONFIG_ARCH_PENSANDO is not set
CONFIG_ARCH_QCOM=y
# CONFIG_ARCH_REALTEK is not set
# CONFIG_ARCH_RENESAS is not set
# CONFIG_ARCH_ROCKCHIP is not set
# CONFIG_ARCH_SEATTLE is not set
# CONFIG_ARCH_INTEL_SOCFPGA is not set
# CONFIG_ARCH_STM32 is not set
# CONFIG_ARCH_SYNQUACER is not set
# CONFIG_ARCH_TEGRA is not set
# CONFIG_ARCH_SPRD is not set
# CONFIG_ARCH_THUNDER is not set
# CONFIG_ARCH_THUNDER2 is not set
# CONFIG_ARCH_UNIPHIER is not set
# CONFIG_ARCH_VEXPRESS is not set
# CONFIG_ARCH_VISCONTI is not set
# CONFIG_ARCH_XGENE is not set
# CONFIG_ARCH_ZYNQMP is not set
# end of Platform selection
#
# Kernel Features
#
#
# ARM errata workarounds via the alternatives framework
#
CONFIG_AMPERE_ERRATUM_AC03_CPU_38=y
CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y
CONFIG_ARM64_ERRATUM_826319=y
CONFIG_ARM64_ERRATUM_827319=y
CONFIG_ARM64_ERRATUM_824069=y
CONFIG_ARM64_ERRATUM_819472=y
CONFIG_ARM64_ERRATUM_832075=y
CONFIG_ARM64_ERRATUM_1742098=y
CONFIG_ARM64_ERRATUM_845719=y
CONFIG_ARM64_ERRATUM_843419=y
CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y
CONFIG_ARM64_ERRATUM_1024718=y
CONFIG_ARM64_ERRATUM_1418040=y
CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y
CONFIG_ARM64_ERRATUM_1165522=y
CONFIG_ARM64_ERRATUM_1319367=y
CONFIG_ARM64_ERRATUM_1530923=y
CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y
CONFIG_ARM64_ERRATUM_2441007=y
CONFIG_ARM64_ERRATUM_1286807=y
CONFIG_ARM64_ERRATUM_1463225=y
CONFIG_ARM64_ERRATUM_1542419=y
CONFIG_ARM64_ERRATUM_1508412=y
CONFIG_ARM64_ERRATUM_2051678=y
CONFIG_ARM64_ERRATUM_2077057=y
CONFIG_ARM64_ERRATUM_2658417=y
CONFIG_ARM64_WORKAROUND_TSB_FLUSH_FAILURE=y
CONFIG_ARM64_ERRATUM_2054223=y
CONFIG_ARM64_ERRATUM_2067961=y
CONFIG_ARM64_ERRATUM_2441009=y
CONFIG_ARM64_ERRATUM_2457168=y
CONFIG_ARM64_ERRATUM_2645198=y
CONFIG_ARM64_WORKAROUND_SPECULATIVE_UNPRIV_LOAD=y
CONFIG_ARM64_ERRATUM_2966298=y
CONFIG_ARM64_ERRATUM_3117295=y
# CONFIG_CAVIUM_ERRATUM_22375 is not set
CONFIG_CAVIUM_ERRATUM_23144=y
# CONFIG_CAVIUM_ERRATUM_23154 is not set
# CONFIG_CAVIUM_ERRATUM_27456 is not set
# CONFIG_CAVIUM_ERRATUM_30115 is not set
# CONFIG_CAVIUM_TX2_ERRATUM_219 is not set
# CONFIG_FUJITSU_ERRATUM_010001 is not set
CONFIG_HISILICON_ERRATUM_161600802=y
CONFIG_QCOM_FALKOR_ERRATUM_1003=y
CONFIG_QCOM_FALKOR_ERRATUM_1009=y
CONFIG_QCOM_QDF2400_ERRATUM_0065=y
CONFIG_QCOM_FALKOR_ERRATUM_E1041=y
CONFIG_NVIDIA_CARMEL_CNP_ERRATUM=y
CONFIG_ROCKCHIP_ERRATUM_3588001=y
# CONFIG_SOCIONEXT_SYNQUACER_PREITS is not set
# end of ARM errata workarounds via the alternatives framework
CONFIG_ARM64_4K_PAGES=y
# CONFIG_ARM64_16K_PAGES is not set
# CONFIG_ARM64_64K_PAGES is not set
# CONFIG_ARM64_VA_BITS_39 is not set
CONFIG_ARM64_VA_BITS_48=y
CONFIG_ARM64_VA_BITS=48
CONFIG_ARM64_PA_BITS_48=y
CONFIG_ARM64_PA_BITS=48
# CONFIG_CPU_BIG_ENDIAN is not set
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_SCHED_MC=y
# CONFIG_SCHED_CLUSTER is not set
CONFIG_SCHED_SMT=y
CONFIG_NR_CPUS=256
CONFIG_HOTPLUG_CPU=y
CONFIG_NUMA=y
CONFIG_NODES_SHIFT=4
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
CONFIG_SCHED_HRTICK=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_HW_PERF_EVENTS=y
CONFIG_CC_HAVE_SHADOW_CALL_STACK=y
CONFIG_PARAVIRT=y
# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set
CONFIG_ARCH_SUPPORTS_KEXEC=y
CONFIG_ARCH_SUPPORTS_KEXEC_FILE=y
CONFIG_ARCH_SELECTS_KEXEC_FILE=y
CONFIG_ARCH_SUPPORTS_KEXEC_SIG=y
CONFIG_ARCH_SUPPORTS_KEXEC_IMAGE_VERIFY_SIG=y
CONFIG_ARCH_DEFAULT_KEXEC_IMAGE_VERIFY_SIG=y
CONFIG_ARCH_SUPPORTS_CRASH_DUMP=y
CONFIG_ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION=y
CONFIG_TRANS_TABLE=y
# CONFIG_XEN is not set
CONFIG_ARCH_FORCE_MAX_ORDER=10
CONFIG_UNMAP_KERNEL_AT_EL0=y
CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY=y
CONFIG_RODATA_FULL_DEFAULT_ENABLED=y
# CONFIG_ARM64_SW_TTBR0_PAN is not set
CONFIG_ARM64_TAGGED_ADDR_ABI=y
CONFIG_COMPAT=y
CONFIG_KUSER_HELPERS=y
# CONFIG_COMPAT_ALIGNMENT_FIXUPS is not set
# CONFIG_ARMV8_DEPRECATED is not set
#
# ARMv8.1 architectural features
#
CONFIG_ARM64_HW_AFDBM=y
CONFIG_ARM64_PAN=y
CONFIG_AS_HAS_LSE_ATOMICS=y
CONFIG_ARM64_LSE_ATOMICS=y
CONFIG_ARM64_USE_LSE_ATOMICS=y
# end of ARMv8.1 architectural features
#
# ARMv8.2 architectural features
#
CONFIG_AS_HAS_ARMV8_2=y
CONFIG_AS_HAS_SHA3=y
# CONFIG_ARM64_PMEM is not set
CONFIG_ARM64_RAS_EXTN=y
CONFIG_ARM64_CNP=y
# end of ARMv8.2 architectural features
#
# ARMv8.3 architectural features
#
CONFIG_ARM64_PTR_AUTH=y
CONFIG_ARM64_PTR_AUTH_KERNEL=y
CONFIG_CC_HAS_BRANCH_PROT_PAC_RET=y
CONFIG_CC_HAS_SIGN_RETURN_ADDRESS=y
CONFIG_AS_HAS_ARMV8_3=y
CONFIG_AS_HAS_CFI_NEGATE_RA_STATE=y
CONFIG_AS_HAS_LDAPR=y
# end of ARMv8.3 architectural features
#
# ARMv8.4 architectural features
#
CONFIG_ARM64_AMU_EXTN=y
CONFIG_AS_HAS_ARMV8_4=y
CONFIG_ARM64_TLB_RANGE=y
# end of ARMv8.4 architectural features
#
# ARMv8.5 architectural features
#
CONFIG_AS_HAS_ARMV8_5=y
CONFIG_ARM64_BTI=y
CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI=y
CONFIG_ARM64_E0PD=y
CONFIG_ARM64_AS_HAS_MTE=y
CONFIG_ARM64_MTE=y
# end of ARMv8.5 architectural features
#
# ARMv8.7 architectural features
#
CONFIG_ARM64_EPAN=y
# end of ARMv8.7 architectural features
CONFIG_ARM64_SVE=y
CONFIG_ARM64_SME=y
# CONFIG_ARM64_PSEUDO_NMI is not set
CONFIG_RELOCATABLE=y
CONFIG_RANDOMIZE_BASE=y
CONFIG_RANDOMIZE_MODULE_REGION_FULL=y
CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y
CONFIG_STACKPROTECTOR_PER_TASK=y
# end of Kernel Features
#
# Boot options
#
CONFIG_CMDLINE=""
CONFIG_EFI_STUB=y
CONFIG_EFI=y
CONFIG_DMI=y
# end of Boot options
#
# Power management options
#
CONFIG_SUSPEND=y
CONFIG_SUSPEND_FREEZER=y
# CONFIG_HIBERNATION is not set
CONFIG_PM_SLEEP=y
CONFIG_PM_SLEEP_SMP=y
# CONFIG_PM_AUTOSLEEP is not set
# CONFIG_PM_USERSPACE_AUTOSLEEP is not set
# CONFIG_PM_WAKELOCKS is not set
CONFIG_PM=y
# CONFIG_PM_DEBUG is not set
CONFIG_PM_CLK=y
CONFIG_PM_GENERIC_DOMAINS=y
CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y
CONFIG_PM_GENERIC_DOMAINS_SLEEP=y
CONFIG_PM_GENERIC_DOMAINS_OF=y
CONFIG_CPU_PM=y
CONFIG_ENERGY_MODEL=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
# end of Power management options
#
# CPU Power Management
#
#
# CPU Idle
#
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y
# CONFIG_CPU_IDLE_GOV_LADDER is not set
CONFIG_CPU_IDLE_GOV_MENU=y
# CONFIG_CPU_IDLE_GOV_TEO is not set
CONFIG_DT_IDLE_STATES=y
CONFIG_DT_IDLE_GENPD=y
#
# ARM CPU Idle Drivers
#
CONFIG_ARM_PSCI_CPUIDLE=y
CONFIG_ARM_PSCI_CPUIDLE_DOMAIN=y
# end of ARM CPU Idle Drivers
# end of CPU Idle
#
# CPU Frequency scaling
#
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
CONFIG_CPU_FREQ_GOV_COMMON=y
CONFIG_CPU_FREQ_STAT=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
#
# CPU frequency scaling drivers
#
CONFIG_CPUFREQ_DT=y
CONFIG_CPUFREQ_DT_PLATDEV=y
# CONFIG_ARM_QCOM_CPUFREQ_NVMEM is not set
CONFIG_ARM_QCOM_CPUFREQ_HW=y
# CONFIG_ARM_SCMI_CPUFREQ is not set
# end of CPU Frequency scaling
# end of CPU Power Management
CONFIG_ARCH_SUPPORTS_ACPI=y
# CONFIG_ACPI is not set
CONFIG_HAVE_KVM=y
# CONFIG_VIRTUALIZATION is not set
#
# General architecture-dependent options
#
CONFIG_ARCH_HAS_SUBPAGE_FAULTS=y
CONFIG_HOTPLUG_CORE_SYNC=y
CONFIG_HOTPLUG_CORE_SYNC_DEAD=y
# CONFIG_KPROBES is not set
CONFIG_JUMP_LABEL=y
# CONFIG_STATIC_KEYS_SELFTEST is not set
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
CONFIG_HAVE_IOREMAP_PROT=y
CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y
CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y
CONFIG_HAVE_NMI=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
CONFIG_HAVE_DMA_CONTIGUOUS=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
CONFIG_ARCH_HAS_KEEPINITRD=y
CONFIG_ARCH_HAS_SET_MEMORY=y
CONFIG_ARCH_HAS_SET_DIRECT_MAP=y
CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y
CONFIG_ARCH_WANTS_NO_INSTR=y
CONFIG_HAVE_ASM_MODVERSIONS=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
CONFIG_HAVE_RSEQ=y
CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y
CONFIG_HAVE_HW_BREAKPOINT=y
CONFIG_HAVE_PERF_REGS=y
CONFIG_HAVE_PERF_USER_STACK_DUMP=y
CONFIG_HAVE_ARCH_JUMP_LABEL=y
CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y
CONFIG_MMU_GATHER_TABLE_FREE=y
CONFIG_MMU_GATHER_RCU_TABLE_FREE=y
CONFIG_MMU_LAZY_TLB_REFCOUNT=y
CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y
CONFIG_ARCH_HAS_NMI_SAFE_THIS_CPU_OPS=y
CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y
CONFIG_HAVE_CMPXCHG_LOCAL=y
CONFIG_HAVE_CMPXCHG_DOUBLE=y
CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y
CONFIG_HAVE_ARCH_SECCOMP=y
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
CONFIG_SECCOMP=y
CONFIG_SECCOMP_FILTER=y
# CONFIG_SECCOMP_CACHE_DEBUG is not set
CONFIG_HAVE_ARCH_STACKLEAK=y
CONFIG_HAVE_STACKPROTECTOR=y
CONFIG_STACKPROTECTOR=y
CONFIG_STACKPROTECTOR_STRONG=y
CONFIG_ARCH_SUPPORTS_SHADOW_CALL_STACK=y
# CONFIG_SHADOW_CALL_STACK is not set
CONFIG_ARCH_SUPPORTS_LTO_CLANG=y
CONFIG_ARCH_SUPPORTS_LTO_CLANG_THIN=y
CONFIG_LTO_NONE=y
CONFIG_ARCH_SUPPORTS_CFI_CLANG=y
CONFIG_HAVE_CONTEXT_TRACKING_USER=y
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
CONFIG_HAVE_MOVE_PUD=y
CONFIG_HAVE_MOVE_PMD=y
CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
CONFIG_HAVE_ARCH_HUGE_VMAP=y
CONFIG_HAVE_ARCH_HUGE_VMALLOC=y
CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y
CONFIG_ARCH_WANT_PMD_MKWRITE=y
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
CONFIG_MODULES_USE_ELF_RELA=y
CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK=y
CONFIG_SOFTIRQ_ON_OWN_STACK=y
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
CONFIG_HAVE_ARCH_MMAP_RND_BITS=y
CONFIG_ARCH_MMAP_RND_BITS=18
CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y
CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_COMPAT_OLD_SIGACTION=y
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_HAVE_ARCH_VMAP_STACK=y
CONFIG_VMAP_STACK=y
CONFIG_HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET=y
CONFIG_RANDOMIZE_KSTACK_OFFSET=y
# CONFIG_RANDOMIZE_KSTACK_OFFSET_DEFAULT is not set
CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
CONFIG_STRICT_KERNEL_RWX=y
CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
CONFIG_STRICT_MODULE_RWX=y
CONFIG_HAVE_ARCH_COMPILER_H=y
CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y
CONFIG_ARCH_USE_MEMREMAP_PROT=y
# CONFIG_LOCK_EVENT_COUNTS is not set
CONFIG_ARCH_HAS_RELR=y
CONFIG_HAVE_PREEMPT_DYNAMIC=y
CONFIG_HAVE_PREEMPT_DYNAMIC_KEY=y
CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y
CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
CONFIG_ARCH_SUPPORTS_PAGE_TABLE_CHECK=y
CONFIG_ARCH_HAVE_TRACE_MMIO_ACCESS=y
CONFIG_ARCH_HAS_HW_PTE_YOUNG=y
#
# GCOV-based kernel profiling
#
# CONFIG_GCOV_KERNEL is not set
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
# end of GCOV-based kernel profiling
CONFIG_HAVE_GCC_PLUGINS=y
CONFIG_GCC_PLUGINS=y
# CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set
CONFIG_FUNCTION_ALIGNMENT_4B=y
CONFIG_FUNCTION_ALIGNMENT=4
# end of General architecture-dependent options
CONFIG_RT_MUTEXES=y
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
# CONFIG_MODULE_DEBUG is not set
# CONFIG_MODULE_FORCE_LOAD is not set
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
# CONFIG_MODULE_UNLOAD_TAINT_TRACKING is not set
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
# CONFIG_MODULE_SIG is not set
CONFIG_MODULE_COMPRESS_NONE=y
# CONFIG_MODULE_COMPRESS_GZIP is not set
# CONFIG_MODULE_COMPRESS_XZ is not set
# CONFIG_MODULE_COMPRESS_ZSTD is not set
# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set
CONFIG_MODPROBE_PATH="/sbin/modprobe"
CONFIG_MODULES_TREE_LOOKUP=y
CONFIG_BLOCK=y
CONFIG_BLOCK_LEGACY_AUTOLOAD=y
CONFIG_BLK_CGROUP_RWSTAT=y
CONFIG_BLK_DEV_BSG_COMMON=y
CONFIG_BLK_ICQ=y
CONFIG_BLK_DEV_BSGLIB=y
CONFIG_BLK_DEV_INTEGRITY=y
CONFIG_BLK_DEV_INTEGRITY_T10=y
CONFIG_BLK_DEV_WRITE_MOUNTED=y
# CONFIG_BLK_DEV_ZONED is not set
# CONFIG_BLK_DEV_THROTTLING is not set
# CONFIG_BLK_WBT is not set
# CONFIG_BLK_CGROUP_IOLATENCY is not set
# CONFIG_BLK_CGROUP_IOCOST is not set
# CONFIG_BLK_CGROUP_IOPRIO is not set
CONFIG_BLK_DEBUG_FS=y
# CONFIG_BLK_SED_OPAL is not set
CONFIG_BLK_INLINE_ENCRYPTION=y
# CONFIG_BLK_INLINE_ENCRYPTION_FALLBACK is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
CONFIG_EFI_PARTITION=y
# end of Partition Types
CONFIG_BLK_MQ_VIRTIO=y
CONFIG_BLK_PM=y
CONFIG_BLOCK_HOLDER_DEPRECATED=y
CONFIG_BLK_MQ_STACKING=y
#
# IO Schedulers
#
CONFIG_MQ_IOSCHED_DEADLINE=y
CONFIG_MQ_IOSCHED_KYBER=y
CONFIG_IOSCHED_BFQ=y
CONFIG_BFQ_GROUP_IOSCHED=y
# CONFIG_BFQ_CGROUP_DEBUG is not set
# end of IO Schedulers
CONFIG_ASN1=y
CONFIG_ARCH_INLINE_SPIN_TRYLOCK=y
CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH=y
CONFIG_ARCH_INLINE_SPIN_LOCK=y
CONFIG_ARCH_INLINE_SPIN_LOCK_BH=y
CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ=y
CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE=y
CONFIG_ARCH_INLINE_SPIN_UNLOCK=y
CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH=y
CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ=y
CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE=y
CONFIG_ARCH_INLINE_READ_LOCK=y
CONFIG_ARCH_INLINE_READ_LOCK_BH=y
CONFIG_ARCH_INLINE_READ_LOCK_IRQ=y
CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE=y
CONFIG_ARCH_INLINE_READ_UNLOCK=y
CONFIG_ARCH_INLINE_READ_UNLOCK_BH=y
CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ=y
CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE=y
CONFIG_ARCH_INLINE_WRITE_LOCK=y
CONFIG_ARCH_INLINE_WRITE_LOCK_BH=y
CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ=y
CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE=y
CONFIG_ARCH_INLINE_WRITE_UNLOCK=y
CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH=y
CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ=y
CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE=y
CONFIG_INLINE_SPIN_TRYLOCK=y
CONFIG_INLINE_SPIN_TRYLOCK_BH=y
CONFIG_INLINE_SPIN_LOCK=y
CONFIG_INLINE_SPIN_LOCK_BH=y
CONFIG_INLINE_SPIN_LOCK_IRQ=y
CONFIG_INLINE_SPIN_LOCK_IRQSAVE=y
CONFIG_INLINE_SPIN_UNLOCK_BH=y
CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE=y
CONFIG_INLINE_READ_LOCK=y
CONFIG_INLINE_READ_LOCK_BH=y
CONFIG_INLINE_READ_LOCK_IRQ=y
CONFIG_INLINE_READ_LOCK_IRQSAVE=y
CONFIG_INLINE_READ_UNLOCK=y
CONFIG_INLINE_READ_UNLOCK_BH=y
CONFIG_INLINE_READ_UNLOCK_IRQ=y
CONFIG_INLINE_READ_UNLOCK_IRQRESTORE=y
CONFIG_INLINE_WRITE_LOCK=y
CONFIG_INLINE_WRITE_LOCK_BH=y
CONFIG_INLINE_WRITE_LOCK_IRQ=y
CONFIG_INLINE_WRITE_LOCK_IRQSAVE=y
CONFIG_INLINE_WRITE_UNLOCK=y
CONFIG_INLINE_WRITE_UNLOCK_BH=y
CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE=y
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_RWSEM_SPIN_ON_OWNER=y
CONFIG_LOCK_SPIN_ON_OWNER=y
CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y
CONFIG_QUEUED_SPINLOCKS=y
CONFIG_ARCH_USE_QUEUED_RWLOCKS=y
CONFIG_QUEUED_RWLOCKS=y
CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE=y
CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y
CONFIG_FREEZER=y
#
# Executable file formats
#
CONFIG_BINFMT_ELF=y
CONFIG_COMPAT_BINFMT_ELF=y
CONFIG_ARCH_BINFMT_ELF_STATE=y
CONFIG_ARCH_BINFMT_ELF_EXTRA_PHDRS=y
CONFIG_ARCH_HAVE_ELF_PROT=y
CONFIG_ARCH_USE_GNU_PROPERTY=y
CONFIG_ELFCORE=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_BINFMT_SCRIPT=y
# CONFIG_BINFMT_MISC is not set
CONFIG_COREDUMP=y
# end of Executable file formats
#
# Memory Management options
#
CONFIG_SWAP=y
# CONFIG_ZSWAP is not set
#
# Slab allocator options
#
CONFIG_SLUB=y
CONFIG_SLAB_MERGE_DEFAULT=y
# CONFIG_SLAB_FREELIST_RANDOM is not set
# CONFIG_SLAB_FREELIST_HARDENED is not set
# CONFIG_SLUB_STATS is not set
CONFIG_SLUB_CPU_PARTIAL=y
# CONFIG_RANDOM_KMALLOC_CACHES is not set
# end of Slab allocator options
# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set
# CONFIG_COMPAT_BRK is not set
CONFIG_SPARSEMEM=y
CONFIG_SPARSEMEM_EXTREME=y
CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
CONFIG_SPARSEMEM_VMEMMAP=y
CONFIG_ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP=y
CONFIG_HAVE_FAST_GUP=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_MEMORY_ISOLATION=y
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
# CONFIG_MEMORY_HOTPLUG is not set
CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y
CONFIG_SPLIT_PTLOCK_CPUS=4
CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y
CONFIG_COMPACTION=y
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
CONFIG_PAGE_REPORTING=y
CONFIG_MIGRATION=y
CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y
CONFIG_ARCH_ENABLE_THP_MIGRATION=y
CONFIG_CONTIG_ALLOC=y
CONFIG_PCP_BATCH_SCALE_MAX=5
CONFIG_PHYS_ADDR_T_64BIT=y
CONFIG_KSM=y
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y
CONFIG_MEMORY_FAILURE=y
# CONFIG_HWPOISON_INJECT is not set
CONFIG_ARCH_WANTS_THP_SWAP=y
CONFIG_TRANSPARENT_HUGEPAGE=y
CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y
# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set
# CONFIG_TRANSPARENT_HUGEPAGE_NEVER is not set
CONFIG_THP_SWAP=y
# CONFIG_READ_ONLY_THP_FOR_FS is not set
CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y
CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y
CONFIG_USE_PERCPU_NUMA_NODE_ID=y
CONFIG_HAVE_SETUP_PER_CPU_AREA=y
CONFIG_CMA=y
# CONFIG_CMA_DEBUG is not set
# CONFIG_CMA_DEBUGFS is not set
# CONFIG_CMA_SYSFS is not set
CONFIG_CMA_AREAS=19
CONFIG_GENERIC_EARLY_IOREMAP=y
# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set
# CONFIG_IDLE_PAGE_TRACKING is not set
CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
CONFIG_ARCH_HAS_CURRENT_STACK_POINTER=y
CONFIG_ARCH_HAS_PTE_DEVMAP=y
CONFIG_ZONE_DMA=y
CONFIG_ZONE_DMA32=y
CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y
CONFIG_ARCH_USES_PG_ARCH_X=y
CONFIG_VM_EVENT_COUNTERS=y
# CONFIG_PERCPU_STATS is not set
# CONFIG_GUP_TEST is not set
# CONFIG_DMAPOOL_TEST is not set
CONFIG_ARCH_HAS_PTE_SPECIAL=y
CONFIG_MEMFD_CREATE=y
CONFIG_SECRETMEM=y
# CONFIG_ANON_VMA_NAME is not set
# CONFIG_USERFAULTFD is not set
# CONFIG_LRU_GEN is not set
CONFIG_ARCH_SUPPORTS_PER_VMA_LOCK=y
CONFIG_PER_VMA_LOCK=y
CONFIG_LOCK_MM_AND_FIND_VMA=y
#
# Data Access Monitoring
#
# CONFIG_DAMON is not set
# end of Data Access Monitoring
# end of Memory Management options
CONFIG_NET=y
#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_DIAG is not set
CONFIG_UNIX=y
CONFIG_UNIX_SCM=y
CONFIG_AF_UNIX_OOB=y
# CONFIG_UNIX_DIAG is not set
# CONFIG_TLS is not set
# CONFIG_XFRM_USER is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE_DEMUX is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_NET_IPVTI is not set
# CONFIG_NET_FOU is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
CONFIG_INET_TABLE_PERTURB_ORDER=16
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
# CONFIG_INET_UDP_DIAG is not set
# CONFIG_INET_RAW_DIAG is not set
# CONFIG_INET_DIAG_DESTROY is not set
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_AO is not set
# CONFIG_TCP_MD5SIG is not set
# CONFIG_IPV6 is not set
# CONFIG_MPTCP is not set
# CONFIG_NETWORK_SECMARK is not set
CONFIG_NET_PTP_CLASSIFY=y
# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
# CONFIG_NETFILTER is not set
# CONFIG_IP_DCCP is not set
# CONFIG_IP_SCTP is not set
# CONFIG_RDS is not set
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_L2TP is not set
# CONFIG_BRIDGE is not set
# CONFIG_NET_DSA is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_LLC2 is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_PHONET is not set
# CONFIG_IEEE802154 is not set
CONFIG_NET_SCHED=y
#
# Queueing/Scheduling
#
# CONFIG_NET_SCH_HTB is not set
# CONFIG_NET_SCH_HFSC is not set
# CONFIG_NET_SCH_PRIO is not set
# CONFIG_NET_SCH_MULTIQ is not set
# CONFIG_NET_SCH_RED is not set
# CONFIG_NET_SCH_SFB is not set
# CONFIG_NET_SCH_SFQ is not set
# CONFIG_NET_SCH_TEQL is not set
# CONFIG_NET_SCH_TBF is not set
# CONFIG_NET_SCH_CBS is not set
# CONFIG_NET_SCH_ETF is not set
# CONFIG_NET_SCH_TAPRIO is not set
# CONFIG_NET_SCH_GRED is not set
# CONFIG_NET_SCH_NETEM is not set
# CONFIG_NET_SCH_DRR is not set
# CONFIG_NET_SCH_MQPRIO is not set
# CONFIG_NET_SCH_SKBPRIO is not set
# CONFIG_NET_SCH_CHOKE is not set
# CONFIG_NET_SCH_QFQ is not set
# CONFIG_NET_SCH_CODEL is not set
# CONFIG_NET_SCH_FQ_CODEL is not set
# CONFIG_NET_SCH_CAKE is not set
# CONFIG_NET_SCH_FQ is not set
# CONFIG_NET_SCH_HHF is not set
# CONFIG_NET_SCH_PIE is not set
# CONFIG_NET_SCH_PLUG is not set
# CONFIG_NET_SCH_ETS is not set
# CONFIG_NET_SCH_DEFAULT is not set
#
# Classification
#
# CONFIG_NET_CLS_BASIC is not set
# CONFIG_NET_CLS_ROUTE4 is not set
# CONFIG_NET_CLS_FW is not set
# CONFIG_NET_CLS_U32 is not set
# CONFIG_NET_CLS_FLOW is not set
# CONFIG_NET_CLS_CGROUP is not set
# CONFIG_NET_CLS_BPF is not set
# CONFIG_NET_CLS_FLOWER is not set
# CONFIG_NET_CLS_MATCHALL is not set
# CONFIG_NET_EMATCH is not set
# CONFIG_NET_CLS_ACT is not set
CONFIG_NET_SCH_FIFO=y
# CONFIG_DCB is not set
CONFIG_DNS_RESOLVER=y
# CONFIG_BATMAN_ADV is not set
# CONFIG_OPENVSWITCH is not set
# CONFIG_VSOCKETS is not set
# CONFIG_NETLINK_DIAG is not set
# CONFIG_MPLS is not set
# CONFIG_NET_NSH is not set
# CONFIG_HSR is not set
CONFIG_NET_SWITCHDEV=y
# CONFIG_NET_L3_MASTER_DEV is not set
CONFIG_QRTR=y
CONFIG_QRTR_SMD=y
CONFIG_QRTR_TUN=y
# CONFIG_NET_NCSI is not set
CONFIG_PCPU_DEV_REFCNT=y
CONFIG_MAX_SKB_FRAGS=17
CONFIG_RPS=y
CONFIG_RFS_ACCEL=y
CONFIG_SOCK_RX_QUEUE_MAPPING=y
CONFIG_XPS=y
# CONFIG_CGROUP_NET_PRIO is not set
# CONFIG_CGROUP_NET_CLASSID is not set
CONFIG_NET_RX_BUSY_POLL=y
CONFIG_BQL=y
CONFIG_NET_FLOW_LIMIT=y
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# end of Network testing
# end of Networking options
# CONFIG_HAMRADIO is not set
# CONFIG_CAN is not set
CONFIG_BT=y
CONFIG_BT_BREDR=y
CONFIG_BT_RFCOMM=y
CONFIG_BT_RFCOMM_TTY=y
CONFIG_BT_BNEP=y
CONFIG_BT_BNEP_MC_FILTER=y
CONFIG_BT_BNEP_PROTO_FILTER=y
CONFIG_BT_HIDP=y
CONFIG_BT_HS=y
CONFIG_BT_LE=y
CONFIG_BT_LE_L2CAP_ECRED=y
# CONFIG_BT_LEDS is not set
# CONFIG_BT_MSFTEXT is not set
# CONFIG_BT_AOSPEXT is not set
CONFIG_BT_DEBUGFS=y
# CONFIG_BT_SELFTEST is not set
# CONFIG_BT_FEATURE_DEBUG is not set
#
# Bluetooth device drivers
#
CONFIG_BT_QCA=m
# CONFIG_BT_HCIBTUSB is not set
# CONFIG_BT_HCIBTSDIO is not set
CONFIG_BT_HCIUART=m
CONFIG_BT_HCIUART_SERDEV=y
CONFIG_BT_HCIUART_H4=y
# CONFIG_BT_HCIUART_NOKIA is not set
# CONFIG_BT_HCIUART_BCSP is not set
# CONFIG_BT_HCIUART_ATH3K is not set
# CONFIG_BT_HCIUART_LL is not set
# CONFIG_BT_HCIUART_3WIRE is not set
# CONFIG_BT_HCIUART_INTEL is not set
# CONFIG_BT_HCIUART_BCM is not set
# CONFIG_BT_HCIUART_RTL is not set
CONFIG_BT_HCIUART_QCA=y
# CONFIG_BT_HCIUART_AG6XX is not set
# CONFIG_BT_HCIUART_MRVL is not set
# CONFIG_BT_HCIBCM203X is not set
# CONFIG_BT_HCIBPA10X is not set
# CONFIG_BT_HCIBFUSB is not set
# CONFIG_BT_HCIVHCI is not set
# CONFIG_BT_MRVL is not set
# CONFIG_BT_MTKSDIO is not set
# CONFIG_BT_MTKUART is not set
# CONFIG_BT_VIRTIO is not set
# CONFIG_BT_NXPUART is not set
# end of Bluetooth device drivers
# CONFIG_AF_RXRPC is not set
# CONFIG_AF_KCM is not set
# CONFIG_MCTP is not set
CONFIG_WIRELESS=y
CONFIG_CFG80211=y
# CONFIG_NL80211_TESTMODE is not set
# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y
CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y
CONFIG_CFG80211_DEFAULT_PS=y
# CONFIG_CFG80211_DEBUGFS is not set
CONFIG_CFG80211_CRDA_SUPPORT=y
# CONFIG_CFG80211_WEXT is not set
CONFIG_MAC80211=y
CONFIG_MAC80211_HAS_RC=y
CONFIG_MAC80211_RC_MINSTREL=y
CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
CONFIG_MAC80211_RC_DEFAULT="minstrel_ht"
# CONFIG_MAC80211_MESH is not set
# CONFIG_MAC80211_LEDS is not set
# CONFIG_MAC80211_MESSAGE_TRACING is not set
# CONFIG_MAC80211_DEBUG_MENU is not set
CONFIG_MAC80211_STA_HASH_MAX_SIZE=0
CONFIG_RFKILL=y
CONFIG_RFKILL_INPUT=y
# CONFIG_RFKILL_GPIO is not set
# CONFIG_NET_9P is not set
# CONFIG_CAIF is not set
# CONFIG_CEPH_LIB is not set
# CONFIG_NFC is not set
# CONFIG_PSAMPLE is not set
# CONFIG_NET_IFE is not set
# CONFIG_LWTUNNEL is not set
CONFIG_NET_SELFTESTS=y
CONFIG_FAILOVER=y
CONFIG_ETHTOOL_NETLINK=y
#
# Device Drivers
#
CONFIG_ARM_AMBA=y
CONFIG_HAVE_PCI=y
# CONFIG_PCI is not set
# CONFIG_PCCARD is not set
#
# Generic Driver Options
#
CONFIG_AUXILIARY_BUS=y
CONFIG_UEVENT_HELPER=y
CONFIG_UEVENT_HELPER_PATH=""
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
# CONFIG_DEVTMPFS_SAFE is not set
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Firmware loader
#
CONFIG_FW_LOADER=y
CONFIG_EXTRA_FIRMWARE=""
# CONFIG_FW_LOADER_USER_HELPER is not set
# CONFIG_FW_LOADER_COMPRESS is not set
CONFIG_FW_CACHE=y
# CONFIG_FW_UPLOAD is not set
# end of Firmware loader
CONFIG_WANT_DEV_COREDUMP=y
CONFIG_ALLOW_DEV_COREDUMP=y
CONFIG_DEV_COREDUMP=y
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_DEBUG_DEVRES is not set
# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set
# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set
CONFIG_GENERIC_CPU_DEVICES=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_CPU_VULNERABILITIES=y
CONFIG_SOC_BUS=y
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_SPMI=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGMAP_IRQ=y
CONFIG_DMA_SHARED_BUFFER=y
# CONFIG_DMA_FENCE_TRACE is not set
CONFIG_GENERIC_ARCH_TOPOLOGY=y
CONFIG_GENERIC_ARCH_NUMA=y
# CONFIG_FW_DEVLINK_SYNC_STATE_TIMEOUT is not set
# end of Generic Driver Options
#
# Bus devices
#
# CONFIG_QCOM_EBI2 is not set
# CONFIG_QCOM_SSC_BLOCK_BUS is not set
# CONFIG_VEXPRESS_CONFIG is not set
# CONFIG_MHI_BUS is not set
# CONFIG_MHI_BUS_EP is not set
# end of Bus devices
#
# Cache Drivers
#
# end of Cache Drivers
# CONFIG_CONNECTOR is not set
#
# Firmware Drivers
#
#
# ARM System Control and Management Interface Protocol
#
CONFIG_ARM_SCMI_PROTOCOL=y
# CONFIG_ARM_SCMI_RAW_MODE_SUPPORT is not set
CONFIG_ARM_SCMI_HAVE_TRANSPORT=y
CONFIG_ARM_SCMI_HAVE_SHMEM=y
CONFIG_ARM_SCMI_HAVE_MSG=y
CONFIG_ARM_SCMI_TRANSPORT_MAILBOX=y
CONFIG_ARM_SCMI_TRANSPORT_OPTEE=y
CONFIG_ARM_SCMI_TRANSPORT_SMC=y
# CONFIG_ARM_SCMI_TRANSPORT_SMC_ATOMIC_ENABLE is not set
# CONFIG_ARM_SCMI_TRANSPORT_VIRTIO is not set
# CONFIG_ARM_SCMI_POWER_CONTROL is not set
# end of ARM System Control and Management Interface Protocol
# CONFIG_ARM_SCPI_PROTOCOL is not set
# CONFIG_DMIID is not set
# CONFIG_DMI_SYSFS is not set
# CONFIG_SYSFB_SIMPLEFB is not set
# CONFIG_ARM_FFA_TRANSPORT is not set
# CONFIG_GOOGLE_FIRMWARE is not set
#
# EFI (Extensible Firmware Interface) Support
#
CONFIG_EFI_ESRT=y
CONFIG_EFI_PARAMS_FROM_FDT=y
CONFIG_EFI_RUNTIME_WRAPPERS=y
CONFIG_EFI_GENERIC_STUB=y
# CONFIG_EFI_ZBOOT is not set
CONFIG_EFI_ARMSTUB_DTB_LOADER=y
# CONFIG_EFI_BOOTLOADER_CONTROL is not set
CONFIG_EFI_CAPSULE_LOADER=y
# CONFIG_EFI_TEST is not set
# CONFIG_RESET_ATTACK_MITIGATION is not set
# CONFIG_EFI_DISABLE_PCI_DMA is not set
CONFIG_EFI_EARLYCON=y
# CONFIG_EFI_DISABLE_RUNTIME is not set
# CONFIG_EFI_COCO_SECRET is not set
# end of EFI (Extensible Firmware Interface) Support
# CONFIG_TEE_STMM_EFI is not set
CONFIG_ARM_PSCI_FW=y
# CONFIG_ARM_PSCI_CHECKER is not set
#
# Qualcomm firmware drivers
#
CONFIG_QCOM_SCM=y
# CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT is not set
# CONFIG_QCOM_QSEECOM is not set
# end of Qualcomm firmware drivers
CONFIG_HAVE_ARM_SMCCC=y
CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y
# CONFIG_ARM_SMCCC_SOC_ID is not set
#
# Tegra firmware driver
#
# end of Tegra firmware driver
# end of Firmware Drivers
# CONFIG_GNSS is not set
# CONFIG_MTD is not set
CONFIG_DTC=y
CONFIG_OF=y
# CONFIG_OF_UNITTEST is not set
CONFIG_OF_FLATTREE=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_KOBJ=y
CONFIG_OF_DYNAMIC=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_IRQ=y
CONFIG_OF_RESERVED_MEM=y
CONFIG_OF_RESOLVE=y
CONFIG_OF_OVERLAY=y
CONFIG_OF_NUMA=y
# CONFIG_PARPORT is not set
CONFIG_BLK_DEV=y
# CONFIG_BLK_DEV_NULL_BLK is not set
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
# CONFIG_BLK_DEV_DRBD is not set
CONFIG_BLK_DEV_NBD=y
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
# CONFIG_VIRTIO_BLK is not set
# CONFIG_BLK_DEV_RBD is not set
# CONFIG_BLK_DEV_UBLK is not set
#
# NVME Support
#
# CONFIG_NVME_FC is not set
# CONFIG_NVME_TCP is not set
# CONFIG_NVME_TARGET is not set
# end of NVME Support
#
# Misc devices
#
# CONFIG_AD525X_DPOT is not set
# CONFIG_DUMMY_IRQ is not set
# CONFIG_ICS932S401 is not set
# CONFIG_ENCLOSURE_SERVICES is not set
# CONFIG_HI6421V600_IRQ is not set
# CONFIG_QCOM_COINCELL is not set
CONFIG_QCOM_FASTRPC=y
# CONFIG_APDS9802ALS is not set
# CONFIG_ISL29003 is not set
# CONFIG_ISL29020 is not set
# CONFIG_SENSORS_TSL2550 is not set
# CONFIG_SENSORS_BH1770 is not set
# CONFIG_SENSORS_APDS990X is not set
# CONFIG_HMC6352 is not set
# CONFIG_DS1682 is not set
# CONFIG_SRAM is not set
# CONFIG_XILINX_SDFEC is not set
# CONFIG_HISI_HIKEY_USB is not set
# CONFIG_OPEN_DICE is not set
# CONFIG_VCPU_STALL_DETECTOR is not set
# CONFIG_NSM is not set
# CONFIG_C2PORT is not set
#
# EEPROM support
#
# CONFIG_EEPROM_AT24 is not set
# CONFIG_EEPROM_MAX6875 is not set
# CONFIG_EEPROM_93CX6 is not set
# CONFIG_EEPROM_IDT_89HPESX is not set
# CONFIG_EEPROM_EE1004 is not set
# end of EEPROM support
#
# Texas Instruments shared transport line discipline
#
# CONFIG_TI_ST is not set
# end of Texas Instruments shared transport line discipline
# CONFIG_SENSORS_LIS3_I2C is not set
# CONFIG_ALTERA_STAPL is not set
# CONFIG_ECHO is not set
# CONFIG_MISC_RTSX_USB is not set
# CONFIG_UACCE is not set
# CONFIG_PVPANIC is not set
# end of Misc devices
#
# SCSI device support
#
CONFIG_SCSI_MOD=y
# CONFIG_RAID_ATTRS is not set
CONFIG_SCSI_COMMON=y
CONFIG_SCSI=y
CONFIG_SCSI_DMA=y
# CONFIG_SCSI_PROC_FS is not set
#
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
# CONFIG_CHR_DEV_ST is not set
# CONFIG_BLK_DEV_SR is not set
# CONFIG_CHR_DEV_SG is not set
CONFIG_BLK_DEV_BSG=y
# CONFIG_CHR_DEV_SCH is not set
# CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set
# CONFIG_SCSI_SCAN_ASYNC is not set
#
# SCSI Transports
#
# CONFIG_SCSI_SPI_ATTRS is not set
# CONFIG_SCSI_FC_ATTRS is not set
# CONFIG_SCSI_ISCSI_ATTRS is not set
CONFIG_SCSI_SAS_ATTRS=y
CONFIG_SCSI_SAS_LIBSAS=y
CONFIG_SCSI_SAS_HOST_SMP=y
# CONFIG_SCSI_SRP_ATTRS is not set
# end of SCSI Transports
CONFIG_SCSI_LOWLEVEL=y
# CONFIG_ISCSI_TCP is not set
# CONFIG_ISCSI_BOOT_SYSFS is not set
# CONFIG_SCSI_DEBUG is not set
# CONFIG_SCSI_VIRTIO is not set
# CONFIG_SCSI_DH is not set
# end of SCSI device support
# CONFIG_ATA is not set
CONFIG_MD=y
# CONFIG_BLK_DEV_MD is not set
CONFIG_MD_BITMAP_FILE=y
# CONFIG_BCACHE is not set
CONFIG_BLK_DEV_DM_BUILTIN=y
CONFIG_BLK_DEV_DM=y
# CONFIG_DM_DEBUG is not set
# CONFIG_DM_UNSTRIPED is not set
CONFIG_DM_CRYPT=y
# CONFIG_DM_SNAPSHOT is not set
# CONFIG_DM_THIN_PROVISIONING is not set
# CONFIG_DM_CACHE is not set
# CONFIG_DM_WRITECACHE is not set
# CONFIG_DM_EBS is not set
# CONFIG_DM_ERA is not set
# CONFIG_DM_CLONE is not set
# CONFIG_DM_MIRROR is not set
# CONFIG_DM_RAID is not set
# CONFIG_DM_ZERO is not set
# CONFIG_DM_MULTIPATH is not set
# CONFIG_DM_DELAY is not set
# CONFIG_DM_DUST is not set
# CONFIG_DM_INIT is not set
# CONFIG_DM_UEVENT is not set
# CONFIG_DM_FLAKEY is not set
# CONFIG_DM_VERITY is not set
# CONFIG_DM_SWITCH is not set
# CONFIG_DM_LOG_WRITES is not set
# CONFIG_DM_INTEGRITY is not set
# CONFIG_TARGET_CORE is not set
CONFIG_NETDEVICES=y
CONFIG_NET_CORE=y
# CONFIG_BONDING is not set
# CONFIG_DUMMY is not set
# CONFIG_WIREGUARD is not set
# CONFIG_EQUALIZER is not set
# CONFIG_NET_TEAM is not set
# CONFIG_MACVLAN is not set
# CONFIG_IPVLAN is not set
# CONFIG_VXLAN is not set
# CONFIG_GENEVE is not set
# CONFIG_BAREUDP is not set
# CONFIG_GTP is not set
# CONFIG_AMT is not set
# CONFIG_MACSEC is not set
# CONFIG_NETCONSOLE is not set
CONFIG_TUN=y
# CONFIG_TUN_VNET_CROSS_LE is not set
# CONFIG_VETH is not set
# CONFIG_VIRTIO_NET is not set
# CONFIG_NLMON is not set
CONFIG_ETHERNET=y
CONFIG_NET_VENDOR_ALACRITECH=y
# CONFIG_ALTERA_TSE is not set
CONFIG_NET_VENDOR_AMAZON=y
CONFIG_NET_VENDOR_AMD=y
# CONFIG_AMD_XGBE is not set
CONFIG_NET_VENDOR_AQUANTIA=y
CONFIG_NET_VENDOR_ARC=y
CONFIG_NET_VENDOR_ASIX=y
CONFIG_NET_VENDOR_BROADCOM=y
# CONFIG_B44 is not set
# CONFIG_BCMGENET is not set
# CONFIG_SYSTEMPORT is not set
CONFIG_NET_VENDOR_CADENCE=y
# CONFIG_MACB is not set
CONFIG_NET_VENDOR_CAVIUM=y
CONFIG_NET_VENDOR_CORTINA=y
# CONFIG_GEMINI_ETHERNET is not set
CONFIG_NET_VENDOR_DAVICOM=y
# CONFIG_DNET is not set
CONFIG_NET_VENDOR_ENGLEDER=y
# CONFIG_TSNEP is not set
CONFIG_NET_VENDOR_EZCHIP=y
# CONFIG_EZCHIP_NPS_MANAGEMENT_ENET is not set
CONFIG_NET_VENDOR_FUNGIBLE=y
CONFIG_NET_VENDOR_GOOGLE=y
CONFIG_NET_VENDOR_HISILICON=y
# CONFIG_HIX5HD2_GMAC is not set
# CONFIG_HISI_FEMAC is not set
# CONFIG_HIP04_ETH is not set
# CONFIG_HNS_DSAF is not set
# CONFIG_HNS_ENET is not set
CONFIG_NET_VENDOR_HUAWEI=y
CONFIG_NET_VENDOR_I825XX=y
CONFIG_NET_VENDOR_INTEL=y
CONFIG_NET_VENDOR_LITEX=y
# CONFIG_LITEX_LITEETH is not set
CONFIG_NET_VENDOR_MARVELL=y
# CONFIG_MVMDIO is not set
CONFIG_NET_VENDOR_MELLANOX=y
# CONFIG_MLXSW_CORE is not set
# CONFIG_MLXFW is not set
CONFIG_NET_VENDOR_MICREL=y
# CONFIG_KS8842 is not set
# CONFIG_KS8851_MLL is not set
CONFIG_NET_VENDOR_MICROCHIP=y
# CONFIG_LAN966X_SWITCH is not set
# CONFIG_VCAP is not set
CONFIG_NET_VENDOR_MICROSEMI=y
# CONFIG_MSCC_OCELOT_SWITCH is not set
CONFIG_NET_VENDOR_MICROSOFT=y
# CONFIG_NET_VENDOR_NI is not set
CONFIG_NET_VENDOR_NATSEMI=y
CONFIG_NET_VENDOR_NETRONOME=y
CONFIG_NET_VENDOR_8390=y
# CONFIG_ETHOC is not set
CONFIG_NET_VENDOR_PENSANDO=y
CONFIG_NET_VENDOR_QUALCOMM=y
# CONFIG_QCA7000_UART is not set
# CONFIG_QCOM_EMAC is not set
# CONFIG_RMNET is not set
CONFIG_NET_VENDOR_RENESAS=y
CONFIG_NET_VENDOR_ROCKER=y
CONFIG_NET_VENDOR_SAMSUNG=y
# CONFIG_SXGBE_ETH is not set
CONFIG_NET_VENDOR_SEEQ=y
CONFIG_NET_VENDOR_SOLARFLARE=y
CONFIG_NET_VENDOR_SMSC=y
# CONFIG_SMC91X is not set
# CONFIG_SMSC911X is not set
# CONFIG_NET_VENDOR_SOCIONEXT is not set
CONFIG_NET_VENDOR_STMICRO=y
# CONFIG_STMMAC_ETH is not set
CONFIG_NET_VENDOR_SYNOPSYS=y
# CONFIG_DWC_XLGMAC is not set
CONFIG_NET_VENDOR_VERTEXCOM=y
CONFIG_NET_VENDOR_VIA=y
# CONFIG_VIA_VELOCITY is not set
CONFIG_NET_VENDOR_WANGXUN=y
CONFIG_NET_VENDOR_WIZNET=y
# CONFIG_WIZNET_W5100 is not set
# CONFIG_WIZNET_W5300 is not set
CONFIG_NET_VENDOR_XILINX=y
# CONFIG_XILINX_EMACLITE is not set
# CONFIG_XILINX_LL_TEMAC is not set
CONFIG_QCOM_IPA=m
CONFIG_PHYLIB=y
CONFIG_SWPHY=y
CONFIG_PHYLIB_LEDS=y
CONFIG_FIXED_PHY=y
#
# MII PHY device drivers
#
# CONFIG_AMD_PHY is not set
# CONFIG_ADIN_PHY is not set
# CONFIG_ADIN1100_PHY is not set
# CONFIG_AQUANTIA_PHY is not set
# CONFIG_AX88796B_PHY is not set
# CONFIG_BROADCOM_PHY is not set
# CONFIG_BCM54140_PHY is not set
# CONFIG_BCM7XXX_PHY is not set
# CONFIG_BCM84881_PHY is not set
# CONFIG_BCM87XX_PHY is not set
# CONFIG_CICADA_PHY is not set
# CONFIG_CORTINA_PHY is not set
# CONFIG_DAVICOM_PHY is not set
# CONFIG_ICPLUS_PHY is not set
# CONFIG_LXT_PHY is not set
# CONFIG_INTEL_XWAY_PHY is not set
# CONFIG_LSI_ET1011C_PHY is not set
# CONFIG_MARVELL_PHY is not set
# CONFIG_MARVELL_10G_PHY is not set
# CONFIG_MARVELL_88Q2XXX_PHY is not set
# CONFIG_MARVELL_88X2222_PHY is not set
# CONFIG_MAXLINEAR_GPHY is not set
# CONFIG_MEDIATEK_GE_PHY is not set
# CONFIG_MICREL_PHY is not set
# CONFIG_MICROCHIP_T1S_PHY is not set
# CONFIG_MICROCHIP_PHY is not set
# CONFIG_MICROCHIP_T1_PHY is not set
# CONFIG_MICROSEMI_PHY is not set
# CONFIG_MOTORCOMM_PHY is not set
# CONFIG_NATIONAL_PHY is not set
# CONFIG_NXP_CBTX_PHY is not set
# CONFIG_NXP_C45_TJA11XX_PHY is not set
# CONFIG_NXP_TJA11XX_PHY is not set
# CONFIG_NCN26000_PHY is not set
# CONFIG_AT803X_PHY is not set
# CONFIG_QSEMI_PHY is not set
# CONFIG_REALTEK_PHY is not set
# CONFIG_RENESAS_PHY is not set
# CONFIG_ROCKCHIP_PHY is not set
# CONFIG_SMSC_PHY is not set
# CONFIG_STE10XP is not set
# CONFIG_TERANETICS_PHY is not set
# CONFIG_DP83822_PHY is not set
# CONFIG_DP83TC811_PHY is not set
# CONFIG_DP83848_PHY is not set
# CONFIG_DP83867_PHY is not set
# CONFIG_DP83869_PHY is not set
# CONFIG_DP83TD510_PHY is not set
# CONFIG_DP83TG720_PHY is not set
# CONFIG_VITESSE_PHY is not set
# CONFIG_XILINX_GMII2RGMII is not set
# CONFIG_PSE_CONTROLLER is not set
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_BUS=y
CONFIG_FWNODE_MDIO=y
CONFIG_OF_MDIO=y
CONFIG_MDIO_DEVRES=y
# CONFIG_MDIO_BITBANG is not set
# CONFIG_MDIO_BCM_UNIMAC is not set
# CONFIG_MDIO_HISI_FEMAC is not set
# CONFIG_MDIO_MVUSB is not set
# CONFIG_MDIO_MSCC_MIIM is not set
# CONFIG_MDIO_OCTEON is not set
# CONFIG_MDIO_IPQ4019 is not set
# CONFIG_MDIO_IPQ8064 is not set
#
# MDIO Multiplexers
#
# CONFIG_MDIO_BUS_MUX_GPIO is not set
# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set
# CONFIG_MDIO_BUS_MUX_MMIOREG is not set
#
# PCS device drivers
#
# end of PCS device drivers
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
CONFIG_USB_NET_DRIVERS=y
# CONFIG_USB_CATC is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_RTL8150 is not set
# CONFIG_USB_RTL8152 is not set
# CONFIG_USB_LAN78XX is not set
# CONFIG_USB_USBNET is not set
# CONFIG_USB_HSO is not set
# CONFIG_USB_IPHETH is not set
CONFIG_WLAN=y
CONFIG_WLAN_VENDOR_ADMTEK=y
CONFIG_ATH_COMMON=y
CONFIG_WLAN_VENDOR_ATH=y
# CONFIG_ATH_DEBUG is not set
# CONFIG_ATH9K is not set
# CONFIG_ATH9K_HTC is not set
# CONFIG_CARL9170 is not set
# CONFIG_ATH6KL is not set
# CONFIG_AR5523 is not set
CONFIG_ATH10K=y
CONFIG_ATH10K_CE=y
# CONFIG_ATH10K_SDIO is not set
# CONFIG_ATH10K_USB is not set
CONFIG_ATH10K_SNOC=y
CONFIG_ATH10K_DEBUG=y
# CONFIG_ATH10K_DEBUGFS is not set
# CONFIG_WCN36XX is not set
# CONFIG_ATH11K is not set
CONFIG_WLAN_VENDOR_ATMEL=y
# CONFIG_AT76C50X_USB is not set
CONFIG_WLAN_VENDOR_BROADCOM=y
# CONFIG_B43 is not set
# CONFIG_B43LEGACY is not set
# CONFIG_BRCMSMAC is not set
# CONFIG_BRCMFMAC is not set
CONFIG_WLAN_VENDOR_INTEL=y
CONFIG_WLAN_VENDOR_INTERSIL=y
# CONFIG_P54_COMMON is not set
CONFIG_WLAN_VENDOR_MARVELL=y
# CONFIG_LIBERTAS is not set
# CONFIG_LIBERTAS_THINFIRM is not set
# CONFIG_MWIFIEX is not set
CONFIG_WLAN_VENDOR_MEDIATEK=y
# CONFIG_MT7601U is not set
# CONFIG_MT76x0U is not set
# CONFIG_MT76x2U is not set
# CONFIG_MT7663U is not set
# CONFIG_MT7663S is not set
# CONFIG_MT7921S is not set
# CONFIG_MT7921U is not set
# CONFIG_MT7925U is not set
CONFIG_WLAN_VENDOR_MICROCHIP=y
# CONFIG_WILC1000_SDIO is not set
CONFIG_WLAN_VENDOR_PURELIFI=y
# CONFIG_PLFXLC is not set
CONFIG_WLAN_VENDOR_RALINK=y
# CONFIG_RT2X00 is not set
CONFIG_WLAN_VENDOR_REALTEK=y
# CONFIG_RTL8187 is not set
# CONFIG_RTL_CARDS is not set
# CONFIG_RTL8XXXU is not set
# CONFIG_RTW88 is not set
# CONFIG_RTW89 is not set
CONFIG_WLAN_VENDOR_RSI=y
# CONFIG_RSI_91X is not set
CONFIG_WLAN_VENDOR_SILABS=y
# CONFIG_WFX is not set
CONFIG_WLAN_VENDOR_ST=y
# CONFIG_CW1200 is not set
CONFIG_WLAN_VENDOR_TI=y
# CONFIG_WL1251 is not set
# CONFIG_WL12XX is not set
# CONFIG_WL18XX is not set
# CONFIG_WLCORE is not set
CONFIG_WLAN_VENDOR_ZYDAS=y
# CONFIG_ZD1211RW is not set
CONFIG_WLAN_VENDOR_QUANTENNA=y
# CONFIG_MAC80211_HWSIM is not set
# CONFIG_VIRT_WIFI is not set
# CONFIG_WAN is not set
#
# Wireless WAN
#
# CONFIG_WWAN is not set
# end of Wireless WAN
# CONFIG_NETDEVSIM is not set
CONFIG_NET_FAILOVER=y
# CONFIG_ISDN is not set
#
# Input device support
#
CONFIG_INPUT=y
CONFIG_INPUT_LEDS=y
# CONFIG_INPUT_FF_MEMLESS is not set
# CONFIG_INPUT_SPARSEKMAP is not set
# CONFIG_INPUT_MATRIXKMAP is not set
CONFIG_INPUT_VIVALDIFMAP=y
#
# Userland interfaces
#
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_EVBUG is not set
#
# Input Device Drivers
#
CONFIG_INPUT_KEYBOARD=y
# CONFIG_KEYBOARD_ADC is not set
# CONFIG_KEYBOARD_ADP5588 is not set
# CONFIG_KEYBOARD_ADP5589 is not set
CONFIG_KEYBOARD_ATKBD=y
# CONFIG_KEYBOARD_QT1050 is not set
# CONFIG_KEYBOARD_QT1070 is not set
# CONFIG_KEYBOARD_QT2160 is not set
# CONFIG_KEYBOARD_DLINK_DIR685 is not set
# CONFIG_KEYBOARD_LKKBD is not set
CONFIG_KEYBOARD_GPIO=y
# CONFIG_KEYBOARD_GPIO_POLLED is not set
# CONFIG_KEYBOARD_TCA6416 is not set
# CONFIG_KEYBOARD_TCA8418 is not set
# CONFIG_KEYBOARD_MATRIX is not set
# CONFIG_KEYBOARD_LM8323 is not set
# CONFIG_KEYBOARD_LM8333 is not set
# CONFIG_KEYBOARD_MAX7359 is not set
# CONFIG_KEYBOARD_MCS is not set
# CONFIG_KEYBOARD_MPR121 is not set
# CONFIG_KEYBOARD_NEWTON is not set
# CONFIG_KEYBOARD_OPENCORES is not set
# CONFIG_KEYBOARD_PINEPHONE is not set
# CONFIG_KEYBOARD_SAMSUNG is not set
# CONFIG_KEYBOARD_STOWAWAY is not set
# CONFIG_KEYBOARD_SUNKBD is not set
# CONFIG_KEYBOARD_OMAP4 is not set
# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set
# CONFIG_KEYBOARD_XTKBD is not set
# CONFIG_KEYBOARD_CAP11XX is not set
# CONFIG_KEYBOARD_BCM is not set
# CONFIG_KEYBOARD_CYPRESS_SF is not set
CONFIG_INPUT_MOUSE=y
# CONFIG_MOUSE_PS2 is not set
# CONFIG_MOUSE_SERIAL is not set
# CONFIG_MOUSE_APPLETOUCH is not set
# CONFIG_MOUSE_BCM5974 is not set
# CONFIG_MOUSE_CYAPA is not set
# CONFIG_MOUSE_ELAN_I2C is not set
# CONFIG_MOUSE_VSXXXAA is not set
# CONFIG_MOUSE_GPIO is not set
# CONFIG_MOUSE_SYNAPTICS_I2C is not set
# CONFIG_MOUSE_SYNAPTICS_USB is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TABLET is not set
CONFIG_INPUT_TOUCHSCREEN=y
# CONFIG_TOUCHSCREEN_AD7879 is not set
# CONFIG_TOUCHSCREEN_ADC is not set
# CONFIG_TOUCHSCREEN_AR1021_I2C is not set
# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set
# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set
# CONFIG_TOUCHSCREEN_BU21013 is not set
# CONFIG_TOUCHSCREEN_BU21029 is not set
# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set
# CONFIG_TOUCHSCREEN_CY8CTMA140 is not set
# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set
# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set
# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set
# CONFIG_TOUCHSCREEN_CYTTSP5 is not set
# CONFIG_TOUCHSCREEN_DYNAPRO is not set
# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
# CONFIG_TOUCHSCREEN_EETI is not set
# CONFIG_TOUCHSCREEN_EGALAX is not set
# CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set
# CONFIG_TOUCHSCREEN_EXC3000 is not set
# CONFIG_TOUCHSCREEN_FUJITSU is not set
# CONFIG_TOUCHSCREEN_GOODIX is not set
# CONFIG_TOUCHSCREEN_HIDEEP is not set
# CONFIG_TOUCHSCREEN_HYCON_HY46XX is not set
# CONFIG_TOUCHSCREEN_HYNITRON_CSTXXX is not set
# CONFIG_TOUCHSCREEN_ILI210X is not set
# CONFIG_TOUCHSCREEN_ILITEK is not set
# CONFIG_TOUCHSCREEN_S6SY761 is not set
# CONFIG_TOUCHSCREEN_GUNZE is not set
# CONFIG_TOUCHSCREEN_EKTF2127 is not set
# CONFIG_TOUCHSCREEN_ELAN is not set
# CONFIG_TOUCHSCREEN_ELO is not set
# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
# CONFIG_TOUCHSCREEN_WACOM_I2C is not set
# CONFIG_TOUCHSCREEN_MAX11801 is not set
# CONFIG_TOUCHSCREEN_MCS5000 is not set
# CONFIG_TOUCHSCREEN_MMS114 is not set
# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set
# CONFIG_TOUCHSCREEN_MSG2638 is not set
# CONFIG_TOUCHSCREEN_MTOUCH is not set
# CONFIG_TOUCHSCREEN_NOVATEK_NVT_TS is not set
# CONFIG_TOUCHSCREEN_IMAGIS is not set
# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set
# CONFIG_TOUCHSCREEN_INEXIO is not set
# CONFIG_TOUCHSCREEN_PENMOUNT is not set
# CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set
# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
# CONFIG_TOUCHSCREEN_PIXCIR is not set
# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set
# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
# CONFIG_TOUCHSCREEN_TSC_SERIO is not set
# CONFIG_TOUCHSCREEN_TSC2004 is not set
# CONFIG_TOUCHSCREEN_TSC2007 is not set
# CONFIG_TOUCHSCREEN_RM_TS is not set
# CONFIG_TOUCHSCREEN_SILEAD is not set
# CONFIG_TOUCHSCREEN_SIS_I2C is not set
# CONFIG_TOUCHSCREEN_ST1232 is not set
# CONFIG_TOUCHSCREEN_STMFTS is not set
# CONFIG_TOUCHSCREEN_SX8654 is not set
# CONFIG_TOUCHSCREEN_TPS6507X is not set
# CONFIG_TOUCHSCREEN_ZET6223 is not set
# CONFIG_TOUCHSCREEN_ZFORCE is not set
# CONFIG_TOUCHSCREEN_COLIBRI_VF50 is not set
# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set
# CONFIG_TOUCHSCREEN_IQS5XX is not set
# CONFIG_TOUCHSCREEN_IQS7211 is not set
# CONFIG_TOUCHSCREEN_ZINITIX is not set
# CONFIG_TOUCHSCREEN_HIMAX_HX83112B is not set
CONFIG_INPUT_MISC=y
# CONFIG_INPUT_AD714X is not set
# CONFIG_INPUT_ATMEL_CAPTOUCH is not set
# CONFIG_INPUT_BMA150 is not set
# CONFIG_INPUT_E3X0_BUTTON is not set
CONFIG_INPUT_PM8941_PWRKEY=y
# CONFIG_INPUT_PM8XXX_VIBRATOR is not set
# CONFIG_INPUT_MMA8450 is not set
# CONFIG_INPUT_GPIO_BEEPER is not set
# CONFIG_INPUT_GPIO_DECODER is not set
# CONFIG_INPUT_GPIO_VIBRA is not set
# CONFIG_INPUT_ATI_REMOTE2 is not set
# CONFIG_INPUT_KEYSPAN_REMOTE is not set
# CONFIG_INPUT_KXTJ9 is not set
# CONFIG_INPUT_POWERMATE is not set
# CONFIG_INPUT_YEALINK is not set
# CONFIG_INPUT_CM109 is not set
# CONFIG_INPUT_REGULATOR_HAPTIC is not set
# CONFIG_INPUT_UINPUT is not set
# CONFIG_INPUT_PCF8574 is not set
# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
# CONFIG_INPUT_DA7280_HAPTICS is not set
# CONFIG_INPUT_ADXL34X is not set
# CONFIG_INPUT_IMS_PCU is not set
# CONFIG_INPUT_IQS269A is not set
# CONFIG_INPUT_IQS626A is not set
# CONFIG_INPUT_IQS7222 is not set
# CONFIG_INPUT_CMA3000 is not set
# CONFIG_INPUT_DRV260X_HAPTICS is not set
# CONFIG_INPUT_DRV2665_HAPTICS is not set
# CONFIG_INPUT_DRV2667_HAPTICS is not set
# CONFIG_RMI4_CORE is not set
#
# Hardware I/O ports
#
CONFIG_SERIO=y
# CONFIG_SERIO_SERPORT is not set
CONFIG_SERIO_AMBAKMI=y
CONFIG_SERIO_LIBPS2=y
# CONFIG_SERIO_RAW is not set
# CONFIG_SERIO_ALTERA_PS2 is not set
# CONFIG_SERIO_PS2MULT is not set
# CONFIG_SERIO_ARC_PS2 is not set
# CONFIG_SERIO_APBPS2 is not set
# CONFIG_SERIO_GPIO_PS2 is not set
# CONFIG_USERIO is not set
# CONFIG_GAMEPORT is not set
# end of Hardware I/O ports
# end of Input device support
#
# Character devices
#
CONFIG_TTY=y
CONFIG_VT=y
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_VT_CONSOLE=y
CONFIG_VT_CONSOLE_SLEEP=y
CONFIG_HW_CONSOLE=y
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=16
CONFIG_LEGACY_TIOCSTI=y
CONFIG_LDISC_AUTOLOAD=y
#
# Serial drivers
#
CONFIG_SERIAL_EARLYCON=y
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y
CONFIG_SERIAL_8250_16550A_VARIANTS=y
# CONFIG_SERIAL_8250_FINTEK is not set
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_DMA=y
CONFIG_SERIAL_8250_NR_UARTS=4
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
CONFIG_SERIAL_8250_EXTENDED=y
# CONFIG_SERIAL_8250_MANY_PORTS is not set
CONFIG_SERIAL_8250_SHARE_IRQ=y
# CONFIG_SERIAL_8250_DETECT_IRQ is not set
# CONFIG_SERIAL_8250_RSA is not set
CONFIG_SERIAL_8250_DWLIB=y
CONFIG_SERIAL_8250_FSL=y
CONFIG_SERIAL_8250_DW=y
# CONFIG_SERIAL_8250_RT288X is not set
CONFIG_SERIAL_OF_PLATFORM=y
#
# Non-8250 serial port support
#
# CONFIG_SERIAL_AMBA_PL010 is not set
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
# CONFIG_SERIAL_EARLYCON_SEMIHOST is not set
# CONFIG_SERIAL_UARTLITE is not set
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_SERIAL_MSM=y
CONFIG_SERIAL_MSM_CONSOLE=y
CONFIG_SERIAL_QCOM_GENI=y
CONFIG_SERIAL_QCOM_GENI_CONSOLE=y
# CONFIG_SERIAL_SIFIVE is not set
# CONFIG_SERIAL_SCCNXP is not set
# CONFIG_SERIAL_SC16IS7XX is not set
# CONFIG_SERIAL_ALTERA_JTAGUART is not set
# CONFIG_SERIAL_ALTERA_UART is not set
# CONFIG_SERIAL_XILINX_PS_UART is not set
# CONFIG_SERIAL_ARC is not set
# CONFIG_SERIAL_FSL_LPUART is not set
# CONFIG_SERIAL_FSL_LINFLEXUART is not set
# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set
# CONFIG_SERIAL_SPRD is not set
# end of Serial drivers
CONFIG_SERIAL_MCTRL_GPIO=y
# CONFIG_SERIAL_NONSTANDARD is not set
# CONFIG_N_GSM is not set
# CONFIG_NULL_TTY is not set
# CONFIG_HVC_DCC is not set
# CONFIG_RPMSG_TTY is not set
CONFIG_SERIAL_DEV_BUS=y
CONFIG_SERIAL_DEV_CTRL_TTYPORT=y
# CONFIG_VIRTIO_CONSOLE is not set
# CONFIG_IPMI_HANDLER is not set
CONFIG_HW_RANDOM=y
# CONFIG_HW_RANDOM_TIMERIOMEM is not set
# CONFIG_HW_RANDOM_BA431 is not set
# CONFIG_HW_RANDOM_VIRTIO is not set
CONFIG_HW_RANDOM_OPTEE=y
# CONFIG_HW_RANDOM_CCTRNG is not set
# CONFIG_HW_RANDOM_XIPHERA is not set
CONFIG_HW_RANDOM_ARM_SMCCC_TRNG=y
# CONFIG_DEVMEM is not set
CONFIG_DEVPORT=y
# CONFIG_TCG_TPM is not set
# CONFIG_XILLYBUS is not set
# CONFIG_XILLYUSB is not set
# end of Character devices
#
# I2C support
#
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_COMPAT=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MUX=y
#
# Multiplexer I2C Chip support
#
# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set
# CONFIG_I2C_MUX_GPIO is not set
# CONFIG_I2C_MUX_GPMUX is not set
# CONFIG_I2C_MUX_LTC4306 is not set
# CONFIG_I2C_MUX_PCA9541 is not set
# CONFIG_I2C_MUX_PCA954x is not set
# CONFIG_I2C_MUX_PINCTRL is not set
# CONFIG_I2C_MUX_REG is not set
# CONFIG_I2C_DEMUX_PINCTRL is not set
# CONFIG_I2C_MUX_MLXCPLD is not set
# end of Multiplexer I2C Chip support
CONFIG_I2C_HELPER_AUTO=y
#
# I2C Hardware Bus support
#
#
# I2C system bus drivers (mostly embedded / system-on-chip)
#
# CONFIG_I2C_CADENCE is not set
# CONFIG_I2C_CBUS_GPIO is not set
# CONFIG_I2C_DESIGNWARE_PLATFORM is not set
# CONFIG_I2C_EMEV2 is not set
# CONFIG_I2C_GPIO is not set
# CONFIG_I2C_HISI is not set
# CONFIG_I2C_NOMADIK is not set
# CONFIG_I2C_OCORES is not set
# CONFIG_I2C_PCA_PLATFORM is not set
CONFIG_I2C_QCOM_CCI=y
CONFIG_I2C_QCOM_GENI=y
# CONFIG_I2C_QUP is not set
# CONFIG_I2C_RK3X is not set
# CONFIG_I2C_SIMTEC is not set
# CONFIG_I2C_XILINX is not set
#
# External I2C/SMBus adapter drivers
#
# CONFIG_I2C_DIOLAN_U2C is not set
# CONFIG_I2C_CP2615 is not set
# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
# CONFIG_I2C_TAOS_EVM is not set
# CONFIG_I2C_TINY_USB is not set
#
# Other I2C/SMBus bus drivers
#
# CONFIG_I2C_VIRTIO is not set
# end of I2C Hardware Bus support
# CONFIG_I2C_STUB is not set
# CONFIG_I2C_SLAVE is not set
# CONFIG_I2C_DEBUG_CORE is not set
# CONFIG_I2C_DEBUG_ALGO is not set
# CONFIG_I2C_DEBUG_BUS is not set
# end of I2C support
# CONFIG_I3C is not set
# CONFIG_SPI is not set
CONFIG_SPMI=y
# CONFIG_SPMI_HISI3670 is not set
CONFIG_SPMI_MSM_PMIC_ARB=y
# CONFIG_HSI is not set
CONFIG_PPS=y
# CONFIG_PPS_DEBUG is not set
#
# PPS clients support
#
# CONFIG_PPS_CLIENT_KTIMER is not set
# CONFIG_PPS_CLIENT_LDISC is not set
# CONFIG_PPS_CLIENT_GPIO is not set
#
# PPS generators support
#
#
# PTP clock support
#
CONFIG_PTP_1588_CLOCK=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
#
# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks.
#
CONFIG_PTP_1588_CLOCK_KVM=y
# CONFIG_PTP_1588_CLOCK_IDT82P33 is not set
# CONFIG_PTP_1588_CLOCK_IDTCM is not set
# CONFIG_PTP_1588_CLOCK_MOCK is not set
# end of PTP clock support
CONFIG_PINCTRL=y
CONFIG_PINMUX=y
CONFIG_PINCONF=y
CONFIG_GENERIC_PINCONF=y
# CONFIG_DEBUG_PINCTRL is not set
# CONFIG_PINCTRL_CY8C95X0 is not set
# CONFIG_PINCTRL_MCP23S08 is not set
# CONFIG_PINCTRL_MICROCHIP_SGPIO is not set
# CONFIG_PINCTRL_OCELOT is not set
# CONFIG_PINCTRL_SINGLE is not set
# CONFIG_PINCTRL_STMFX is not set
# CONFIG_PINCTRL_SX150X is not set
CONFIG_PINCTRL_MSM=y
# CONFIG_PINCTRL_IPQ5018 is not set
# CONFIG_PINCTRL_IPQ5332 is not set
# CONFIG_PINCTRL_IPQ8074 is not set
# CONFIG_PINCTRL_IPQ6018 is not set
# CONFIG_PINCTRL_IPQ9574 is not set
# CONFIG_PINCTRL_MDM9607 is not set
# CONFIG_PINCTRL_MSM8916 is not set
# CONFIG_PINCTRL_MSM8953 is not set
# CONFIG_PINCTRL_MSM8976 is not set
# CONFIG_PINCTRL_MSM8994 is not set
# CONFIG_PINCTRL_MSM8996 is not set
# CONFIG_PINCTRL_MSM8998 is not set
# CONFIG_PINCTRL_QCM2290 is not set
# CONFIG_PINCTRL_QCS404 is not set
# CONFIG_PINCTRL_QDU1000 is not set
# CONFIG_PINCTRL_SA8775P is not set
# CONFIG_PINCTRL_SC7180 is not set
# CONFIG_PINCTRL_SC7280 is not set
# CONFIG_PINCTRL_SC8180X is not set
# CONFIG_PINCTRL_SC8280XP is not set
# CONFIG_PINCTRL_SDM660 is not set
# CONFIG_PINCTRL_SDM670 is not set
# CONFIG_PINCTRL_SDM845 is not set
# CONFIG_PINCTRL_SDX75 is not set
# CONFIG_PINCTRL_SM4450 is not set
# CONFIG_PINCTRL_SM6115 is not set
# CONFIG_PINCTRL_SM6125 is not set
CONFIG_PINCTRL_SM6350=y
# CONFIG_PINCTRL_SM6375 is not set
# CONFIG_PINCTRL_SM7150 is not set
# CONFIG_PINCTRL_SM8150 is not set
# CONFIG_PINCTRL_SM8250 is not set
# CONFIG_PINCTRL_SM8350 is not set
# CONFIG_PINCTRL_SM8450 is not set
# CONFIG_PINCTRL_SM8550 is not set
# CONFIG_PINCTRL_SM8650 is not set
# CONFIG_PINCTRL_X1E80100 is not set
CONFIG_PINCTRL_QCOM_SPMI_PMIC=y
# CONFIG_PINCTRL_QCOM_SSBI_PMIC is not set
# CONFIG_PINCTRL_LPASS_LPI is not set
#
# Renesas pinctrl drivers
#
# end of Renesas pinctrl drivers
CONFIG_GPIOLIB=y
CONFIG_GPIOLIB_FASTPATH_LIMIT=512
CONFIG_OF_GPIO=y
CONFIG_GPIOLIB_IRQCHIP=y
# CONFIG_DEBUG_GPIO is not set
CONFIG_GPIO_CDEV=y
CONFIG_GPIO_CDEV_V1=y
#
# Memory mapped GPIO drivers
#
# CONFIG_GPIO_74XX_MMIO is not set
# CONFIG_GPIO_ALTERA is not set
# CONFIG_GPIO_CADENCE is not set
# CONFIG_GPIO_DWAPB is not set
# CONFIG_GPIO_FTGPIO010 is not set
# CONFIG_GPIO_GENERIC_PLATFORM is not set
# CONFIG_GPIO_GRGPIO is not set
# CONFIG_GPIO_HISI is not set
# CONFIG_GPIO_HLWD is not set
# CONFIG_GPIO_LOGICVC is not set
# CONFIG_GPIO_MB86S7X is not set
# CONFIG_GPIO_PL061 is not set
# CONFIG_GPIO_SIFIVE is not set
# CONFIG_GPIO_SYSCON is not set
# CONFIG_GPIO_XGENE is not set
# CONFIG_GPIO_XILINX is not set
# CONFIG_GPIO_AMD_FCH is not set
# end of Memory mapped GPIO drivers
#
# I2C GPIO expanders
#
# CONFIG_GPIO_ADNP is not set
# CONFIG_GPIO_FXL6408 is not set
# CONFIG_GPIO_DS4520 is not set
# CONFIG_GPIO_GW_PLD is not set
# CONFIG_GPIO_MAX7300 is not set
# CONFIG_GPIO_MAX732X is not set
# CONFIG_GPIO_PCA953X is not set
# CONFIG_GPIO_PCA9570 is not set
# CONFIG_GPIO_PCF857X is not set
# CONFIG_GPIO_TPIC2810 is not set
# end of I2C GPIO expanders
#
# MFD GPIO expanders
#
# end of MFD GPIO expanders
#
# USB GPIO expanders
#
# end of USB GPIO expanders
#
# Virtual GPIO drivers
#
# CONFIG_GPIO_AGGREGATOR is not set
# CONFIG_GPIO_LATCH is not set
# CONFIG_GPIO_MOCKUP is not set
# CONFIG_GPIO_VIRTIO is not set
# CONFIG_GPIO_SIM is not set
# end of Virtual GPIO drivers
# CONFIG_W1 is not set
CONFIG_POWER_RESET=y
# CONFIG_POWER_RESET_GPIO is not set
# CONFIG_POWER_RESET_GPIO_RESTART is not set
CONFIG_POWER_RESET_MSM=y
CONFIG_POWER_RESET_QCOM_PON=y
# CONFIG_POWER_RESET_LTC2952 is not set
# CONFIG_POWER_RESET_REGULATOR is not set
# CONFIG_POWER_RESET_RESTART is not set
# CONFIG_POWER_RESET_XGENE is not set
# CONFIG_POWER_RESET_SYSCON is not set
# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set
CONFIG_REBOOT_MODE=y
# CONFIG_SYSCON_REBOOT_MODE is not set
# CONFIG_NVMEM_REBOOT_MODE is not set
CONFIG_POWER_SUPPLY=y
# CONFIG_POWER_SUPPLY_DEBUG is not set
CONFIG_POWER_SUPPLY_HWMON=y
# CONFIG_GENERIC_ADC_BATTERY is not set
# CONFIG_IP5XXX_POWER is not set
# CONFIG_TEST_POWER is not set
# CONFIG_CHARGER_ADP5061 is not set
# CONFIG_BATTERY_CW2015 is not set
# CONFIG_BATTERY_DS2780 is not set
# CONFIG_BATTERY_DS2781 is not set
# CONFIG_BATTERY_DS2782 is not set
# CONFIG_BATTERY_SAMSUNG_SDI is not set
# CONFIG_BATTERY_SBS is not set
# CONFIG_CHARGER_SBS is not set
# CONFIG_MANAGER_SBS is not set
# CONFIG_BATTERY_BQ27XXX is not set
# CONFIG_BATTERY_MAX17040 is not set
# CONFIG_BATTERY_MAX17042 is not set
# CONFIG_CHARGER_MAX8903 is not set
# CONFIG_CHARGER_LP8727 is not set
# CONFIG_CHARGER_GPIO is not set
# CONFIG_CHARGER_MANAGER is not set
# CONFIG_CHARGER_LT3651 is not set
# CONFIG_CHARGER_LTC4162L is not set
# CONFIG_CHARGER_DETECTOR_MAX14656 is not set
# CONFIG_CHARGER_MAX77976 is not set
# CONFIG_CHARGER_QCOM_SMBB is not set
# CONFIG_BATTERY_PM8916_BMS_VM is not set
# CONFIG_CHARGER_PM8916_LBC is not set
# CONFIG_CHARGER_BQ2415X is not set
# CONFIG_CHARGER_BQ24190 is not set
# CONFIG_CHARGER_BQ24257 is not set
# CONFIG_CHARGER_BQ24735 is not set
# CONFIG_CHARGER_BQ2515X is not set
# CONFIG_CHARGER_BQ25890 is not set
# CONFIG_CHARGER_BQ25980 is not set
# CONFIG_CHARGER_BQ256XX is not set
# CONFIG_CHARGER_SMB347 is not set
# CONFIG_BATTERY_GAUGE_LTC2941 is not set
# CONFIG_BATTERY_GOLDFISH is not set
# CONFIG_BATTERY_RT5033 is not set
# CONFIG_CHARGER_RT9455 is not set
# CONFIG_CHARGER_RT9467 is not set
# CONFIG_CHARGER_RT9471 is not set
# CONFIG_CHARGER_UCS1002 is not set
# CONFIG_CHARGER_BD99954 is not set
# CONFIG_BATTERY_UG3105 is not set
# CONFIG_CHARGER_QCOM_SMB2 is not set
# CONFIG_FUEL_GAUGE_MM8013 is not set
CONFIG_HWMON=y
# CONFIG_HWMON_DEBUG_CHIP is not set
#
# Native drivers
#
# CONFIG_SENSORS_AD7414 is not set
# CONFIG_SENSORS_AD7418 is not set
# CONFIG_SENSORS_ADM1021 is not set
# CONFIG_SENSORS_ADM1025 is not set
# CONFIG_SENSORS_ADM1026 is not set
# CONFIG_SENSORS_ADM1029 is not set
# CONFIG_SENSORS_ADM1031 is not set
# CONFIG_SENSORS_ADM1177 is not set
# CONFIG_SENSORS_ADM9240 is not set
# CONFIG_SENSORS_ADT7410 is not set
# CONFIG_SENSORS_ADT7411 is not set
# CONFIG_SENSORS_ADT7462 is not set
# CONFIG_SENSORS_ADT7470 is not set
# CONFIG_SENSORS_ADT7475 is not set
# CONFIG_SENSORS_AHT10 is not set
# CONFIG_SENSORS_AQUACOMPUTER_D5NEXT is not set
# CONFIG_SENSORS_AS370 is not set
# CONFIG_SENSORS_ASC7621 is not set
# CONFIG_SENSORS_AXI_FAN_CONTROL is not set
# CONFIG_SENSORS_ARM_SCMI is not set
# CONFIG_SENSORS_ATXP1 is not set
# CONFIG_SENSORS_CORSAIR_CPRO is not set
# CONFIG_SENSORS_CORSAIR_PSU is not set
# CONFIG_SENSORS_DS620 is not set
# CONFIG_SENSORS_DS1621 is not set
# CONFIG_SENSORS_F71805F is not set
# CONFIG_SENSORS_F71882FG is not set
# CONFIG_SENSORS_F75375S is not set
# CONFIG_SENSORS_FTSTEUTATES is not set
# CONFIG_SENSORS_GIGABYTE_WATERFORCE is not set
# CONFIG_SENSORS_GL518SM is not set
# CONFIG_SENSORS_GL520SM is not set
# CONFIG_SENSORS_G760A is not set
# CONFIG_SENSORS_G762 is not set
# CONFIG_SENSORS_GPIO_FAN is not set
# CONFIG_SENSORS_HIH6130 is not set
# CONFIG_SENSORS_HS3001 is not set
# CONFIG_SENSORS_IIO_HWMON is not set
# CONFIG_SENSORS_IT87 is not set
# CONFIG_SENSORS_JC42 is not set
# CONFIG_SENSORS_POWERZ is not set
# CONFIG_SENSORS_POWR1220 is not set
# CONFIG_SENSORS_LINEAGE is not set
# CONFIG_SENSORS_LTC2945 is not set
# CONFIG_SENSORS_LTC2947_I2C is not set
# CONFIG_SENSORS_LTC2990 is not set
# CONFIG_SENSORS_LTC2991 is not set
# CONFIG_SENSORS_LTC2992 is not set
# CONFIG_SENSORS_LTC4151 is not set
# CONFIG_SENSORS_LTC4215 is not set
# CONFIG_SENSORS_LTC4222 is not set
# CONFIG_SENSORS_LTC4245 is not set
# CONFIG_SENSORS_LTC4260 is not set
# CONFIG_SENSORS_LTC4261 is not set
# CONFIG_SENSORS_MAX127 is not set
# CONFIG_SENSORS_MAX16065 is not set
# CONFIG_SENSORS_MAX1619 is not set
# CONFIG_SENSORS_MAX1668 is not set
# CONFIG_SENSORS_MAX197 is not set
# CONFIG_SENSORS_MAX31730 is not set
# CONFIG_SENSORS_MAX31760 is not set
# CONFIG_MAX31827 is not set
# CONFIG_SENSORS_MAX6620 is not set
# CONFIG_SENSORS_MAX6621 is not set
# CONFIG_SENSORS_MAX6639 is not set
# CONFIG_SENSORS_MAX6642 is not set
# CONFIG_SENSORS_MAX6650 is not set
# CONFIG_SENSORS_MAX6697 is not set
# CONFIG_SENSORS_MAX31790 is not set
# CONFIG_SENSORS_MC34VR500 is not set
# CONFIG_SENSORS_MCP3021 is not set
# CONFIG_SENSORS_TC654 is not set
# CONFIG_SENSORS_TPS23861 is not set
# CONFIG_SENSORS_MR75203 is not set
# CONFIG_SENSORS_LM63 is not set
# CONFIG_SENSORS_LM73 is not set
# CONFIG_SENSORS_LM75 is not set
# CONFIG_SENSORS_LM77 is not set
# CONFIG_SENSORS_LM78 is not set
# CONFIG_SENSORS_LM80 is not set
# CONFIG_SENSORS_LM83 is not set
# CONFIG_SENSORS_LM85 is not set
# CONFIG_SENSORS_LM87 is not set
# CONFIG_SENSORS_LM90 is not set
# CONFIG_SENSORS_LM92 is not set
# CONFIG_SENSORS_LM93 is not set
# CONFIG_SENSORS_LM95234 is not set
# CONFIG_SENSORS_LM95241 is not set
# CONFIG_SENSORS_LM95245 is not set
# CONFIG_SENSORS_PC87360 is not set
# CONFIG_SENSORS_PC87427 is not set
# CONFIG_SENSORS_NTC_THERMISTOR is not set
# CONFIG_SENSORS_NCT6683 is not set
# CONFIG_SENSORS_NCT6775 is not set
# CONFIG_SENSORS_NCT6775_I2C is not set
# CONFIG_SENSORS_NCT7802 is not set
# CONFIG_SENSORS_NCT7904 is not set
# CONFIG_SENSORS_NPCM7XX is not set
# CONFIG_SENSORS_NZXT_KRAKEN2 is not set
# CONFIG_SENSORS_NZXT_SMART2 is not set
# CONFIG_SENSORS_OCC_P8_I2C is not set
# CONFIG_SENSORS_PCF8591 is not set
# CONFIG_PMBUS is not set
# CONFIG_SENSORS_SBTSI is not set
# CONFIG_SENSORS_SBRMI is not set
# CONFIG_SENSORS_SHT15 is not set
# CONFIG_SENSORS_SHT21 is not set
# CONFIG_SENSORS_SHT3x is not set
# CONFIG_SENSORS_SHT4x is not set
# CONFIG_SENSORS_SHTC1 is not set
# CONFIG_SENSORS_DME1737 is not set
# CONFIG_SENSORS_EMC1403 is not set
# CONFIG_SENSORS_EMC2103 is not set
# CONFIG_SENSORS_EMC2305 is not set
# CONFIG_SENSORS_EMC6W201 is not set
# CONFIG_SENSORS_SMSC47M1 is not set
# CONFIG_SENSORS_SMSC47M192 is not set
# CONFIG_SENSORS_SMSC47B397 is not set
# CONFIG_SENSORS_SCH5627 is not set
# CONFIG_SENSORS_SCH5636 is not set
# CONFIG_SENSORS_STTS751 is not set
# CONFIG_SENSORS_ADC128D818 is not set
# CONFIG_SENSORS_ADS7828 is not set
# CONFIG_SENSORS_AMC6821 is not set
# CONFIG_SENSORS_INA209 is not set
# CONFIG_SENSORS_INA2XX is not set
# CONFIG_SENSORS_INA238 is not set
# CONFIG_SENSORS_INA3221 is not set
# CONFIG_SENSORS_TC74 is not set
# CONFIG_SENSORS_THMC50 is not set
# CONFIG_SENSORS_TMP102 is not set
# CONFIG_SENSORS_TMP103 is not set
# CONFIG_SENSORS_TMP108 is not set
# CONFIG_SENSORS_TMP401 is not set
# CONFIG_SENSORS_TMP421 is not set
# CONFIG_SENSORS_TMP464 is not set
# CONFIG_SENSORS_TMP513 is not set
# CONFIG_SENSORS_VT1211 is not set
# CONFIG_SENSORS_W83773G is not set
# CONFIG_SENSORS_W83781D is not set
# CONFIG_SENSORS_W83791D is not set
# CONFIG_SENSORS_W83792D is not set
# CONFIG_SENSORS_W83793 is not set
# CONFIG_SENSORS_W83795 is not set
# CONFIG_SENSORS_W83L785TS is not set
# CONFIG_SENSORS_W83L786NG is not set
# CONFIG_SENSORS_W83627HF is not set
# CONFIG_SENSORS_W83627EHF is not set
CONFIG_THERMAL=y
# CONFIG_THERMAL_NETLINK is not set
# CONFIG_THERMAL_STATISTICS is not set
# CONFIG_THERMAL_DEBUGFS is not set
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
CONFIG_THERMAL_HWMON=y
CONFIG_THERMAL_OF=y
# CONFIG_THERMAL_WRITABLE_TRIPS is not set
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set
# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set
# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set
# CONFIG_THERMAL_GOV_FAIR_SHARE is not set
CONFIG_THERMAL_GOV_STEP_WISE=y
# CONFIG_THERMAL_GOV_BANG_BANG is not set
# CONFIG_THERMAL_GOV_USER_SPACE is not set
CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y
CONFIG_CPU_THERMAL=y
CONFIG_CPU_FREQ_THERMAL=y
CONFIG_DEVFREQ_THERMAL=y
CONFIG_THERMAL_EMULATION=y
# CONFIG_THERMAL_MMIO is not set
CONFIG_GENERIC_ADC_THERMAL=y
#
# Qualcomm thermal drivers
#
CONFIG_QCOM_TSENS=y
CONFIG_QCOM_SPMI_ADC_TM5=y
CONFIG_QCOM_SPMI_TEMP_ALARM=y
# CONFIG_QCOM_LMH is not set
# end of Qualcomm thermal drivers
CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_CORE=y
# CONFIG_WATCHDOG_NOWAYOUT is not set
CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y
CONFIG_WATCHDOG_OPEN_TIMEOUT=0
# CONFIG_WATCHDOG_SYSFS is not set
# CONFIG_WATCHDOG_HRTIMER_PRETIMEOUT is not set
#
# Watchdog Pretimeout Governors
#
# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set
#
# Watchdog Device Drivers
#
# CONFIG_SOFT_WATCHDOG is not set
# CONFIG_GPIO_WATCHDOG is not set
# CONFIG_XILINX_WATCHDOG is not set
# CONFIG_XILINX_WINDOW_WATCHDOG is not set
# CONFIG_ZIIRAVE_WATCHDOG is not set
# CONFIG_ARM_SP805_WATCHDOG is not set
# CONFIG_ARM_SBSA_WATCHDOG is not set
# CONFIG_CADENCE_WATCHDOG is not set
# CONFIG_DW_WATCHDOG is not set
# CONFIG_MAX63XX_WATCHDOG is not set
CONFIG_QCOM_WDT=y
# CONFIG_ARM_SMC_WATCHDOG is not set
# CONFIG_PM8916_WATCHDOG is not set
# CONFIG_MEN_A21_WDT is not set
#
# USB-based Watchdog Cards
#
# CONFIG_USBPCWATCHDOG is not set
CONFIG_SSB_POSSIBLE=y
# CONFIG_SSB is not set
CONFIG_BCMA_POSSIBLE=y
# CONFIG_BCMA is not set
#
# Multifunction device drivers
#
# CONFIG_MFD_ACT8945A is not set
# CONFIG_MFD_AS3711 is not set
# CONFIG_MFD_SMPRO is not set
# CONFIG_MFD_AS3722 is not set
# CONFIG_PMIC_ADP5520 is not set
# CONFIG_MFD_AAT2870_CORE is not set
# CONFIG_MFD_ATMEL_FLEXCOM is not set
# CONFIG_MFD_ATMEL_HLCDC is not set
# CONFIG_MFD_BCM590XX is not set
# CONFIG_MFD_BD9571MWV is not set
# CONFIG_MFD_AXP20X_I2C is not set
# CONFIG_MFD_CS42L43_I2C is not set
# CONFIG_MFD_MADERA is not set
# CONFIG_MFD_MAX5970 is not set
# CONFIG_PMIC_DA903X is not set
# CONFIG_MFD_DA9052_I2C is not set
# CONFIG_MFD_DA9055 is not set
# CONFIG_MFD_DA9062 is not set
# CONFIG_MFD_DA9063 is not set
# CONFIG_MFD_DA9150 is not set
# CONFIG_MFD_DLN2 is not set
# CONFIG_MFD_GATEWORKS_GSC is not set
# CONFIG_MFD_MC13XXX_I2C is not set
# CONFIG_MFD_MP2629 is not set
# CONFIG_MFD_HI6421_PMIC is not set
# CONFIG_MFD_HI6421_SPMI is not set
# CONFIG_MFD_IQS62X is not set
# CONFIG_MFD_KEMPLD is not set
# CONFIG_MFD_88PM800 is not set
# CONFIG_MFD_88PM805 is not set
# CONFIG_MFD_88PM860X is not set
# CONFIG_MFD_MAX14577 is not set
# CONFIG_MFD_MAX77541 is not set
# CONFIG_MFD_MAX77620 is not set
# CONFIG_MFD_MAX77650 is not set
# CONFIG_MFD_MAX77686 is not set
# CONFIG_MFD_MAX77693 is not set
# CONFIG_MFD_MAX77714 is not set
# CONFIG_MFD_MAX77843 is not set
# CONFIG_MFD_MAX8907 is not set
# CONFIG_MFD_MAX8925 is not set
# CONFIG_MFD_MAX8997 is not set
# CONFIG_MFD_MAX8998 is not set
# CONFIG_MFD_MT6360 is not set
# CONFIG_MFD_MT6370 is not set
# CONFIG_MFD_MT6397 is not set
# CONFIG_MFD_MENF21BMC is not set
# CONFIG_MFD_VIPERBOARD is not set
# CONFIG_MFD_NTXEC is not set
# CONFIG_MFD_RETU is not set
# CONFIG_MFD_PCF50633 is not set
# CONFIG_MFD_QCOM_RPM is not set
CONFIG_MFD_SPMI_PMIC=y
# CONFIG_MFD_SY7636A is not set
# CONFIG_MFD_RT4831 is not set
# CONFIG_MFD_RT5033 is not set
# CONFIG_MFD_RT5120 is not set
# CONFIG_MFD_RC5T583 is not set
# CONFIG_MFD_RK8XX_I2C is not set
# CONFIG_MFD_RN5T618 is not set
# CONFIG_MFD_SEC_CORE is not set
# CONFIG_MFD_SI476X_CORE is not set
# CONFIG_MFD_SM501 is not set
# CONFIG_MFD_SKY81452 is not set
# CONFIG_MFD_STMPE is not set
CONFIG_MFD_SYSCON=y
# CONFIG_MFD_LP3943 is not set
# CONFIG_MFD_LP8788 is not set
# CONFIG_MFD_TI_LMU is not set
# CONFIG_MFD_PALMAS is not set
# CONFIG_TPS6105X is not set
# CONFIG_TPS65010 is not set
# CONFIG_TPS6507X is not set
# CONFIG_MFD_TPS65086 is not set
# CONFIG_MFD_TPS65090 is not set
# CONFIG_MFD_TPS65217 is not set
# CONFIG_MFD_TI_LP873X is not set
# CONFIG_MFD_TI_LP87565 is not set
# CONFIG_MFD_TPS65218 is not set
# CONFIG_MFD_TPS65219 is not set
# CONFIG_MFD_TPS6586X is not set
# CONFIG_MFD_TPS65910 is not set
# CONFIG_MFD_TPS65912_I2C is not set
# CONFIG_MFD_TPS6594_I2C is not set
# CONFIG_TWL4030_CORE is not set
# CONFIG_TWL6040_CORE is not set
# CONFIG_MFD_WL1273_CORE is not set
# CONFIG_MFD_LM3533 is not set
# CONFIG_MFD_TC3589X is not set
# CONFIG_MFD_TQMX86 is not set
# CONFIG_MFD_LOCHNAGAR is not set
# CONFIG_MFD_ARIZONA_I2C is not set
# CONFIG_MFD_WM8400 is not set
# CONFIG_MFD_WM831X_I2C is not set
# CONFIG_MFD_WM8350_I2C is not set
# CONFIG_MFD_WM8994 is not set
# CONFIG_MFD_ROHM_BD718XX is not set
# CONFIG_MFD_ROHM_BD71828 is not set
# CONFIG_MFD_ROHM_BD957XMUF is not set
# CONFIG_MFD_STPMIC1 is not set
# CONFIG_MFD_STMFX is not set
# CONFIG_MFD_ATC260X_I2C is not set
CONFIG_MFD_QCOM_PM8008=y
# CONFIG_RAVE_SP_CORE is not set
# CONFIG_MFD_RSMU_I2C is not set
# end of Multifunction device drivers
CONFIG_REGULATOR=y
# CONFIG_REGULATOR_DEBUG is not set
CONFIG_REGULATOR_FIXED_VOLTAGE=y
# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
# CONFIG_REGULATOR_NETLINK_EVENTS is not set
# CONFIG_REGULATOR_88PG86X is not set
# CONFIG_REGULATOR_ACT8865 is not set
# CONFIG_REGULATOR_AD5398 is not set
# CONFIG_REGULATOR_ARM_SCMI is not set
# CONFIG_REGULATOR_AW37503 is not set
# CONFIG_REGULATOR_DA9121 is not set
# CONFIG_REGULATOR_DA9210 is not set
# CONFIG_REGULATOR_DA9211 is not set
# CONFIG_REGULATOR_FAN53555 is not set
# CONFIG_REGULATOR_FAN53880 is not set
# CONFIG_REGULATOR_GPIO is not set
# CONFIG_REGULATOR_ISL9305 is not set
# CONFIG_REGULATOR_ISL6271A is not set
# CONFIG_REGULATOR_LP3971 is not set
# CONFIG_REGULATOR_LP3972 is not set
# CONFIG_REGULATOR_LP872X is not set
# CONFIG_REGULATOR_LP8755 is not set
# CONFIG_REGULATOR_LTC3589 is not set
# CONFIG_REGULATOR_LTC3676 is not set
# CONFIG_REGULATOR_MAX1586 is not set
# CONFIG_REGULATOR_MAX77503 is not set
# CONFIG_REGULATOR_MAX77857 is not set
# CONFIG_REGULATOR_MAX8649 is not set
# CONFIG_REGULATOR_MAX8660 is not set
# CONFIG_REGULATOR_MAX8893 is not set
# CONFIG_REGULATOR_MAX8952 is not set
# CONFIG_REGULATOR_MAX8973 is not set
# CONFIG_REGULATOR_MAX20086 is not set
# CONFIG_REGULATOR_MAX20411 is not set
# CONFIG_REGULATOR_MAX77826 is not set
# CONFIG_REGULATOR_MCP16502 is not set
# CONFIG_REGULATOR_MP5416 is not set
# CONFIG_REGULATOR_MP8859 is not set
# CONFIG_REGULATOR_MP886X is not set
# CONFIG_REGULATOR_MPQ7920 is not set
# CONFIG_REGULATOR_MT6311 is not set
# CONFIG_REGULATOR_MT6315 is not set
# CONFIG_REGULATOR_PCA9450 is not set
# CONFIG_REGULATOR_PF8X00 is not set
# CONFIG_REGULATOR_PFUZE100 is not set
# CONFIG_REGULATOR_PV88060 is not set
# CONFIG_REGULATOR_PV88080 is not set
# CONFIG_REGULATOR_PV88090 is not set
# CONFIG_REGULATOR_QCOM_REFGEN is not set
CONFIG_REGULATOR_QCOM_RPMH=y
# CONFIG_REGULATOR_QCOM_SPMI is not set
# CONFIG_REGULATOR_QCOM_USB_VBUS is not set
# CONFIG_REGULATOR_RAA215300 is not set
# CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY is not set
# CONFIG_REGULATOR_RT4801 is not set
# CONFIG_REGULATOR_RT4803 is not set
# CONFIG_REGULATOR_RT5190A is not set
# CONFIG_REGULATOR_RT5739 is not set
# CONFIG_REGULATOR_RT5759 is not set
# CONFIG_REGULATOR_RT6160 is not set
# CONFIG_REGULATOR_RT6190 is not set
# CONFIG_REGULATOR_RT6245 is not set
# CONFIG_REGULATOR_RTQ2134 is not set
# CONFIG_REGULATOR_RTMV20 is not set
# CONFIG_REGULATOR_RTQ6752 is not set
# CONFIG_REGULATOR_RTQ2208 is not set
# CONFIG_REGULATOR_SLG51000 is not set
# CONFIG_REGULATOR_SY8106A is not set
# CONFIG_REGULATOR_SY8824X is not set
# CONFIG_REGULATOR_SY8827N is not set
# CONFIG_REGULATOR_TPS51632 is not set
# CONFIG_REGULATOR_TPS62360 is not set
# CONFIG_REGULATOR_TPS6286X is not set
# CONFIG_REGULATOR_TPS6287X is not set
# CONFIG_REGULATOR_TPS65023 is not set
# CONFIG_REGULATOR_TPS6507X is not set
# CONFIG_REGULATOR_TPS65132 is not set
# CONFIG_REGULATOR_VCTRL is not set
# CONFIG_REGULATOR_VQMMC_IPQ4019 is not set
# CONFIG_REGULATOR_QCOM_LABIBB is not set
# CONFIG_RC_CORE is not set
#
# CEC support
#
# CONFIG_MEDIA_CEC_SUPPORT is not set
# end of CEC support
# CONFIG_MEDIA_SUPPORT is not set
#
# Graphics support
#
CONFIG_VIDEO_CMDLINE=y
CONFIG_VIDEO_NOMODESET=y
# CONFIG_AUXDISPLAY is not set
CONFIG_DRM=y
# CONFIG_DRM_DEBUG_MM is not set
# CONFIG_DRM_FBDEV_EMULATION is not set
# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set
#
# ARM devices
#
# CONFIG_DRM_HDLCD is not set
# CONFIG_DRM_MALI_DISPLAY is not set
# CONFIG_DRM_KOMEDA is not set
# end of ARM devices
# CONFIG_DRM_VGEM is not set
# CONFIG_DRM_VKMS is not set
# CONFIG_DRM_UDL is not set
# CONFIG_DRM_MSM is not set
CONFIG_DRM_PANEL=y
#
# Display Panels
#
# CONFIG_DRM_PANEL_ARM_VERSATILE is not set
# CONFIG_DRM_PANEL_LVDS is not set
# CONFIG_DRM_PANEL_SIMPLE is not set
# CONFIG_DRM_PANEL_EDP is not set
# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set
# CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20 is not set
# CONFIG_DRM_PANEL_SAMSUNG_S6D7AA0 is not set
# CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set
# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set
# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set
# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set
# CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set
# end of Display Panels
CONFIG_DRM_BRIDGE=y
CONFIG_DRM_PANEL_BRIDGE=y
CONFIG_DRM_AUX_BRIDGE=y
#
# Display Interface Bridges
#
# CONFIG_DRM_CHIPONE_ICN6211 is not set
# CONFIG_DRM_CHRONTEL_CH7033 is not set
# CONFIG_DRM_DISPLAY_CONNECTOR is not set
# CONFIG_DRM_ITE_IT6505 is not set
# CONFIG_DRM_LONTIUM_LT8912B is not set
# CONFIG_DRM_LONTIUM_LT9211 is not set
# CONFIG_DRM_LONTIUM_LT9611 is not set
# CONFIG_DRM_LONTIUM_LT9611UXC is not set
# CONFIG_DRM_ITE_IT66121 is not set
# CONFIG_DRM_LVDS_CODEC is not set
# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set
# CONFIG_DRM_NWL_MIPI_DSI is not set
# CONFIG_DRM_NXP_PTN3460 is not set
# CONFIG_DRM_PARADE_PS8622 is not set
# CONFIG_DRM_PARADE_PS8640 is not set
# CONFIG_DRM_SAMSUNG_DSIM is not set
# CONFIG_DRM_SIL_SII8620 is not set
# CONFIG_DRM_SII902X is not set
# CONFIG_DRM_SII9234 is not set
# CONFIG_DRM_SIMPLE_BRIDGE is not set
# CONFIG_DRM_THINE_THC63LVD1024 is not set
# CONFIG_DRM_TOSHIBA_TC358762 is not set
# CONFIG_DRM_TOSHIBA_TC358764 is not set
# CONFIG_DRM_TOSHIBA_TC358767 is not set
# CONFIG_DRM_TOSHIBA_TC358768 is not set
# CONFIG_DRM_TOSHIBA_TC358775 is not set
# CONFIG_DRM_TI_DLPC3433 is not set
# CONFIG_DRM_TI_TFP410 is not set
# CONFIG_DRM_TI_SN65DSI83 is not set
# CONFIG_DRM_TI_SN65DSI86 is not set
# CONFIG_DRM_TI_TPD12S015 is not set
# CONFIG_DRM_ANALOGIX_ANX6345 is not set
# CONFIG_DRM_ANALOGIX_ANX78XX is not set
# CONFIG_DRM_ANALOGIX_ANX7625 is not set
# CONFIG_DRM_I2C_ADV7511 is not set
# CONFIG_DRM_CDNS_DSI is not set
# CONFIG_DRM_CDNS_MHDP8546 is not set
# end of Display Interface Bridges
# CONFIG_DRM_ETNAVIV is not set
# CONFIG_DRM_HISI_KIRIN is not set
# CONFIG_DRM_LOGICVC is not set
# CONFIG_DRM_ARCPGU is not set
# CONFIG_DRM_GM12U320 is not set
# CONFIG_DRM_SIMPLEDRM is not set
# CONFIG_DRM_PL111 is not set
# CONFIG_DRM_LIMA is not set
# CONFIG_DRM_PANFROST is not set
# CONFIG_DRM_TIDSS is not set
# CONFIG_DRM_GUD is not set
# CONFIG_DRM_SSD130X is not set
# CONFIG_DRM_POWERVR is not set
CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y
#
# Frame buffer Devices
#
CONFIG_FB=y
# CONFIG_FB_EFI is not set
# CONFIG_FB_OPENCORES is not set
# CONFIG_FB_S1D13XXX is not set
# CONFIG_FB_SMSCUFX is not set
# CONFIG_FB_UDL is not set
# CONFIG_FB_IBM_GXT4500 is not set
# CONFIG_FB_VIRTUAL is not set
# CONFIG_FB_METRONOME is not set
# CONFIG_FB_SIMPLE is not set
# CONFIG_FB_SSD1307 is not set
CONFIG_FB_CORE=y
CONFIG_FB_NOTIFY=y
# CONFIG_FIRMWARE_EDID is not set
CONFIG_FB_DEVICE=y
# CONFIG_FB_FOREIGN_ENDIAN is not set
# CONFIG_FB_MODE_HELPERS is not set
# CONFIG_FB_TILEBLITTING is not set
# end of Frame buffer Devices
#
# Backlight & LCD device support
#
# CONFIG_LCD_CLASS_DEVICE is not set
CONFIG_BACKLIGHT_CLASS_DEVICE=y
# CONFIG_BACKLIGHT_KTD253 is not set
# CONFIG_BACKLIGHT_KTZ8866 is not set
CONFIG_BACKLIGHT_QCOM_WLED=y
# CONFIG_BACKLIGHT_ADP8860 is not set
# CONFIG_BACKLIGHT_ADP8870 is not set
# CONFIG_BACKLIGHT_LM3639 is not set
# CONFIG_BACKLIGHT_GPIO is not set
# CONFIG_BACKLIGHT_LV5207LP is not set
# CONFIG_BACKLIGHT_BD6107 is not set
# CONFIG_BACKLIGHT_ARCXCNN is not set
# CONFIG_BACKLIGHT_LED is not set
# end of Backlight & LCD device support
CONFIG_HDMI=y
#
# Console display driver support
#
CONFIG_DUMMY_CONSOLE=y
CONFIG_DUMMY_CONSOLE_COLUMNS=80
CONFIG_DUMMY_CONSOLE_ROWS=25
CONFIG_FRAMEBUFFER_CONSOLE=y
# CONFIG_FRAMEBUFFER_CONSOLE_LEGACY_ACCELERATION is not set
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set
# end of Console display driver support
CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
CONFIG_LOGO_LINUX_CLUT224=y
# end of Graphics support
# CONFIG_DRM_ACCEL is not set
# CONFIG_SOUND is not set
CONFIG_HID_SUPPORT=y
CONFIG_HID=y
# CONFIG_HID_BATTERY_STRENGTH is not set
# CONFIG_HIDRAW is not set
# CONFIG_UHID is not set
CONFIG_HID_GENERIC=y
#
# Special HID drivers
#
# CONFIG_HID_A4TECH is not set
# CONFIG_HID_ACCUTOUCH is not set
# CONFIG_HID_ACRUX is not set
CONFIG_HID_APPLE=y
# CONFIG_HID_APPLEIR is not set
# CONFIG_HID_ASUS is not set
# CONFIG_HID_AUREAL is not set
# CONFIG_HID_BELKIN is not set
# CONFIG_HID_BETOP_FF is not set
# CONFIG_HID_BIGBEN_FF is not set
# CONFIG_HID_CHERRY is not set
# CONFIG_HID_CHICONY is not set
# CONFIG_HID_CORSAIR is not set
# CONFIG_HID_COUGAR is not set
# CONFIG_HID_MACALLY is not set
# CONFIG_HID_CMEDIA is not set
# CONFIG_HID_CREATIVE_SB0540 is not set
# CONFIG_HID_CYPRESS is not set
# CONFIG_HID_DRAGONRISE is not set
# CONFIG_HID_EMS_FF is not set
# CONFIG_HID_ELAN is not set
# CONFIG_HID_ELECOM is not set
# CONFIG_HID_ELO is not set
# CONFIG_HID_EVISION is not set
# CONFIG_HID_EZKEY is not set
# CONFIG_HID_GEMBIRD is not set
# CONFIG_HID_GFRM is not set
# CONFIG_HID_GLORIOUS is not set
# CONFIG_HID_HOLTEK is not set
# CONFIG_HID_GOOGLE_STADIA_FF is not set
# CONFIG_HID_VIVALDI is not set
# CONFIG_HID_GT683R is not set
# CONFIG_HID_KEYTOUCH is not set
# CONFIG_HID_KYE is not set
# CONFIG_HID_UCLOGIC is not set
# CONFIG_HID_WALTOP is not set
# CONFIG_HID_VIEWSONIC is not set
# CONFIG_HID_VRC2 is not set
# CONFIG_HID_XIAOMI is not set
# CONFIG_HID_GYRATION is not set
# CONFIG_HID_ICADE is not set
# CONFIG_HID_ITE is not set
# CONFIG_HID_JABRA is not set
# CONFIG_HID_TWINHAN is not set
# CONFIG_HID_KENSINGTON is not set
# CONFIG_HID_LCPOWER is not set
# CONFIG_HID_LED is not set
# CONFIG_HID_LENOVO is not set
# CONFIG_HID_LETSKETCH is not set
CONFIG_HID_LOGITECH=y
# CONFIG_HID_LOGITECH_HIDPP is not set
# CONFIG_LOGITECH_FF is not set
# CONFIG_LOGIRUMBLEPAD2_FF is not set
# CONFIG_LOGIG940_FF is not set
# CONFIG_LOGIWHEELS_FF is not set
# CONFIG_HID_MAGICMOUSE is not set
# CONFIG_HID_MALTRON is not set
# CONFIG_HID_MAYFLASH is not set
# CONFIG_HID_MEGAWORLD_FF is not set
# CONFIG_HID_REDRAGON is not set
# CONFIG_HID_MICROSOFT is not set
# CONFIG_HID_MONTEREY is not set
# CONFIG_HID_MULTITOUCH is not set
# CONFIG_HID_NINTENDO is not set
# CONFIG_HID_NTI is not set
# CONFIG_HID_NTRIG is not set
# CONFIG_HID_NVIDIA_SHIELD is not set
# CONFIG_HID_ORTEK is not set
# CONFIG_HID_PANTHERLORD is not set
# CONFIG_HID_PENMOUNT is not set
# CONFIG_HID_PETALYNX is not set
# CONFIG_HID_PICOLCD is not set
# CONFIG_HID_PLANTRONICS is not set
# CONFIG_HID_PXRC is not set
# CONFIG_HID_RAZER is not set
# CONFIG_HID_PRIMAX is not set
# CONFIG_HID_RETRODE is not set
# CONFIG_HID_ROCCAT is not set
# CONFIG_HID_SAITEK is not set
# CONFIG_HID_SAMSUNG is not set
# CONFIG_HID_SEMITEK is not set
# CONFIG_HID_SIGMAMICRO is not set
# CONFIG_HID_SONY is not set
# CONFIG_HID_SPEEDLINK is not set
# CONFIG_HID_STEAM is not set
# CONFIG_HID_STEELSERIES is not set
# CONFIG_HID_SUNPLUS is not set
# CONFIG_HID_RMI is not set
# CONFIG_HID_GREENASIA is not set
# CONFIG_HID_SMARTJOYPLUS is not set
# CONFIG_HID_TIVO is not set
# CONFIG_HID_TOPSEED is not set
# CONFIG_HID_TOPRE is not set
# CONFIG_HID_THINGM is not set
# CONFIG_HID_THRUSTMASTER is not set
# CONFIG_HID_UDRAW_PS3 is not set
# CONFIG_HID_U2FZERO is not set
# CONFIG_HID_WACOM is not set
# CONFIG_HID_WIIMOTE is not set
# CONFIG_HID_XINMO is not set
# CONFIG_HID_ZEROPLUS is not set
# CONFIG_HID_ZYDACRON is not set
# CONFIG_HID_SENSOR_HUB is not set
# CONFIG_HID_ALPS is not set
# CONFIG_HID_MCP2200 is not set
# CONFIG_HID_MCP2221 is not set
# end of Special HID drivers
#
# HID-BPF support
#
# end of HID-BPF support
#
# USB HID support
#
CONFIG_USB_HID=y
# CONFIG_HID_PID is not set
# CONFIG_USB_HIDDEV is not set
# end of USB HID support
CONFIG_I2C_HID=y
# CONFIG_I2C_HID_OF is not set
# CONFIG_I2C_HID_OF_ELAN is not set
# CONFIG_I2C_HID_OF_GOODIX is not set
CONFIG_USB_OHCI_LITTLE_ENDIAN=y
CONFIG_USB_SUPPORT=y
CONFIG_USB_COMMON=y
CONFIG_USB_ULPI_BUS=y
# CONFIG_USB_CONN_GPIO is not set
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB=y
# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
#
# Miscellaneous USB options
#
CONFIG_USB_DEFAULT_PERSIST=y
# CONFIG_USB_FEW_INIT_RETRIES is not set
# CONFIG_USB_DYNAMIC_MINORS is not set
CONFIG_USB_OTG=y
# CONFIG_USB_OTG_PRODUCTLIST is not set
# CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set
# CONFIG_USB_OTG_FSM is not set
CONFIG_USB_AUTOSUSPEND_DELAY=2
# CONFIG_USB_MON is not set
#
# USB Host Controller Drivers
#
# CONFIG_USB_C67X00_HCD is not set
CONFIG_USB_XHCI_HCD=y
# CONFIG_USB_XHCI_DBGCAP is not set
# CONFIG_USB_XHCI_PCI_RENESAS is not set
CONFIG_USB_XHCI_PLATFORM=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_ROOT_HUB_TT=y
CONFIG_USB_EHCI_TT_NEWSCHED=y
# CONFIG_USB_EHCI_FSL is not set
CONFIG_USB_EHCI_HCD_PLATFORM=y
# CONFIG_USB_OXU210HP_HCD is not set
# CONFIG_USB_ISP116X_HCD is not set
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_HCD_PLATFORM=y
# CONFIG_USB_SL811_HCD is not set
# CONFIG_USB_R8A66597_HCD is not set
# CONFIG_USB_HCD_TEST_MODE is not set
#
# USB Device Class drivers
#
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set
# CONFIG_USB_WDM is not set
# CONFIG_USB_TMC is not set
#
# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
#
#
# also be needed; see USB_STORAGE Help for more info
#
CONFIG_USB_STORAGE=y
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_REALTEK is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
# CONFIG_USB_STORAGE_USBAT is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_SDDR55 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_STORAGE_ALAUDA is not set
# CONFIG_USB_STORAGE_ONETOUCH is not set
# CONFIG_USB_STORAGE_KARMA is not set
# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
# CONFIG_USB_STORAGE_ENE_UB6250 is not set
# CONFIG_USB_UAS is not set
#
# USB Imaging devices
#
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USBIP_CORE is not set
#
# USB dual-mode controller drivers
#
# CONFIG_USB_CDNS_SUPPORT is not set
# CONFIG_USB_MUSB_HDRC is not set
CONFIG_USB_DWC3=y
# CONFIG_USB_DWC3_ULPI is not set
# CONFIG_USB_DWC3_HOST is not set
# CONFIG_USB_DWC3_GADGET is not set
CONFIG_USB_DWC3_DUAL_ROLE=y
#
# Platform Glue Driver Support
#
CONFIG_USB_DWC3_OF_SIMPLE=y
CONFIG_USB_DWC3_QCOM=y
# CONFIG_USB_DWC2 is not set
# CONFIG_USB_CHIPIDEA is not set
# CONFIG_USB_ISP1760 is not set
#
# USB port drivers
#
# CONFIG_USB_SERIAL is not set
#
# USB Miscellaneous drivers
#
# CONFIG_USB_EMI62 is not set
# CONFIG_USB_EMI26 is not set
# CONFIG_USB_ADUTUX is not set
# CONFIG_USB_SEVSEG is not set
# CONFIG_USB_LEGOTOWER is not set
# CONFIG_USB_LCD is not set
# CONFIG_USB_CYPRESS_CY7C63 is not set
# CONFIG_USB_CYTHERM is not set
# CONFIG_USB_IDMOUSE is not set
# CONFIG_USB_APPLEDISPLAY is not set
# CONFIG_USB_QCOM_EUD is not set
# CONFIG_APPLE_MFI_FASTCHARGE is not set
# CONFIG_USB_SISUSBVGA is not set
# CONFIG_USB_LD is not set
# CONFIG_USB_TRANCEVIBRATOR is not set
# CONFIG_USB_IOWARRIOR is not set
# CONFIG_USB_TEST is not set
# CONFIG_USB_EHSET_TEST_FIXTURE is not set
# CONFIG_USB_ISIGHTFW is not set
# CONFIG_USB_YUREX is not set
# CONFIG_USB_EZUSB_FX2 is not set
# CONFIG_USB_HUB_USB251XB is not set
# CONFIG_USB_HSIC_USB3503 is not set
# CONFIG_USB_HSIC_USB4604 is not set
# CONFIG_USB_LINK_LAYER_TEST is not set
# CONFIG_USB_CHAOSKEY is not set
# CONFIG_USB_ONBOARD_HUB is not set
#
# USB Physical Layer drivers
#
# CONFIG_NOP_USB_XCEIV is not set
# CONFIG_USB_GPIO_VBUS is not set
# CONFIG_USB_ISP1301 is not set
# CONFIG_USB_ULPI is not set
# end of USB Physical Layer drivers
CONFIG_USB_GADGET=y
# CONFIG_USB_GADGET_DEBUG is not set
# CONFIG_USB_GADGET_DEBUG_FILES is not set
# CONFIG_USB_GADGET_DEBUG_FS is not set
CONFIG_USB_GADGET_VBUS_DRAW=2
CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2
#
# USB Peripheral Controller
#
# CONFIG_USB_GR_UDC is not set
# CONFIG_USB_R8A66597 is not set
# CONFIG_USB_PXA27X is not set
# CONFIG_USB_MV_UDC is not set
# CONFIG_USB_MV_U3D is not set
# CONFIG_USB_SNP_UDC_PLAT is not set
# CONFIG_USB_M66592 is not set
# CONFIG_USB_BDC_UDC is not set
# CONFIG_USB_NET2272 is not set
# CONFIG_USB_GADGET_XILINX is not set
# CONFIG_USB_DUMMY_HCD is not set
# end of USB Peripheral Controller
CONFIG_USB_LIBCOMPOSITE=y
CONFIG_USB_U_ETHER=y
CONFIG_USB_F_RNDIS=y
CONFIG_USB_F_FS=y
CONFIG_USB_CONFIGFS=y
# CONFIG_USB_CONFIGFS_SERIAL is not set
# CONFIG_USB_CONFIGFS_ACM is not set
# CONFIG_USB_CONFIGFS_OBEX is not set
# CONFIG_USB_CONFIGFS_NCM is not set
# CONFIG_USB_CONFIGFS_ECM is not set
# CONFIG_USB_CONFIGFS_ECM_SUBSET is not set
CONFIG_USB_CONFIGFS_RNDIS=y
# CONFIG_USB_CONFIGFS_EEM is not set
# CONFIG_USB_CONFIGFS_MASS_STORAGE is not set
# CONFIG_USB_CONFIGFS_F_LB_SS is not set
CONFIG_USB_CONFIGFS_F_FS=y
# CONFIG_USB_CONFIGFS_F_HID is not set
# CONFIG_USB_CONFIGFS_F_PRINTER is not set
#
# USB Gadget precomposed configurations
#
# CONFIG_USB_ZERO is not set
# CONFIG_USB_ETH is not set
# CONFIG_USB_G_NCM is not set
# CONFIG_USB_GADGETFS is not set
# CONFIG_USB_FUNCTIONFS is not set
# CONFIG_USB_MASS_STORAGE is not set
# CONFIG_USB_G_SERIAL is not set
# CONFIG_USB_G_PRINTER is not set
# CONFIG_USB_CDC_COMPOSITE is not set
# CONFIG_USB_G_ACM_MS is not set
# CONFIG_USB_G_MULTI is not set
# CONFIG_USB_G_HID is not set
# CONFIG_USB_G_DBGP is not set
# CONFIG_USB_RAW_GADGET is not set
# end of USB Gadget precomposed configurations
# CONFIG_TYPEC is not set
CONFIG_USB_ROLE_SWITCH=y
CONFIG_MMC=y
CONFIG_PWRSEQ_EMMC=y
CONFIG_PWRSEQ_SIMPLE=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_BLOCK_MINORS=32
# CONFIG_SDIO_UART is not set
# CONFIG_MMC_TEST is not set
# CONFIG_MMC_CRYPTO is not set
#
# MMC/SD/SDIO Host Controller Drivers
#
# CONFIG_MMC_DEBUG is not set
# CONFIG_MMC_ARMMMCI is not set
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_IO_ACCESSORS=y
CONFIG_MMC_SDHCI_PLTFM=y
# CONFIG_MMC_SDHCI_OF_ARASAN is not set
# CONFIG_MMC_SDHCI_OF_AT91 is not set
# CONFIG_MMC_SDHCI_OF_DWCMSHC is not set
# CONFIG_MMC_SDHCI_CADENCE is not set
# CONFIG_MMC_SDHCI_F_SDH30 is not set
# CONFIG_MMC_SDHCI_MILBEAUT is not set
CONFIG_MMC_SDHCI_MSM=y
# CONFIG_MMC_DW is not set
# CONFIG_MMC_VUB300 is not set
# CONFIG_MMC_USHC is not set
# CONFIG_MMC_USDHI6ROL0 is not set
CONFIG_MMC_CQHCI=y
# CONFIG_MMC_HSQ is not set
# CONFIG_MMC_MTK is not set
# CONFIG_MMC_SDHCI_XENON is not set
CONFIG_SCSI_UFSHCD=y
CONFIG_SCSI_UFS_BSG=y
CONFIG_SCSI_UFS_CRYPTO=y
# CONFIG_SCSI_UFS_HWMON is not set
CONFIG_SCSI_UFSHCD_PLATFORM=y
# CONFIG_SCSI_UFS_CDNS_PLATFORM is not set
# CONFIG_SCSI_UFS_DWC_TC_PLATFORM is not set
CONFIG_SCSI_UFS_QCOM=y
# CONFIG_MEMSTICK is not set
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_CLASS_FLASH=y
# CONFIG_LEDS_CLASS_MULTICOLOR is not set
# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set
#
# LED drivers
#
# CONFIG_LEDS_AN30259A is not set
# CONFIG_LEDS_AW200XX is not set
# CONFIG_LEDS_AW2013 is not set
# CONFIG_LEDS_BCM6328 is not set
# CONFIG_LEDS_BCM6358 is not set
# CONFIG_LEDS_LM3530 is not set
# CONFIG_LEDS_LM3532 is not set
# CONFIG_LEDS_LM3642 is not set
# CONFIG_LEDS_LM3692X is not set
# CONFIG_LEDS_PCA9532 is not set
# CONFIG_LEDS_GPIO is not set
# CONFIG_LEDS_LP3944 is not set
# CONFIG_LEDS_LP3952 is not set
# CONFIG_LEDS_LP50XX is not set
# CONFIG_LEDS_LP55XX_COMMON is not set
# CONFIG_LEDS_LP8860 is not set
# CONFIG_LEDS_PCA955X is not set
# CONFIG_LEDS_PCA963X is not set
# CONFIG_LEDS_PCA995X is not set
# CONFIG_LEDS_REGULATOR is not set
# CONFIG_LEDS_BD2606MVV is not set
# CONFIG_LEDS_BD2802 is not set
# CONFIG_LEDS_LT3593 is not set
# CONFIG_LEDS_TCA6507 is not set
# CONFIG_LEDS_TLC591XX is not set
# CONFIG_LEDS_LM355x is not set
# CONFIG_LEDS_IS31FL319X is not set
# CONFIG_LEDS_IS31FL32XX is not set
#
# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM)
#
# CONFIG_LEDS_BLINKM is not set
# CONFIG_LEDS_SYSCON is not set
# CONFIG_LEDS_MLXREG is not set
# CONFIG_LEDS_USER is not set
# CONFIG_LEDS_LM3697 is not set
#
# Flash and Torch LED drivers
#
# CONFIG_LEDS_AAT1290 is not set
# CONFIG_LEDS_AS3645A is not set
# CONFIG_LEDS_KTD2692 is not set
# CONFIG_LEDS_LM3601X is not set
CONFIG_LEDS_QCOM_FLASH=y
# CONFIG_LEDS_RT4505 is not set
# CONFIG_LEDS_RT8515 is not set
# CONFIG_LEDS_SGM3140 is not set
#
# RGB LED drivers
#
#
# LED Triggers
#
# CONFIG_LEDS_TRIGGERS is not set
#
# Simple LED drivers
#
# CONFIG_ACCESSIBILITY is not set
# CONFIG_INFINIBAND is not set
CONFIG_EDAC_SUPPORT=y
# CONFIG_EDAC is not set
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_HCTOSYS=y
CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
CONFIG_RTC_SYSTOHC=y
CONFIG_RTC_SYSTOHC_DEVICE="rtc0"
# CONFIG_RTC_DEBUG is not set
CONFIG_RTC_NVMEM=y
#
# RTC interfaces
#
CONFIG_RTC_INTF_SYSFS=y
CONFIG_RTC_INTF_PROC=y
CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
# CONFIG_RTC_DRV_TEST is not set
#
# I2C RTC drivers
#
# CONFIG_RTC_DRV_ABB5ZES3 is not set
# CONFIG_RTC_DRV_ABEOZ9 is not set
# CONFIG_RTC_DRV_ABX80X is not set
# CONFIG_RTC_DRV_DS1307 is not set
# CONFIG_RTC_DRV_DS1374 is not set
# CONFIG_RTC_DRV_DS1672 is not set
# CONFIG_RTC_DRV_HYM8563 is not set
# CONFIG_RTC_DRV_MAX6900 is not set
# CONFIG_RTC_DRV_MAX31335 is not set
# CONFIG_RTC_DRV_NCT3018Y is not set
# CONFIG_RTC_DRV_RS5C372 is not set
# CONFIG_RTC_DRV_ISL1208 is not set
# CONFIG_RTC_DRV_ISL12022 is not set
# CONFIG_RTC_DRV_ISL12026 is not set
# CONFIG_RTC_DRV_X1205 is not set
# CONFIG_RTC_DRV_PCF8523 is not set
# CONFIG_RTC_DRV_PCF85063 is not set
# CONFIG_RTC_DRV_PCF85363 is not set
# CONFIG_RTC_DRV_PCF8563 is not set
# CONFIG_RTC_DRV_PCF8583 is not set
# CONFIG_RTC_DRV_M41T80 is not set
# CONFIG_RTC_DRV_BQ32K is not set
# CONFIG_RTC_DRV_S35390A is not set
# CONFIG_RTC_DRV_FM3130 is not set
# CONFIG_RTC_DRV_RX8010 is not set
# CONFIG_RTC_DRV_RX8581 is not set
# CONFIG_RTC_DRV_RX8025 is not set
# CONFIG_RTC_DRV_EM3027 is not set
# CONFIG_RTC_DRV_RV3028 is not set
# CONFIG_RTC_DRV_RV3032 is not set
# CONFIG_RTC_DRV_RV8803 is not set
# CONFIG_RTC_DRV_SD3078 is not set
#
# SPI RTC drivers
#
CONFIG_RTC_I2C_AND_SPI=y
#
# SPI and I2C RTC drivers
#
# CONFIG_RTC_DRV_DS3232 is not set
# CONFIG_RTC_DRV_PCF2127 is not set
# CONFIG_RTC_DRV_RV3029C2 is not set
# CONFIG_RTC_DRV_RX6110 is not set
#
# Platform RTC drivers
#
# CONFIG_RTC_DRV_DS1286 is not set
# CONFIG_RTC_DRV_DS1511 is not set
# CONFIG_RTC_DRV_DS1553 is not set
# CONFIG_RTC_DRV_DS1685_FAMILY is not set
# CONFIG_RTC_DRV_DS1742 is not set
# CONFIG_RTC_DRV_DS2404 is not set
# CONFIG_RTC_DRV_EFI is not set
# CONFIG_RTC_DRV_STK17TA8 is not set
# CONFIG_RTC_DRV_M48T86 is not set
# CONFIG_RTC_DRV_M48T35 is not set
# CONFIG_RTC_DRV_M48T59 is not set
# CONFIG_RTC_DRV_MSM6242 is not set
# CONFIG_RTC_DRV_RP5C01 is not set
# CONFIG_RTC_DRV_OPTEE is not set
# CONFIG_RTC_DRV_ZYNQMP is not set
#
# on-CPU RTC drivers
#
# CONFIG_RTC_DRV_PL030 is not set
# CONFIG_RTC_DRV_PL031 is not set
# CONFIG_RTC_DRV_CADENCE is not set
# CONFIG_RTC_DRV_FTRTC010 is not set
CONFIG_RTC_DRV_PM8XXX=y
# CONFIG_RTC_DRV_R7301 is not set
#
# HID Sensor RTC drivers
#
# CONFIG_RTC_DRV_GOLDFISH is not set
CONFIG_DMADEVICES=y
# CONFIG_DMADEVICES_DEBUG is not set
#
# DMA Devices
#
CONFIG_DMA_ENGINE=y
CONFIG_DMA_VIRTUAL_CHANNELS=y
CONFIG_DMA_OF=y
# CONFIG_ALTERA_MSGDMA is not set
# CONFIG_AMBA_PL08X is not set
# CONFIG_DW_AXI_DMAC is not set
# CONFIG_FSL_EDMA is not set
# CONFIG_FSL_QDMA is not set
# CONFIG_INTEL_IDMA64 is not set
# CONFIG_MV_XOR_V2 is not set
# CONFIG_PL330_DMA is not set
# CONFIG_XILINX_DMA is not set
# CONFIG_XILINX_XDMA is not set
# CONFIG_XILINX_ZYNQMP_DMA is not set
# CONFIG_XILINX_ZYNQMP_DPDMA is not set
CONFIG_QCOM_BAM_DMA=y
CONFIG_QCOM_GPI_DMA=y
# CONFIG_QCOM_HIDMA_MGMT is not set
# CONFIG_QCOM_HIDMA is not set
# CONFIG_DW_DMAC is not set
# CONFIG_SF_PDMA is not set
#
# DMA Clients
#
# CONFIG_ASYNC_TX_DMA is not set
# CONFIG_DMATEST is not set
#
# DMABUF options
#
CONFIG_SYNC_FILE=y
# CONFIG_SW_SYNC is not set
# CONFIG_UDMABUF is not set
# CONFIG_DMABUF_MOVE_NOTIFY is not set
# CONFIG_DMABUF_DEBUG is not set
# CONFIG_DMABUF_SELFTESTS is not set
# CONFIG_DMABUF_HEAPS is not set
# CONFIG_DMABUF_SYSFS_STATS is not set
# end of DMABUF options
# CONFIG_UIO is not set
# CONFIG_VFIO is not set
# CONFIG_VIRT_DRIVERS is not set
CONFIG_VIRTIO_ANCHOR=y
CONFIG_VIRTIO=y
# CONFIG_VIRTIO_MENU is not set
# CONFIG_VDPA is not set
# CONFIG_VHOST_MENU is not set
#
# Microsoft Hyper-V guest support
#
# end of Microsoft Hyper-V guest support
# CONFIG_GREYBUS is not set
# CONFIG_COMEDI is not set
# CONFIG_STAGING is not set
# CONFIG_GOLDFISH is not set
# CONFIG_CHROME_PLATFORMS is not set
# CONFIG_MELLANOX_PLATFORM is not set
# CONFIG_SURFACE_PLATFORMS is not set
CONFIG_HAVE_CLK=y
CONFIG_HAVE_CLK_PREPARE=y
CONFIG_COMMON_CLK=y
#
# Clock driver for ARM Reference designs
#
# CONFIG_CLK_ICST is not set
# CONFIG_CLK_SP810 is not set
# end of Clock driver for ARM Reference designs
# CONFIG_COMMON_CLK_MAX9485 is not set
# CONFIG_COMMON_CLK_SCMI is not set
# CONFIG_COMMON_CLK_SI5341 is not set
# CONFIG_COMMON_CLK_SI5351 is not set
# CONFIG_COMMON_CLK_SI514 is not set
# CONFIG_COMMON_CLK_SI544 is not set
# CONFIG_COMMON_CLK_SI570 is not set
# CONFIG_COMMON_CLK_CDCE706 is not set
# CONFIG_COMMON_CLK_CDCE925 is not set
# CONFIG_COMMON_CLK_CS2000_CP is not set
# CONFIG_COMMON_CLK_AXI_CLKGEN is not set
# CONFIG_COMMON_CLK_XGENE is not set
# CONFIG_COMMON_CLK_RS9_PCIE is not set
# CONFIG_COMMON_CLK_SI521XX is not set
# CONFIG_COMMON_CLK_VC3 is not set
# CONFIG_COMMON_CLK_VC5 is not set
# CONFIG_COMMON_CLK_VC7 is not set
# CONFIG_COMMON_CLK_FIXED_MMIO is not set
CONFIG_QCOM_GDSC=y
CONFIG_COMMON_CLK_QCOM=y
# CONFIG_CLK_X1E80100_GCC is not set
# CONFIG_QCOM_A53PLL is not set
# CONFIG_QCOM_A7PLL is not set
# CONFIG_QCOM_CLK_APCC_MSM8996 is not set
CONFIG_QCOM_CLK_RPMH=y
# CONFIG_IPQ_APSS_PLL is not set
# CONFIG_IPQ_GCC_4019 is not set
# CONFIG_IPQ_GCC_5018 is not set
# CONFIG_IPQ_GCC_5332 is not set
# CONFIG_IPQ_GCC_6018 is not set
# CONFIG_IPQ_GCC_8074 is not set
# CONFIG_IPQ_GCC_9574 is not set
# CONFIG_MSM_GCC_8916 is not set
# CONFIG_MSM_GCC_8917 is not set
# CONFIG_MSM_GCC_8939 is not set
# CONFIG_MSM_GCC_8953 is not set
# CONFIG_MSM_GCC_8976 is not set
# CONFIG_MSM_MMCC_8994 is not set
# CONFIG_MSM_GCC_8994 is not set
# CONFIG_MSM_GCC_8996 is not set
# CONFIG_MSM_MMCC_8996 is not set
# CONFIG_MSM_GCC_8998 is not set
# CONFIG_MSM_GPUCC_8998 is not set
# CONFIG_MSM_MMCC_8998 is not set
# CONFIG_QCM_GCC_2290 is not set
# CONFIG_QCM_DISPCC_2290 is not set
# CONFIG_QCS_GCC_404 is not set
# CONFIG_SC_CAMCC_7180 is not set
# CONFIG_SC_CAMCC_7280 is not set
# CONFIG_SC_CAMCC_8280XP is not set
# CONFIG_SC_DISPCC_7180 is not set
# CONFIG_SC_DISPCC_7280 is not set
# CONFIG_SC_DISPCC_8280XP is not set
# CONFIG_SA_GCC_8775P is not set
# CONFIG_SA_GPUCC_8775P is not set
# CONFIG_SC_GCC_7180 is not set
# CONFIG_SC_GCC_7280 is not set
# CONFIG_SC_GCC_8180X is not set
# CONFIG_SC_GCC_8280XP is not set
# CONFIG_SC_GPUCC_7180 is not set
# CONFIG_SC_GPUCC_7280 is not set
# CONFIG_SC_GPUCC_8280XP is not set
# CONFIG_SC_LPASSCC_7280 is not set
# CONFIG_SC_LPASSCC_8280XP is not set
# CONFIG_SC_LPASS_CORECC_7180 is not set
# CONFIG_SC_LPASS_CORECC_7280 is not set
# CONFIG_SC_MSS_7180 is not set
# CONFIG_SC_VIDEOCC_7180 is not set
# CONFIG_SC_VIDEOCC_7280 is not set
# CONFIG_SDM_CAMCC_845 is not set
# CONFIG_SDM_GCC_660 is not set
# CONFIG_SDM_MMCC_660 is not set
# CONFIG_SDM_GPUCC_660 is not set
# CONFIG_QCS_TURING_404 is not set
# CONFIG_QCS_Q6SSTOP_404 is not set
# CONFIG_QDU_GCC_1000 is not set
# CONFIG_QDU_ECPRICC_1000 is not set
# CONFIG_SDM_GCC_845 is not set
# CONFIG_SDM_GPUCC_845 is not set
# CONFIG_SDM_VIDEOCC_845 is not set
# CONFIG_SDM_DISPCC_845 is not set
# CONFIG_SDM_LPASSCC_845 is not set
# CONFIG_SDX_GCC_75 is not set
CONFIG_SM_CAMCC_6350=y
# CONFIG_SM_CAMCC_8250 is not set
# CONFIG_SM_CAMCC_8450 is not set
# CONFIG_SM_CAMCC_8550 is not set
CONFIG_SM_DISPCC_6350=y
# CONFIG_SM_DISPCC_8650 is not set
# CONFIG_SM_GCC_4450 is not set
# CONFIG_SM_GCC_6115 is not set
# CONFIG_SM_GCC_6125 is not set
CONFIG_SM_GCC_6350=y
# CONFIG_SM_GCC_6375 is not set
# CONFIG_SM_GCC_7150 is not set
# CONFIG_SM_GCC_8150 is not set
# CONFIG_SM_GCC_8250 is not set
# CONFIG_SM_GCC_8350 is not set
# CONFIG_SM_GCC_8450 is not set
# CONFIG_SM_GCC_8550 is not set
# CONFIG_SM_GCC_8650 is not set
# CONFIG_SM_GPUCC_6115 is not set
# CONFIG_SM_GPUCC_6125 is not set
# CONFIG_SM_GPUCC_6375 is not set
CONFIG_SM_GPUCC_6350=y
# CONFIG_SM_GPUCC_8150 is not set
# CONFIG_SM_GPUCC_8250 is not set
# CONFIG_SM_GPUCC_8350 is not set
# CONFIG_SM_GPUCC_8450 is not set
# CONFIG_SM_GPUCC_8550 is not set
# CONFIG_SM_GPUCC_8650 is not set
# CONFIG_SM_TCSRCC_8550 is not set
# CONFIG_SM_TCSRCC_8650 is not set
# CONFIG_SM_VIDEOCC_8150 is not set
# CONFIG_SM_VIDEOCC_8250 is not set
# CONFIG_SM_VIDEOCC_8350 is not set
# CONFIG_SM_VIDEOCC_8550 is not set
# CONFIG_SPMI_PMIC_CLKDIV is not set
# CONFIG_QCOM_HFPLL is not set
# CONFIG_KPSS_XCC is not set
# CONFIG_CLK_GFM_LPASS_SM8250 is not set
# CONFIG_SM_VIDEOCC_8450 is not set
# CONFIG_XILINX_VCU is not set
# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set
CONFIG_HWSPINLOCK=y
CONFIG_HWSPINLOCK_QCOM=y
#
# Clock Source drivers
#
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_ARM_ARCH_TIMER=y
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y
CONFIG_FSL_ERRATUM_A008585=y
CONFIG_HISILICON_ERRATUM_161010101=y
CONFIG_ARM64_ERRATUM_858921=y
# end of Clock Source drivers
CONFIG_MAILBOX=y
# CONFIG_ARM_MHU is not set
# CONFIG_ARM_MHU_V2 is not set
# CONFIG_PLATFORM_MHU is not set
# CONFIG_PL320_MBOX is not set
# CONFIG_ALTERA_MBOX is not set
# CONFIG_MAILBOX_TEST is not set
# CONFIG_QCOM_APCS_IPC is not set
CONFIG_QCOM_IPCC=y
CONFIG_IOMMU_IOVA=y
CONFIG_IOMMU_API=y
CONFIG_IOMMU_SUPPORT=y
#
# Generic IOMMU Pagetable Support
#
CONFIG_IOMMU_IO_PGTABLE=y
CONFIG_IOMMU_IO_PGTABLE_LPAE=y
# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set
CONFIG_IOMMU_IO_PGTABLE_ARMV7S=y
# CONFIG_IOMMU_IO_PGTABLE_ARMV7S_SELFTEST is not set
# CONFIG_IOMMU_IO_PGTABLE_DART is not set
# end of Generic IOMMU Pagetable Support
# CONFIG_IOMMU_DEBUGFS is not set
CONFIG_IOMMU_DEFAULT_DMA_STRICT=y
# CONFIG_IOMMU_DEFAULT_DMA_LAZY is not set
# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set
CONFIG_OF_IOMMU=y
CONFIG_IOMMU_DMA=y
# CONFIG_IOMMUFD is not set
CONFIG_ARM_SMMU=y
# CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS is not set
CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y
CONFIG_ARM_SMMU_QCOM=y
# CONFIG_ARM_SMMU_QCOM_DEBUG is not set
CONFIG_ARM_SMMU_V3=y
# CONFIG_ARM_SMMU_V3_SVA is not set
CONFIG_QCOM_IOMMU=y
# CONFIG_VIRTIO_IOMMU is not set
#
# Remoteproc drivers
#
CONFIG_REMOTEPROC=y
# CONFIG_REMOTEPROC_CDEV is not set
CONFIG_QCOM_PIL_INFO=y
CONFIG_QCOM_RPROC_COMMON=y
CONFIG_QCOM_Q6V5_COMMON=y
# CONFIG_QCOM_Q6V5_ADSP is not set
# CONFIG_QCOM_Q6V5_MSS is not set
CONFIG_QCOM_Q6V5_PAS=y
# CONFIG_QCOM_Q6V5_WCSS is not set
CONFIG_QCOM_SYSMON=y
# CONFIG_QCOM_WCNSS_PIL is not set
# end of Remoteproc drivers
#
# Rpmsg drivers
#
CONFIG_RPMSG=y
# CONFIG_RPMSG_CHAR is not set
# CONFIG_RPMSG_CTRL is not set
# CONFIG_RPMSG_NS is not set
CONFIG_RPMSG_QCOM_GLINK=y
CONFIG_RPMSG_QCOM_GLINK_RPM=y
CONFIG_RPMSG_QCOM_GLINK_SMEM=y
CONFIG_RPMSG_QCOM_SMD=y
# CONFIG_RPMSG_VIRTIO is not set
# end of Rpmsg drivers
# CONFIG_SOUNDWIRE is not set
#
# SOC (System On Chip) specific Drivers
#
#
# Amlogic SoC drivers
#
# end of Amlogic SoC drivers
#
# Broadcom SoC drivers
#
# end of Broadcom SoC drivers
#
# NXP/Freescale QorIQ SoC drivers
#
# CONFIG_QUICC_ENGINE is not set
# CONFIG_FSL_RCPM is not set
# end of NXP/Freescale QorIQ SoC drivers
#
# fujitsu SoC drivers
#
# end of fujitsu SoC drivers
#
# i.MX SoC drivers
#
# end of i.MX SoC drivers
#
# Enable LiteX SoC Builder specific drivers
#
# CONFIG_LITEX_SOC_CONTROLLER is not set
# end of Enable LiteX SoC Builder specific drivers
# CONFIG_WPCM450_SOC is not set
#
# Qualcomm SoC drivers
#
CONFIG_QCOM_AOSS_QMP=y
CONFIG_QCOM_COMMAND_DB=y
CONFIG_QCOM_GENI_SE=y
# CONFIG_QCOM_GSBI is not set
CONFIG_QCOM_LLCC=y
CONFIG_QCOM_MDT_LOADER=y
# CONFIG_QCOM_OCMEM is not set
CONFIG_QCOM_QMI_HELPERS=y
# CONFIG_QCOM_RAMP_CTRL is not set
CONFIG_QCOM_RMTFS_MEM=y
# CONFIG_QCOM_RPM_MASTER_STATS is not set
CONFIG_QCOM_RPMH=y
CONFIG_QCOM_SMEM=y
# CONFIG_QCOM_SMD_RPM is not set
CONFIG_QCOM_SMEM_STATE=y
CONFIG_QCOM_SMP2P=y
# CONFIG_QCOM_SMSM is not set
CONFIG_QCOM_SOCINFO=y
# CONFIG_QCOM_SPM is not set
# CONFIG_QCOM_STATS is not set
# CONFIG_QCOM_WCNSS_CTRL is not set
# CONFIG_QCOM_APR is not set
# CONFIG_QCOM_ICC_BWMON is not set
CONFIG_QCOM_INLINE_CRYPTO_ENGINE=y
# end of Qualcomm SoC drivers
# CONFIG_SOC_TI is not set
#
# Xilinx SoC drivers
#
# end of Xilinx SoC drivers
# end of SOC (System On Chip) specific Drivers
#
# PM Domains
#
#
# Amlogic PM Domains
#
# end of Amlogic PM Domains
CONFIG_ARM_SCMI_PERF_DOMAIN=y
CONFIG_ARM_SCMI_POWER_DOMAIN=y
#
# Broadcom PM Domains
#
# end of Broadcom PM Domains
#
# i.MX PM Domains
#
# end of i.MX PM Domains
#
# Qualcomm PM Domains
#
# CONFIG_QCOM_CPR is not set
CONFIG_QCOM_RPMHPD=y
# end of Qualcomm PM Domains
# end of PM Domains
CONFIG_PM_DEVFREQ=y
#
# DEVFREQ Governors
#
CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y
# CONFIG_DEVFREQ_GOV_PERFORMANCE is not set
# CONFIG_DEVFREQ_GOV_POWERSAVE is not set
# CONFIG_DEVFREQ_GOV_USERSPACE is not set
# CONFIG_DEVFREQ_GOV_PASSIVE is not set
#
# DEVFREQ Drivers
#
# CONFIG_PM_DEVFREQ_EVENT is not set
CONFIG_EXTCON=y
#
# Extcon Device Drivers
#
# CONFIG_EXTCON_ADC_JACK is not set
# CONFIG_EXTCON_FSA9480 is not set
# CONFIG_EXTCON_GPIO is not set
# CONFIG_EXTCON_MAX3355 is not set
# CONFIG_EXTCON_PTN5150 is not set
# CONFIG_EXTCON_QCOM_SPMI_MISC is not set
# CONFIG_EXTCON_RT8973A is not set
# CONFIG_EXTCON_SM5502 is not set
# CONFIG_EXTCON_USB_GPIO is not set
# CONFIG_MEMORY is not set
CONFIG_IIO=y
# CONFIG_IIO_BUFFER is not set
# CONFIG_IIO_CONFIGFS is not set
# CONFIG_IIO_TRIGGER is not set
# CONFIG_IIO_SW_DEVICE is not set
# CONFIG_IIO_SW_TRIGGER is not set
# CONFIG_IIO_TRIGGERED_EVENT is not set
#
# Accelerometers
#
# CONFIG_ADXL313_I2C is not set
# CONFIG_ADXL345_I2C is not set
# CONFIG_ADXL355_I2C is not set
# CONFIG_ADXL367_I2C is not set
# CONFIG_ADXL372_I2C is not set
# CONFIG_BMA180 is not set
# CONFIG_BMA400 is not set
# CONFIG_BMC150_ACCEL is not set
# CONFIG_DA280 is not set
# CONFIG_DA311 is not set
# CONFIG_DMARD06 is not set
# CONFIG_DMARD09 is not set
# CONFIG_DMARD10 is not set
# CONFIG_FXLS8962AF_I2C is not set
# CONFIG_IIO_ST_ACCEL_3AXIS is not set
# CONFIG_IIO_KX022A_I2C is not set
# CONFIG_KXSD9 is not set
# CONFIG_KXCJK1013 is not set
# CONFIG_MC3230 is not set
# CONFIG_MMA7455_I2C is not set
# CONFIG_MMA7660 is not set
# CONFIG_MMA8452 is not set
# CONFIG_MMA9551 is not set
# CONFIG_MMA9553 is not set
# CONFIG_MSA311 is not set
# CONFIG_MXC4005 is not set
# CONFIG_MXC6255 is not set
# CONFIG_STK8312 is not set
# CONFIG_STK8BA50 is not set
# end of Accelerometers
#
# Analog to digital converters
#
# CONFIG_AD7091R5 is not set
# CONFIG_AD7291 is not set
# CONFIG_AD7606_IFACE_PARALLEL is not set
# CONFIG_AD799X is not set
# CONFIG_ADI_AXI_ADC is not set
# CONFIG_CC10001_ADC is not set
# CONFIG_ENVELOPE_DETECTOR is not set
# CONFIG_HX711 is not set
# CONFIG_INA2XX_ADC is not set
# CONFIG_LTC2309 is not set
# CONFIG_LTC2471 is not set
# CONFIG_LTC2485 is not set
# CONFIG_LTC2497 is not set
# CONFIG_MAX1363 is not set
# CONFIG_MAX34408 is not set
# CONFIG_MAX9611 is not set
# CONFIG_MCP3422 is not set
# CONFIG_NAU7802 is not set
CONFIG_QCOM_VADC_COMMON=y
# CONFIG_QCOM_SPMI_RRADC is not set
# CONFIG_QCOM_SPMI_IADC is not set
# CONFIG_QCOM_SPMI_VADC is not set
CONFIG_QCOM_SPMI_ADC5=y
# CONFIG_RICHTEK_RTQ6056 is not set
# CONFIG_SD_ADC_MODULATOR is not set
# CONFIG_TI_ADC081C is not set
# CONFIG_TI_ADS1015 is not set
# CONFIG_TI_ADS7924 is not set
# CONFIG_TI_ADS1100 is not set
# CONFIG_VF610_ADC is not set
# CONFIG_XILINX_XADC is not set
# end of Analog to digital converters
#
# Analog to digital and digital to analog converters
#
# end of Analog to digital and digital to analog converters
#
# Analog Front Ends
#
# CONFIG_IIO_RESCALE is not set
# end of Analog Front Ends
#
# Amplifiers
#
# CONFIG_HMC425 is not set
# end of Amplifiers
#
# Capacitance to digital converters
#
# CONFIG_AD7150 is not set
# CONFIG_AD7746 is not set
# end of Capacitance to digital converters
#
# Chemical Sensors
#
# CONFIG_AOSONG_AGS02MA is not set
# CONFIG_ATLAS_PH_SENSOR is not set
# CONFIG_ATLAS_EZO_SENSOR is not set
# CONFIG_BME680 is not set
# CONFIG_CCS811 is not set
# CONFIG_IAQCORE is not set
# CONFIG_PMS7003 is not set
# CONFIG_SCD30_CORE is not set
# CONFIG_SCD4X is not set
# CONFIG_SENSIRION_SGP30 is not set
# CONFIG_SENSIRION_SGP40 is not set
# CONFIG_SPS30_I2C is not set
# CONFIG_SPS30_SERIAL is not set
# CONFIG_SENSEAIR_SUNRISE_CO2 is not set
# CONFIG_VZ89X is not set
# end of Chemical Sensors
#
# Hid Sensor IIO Common
#
# end of Hid Sensor IIO Common
#
# IIO SCMI Sensors
#
# CONFIG_IIO_SCMI is not set
# end of IIO SCMI Sensors
#
# SSP Sensor Common
#
# end of SSP Sensor Common
#
# Digital to analog converters
#
# CONFIG_AD5064 is not set
# CONFIG_AD5380 is not set
# CONFIG_AD5446 is not set
# CONFIG_AD5593R is not set
# CONFIG_AD5696_I2C is not set
# CONFIG_DPOT_DAC is not set
# CONFIG_DS4424 is not set
# CONFIG_M62332 is not set
# CONFIG_MAX517 is not set
# CONFIG_MAX5821 is not set
# CONFIG_MCP4725 is not set
# CONFIG_MCP4728 is not set
# CONFIG_TI_DAC5571 is not set
# CONFIG_VF610_DAC is not set
# end of Digital to analog converters
#
# IIO dummy driver
#
# end of IIO dummy driver
#
# Filters
#
# end of Filters
#
# Frequency Synthesizers DDS/PLL
#
#
# Clock Generator/Distribution
#
# end of Clock Generator/Distribution
#
# Phase-Locked Loop (PLL) frequency synthesizers
#
# end of Phase-Locked Loop (PLL) frequency synthesizers
# end of Frequency Synthesizers DDS/PLL
#
# Digital gyroscope sensors
#
# CONFIG_BMG160 is not set
# CONFIG_FXAS21002C is not set
# CONFIG_MPU3050_I2C is not set
# CONFIG_IIO_ST_GYRO_3AXIS is not set
# CONFIG_ITG3200 is not set
# end of Digital gyroscope sensors
#
# Health Sensors
#
#
# Heart Rate Monitors
#
# CONFIG_AFE4404 is not set
# CONFIG_MAX30100 is not set
# CONFIG_MAX30102 is not set
# end of Heart Rate Monitors
# end of Health Sensors
#
# Humidity sensors
#
# CONFIG_AM2315 is not set
# CONFIG_DHT11 is not set
# CONFIG_HDC100X is not set
# CONFIG_HDC2010 is not set
# CONFIG_HTS221 is not set
# CONFIG_HTU21 is not set
# CONFIG_SI7005 is not set
# CONFIG_SI7020 is not set
# end of Humidity sensors
#
# Inertial measurement units
#
# CONFIG_BMI160_I2C is not set
# CONFIG_BMI323_I2C is not set
# CONFIG_BOSCH_BNO055_SERIAL is not set
# CONFIG_BOSCH_BNO055_I2C is not set
# CONFIG_FXOS8700_I2C is not set
# CONFIG_KMX61 is not set
# CONFIG_INV_ICM42600_I2C is not set
# CONFIG_INV_MPU6050_I2C is not set
# CONFIG_IIO_ST_LSM6DSX is not set
# CONFIG_IIO_ST_LSM9DS0 is not set
# end of Inertial measurement units
#
# Light sensors
#
# CONFIG_ADJD_S311 is not set
# CONFIG_ADUX1020 is not set
# CONFIG_AL3010 is not set
# CONFIG_AL3320A is not set
# CONFIG_APDS9300 is not set
# CONFIG_APDS9960 is not set
# CONFIG_AS73211 is not set
# CONFIG_BH1750 is not set
# CONFIG_BH1780 is not set
# CONFIG_CM32181 is not set
# CONFIG_CM3232 is not set
# CONFIG_CM3323 is not set
# CONFIG_CM3605 is not set
# CONFIG_CM36651 is not set
# CONFIG_GP2AP002 is not set
# CONFIG_GP2AP020A00F is not set
# CONFIG_SENSORS_ISL29018 is not set
# CONFIG_SENSORS_ISL29028 is not set
# CONFIG_ISL29125 is not set
# CONFIG_ISL76682 is not set
# CONFIG_JSA1212 is not set
# CONFIG_ROHM_BU27008 is not set
# CONFIG_ROHM_BU27034 is not set
# CONFIG_RPR0521 is not set
# CONFIG_LTR390 is not set
# CONFIG_LTR501 is not set
# CONFIG_LTRF216A is not set
# CONFIG_LV0104CS is not set
# CONFIG_MAX44000 is not set
# CONFIG_MAX44009 is not set
# CONFIG_NOA1305 is not set
# CONFIG_OPT3001 is not set
# CONFIG_OPT4001 is not set
# CONFIG_PA12203001 is not set
# CONFIG_SI1133 is not set
# CONFIG_SI1145 is not set
# CONFIG_STK3310 is not set
# CONFIG_ST_UVIS25 is not set
# CONFIG_TCS3414 is not set
# CONFIG_TCS3472 is not set
# CONFIG_SENSORS_TSL2563 is not set
# CONFIG_TSL2583 is not set
# CONFIG_TSL2591 is not set
# CONFIG_TSL2772 is not set
# CONFIG_TSL4531 is not set
# CONFIG_US5182D is not set
# CONFIG_VCNL4000 is not set
# CONFIG_VCNL4035 is not set
# CONFIG_VEML6030 is not set
# CONFIG_VEML6070 is not set
# CONFIG_VEML6075 is not set
# CONFIG_VL6180 is not set
# CONFIG_ZOPT2201 is not set
# end of Light sensors
#
# Magnetometer sensors
#
# CONFIG_AK8974 is not set
# CONFIG_AK8975 is not set
# CONFIG_AK09911 is not set
# CONFIG_BMC150_MAGN_I2C is not set
# CONFIG_MAG3110 is not set
# CONFIG_MMC35240 is not set
# CONFIG_IIO_ST_MAGN_3AXIS is not set
# CONFIG_SENSORS_HMC5843_I2C is not set
# CONFIG_SENSORS_RM3100_I2C is not set
# CONFIG_TI_TMAG5273 is not set
# CONFIG_YAMAHA_YAS530 is not set
# end of Magnetometer sensors
#
# Multiplexers
#
# CONFIG_IIO_MUX is not set
# end of Multiplexers
#
# Inclinometer sensors
#
# end of Inclinometer sensors
#
# Linear and angular position sensors
#
# end of Linear and angular position sensors
#
# Digital potentiometers
#
# CONFIG_AD5110 is not set
# CONFIG_AD5272 is not set
# CONFIG_DS1803 is not set
# CONFIG_MAX5432 is not set
# CONFIG_MCP4018 is not set
# CONFIG_MCP4531 is not set
# CONFIG_TPL0102 is not set
# end of Digital potentiometers
#
# Digital potentiostats
#
# CONFIG_LMP91000 is not set
# end of Digital potentiostats
#
# Pressure sensors
#
# CONFIG_ABP060MG is not set
# CONFIG_ROHM_BM1390 is not set
# CONFIG_BMP280 is not set
# CONFIG_DLHL60D is not set
# CONFIG_DPS310 is not set
# CONFIG_HP03 is not set
# CONFIG_HSC030PA is not set
# CONFIG_ICP10100 is not set
# CONFIG_MPL115_I2C is not set
# CONFIG_MPL3115 is not set
# CONFIG_MPRLS0025PA is not set
# CONFIG_MS5611 is not set
# CONFIG_MS5637 is not set
# CONFIG_IIO_ST_PRESS is not set
# CONFIG_T5403 is not set
# CONFIG_HP206C is not set
# CONFIG_ZPA2326 is not set
# end of Pressure sensors
#
# Lightning sensors
#
# end of Lightning sensors
#
# Proximity and distance sensors
#
# CONFIG_IRSD200 is not set
# CONFIG_ISL29501 is not set
# CONFIG_LIDAR_LITE_V2 is not set
# CONFIG_MB1232 is not set
# CONFIG_PING is not set
# CONFIG_RFD77402 is not set
# CONFIG_SRF04 is not set
# CONFIG_SX9310 is not set
# CONFIG_SX9324 is not set
# CONFIG_SX9360 is not set
# CONFIG_SX9500 is not set
# CONFIG_SRF08 is not set
# CONFIG_VCNL3020 is not set
# CONFIG_VL53L0X_I2C is not set
# end of Proximity and distance sensors
#
# Resolver to digital converters
#
# end of Resolver to digital converters
#
# Temperature sensors
#
# CONFIG_MLX90614 is not set
# CONFIG_MLX90632 is not set
# CONFIG_MLX90635 is not set
# CONFIG_TMP006 is not set
# CONFIG_TMP007 is not set
# CONFIG_TMP117 is not set
# CONFIG_TSYS01 is not set
# CONFIG_TSYS02D is not set
# CONFIG_MAX30208 is not set
# CONFIG_MCP9600 is not set
# end of Temperature sensors
# CONFIG_PWM is not set
#
# IRQ chip support
#
CONFIG_IRQCHIP=y
CONFIG_ARM_GIC=y
CONFIG_ARM_GIC_MAX_NR=1
CONFIG_ARM_GIC_V3=y
CONFIG_ARM_GIC_V3_ITS=y
# CONFIG_AL_FIC is not set
# CONFIG_XILINX_INTC is not set
CONFIG_PARTITION_PERCPU=y
CONFIG_QCOM_PDC=y
# CONFIG_QCOM_MPM is not set
# end of IRQ chip support
# CONFIG_IPACK_BUS is not set
CONFIG_RESET_CONTROLLER=y
# CONFIG_RESET_QCOM_AOSS is not set
# CONFIG_RESET_QCOM_PDC is not set
CONFIG_RESET_SCMI=y
# CONFIG_RESET_TI_SYSCON is not set
# CONFIG_RESET_TI_TPS380X is not set
#
# PHY Subsystem
#
CONFIG_GENERIC_PHY=y
# CONFIG_PHY_CAN_TRANSCEIVER is not set
#
# PHY drivers for Broadcom platforms
#
# CONFIG_BCM_KONA_USB2_PHY is not set
# end of PHY drivers for Broadcom platforms
# CONFIG_PHY_CADENCE_TORRENT is not set
# CONFIG_PHY_CADENCE_DPHY is not set
# CONFIG_PHY_CADENCE_DPHY_RX is not set
# CONFIG_PHY_CADENCE_SIERRA is not set
# CONFIG_PHY_CADENCE_SALVO is not set
# CONFIG_PHY_PXA_28NM_HSIC is not set
# CONFIG_PHY_PXA_28NM_USB2 is not set
# CONFIG_PHY_LAN966X_SERDES is not set
# CONFIG_PHY_CPCAP_USB is not set
# CONFIG_PHY_MAPPHONE_MDM6600 is not set
# CONFIG_PHY_OCELOT_SERDES is not set
# CONFIG_PHY_QCOM_APQ8064_SATA is not set
# CONFIG_PHY_QCOM_EDP is not set
# CONFIG_PHY_QCOM_IPQ4019_USB is not set
# CONFIG_PHY_QCOM_IPQ806X_SATA is not set
# CONFIG_PHY_QCOM_PCIE2 is not set
CONFIG_PHY_QCOM_QMP=y
CONFIG_PHY_QCOM_QMP_COMBO=y
CONFIG_PHY_QCOM_QMP_UFS=y
CONFIG_PHY_QCOM_QMP_USB=y
# CONFIG_PHY_QCOM_QMP_USB_LEGACY is not set
CONFIG_PHY_QCOM_QUSB2=y
# CONFIG_PHY_QCOM_SNPS_EUSB2 is not set
# CONFIG_PHY_QCOM_EUSB2_REPEATER is not set
# CONFIG_PHY_QCOM_M31_USB is not set
# CONFIG_PHY_QCOM_USB_HS is not set
# CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2 is not set
# CONFIG_PHY_QCOM_USB_HSIC is not set
# CONFIG_PHY_QCOM_USB_HS_28NM is not set
# CONFIG_PHY_QCOM_USB_SS is not set
# CONFIG_PHY_QCOM_IPQ806X_USB is not set
# CONFIG_PHY_QCOM_SGMII_ETH is not set
# CONFIG_PHY_TUSB1210 is not set
# end of PHY Subsystem
# CONFIG_POWERCAP is not set
# CONFIG_MCB is not set
#
# Performance monitor support
#
# CONFIG_ARM_CCI_PMU is not set
# CONFIG_ARM_CCN is not set
# CONFIG_ARM_CMN is not set
CONFIG_ARM_PMU=y
# CONFIG_ARM_SMMU_V3_PMU is not set
CONFIG_ARM_PMUV3=y
# CONFIG_ARM_DSU_PMU is not set
# CONFIG_ARM_SPE_PMU is not set
# CONFIG_ARM_CORESIGHT_PMU_ARCH_SYSTEM_PMU is not set
# end of Performance monitor support
CONFIG_RAS=y
#
# Android
#
# CONFIG_ANDROID_BINDER_IPC is not set
# end of Android
# CONFIG_LIBNVDIMM is not set
# CONFIG_DAX is not set
CONFIG_NVMEM=y
CONFIG_NVMEM_SYSFS=y
CONFIG_NVMEM_LAYOUTS=y
#
# Layout Types
#
# CONFIG_NVMEM_LAYOUT_SL28_VPD is not set
# CONFIG_NVMEM_LAYOUT_ONIE_TLV is not set
# end of Layout Types
CONFIG_NVMEM_QCOM_QFPROM=y
# CONFIG_NVMEM_QCOM_SEC_QFPROM is not set
# CONFIG_NVMEM_RMEM is not set
# CONFIG_NVMEM_SPMI_SDAM is not set
#
# HW tracing support
#
# CONFIG_STM is not set
# CONFIG_INTEL_TH is not set
# end of HW tracing support
# CONFIG_FPGA is not set
# CONFIG_FSI is not set
CONFIG_TEE=y
CONFIG_OPTEE=y
# CONFIG_OPTEE_INSECURE_LOAD_IMAGE is not set
CONFIG_PM_OPP=y
# CONFIG_SIOX is not set
# CONFIG_SLIMBUS is not set
CONFIG_INTERCONNECT=y
CONFIG_INTERCONNECT_QCOM=y
CONFIG_INTERCONNECT_QCOM_BCM_VOTER=y
CONFIG_INTERCONNECT_QCOM_OSM_L3=y
# CONFIG_INTERCONNECT_QCOM_QDU1000 is not set
CONFIG_INTERCONNECT_QCOM_RPMH_POSSIBLE=y
CONFIG_INTERCONNECT_QCOM_RPMH=y
# CONFIG_INTERCONNECT_QCOM_SA8775P is not set
# CONFIG_INTERCONNECT_QCOM_SC7180 is not set
# CONFIG_INTERCONNECT_QCOM_SC7280 is not set
# CONFIG_INTERCONNECT_QCOM_SC8180X is not set
# CONFIG_INTERCONNECT_QCOM_SC8280XP is not set
# CONFIG_INTERCONNECT_QCOM_SDM670 is not set
# CONFIG_INTERCONNECT_QCOM_SDM845 is not set
# CONFIG_INTERCONNECT_QCOM_SDX55 is not set
# CONFIG_INTERCONNECT_QCOM_SDX65 is not set
# CONFIG_INTERCONNECT_QCOM_SDX75 is not set
CONFIG_INTERCONNECT_QCOM_SM6350=y
# CONFIG_INTERCONNECT_QCOM_SM8150 is not set
# CONFIG_INTERCONNECT_QCOM_SM8250 is not set
# CONFIG_INTERCONNECT_QCOM_SM8350 is not set
# CONFIG_INTERCONNECT_QCOM_SM8450 is not set
# CONFIG_INTERCONNECT_QCOM_SM8550 is not set
# CONFIG_INTERCONNECT_QCOM_SM8650 is not set
# CONFIG_INTERCONNECT_QCOM_X1E80100 is not set
# CONFIG_COUNTER is not set
# CONFIG_MOST is not set
# CONFIG_PECI is not set
# CONFIG_HTE is not set
# CONFIG_CDX_BUS is not set
# end of Device Drivers
#
# File systems
#
CONFIG_DCACHE_WORD_ACCESS=y
# CONFIG_VALIDATE_FS_PARSER is not set
CONFIG_FS_IOMAP=y
CONFIG_BUFFER_HEAD=y
CONFIG_LEGACY_DIRECT_IO=y
# CONFIG_EXT2_FS is not set
# CONFIG_EXT3_FS is not set
CONFIG_EXT4_FS=y
CONFIG_EXT4_USE_FOR_EXT2=y
CONFIG_EXT4_FS_POSIX_ACL=y
# CONFIG_EXT4_FS_SECURITY is not set
# CONFIG_EXT4_DEBUG is not set
CONFIG_JBD2=y
# CONFIG_JBD2_DEBUG is not set
CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_BTRFS_FS is not set
# CONFIG_NILFS2_FS is not set
# CONFIG_F2FS_FS is not set
# CONFIG_BCACHEFS_FS is not set
CONFIG_FS_POSIX_ACL=y
CONFIG_EXPORTFS=y
# CONFIG_EXPORTFS_BLOCK_OPS is not set
CONFIG_FILE_LOCKING=y
CONFIG_FS_ENCRYPTION=y
CONFIG_FS_ENCRYPTION_ALGS=y
CONFIG_FS_ENCRYPTION_INLINE_CRYPT=y
# CONFIG_FS_VERITY is not set
CONFIG_FSNOTIFY=y
CONFIG_DNOTIFY=y
CONFIG_INOTIFY_USER=y
CONFIG_FANOTIFY=y
CONFIG_QUOTA=y
# CONFIG_QUOTA_NETLINK_INTERFACE is not set
# CONFIG_QUOTA_DEBUG is not set
# CONFIG_QFMT_V1 is not set
# CONFIG_QFMT_V2 is not set
CONFIG_QUOTACTL=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_FUSE_FS is not set
# CONFIG_OVERLAY_FS is not set
#
# Caches
#
# end of Caches
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
# end of CD-ROM/DVD Filesystems
#
# DOS/FAT/EXFAT/NT Filesystems
#
CONFIG_FAT_FS=y
# CONFIG_MSDOS_FS is not set
CONFIG_VFAT_FS=y
CONFIG_FAT_DEFAULT_CODEPAGE=437
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
# CONFIG_FAT_DEFAULT_UTF8 is not set
CONFIG_EXFAT_FS=y
CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8"
# CONFIG_NTFS3_FS is not set
# end of DOS/FAT/EXFAT/NT Filesystems
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
# CONFIG_PROC_KCORE is not set
CONFIG_PROC_VMCORE=y
# CONFIG_PROC_VMCORE_DEVICE_DUMP is not set
CONFIG_PROC_SYSCTL=y
CONFIG_PROC_PAGE_MONITOR=y
# CONFIG_PROC_CHILDREN is not set
CONFIG_KERNFS=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_TMPFS_XATTR=y
# CONFIG_TMPFS_INODE64 is not set
# CONFIG_TMPFS_QUOTA is not set
CONFIG_ARCH_SUPPORTS_HUGETLBFS=y
CONFIG_HUGETLBFS=y
# CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP_DEFAULT_ON is not set
CONFIG_HUGETLB_PAGE=y
CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP=y
CONFIG_ARCH_HAS_GIGANTIC_PAGE=y
CONFIG_CONFIGFS_FS=y
CONFIG_EFIVAR_FS=y
# end of Pseudo filesystems
CONFIG_MISC_FILESYSTEMS=y
# CONFIG_ORANGEFS_FS is not set
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_ECRYPT_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_SQUASHFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_OMFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX6FS_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_PSTORE is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
# CONFIG_EROFS_FS is not set
CONFIG_NETWORK_FILESYSTEMS=y
# CONFIG_NFS_FS is not set
# CONFIG_NFSD is not set
# CONFIG_CEPH_FS is not set
# CONFIG_CIFS is not set
# CONFIG_SMB_SERVER is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
CONFIG_NLS_CODEPAGE_437=y
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
# CONFIG_NLS_CODEPAGE_932 is not set
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
CONFIG_NLS_ISO8859_1=y
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_MAC_ROMAN is not set
# CONFIG_NLS_MAC_CELTIC is not set
# CONFIG_NLS_MAC_CENTEURO is not set
# CONFIG_NLS_MAC_CROATIAN is not set
# CONFIG_NLS_MAC_CYRILLIC is not set
# CONFIG_NLS_MAC_GAELIC is not set
# CONFIG_NLS_MAC_GREEK is not set
# CONFIG_NLS_MAC_ICELAND is not set
# CONFIG_NLS_MAC_INUIT is not set
# CONFIG_NLS_MAC_ROMANIAN is not set
# CONFIG_NLS_MAC_TURKISH is not set
# CONFIG_NLS_UTF8 is not set
# CONFIG_DLM is not set
# CONFIG_UNICODE is not set
CONFIG_IO_WQ=y
# end of File systems
#
# Security options
#
CONFIG_KEYS=y
# CONFIG_KEYS_REQUEST_CACHE is not set
# CONFIG_PERSISTENT_KEYRINGS is not set
# CONFIG_TRUSTED_KEYS is not set
# CONFIG_ENCRYPTED_KEYS is not set
# CONFIG_KEY_DH_OPERATIONS is not set
# CONFIG_SECURITY_DMESG_RESTRICT is not set
# CONFIG_SECURITY is not set
# CONFIG_SECURITYFS is not set
# CONFIG_HARDENED_USERCOPY is not set
# CONFIG_FORTIFY_SOURCE is not set
# CONFIG_STATIC_USERMODEHELPER is not set
# CONFIG_IMA_SECURE_AND_OR_TRUSTED_BOOT is not set
CONFIG_DEFAULT_SECURITY_DAC=y
CONFIG_LSM="landlock,lockdown,yama,loadpin,safesetid,bpf"
#
# Kernel hardening options
#
#
# Memory initialization
#
CONFIG_CC_HAS_AUTO_VAR_INIT_PATTERN=y
CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO_BARE=y
CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO=y
# CONFIG_INIT_STACK_NONE is not set
# CONFIG_INIT_STACK_ALL_PATTERN is not set
CONFIG_INIT_STACK_ALL_ZERO=y
# CONFIG_GCC_PLUGIN_STACKLEAK is not set
# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set
# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set
CONFIG_CC_HAS_ZERO_CALL_USED_REGS=y
# CONFIG_ZERO_CALL_USED_REGS is not set
# end of Memory initialization
#
# Hardening of kernel data structures
#
# CONFIG_LIST_HARDENED is not set
# CONFIG_BUG_ON_DATA_CORRUPTION is not set
# end of Hardening of kernel data structures
CONFIG_RANDSTRUCT_NONE=y
# CONFIG_RANDSTRUCT_FULL is not set
# CONFIG_RANDSTRUCT_PERFORMANCE is not set
# end of Kernel hardening options
# end of Security options
CONFIG_CRYPTO=y
#
# Crypto core or helper
#
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_ALGAPI2=y
CONFIG_CRYPTO_AEAD=y
CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_SIG2=y
CONFIG_CRYPTO_SKCIPHER=y
CONFIG_CRYPTO_SKCIPHER2=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_RNG=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_RNG_DEFAULT=y
CONFIG_CRYPTO_AKCIPHER2=y
CONFIG_CRYPTO_AKCIPHER=y
CONFIG_CRYPTO_KPP2=y
CONFIG_CRYPTO_KPP=y
CONFIG_CRYPTO_ACOMP2=y
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_MANAGER2=y
CONFIG_CRYPTO_USER=y
CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
CONFIG_CRYPTO_NULL=y
CONFIG_CRYPTO_NULL2=y
# CONFIG_CRYPTO_PCRYPT is not set
# CONFIG_CRYPTO_CRYPTD is not set
CONFIG_CRYPTO_AUTHENC=y
# CONFIG_CRYPTO_TEST is not set
# end of Crypto core or helper
#
# Public-key cryptography
#
CONFIG_CRYPTO_RSA=y
# CONFIG_CRYPTO_DH is not set
CONFIG_CRYPTO_ECC=y
CONFIG_CRYPTO_ECDH=y
# CONFIG_CRYPTO_ECDSA is not set
# CONFIG_CRYPTO_ECRDSA is not set
# CONFIG_CRYPTO_SM2 is not set
# CONFIG_CRYPTO_CURVE25519 is not set
# end of Public-key cryptography
#
# Block ciphers
#
CONFIG_CRYPTO_AES=y
# CONFIG_CRYPTO_AES_TI is not set
# CONFIG_CRYPTO_ANUBIS is not set
# CONFIG_CRYPTO_ARIA is not set
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
# CONFIG_CRYPTO_DES is not set
# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_KHAZAD is not set
# CONFIG_CRYPTO_SEED is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_SM4_GENERIC is not set
# CONFIG_CRYPTO_TEA is not set
# CONFIG_CRYPTO_TWOFISH is not set
# end of Block ciphers
#
# Length-preserving ciphers and modes
#
# CONFIG_CRYPTO_ADIANTUM is not set
# CONFIG_CRYPTO_ARC4 is not set
# CONFIG_CRYPTO_CHACHA20 is not set
CONFIG_CRYPTO_CBC=y
CONFIG_CRYPTO_CTR=y
# CONFIG_CRYPTO_CTS is not set
CONFIG_CRYPTO_ECB=y
# CONFIG_CRYPTO_HCTR2 is not set
# CONFIG_CRYPTO_KEYWRAP is not set
# CONFIG_CRYPTO_LRW is not set
# CONFIG_CRYPTO_PCBC is not set
CONFIG_CRYPTO_XTS=y
# end of Length-preserving ciphers and modes
#
# AEAD (authenticated encryption with associated data) ciphers
#
# CONFIG_CRYPTO_AEGIS128 is not set
# CONFIG_CRYPTO_CHACHA20POLY1305 is not set
CONFIG_CRYPTO_CCM=y
CONFIG_CRYPTO_GCM=y
CONFIG_CRYPTO_GENIV=y
# CONFIG_CRYPTO_SEQIV is not set
CONFIG_CRYPTO_ECHAINIV=y
CONFIG_CRYPTO_ESSIV=y
# end of AEAD (authenticated encryption with associated data) ciphers
#
# Hashes, digests, and MACs
#
# CONFIG_CRYPTO_BLAKE2B is not set
CONFIG_CRYPTO_CMAC=y
CONFIG_CRYPTO_GHASH=y
CONFIG_CRYPTO_HMAC=y
# CONFIG_CRYPTO_MD4 is not set
# CONFIG_CRYPTO_MD5 is not set
# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_POLY1305 is not set
# CONFIG_CRYPTO_RMD160 is not set
CONFIG_CRYPTO_SHA1=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_SHA3=y
# CONFIG_CRYPTO_SM3_GENERIC is not set
# CONFIG_CRYPTO_STREEBOG is not set
# CONFIG_CRYPTO_VMAC is not set
# CONFIG_CRYPTO_WP512 is not set
# CONFIG_CRYPTO_XCBC is not set
# CONFIG_CRYPTO_XXHASH is not set
# end of Hashes, digests, and MACs
#
# CRCs (cyclic redundancy checks)
#
CONFIG_CRYPTO_CRC32C=y
# CONFIG_CRYPTO_CRC32 is not set
CONFIG_CRYPTO_CRCT10DIF=y
CONFIG_CRYPTO_CRC64_ROCKSOFT=y
# end of CRCs (cyclic redundancy checks)
#
# Compression
#
CONFIG_CRYPTO_DEFLATE=y
# CONFIG_CRYPTO_LZO is not set
# CONFIG_CRYPTO_842 is not set
# CONFIG_CRYPTO_LZ4 is not set
# CONFIG_CRYPTO_LZ4HC is not set
# CONFIG_CRYPTO_ZSTD is not set
# end of Compression
#
# Random number generation
#
CONFIG_CRYPTO_ANSI_CPRNG=y
CONFIG_CRYPTO_DRBG_MENU=y
CONFIG_CRYPTO_DRBG_HMAC=y
# CONFIG_CRYPTO_DRBG_HASH is not set
# CONFIG_CRYPTO_DRBG_CTR is not set
CONFIG_CRYPTO_DRBG=y
CONFIG_CRYPTO_JITTERENTROPY=y
CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKS=64
CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32
CONFIG_CRYPTO_JITTERENTROPY_OSR=1
# end of Random number generation
#
# Userspace interface
#
CONFIG_CRYPTO_USER_API=y
CONFIG_CRYPTO_USER_API_HASH=y
CONFIG_CRYPTO_USER_API_SKCIPHER=y
CONFIG_CRYPTO_USER_API_RNG=y
# CONFIG_CRYPTO_USER_API_RNG_CAVP is not set
CONFIG_CRYPTO_USER_API_AEAD=y
CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y
# CONFIG_CRYPTO_STATS is not set
# end of Userspace interface
CONFIG_CRYPTO_HASH_INFO=y
# CONFIG_CRYPTO_NHPOLY1305_NEON is not set
# CONFIG_CRYPTO_CHACHA20_NEON is not set
#
# Accelerated Cryptographic Algorithms for CPU (arm64)
#
CONFIG_CRYPTO_GHASH_ARM64_CE=y
# CONFIG_CRYPTO_POLY1305_NEON is not set
CONFIG_CRYPTO_SHA1_ARM64_CE=y
CONFIG_CRYPTO_SHA256_ARM64=y
CONFIG_CRYPTO_SHA2_ARM64_CE=y
# CONFIG_CRYPTO_SHA512_ARM64 is not set
# CONFIG_CRYPTO_SHA512_ARM64_CE is not set
# CONFIG_CRYPTO_SHA3_ARM64 is not set
# CONFIG_CRYPTO_SM3_NEON is not set
# CONFIG_CRYPTO_SM3_ARM64_CE is not set
# CONFIG_CRYPTO_POLYVAL_ARM64_CE is not set
# CONFIG_CRYPTO_AES_ARM64 is not set
CONFIG_CRYPTO_AES_ARM64_CE=y
CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
# CONFIG_CRYPTO_AES_ARM64_NEON_BLK is not set
# CONFIG_CRYPTO_AES_ARM64_BS is not set
# CONFIG_CRYPTO_SM4_ARM64_CE is not set
# CONFIG_CRYPTO_SM4_ARM64_CE_BLK is not set
# CONFIG_CRYPTO_SM4_ARM64_NEON_BLK is not set
CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
# CONFIG_CRYPTO_SM4_ARM64_CE_CCM is not set
# CONFIG_CRYPTO_SM4_ARM64_CE_GCM is not set
# CONFIG_CRYPTO_CRCT10DIF_ARM64_CE is not set
# end of Accelerated Cryptographic Algorithms for CPU (arm64)
CONFIG_CRYPTO_HW=y
# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set
# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set
# CONFIG_CRYPTO_DEV_CCP is not set
CONFIG_CRYPTO_DEV_QCE=y
CONFIG_CRYPTO_DEV_QCE_SKCIPHER=y
CONFIG_CRYPTO_DEV_QCE_SHA=y
CONFIG_CRYPTO_DEV_QCE_AEAD=y
CONFIG_CRYPTO_DEV_QCE_ENABLE_ALL=y
# CONFIG_CRYPTO_DEV_QCE_ENABLE_SKCIPHER is not set
# CONFIG_CRYPTO_DEV_QCE_ENABLE_SHA is not set
# CONFIG_CRYPTO_DEV_QCE_ENABLE_AEAD is not set
CONFIG_CRYPTO_DEV_QCE_SW_MAX_LEN=512
CONFIG_CRYPTO_DEV_QCOM_RNG=y
# CONFIG_CRYPTO_DEV_VIRTIO is not set
# CONFIG_CRYPTO_DEV_SAFEXCEL is not set
# CONFIG_CRYPTO_DEV_CCREE is not set
# CONFIG_CRYPTO_DEV_HISI_SEC is not set
# CONFIG_CRYPTO_DEV_AMLOGIC_GXL is not set
CONFIG_ASYMMETRIC_KEY_TYPE=y
CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y
CONFIG_X509_CERTIFICATE_PARSER=y
# CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set
CONFIG_PKCS7_MESSAGE_PARSER=y
# CONFIG_PKCS7_TEST_KEY is not set
# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set
# CONFIG_FIPS_SIGNATURE_SELFTEST is not set
#
# Certificates for signature checking
#
CONFIG_SYSTEM_TRUSTED_KEYRING=y
CONFIG_SYSTEM_TRUSTED_KEYS=""
# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set
# CONFIG_SECONDARY_TRUSTED_KEYRING is not set
# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set
# end of Certificates for signature checking
#
# Library routines
#
CONFIG_LINEAR_RANGES=y
CONFIG_PACKING=y
CONFIG_BITREVERSE=y
CONFIG_HAVE_ARCH_BITREVERSE=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_NET_UTILS=y
# CONFIG_CORDIC is not set
# CONFIG_PRIME_NUMBERS is not set
CONFIG_RATIONAL=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
CONFIG_ARCH_HAS_FAST_MULTIPLIER=y
CONFIG_ARCH_USE_SYM_ANNOTATIONS=y
CONFIG_INDIRECT_PIO=y
#
# Crypto library routines
#
CONFIG_CRYPTO_LIB_UTILS=y
CONFIG_CRYPTO_LIB_AES=y
CONFIG_CRYPTO_LIB_ARC4=y
CONFIG_CRYPTO_LIB_GF128MUL=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
# CONFIG_CRYPTO_LIB_CHACHA is not set
# CONFIG_CRYPTO_LIB_CURVE25519 is not set
CONFIG_CRYPTO_LIB_DES=y
CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9
# CONFIG_CRYPTO_LIB_POLY1305 is not set
# CONFIG_CRYPTO_LIB_CHACHA20POLY1305 is not set
CONFIG_CRYPTO_LIB_SHA1=y
CONFIG_CRYPTO_LIB_SHA256=y
# end of Crypto library routines
# CONFIG_CRC_CCITT is not set
CONFIG_CRC16=y
CONFIG_CRC_T10DIF=y
CONFIG_CRC64_ROCKSOFT=y
CONFIG_CRC_ITU_T=y
CONFIG_CRC32=y
# CONFIG_CRC32_SELFTEST is not set
CONFIG_CRC32_SLICEBY8=y
# CONFIG_CRC32_SLICEBY4 is not set
# CONFIG_CRC32_SARWATE is not set
# CONFIG_CRC32_BIT is not set
CONFIG_CRC64=y
# CONFIG_CRC4 is not set
CONFIG_CRC7=y
# CONFIG_LIBCRC32C is not set
CONFIG_CRC8=y
CONFIG_XXHASH=y
CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
# CONFIG_RANDOM32_SELFTEST is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
CONFIG_XZ_DEC=y
CONFIG_XZ_DEC_X86=y
CONFIG_XZ_DEC_POWERPC=y
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_ARMTHUMB=y
CONFIG_XZ_DEC_SPARC=y
# CONFIG_XZ_DEC_MICROLZMA is not set
CONFIG_XZ_DEC_BCJ=y
# CONFIG_XZ_DEC_TEST is not set
CONFIG_DECOMPRESS_GZIP=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_XARRAY_MULTI=y
CONFIG_ASSOCIATIVE_ARRAY=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_DMA=y
CONFIG_DMA_OPS=y
CONFIG_NEED_SG_DMA_FLAGS=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
CONFIG_DMA_DECLARE_COHERENT=y
CONFIG_ARCH_HAS_SETUP_DMA_OPS=y
CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y
CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y
CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y
CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y
CONFIG_SWIOTLB=y
# CONFIG_SWIOTLB_DYNAMIC is not set
CONFIG_DMA_BOUNCE_UNALIGNED_KMALLOC=y
# CONFIG_DMA_RESTRICTED_POOL is not set
CONFIG_DMA_NONCOHERENT_MMAP=y
CONFIG_DMA_COHERENT_POOL=y
CONFIG_DMA_DIRECT_REMAP=y
# CONFIG_DMA_CMA is not set
# CONFIG_DMA_API_DEBUG is not set
# CONFIG_DMA_MAP_BENCHMARK is not set
CONFIG_SGL_ALLOC=y
CONFIG_CPU_RMAP=y
CONFIG_DQL=y
CONFIG_GLOB=y
# CONFIG_GLOB_SELFTEST is not set
CONFIG_NLATTR=y
CONFIG_CLZ_TAB=y
CONFIG_IRQ_POLL=y
CONFIG_MPILIB=y
CONFIG_LIBFDT=y
CONFIG_OID_REGISTRY=y
CONFIG_UCS2_STRING=y
CONFIG_HAVE_GENERIC_VDSO=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_VDSO_TIME_NS=y
CONFIG_FONT_SUPPORT=y
# CONFIG_FONTS is not set
CONFIG_FONT_8x8=y
CONFIG_FONT_8x16=y
CONFIG_SG_POOL=y
CONFIG_ARCH_STACKWALK=y
CONFIG_STACKDEPOT=y
CONFIG_STACKDEPOT_MAX_FRAMES=64
CONFIG_SBITMAP=y
# CONFIG_LWQ_TEST is not set
# end of Library routines
CONFIG_GENERIC_IOREMAP=y
CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
#
# Kernel hacking
#
#
# printk and dmesg options
#
CONFIG_PRINTK_TIME=y
# CONFIG_PRINTK_CALLER is not set
# CONFIG_STACKTRACE_BUILD_ID is not set
CONFIG_CONSOLE_LOGLEVEL_DEFAULT=8
CONFIG_CONSOLE_LOGLEVEL_QUIET=4
CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4
# CONFIG_BOOT_PRINTK_DELAY is not set
# CONFIG_DYNAMIC_DEBUG is not set
# CONFIG_DYNAMIC_DEBUG_CORE is not set
CONFIG_SYMBOLIC_ERRNAME=y
CONFIG_DEBUG_BUGVERBOSE=y
# end of printk and dmesg options
CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_MISC=y
#
# Compile-time checks and compiler options
#
CONFIG_DEBUG_INFO=y
CONFIG_AS_HAS_NON_CONST_LEB128=y
# CONFIG_DEBUG_INFO_NONE is not set
CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y
# CONFIG_DEBUG_INFO_DWARF4 is not set
# CONFIG_DEBUG_INFO_DWARF5 is not set
CONFIG_DEBUG_INFO_REDUCED=y
CONFIG_DEBUG_INFO_COMPRESSED_NONE=y
# CONFIG_DEBUG_INFO_COMPRESSED_ZLIB is not set
# CONFIG_DEBUG_INFO_COMPRESSED_ZSTD is not set
# CONFIG_DEBUG_INFO_SPLIT is not set
# CONFIG_GDB_SCRIPTS is not set
CONFIG_FRAME_WARN=2048
# CONFIG_STRIP_ASM_SYMS is not set
# CONFIG_READABLE_ASM is not set
# CONFIG_HEADERS_INSTALL is not set
# CONFIG_DEBUG_SECTION_MISMATCH is not set
CONFIG_SECTION_MISMATCH_WARN_ONLY=y
CONFIG_ARCH_WANT_FRAME_POINTERS=y
CONFIG_FRAME_POINTER=y
# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
# end of Compile-time checks and compiler options
#
# Generic Kernel Debugging Instruments
#
# CONFIG_MAGIC_SYSRQ is not set
CONFIG_DEBUG_FS=y
CONFIG_DEBUG_FS_ALLOW_ALL=y
# CONFIG_DEBUG_FS_DISALLOW_MOUNT is not set
# CONFIG_DEBUG_FS_ALLOW_NONE is not set
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_KGDB is not set
CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y
# CONFIG_UBSAN is not set
CONFIG_HAVE_KCSAN_COMPILER=y
# end of Generic Kernel Debugging Instruments
#
# Networking Debugging
#
# CONFIG_NET_DEV_REFCNT_TRACKER is not set
# CONFIG_NET_NS_REFCNT_TRACKER is not set
# CONFIG_DEBUG_NET is not set
# end of Networking Debugging
#
# Memory Debugging
#
# CONFIG_PAGE_EXTENSION is not set
# CONFIG_DEBUG_PAGEALLOC is not set
CONFIG_SLUB_DEBUG=y
# CONFIG_SLUB_DEBUG_ON is not set
# CONFIG_PAGE_OWNER is not set
# CONFIG_PAGE_TABLE_CHECK is not set
# CONFIG_PAGE_POISONING is not set
# CONFIG_DEBUG_RODATA_TEST is not set
CONFIG_ARCH_HAS_DEBUG_WX=y
# CONFIG_DEBUG_WX is not set
CONFIG_GENERIC_PTDUMP=y
# CONFIG_PTDUMP_DEBUGFS is not set
CONFIG_HAVE_DEBUG_KMEMLEAK=y
# CONFIG_DEBUG_KMEMLEAK is not set
# CONFIG_PER_VMA_LOCK_STATS is not set
# CONFIG_DEBUG_OBJECTS is not set
# CONFIG_SHRINKER_DEBUG is not set
# CONFIG_DEBUG_STACK_USAGE is not set
# CONFIG_SCHED_STACK_END_CHECK is not set
CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y
# CONFIG_DEBUG_VM is not set
# CONFIG_DEBUG_VM_PGTABLE is not set
CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
# CONFIG_DEBUG_VIRTUAL is not set
CONFIG_DEBUG_MEMORY_INIT=y
# CONFIG_DEBUG_PER_CPU_MAPS is not set
CONFIG_HAVE_ARCH_KASAN=y
CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y
CONFIG_HAVE_ARCH_KASAN_HW_TAGS=y
CONFIG_HAVE_ARCH_KASAN_VMALLOC=y
CONFIG_CC_HAS_KASAN_GENERIC=y
CONFIG_CC_HAS_KASAN_SW_TAGS=y
CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y
# CONFIG_KASAN is not set
CONFIG_HAVE_ARCH_KFENCE=y
# CONFIG_KFENCE is not set
# end of Memory Debugging
# CONFIG_DEBUG_SHIRQ is not set
#
# Debug Oops, Lockups and Hangs
#
# CONFIG_PANIC_ON_OOPS is not set
CONFIG_PANIC_ON_OOPS_VALUE=0
CONFIG_PANIC_TIMEOUT=10
# CONFIG_SOFTLOCKUP_DETECTOR is not set
CONFIG_HAVE_HARDLOCKUP_DETECTOR_BUDDY=y
# CONFIG_HARDLOCKUP_DETECTOR is not set
# CONFIG_DETECT_HUNG_TASK is not set
# CONFIG_WQ_WATCHDOG is not set
# CONFIG_WQ_CPU_INTENSIVE_REPORT is not set
# CONFIG_TEST_LOCKUP is not set
# end of Debug Oops, Lockups and Hangs
#
# Scheduler Debugging
#
# CONFIG_SCHED_DEBUG is not set
# CONFIG_SCHEDSTATS is not set
# end of Scheduler Debugging
# CONFIG_DEBUG_TIMEKEEPING is not set
#
# Lock Debugging (spinlocks, mutexes, etc...)
#
CONFIG_LOCK_DEBUGGING_SUPPORT=y
# CONFIG_PROVE_LOCKING is not set
# CONFIG_LOCK_STAT is not set
# CONFIG_DEBUG_RT_MUTEXES is not set
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_MUTEXES is not set
# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set
# CONFIG_DEBUG_RWSEMS is not set
# CONFIG_DEBUG_LOCK_ALLOC is not set
# CONFIG_DEBUG_ATOMIC_SLEEP is not set
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
# CONFIG_LOCK_TORTURE_TEST is not set
# CONFIG_WW_MUTEX_SELFTEST is not set
# CONFIG_SCF_TORTURE_TEST is not set
# CONFIG_CSD_LOCK_WAIT_DEBUG is not set
# end of Lock Debugging (spinlocks, mutexes, etc...)
# CONFIG_DEBUG_IRQFLAGS is not set
CONFIG_STACKTRACE=y
# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set
# CONFIG_DEBUG_KOBJECT is not set
#
# Debug kernel data structures
#
# CONFIG_DEBUG_LIST is not set
# CONFIG_DEBUG_PLIST is not set
# CONFIG_DEBUG_SG is not set
# CONFIG_DEBUG_NOTIFIERS is not set
# CONFIG_DEBUG_MAPLE_TREE is not set
# end of Debug kernel data structures
#
# RCU Debugging
#
# CONFIG_RCU_SCALE_TEST is not set
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_RCU_REF_SCALE_TEST is not set
CONFIG_RCU_CPU_STALL_TIMEOUT=21
CONFIG_RCU_EXP_CPU_STALL_TIMEOUT=0
# CONFIG_RCU_CPU_STALL_CPUTIME is not set
CONFIG_RCU_TRACE=y
# CONFIG_RCU_EQS_DEBUG is not set
# end of RCU Debugging
# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
# CONFIG_LATENCYTOP is not set
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_GRAPH_RETVAL=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_DYNAMIC_FTRACE_WITH_ARGS=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_HAVE_C_RECORDMCOUNT=y
CONFIG_TRACE_CLOCK=y
CONFIG_TRACING_SUPPORT=y
# CONFIG_FTRACE is not set
# CONFIG_SAMPLES is not set
CONFIG_HAVE_SAMPLE_FTRACE_DIRECT=y
CONFIG_HAVE_SAMPLE_FTRACE_DIRECT_MULTI=y
#
# arm64 Debugging
#
# CONFIG_PID_IN_CONTEXTIDR is not set
# CONFIG_DEBUG_EFI is not set
# CONFIG_ARM64_RELOC_TEST is not set
# CONFIG_CORESIGHT is not set
# end of arm64 Debugging
#
# Kernel Testing and Coverage
#
# CONFIG_KUNIT is not set
# CONFIG_NOTIFIER_ERROR_INJECTION is not set
# CONFIG_FAULT_INJECTION is not set
CONFIG_ARCH_HAS_KCOV=y
CONFIG_CC_HAS_SANCOV_TRACE_PC=y
# CONFIG_KCOV is not set
CONFIG_RUNTIME_TESTING_MENU=y
# CONFIG_TEST_DHRY is not set
# CONFIG_LKDTM is not set
# CONFIG_TEST_MIN_HEAP is not set
# CONFIG_TEST_DIV64 is not set
# CONFIG_BACKTRACE_SELF_TEST is not set
# CONFIG_TEST_REF_TRACKER is not set
# CONFIG_RBTREE_TEST is not set
# CONFIG_REED_SOLOMON_TEST is not set
# CONFIG_INTERVAL_TREE_TEST is not set
# CONFIG_PERCPU_TEST is not set
# CONFIG_ATOMIC64_SELFTEST is not set
# CONFIG_TEST_HEXDUMP is not set
# CONFIG_STRING_SELFTEST is not set
# CONFIG_TEST_STRING_HELPERS is not set
# CONFIG_TEST_KSTRTOX is not set
# CONFIG_TEST_PRINTF is not set
# CONFIG_TEST_SCANF is not set
# CONFIG_TEST_BITMAP is not set
# CONFIG_TEST_UUID is not set
# CONFIG_TEST_XARRAY is not set
# CONFIG_TEST_MAPLE_TREE is not set
# CONFIG_TEST_RHASHTABLE is not set
# CONFIG_TEST_IDA is not set
# CONFIG_TEST_LKM is not set
# CONFIG_TEST_BITOPS is not set
# CONFIG_TEST_VMALLOC is not set
# CONFIG_TEST_USER_COPY is not set
# CONFIG_TEST_BPF is not set
# CONFIG_TEST_BLACKHOLE_DEV is not set
# CONFIG_FIND_BIT_BENCHMARK is not set
# CONFIG_TEST_FIRMWARE is not set
# CONFIG_TEST_SYSCTL is not set
# CONFIG_TEST_UDELAY is not set
# CONFIG_TEST_STATIC_KEYS is not set
# CONFIG_TEST_KMOD is not set
# CONFIG_TEST_MEMCAT_P is not set
# CONFIG_TEST_MEMINIT is not set
# CONFIG_TEST_FREE_PAGES is not set
# CONFIG_TEST_OBJPOOL is not set
CONFIG_ARCH_USE_MEMTEST=y
CONFIG_MEMTEST=y
# end of Kernel Testing and Coverage
#
# Rust hacking
#
# end of Rust hacking
# end of Kernel hacking
^ permalink raw reply [relevance 13%]
* Re: [PATCH] arm64: dts: qcom: sdm845: Fix wild reboot during Antutu test
@ 2024-01-16 14:03 99% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-01-16 14:03 UTC (permalink / raw)
To: Daniel Lezcano, andersson
Cc: Amit Pundir, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, open list:ARM/QUALCOMM SUPPORT,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list
On Tue Jan 16, 2024 at 1:51 PM CET, Daniel Lezcano wrote:
> On 16/01/2024 13:37, Luca Weiss wrote:
> > On Tue Jan 16, 2024 at 12:59 PM CET, Daniel Lezcano wrote:
> >> Running an Antutu benchmark makes the board to do a hard reboot.
> >>
> >> Cause: it appears the gpu-bottom and gpu-top temperature sensors are showing
> >> too high temperatures, above 115°C.
> >>
> >> Out of tree configuratons show the gpu thermal zone is configured to
> >> be mitigated at 85°C with devfreq.
> >>
> >> Add the DT snippet to enable the thermal mitigation on the sdm845
> >> based board.
> >>
> >> Fixes: c79800103eb18 ("arm64: dts: sdm845: Add gpu and gmu device nodes")
> >> Cc: Amit Pundir <amit.pundir@linaro.org>
> >> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
> >
> > A part of this is already included with this patch:
> > https://lore.kernel.org/linux-arm-msm/20240102-topic-gpu_cooling-v1-4-fda30c57e353@linaro.org/
> >
> > Maybe rebase on top of that one and add the 85degC trip point or
> > something?
>
> Actually, I think the patch is wrong.
I recommend telling Konrad in that patch then, not me :)
>
> The cooling effect does not operate on 'hot' trip point type as it is
> considered as a critical trip point. The governor is not invoked, so no
> mitigation happen. The 'hot' trip point type results in sending a
> notification to userspace to give the last chance to do something before
> 'critical' is reached where the system is shut down.
>
> I suggest to revert it and pick the one I proposed.
It hasn't been applied yet so it can be fixed in v2 there.
Regards
Luca
^ permalink raw reply [relevance 99%]
* Re: [PATCH] arm64: dts: qcom: sdm845: Fix wild reboot during Antutu test
@ 2024-01-16 12:37 99% ` Luca Weiss
0 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-01-16 12:37 UTC (permalink / raw)
To: Daniel Lezcano, andersson
Cc: Amit Pundir, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, open list:ARM/QUALCOMM SUPPORT,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list
On Tue Jan 16, 2024 at 12:59 PM CET, Daniel Lezcano wrote:
> Running an Antutu benchmark makes the board to do a hard reboot.
>
> Cause: it appears the gpu-bottom and gpu-top temperature sensors are showing
> too high temperatures, above 115°C.
>
> Out of tree configuratons show the gpu thermal zone is configured to
> be mitigated at 85°C with devfreq.
>
> Add the DT snippet to enable the thermal mitigation on the sdm845
> based board.
>
> Fixes: c79800103eb18 ("arm64: dts: sdm845: Add gpu and gmu device nodes")
> Cc: Amit Pundir <amit.pundir@linaro.org>
> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
A part of this is already included with this patch:
https://lore.kernel.org/linux-arm-msm/20240102-topic-gpu_cooling-v1-4-fda30c57e353@linaro.org/
Maybe rebase on top of that one and add the 85degC trip point or
something?
> ---
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 32 ++++++++++++++++++++++++++--
> 1 file changed, 30 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index c2244824355a..20fefd6af0f8 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -4764,6 +4764,8 @@ gpu: gpu@5000000 {
> interconnects = <&mem_noc MASTER_GFX3D 0 &mem_noc SLAVE_EBI1 0>;
> interconnect-names = "gfx-mem";
>
> + #cooling-cells = <2>;
> +
> status = "disabled";
>
> gpu_opp_table: opp-table {
> @@ -5603,12 +5605,25 @@ gpu-top-thermal {
> thermal-sensors = <&tsens0 11>;
>
> trips {
> - gpu1_alert0: trip-point0 {
> + gpu1_alert0: trip-point0 {
> + temperature = <85000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> +
The indentation here should use tabs not spaces.
> + gpu1_alert1: trip-point1 {
> temperature = <90000>;
> hysteresis = <2000>;
> type = "hot";
> };
> };
> +
> + cooling-maps {
> + map0 {
> + trip = <&gpu1_alert0>;
> + cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> + };
> + };
> };
>
> gpu-bottom-thermal {
> @@ -5618,12 +5633,25 @@ gpu-bottom-thermal {
> thermal-sensors = <&tsens0 12>;
>
> trips {
> - gpu2_alert0: trip-point0 {
> + gpu2_alert0: trip-point0 {
> + temperature = <85000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> +
> + gpu2_alert1: trip-point1 {
> temperature = <90000>;
> hysteresis = <2000>;
> type = "hot";
> };
> };
> +
> + cooling-maps {
> + map0 {
> + trip = <&gpu2_alert0>;
> + cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> + };
> + };
> };
>
> aoss1-thermal {
^ permalink raw reply [relevance 99%]
* Re: [PATCH] dt-bindings: usb: add common Type-C USB Switch schema
@ 2024-01-15 9:34 99% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-01-15 9:34 UTC (permalink / raw)
To: Krzysztof Kozlowski, Greg Kroah-Hartman, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson,
Konrad Dybcio, Neil Armstrong, linux-usb, devicetree,
linux-kernel, linux-arm-msm
On Mon Jan 15, 2024 at 10:29 AM CET, Krzysztof Kozlowski wrote:
> Several bindings implement parts of Type-C USB orientation and mode
> switching, and retiming. Keep definition of such properties in one
> place, new usb-switch schema, to avoid duplicate defines.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
> .../devicetree/bindings/usb/fcs,fsa4480.yaml | 12 ++--
> .../devicetree/bindings/usb/gpio-sbu-mux.yaml | 12 ++--
> .../devicetree/bindings/usb/nxp,ptn36502.yaml | 12 ++--
> .../bindings/usb/onnn,nb7vpq904m.yaml | 13 ++--
> .../bindings/usb/qcom,wcd939x-usbss.yaml | 12 ++--
> .../devicetree/bindings/usb/usb-switch.yaml | 68 +++++++++++++++++++
> 6 files changed, 93 insertions(+), 36 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/usb/usb-switch.yaml
>
> diff --git a/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml b/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml
> index f9410eb76a62..8b25b9a01ced 100644
> --- a/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml
> +++ b/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml
> @@ -27,13 +27,8 @@ properties:
> vcc-supply:
> description: power supply (2.7V-5.5V)
>
> - mode-switch:
> - description: Flag the port as possible handle of altmode switching
> - type: boolean
> -
> - orientation-switch:
> - description: Flag the port as possible handler of orientation switching
> - type: boolean
> + mode-switch: true
> + orientation-switch: true
>
> port:
> $ref: /schemas/graph.yaml#/$defs/port-base
> @@ -79,6 +74,9 @@ required:
> - reg
> - port
>
> +allOf:
> + - $ref: usb-switch.yaml#
> +
> additionalProperties: false
>
> examples:
> diff --git a/Documentation/devicetree/bindings/usb/gpio-sbu-mux.yaml b/Documentation/devicetree/bindings/usb/gpio-sbu-mux.yaml
> index d3b2b666ec2a..88e1607cf053 100644
> --- a/Documentation/devicetree/bindings/usb/gpio-sbu-mux.yaml
> +++ b/Documentation/devicetree/bindings/usb/gpio-sbu-mux.yaml
> @@ -33,13 +33,8 @@ properties:
> vcc-supply:
> description: power supply
>
> - mode-switch:
> - description: Flag the port as possible handle of altmode switching
> - type: boolean
> -
> - orientation-switch:
> - description: Flag the port as possible handler of orientation switching
> - type: boolean
> + mode-switch: true
> + orientation-switch: true
>
> port:
> $ref: /schemas/graph.yaml#/properties/port
> @@ -54,6 +49,9 @@ required:
> - orientation-switch
> - port
>
> +allOf:
> + - $ref: usb-switch.yaml#
> +
> additionalProperties: false
>
> examples:
> diff --git a/Documentation/devicetree/bindings/usb/nxp,ptn36502.yaml b/Documentation/devicetree/bindings/usb/nxp,ptn36502.yaml
> index eee548ac1abe..d805dde80796 100644
> --- a/Documentation/devicetree/bindings/usb/nxp,ptn36502.yaml
> +++ b/Documentation/devicetree/bindings/usb/nxp,ptn36502.yaml
> @@ -20,13 +20,8 @@ properties:
> vdd18-supply:
> description: Power supply for VDD18 pin
>
> - retimer-switch:
> - description: Flag the port as possible handle of SuperSpeed signals retiming
> - type: boolean
> -
> - orientation-switch:
> - description: Flag the port as possible handler of orientation switching
> - type: boolean
> + orientation-switch: true
> + retimer-switch: true
>
> ports:
> $ref: /schemas/graph.yaml#/properties/ports
> @@ -49,6 +44,9 @@ required:
> - compatible
> - reg
>
> +allOf:
> + - $ref: usb-switch.yaml#
> +
> additionalProperties: false
>
> examples:
> diff --git a/Documentation/devicetree/bindings/usb/onnn,nb7vpq904m.yaml b/Documentation/devicetree/bindings/usb/onnn,nb7vpq904m.yaml
> index c0201da002f6..589914d22bf2 100644
> --- a/Documentation/devicetree/bindings/usb/onnn,nb7vpq904m.yaml
> +++ b/Documentation/devicetree/bindings/usb/onnn,nb7vpq904m.yaml
> @@ -21,14 +21,8 @@ properties:
> description: power supply (1.8V)
>
> enable-gpios: true
> -
> - retimer-switch:
> - description: Flag the port as possible handle of SuperSpeed signals retiming
> - type: boolean
> -
> - orientation-switch:
> - description: Flag the port as possible handler of orientation switching
> - type: boolean
> + orientation-switch: true
> + retimer-switch: true
>
> ports:
> $ref: /schemas/graph.yaml#/properties/ports
> @@ -95,6 +89,9 @@ required:
> - compatible
> - reg
>
> +allOf:
> + - $ref: usb-switch.yaml#
> +
> additionalProperties: false
>
> examples:
> diff --git a/Documentation/devicetree/bindings/usb/qcom,wcd939x-usbss.yaml b/Documentation/devicetree/bindings/usb/qcom,wcd939x-usbss.yaml
> index 7ddfd3313a18..96346723f3e9 100644
> --- a/Documentation/devicetree/bindings/usb/qcom,wcd939x-usbss.yaml
> +++ b/Documentation/devicetree/bindings/usb/qcom,wcd939x-usbss.yaml
> @@ -35,13 +35,8 @@ properties:
> vdd-supply:
> description: USBSS VDD power supply
>
> - mode-switch:
> - description: Flag the port as possible handle of altmode switching
> - type: boolean
> -
> - orientation-switch:
> - description: Flag the port as possible handler of orientation switching
> - type: boolean
> + mode-switch: true
> + orientation-switch: true
>
> ports:
> $ref: /schemas/graph.yaml#/properties/ports
> @@ -63,6 +58,9 @@ required:
> - reg
> - ports
>
> +allOf:
> + - $ref: usb-switch.yaml#
> +
> additionalProperties: false
>
> examples:
> diff --git a/Documentation/devicetree/bindings/usb/usb-switch.yaml b/Documentation/devicetree/bindings/usb/usb-switch.yaml
> new file mode 100644
> index 000000000000..0d0b60234d1f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/usb-switch.yaml
> @@ -0,0 +1,68 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/usb/usb-switch.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: USB Orientation and Mode Switches Common Properties
> +
> +maintainers:
> + - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
> +
> +description:
> + Common properties for devices handling USB mode and orientation switching.
> +
> +properties:
> + mode-switch:
> + description: Possible handle of altmode switching
handle -> handler
> + type: boolean
> +
> + orientation-switch:
> + description: Possible handler of orientation switching
> + type: boolean
> +
> + retimer-switch:
> + description: Possible handle of SuperSpeed signals retiming
handle -> handler
> + type: boolean
> +
> + port:
> + $ref: /schemas/graph.yaml#/properties/port
> + description:
> + A port node to link the device to a TypeC controller for the purpose of
> + handling altmode muxing and orientation switching.
> +
> + ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> + properties:
> + port@0:
> + $ref: /schemas/graph.yaml#/properties/port
> + description:
> + Super Speed (SS) Output endpoint to the Type-C connector
> +
> + port@1:
> + $ref: /schemas/graph.yaml#/$defs/port-base
> + description:
> + Super Speed (SS) Input endpoint from the Super-Speed PHY
> + unevaluatedProperties: false
> +
> + properties:
> + endpoint:
> + $ref: /schemas/graph.yaml#/$defs/endpoint-base
> + # additionalProperties: true
Don't think this should still be here?
The rest looks sane to the extent I know dt bindings.
Regards
Luca
> + unevaluatedProperties: false
> + properties:
> + data-lanes:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + minItems: 1
> + maxItems: 8
> + uniqueItems: true
> + items:
> + maximum: 8
> +
> +oneOf:
> + - required:
> + - port
> + - required:
> + - ports
> +
> +additionalProperties: true
^ permalink raw reply [relevance 99%]
* Re: [PATCH v2 2/4] drm/panel: Add driver for DJN HX83112A LCD panel
@ 2024-01-12 9:51 95% ` Luca Weiss
0 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-01-12 9:51 UTC (permalink / raw)
To: neil.armstrong, Linus Walleij
Cc: Jessica Zhang, Sam Ravnborg, David Airlie, Daniel Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson,
Konrad Dybcio, Andy Gross, devicetree, linux-arm-msm,
linux-kernel, dri-devel, ~postmarketos/upstreaming, phone-devel
On Fri Jan 12, 2024 at 10:14 AM CET, Neil Armstrong wrote:
> On 12/01/2024 10:00, Luca Weiss wrote:
> > On Thu Jan 11, 2024 at 8:05 PM CET, Linus Walleij wrote:
> >> On Thu, Jan 11, 2024 at 4:28 PM Luca Weiss <luca.weiss@fairphone.com> wrote:
> >>
> >>> In some internal documentation it says "LCD Driver IC" "HX83112A" and I
> >>> don't see any reference to Truly 5P65 anywhere.
> >>
> >> In the Android directory I pointed to I see this file:
> >> HX83112_Android_Driver/Truly_5p65_module_fw/UpdateFW.bat
> >>
> >> (Notice the 5p65 fw dir is *inside* the HX82112 dir)
> >>
> >> And in that file:
> >> adb push TRULY_5P65_1080_2160_HX83112A_D01C01.bin
> >> /system/etc/firmware/Himax_firmware.bin
> >>
> >> Clearly indicating that they are pushing a Truly 5P65 firmware into
> >> the Himax display firmware directory.
> >>
> >> To be fair, that is the driver for the touchscreen part of HX83112A,
> >> but ... Truly is a well known manufacturer of display controllers?
> >>
> >> But... given that you have a @fairphone.com mal address and
> >> a working relationship with them, can't you just ask?
> >>
> >>> On their website they have this sentence:
> >>
> >> All OEMs want to look like everything is their own product. It is
> >> business as usual.
> >
> > I can't tell you anything there that I don't know, sorry.
> >
> >>
> >> Further on the same note since I guess you have a datasheet)
> >> please bring in #defines for the commands (the first byte in the
> >> write sequences, for examples:
> >>
> >> + mipi_dsi_dcs_write_seq(dsi, 0xbd, 0x02);
> >> + mipi_dsi_dcs_write_seq(dsi, 0xd8,
> >> + 0xaa, 0xff, 0xff, 0xff, 0xff, 0xff, 0xaa, 0xff,
> >> + 0xff, 0xff, 0xff, 0xff);
> >> + mipi_dsi_dcs_write_seq(dsi, 0xbd, 0x03);
> >>
> >> Clearly 0xbd is HX83112_CMD_SETREGBANK?
> >> (This is easily spotted from the similar structure in the
> >> existing panel-himax-hx8394.c.) So please add #defines
> >> for all commands you know, especially if you have a datasheet
> >> because we reviewers don't have them and "it's just magic
> >> bytes" isn't very compelling. It adds a lot to understanding.
> >
> > Right, the register names seem to match more or less the ones from that
> > driver, plus some new ones and some differently named ones. Will send a
> > v3 with that.
> >
> >>
> >> I strongly suspect other Himax displays such as HX8394 to
> >> be using a Truly controller as well, hence the similarities.
> >>
> >> In a datasheet for their TFT800480-84-V1-E display controller
> >> Truly kept the init sequence name of void LCD_INIT_HX8290(void)
> >> for example.
> >
> > In that datasheet (assuming I'm looking at the same one?) it says
> > "Driver IC" "HX8290-A[...]" so there the display driver is manufactured
> > by Himax and not Truly to my understanding. Truly is assembling together
> > Driver + all the other parts that go into an LCD.
> >
> > For the panel used on Fairphone 4 that part is done by the company DJN.
>
> Looking at the discussion, this seems to confirm the Display+Touch IC is HX83112A,
> and Truly is the panel manufacturer and all assembled by DJN, so IMHO the initial driver is right.
>
> Perhaps the compatible should be djn,hx83112a-truly-5p65 to reflect that ?
Since there's zero indication Truly is involved in this panel in my
documentation - much less the number 5P65 - I'm not going to add that.
One other number I'm certain of is from DJN's side the model number of
this panel is 9A-3R063-1102B, which I assume is the specific combination
of components + frame and everything for Fairphone 4 device.
That one you can also find in this document (Ctrl-F for DJN)
https://www.fairphone.com/wp-content/uploads/2022/09/FP4_Information-for-repairers-and-recyclers.pdf
.. or on this picture:
https://guide-images.cdn.ifixit.com/igi/HgTquQPABg1mAMHD.huge
So something like djn,9a-3r063-1102b would also be somewhat valid I
guess?
So in short this panel is the model 9A-3R063-1102B from DJN, which uses
a Himax HX83112A driver IC.
And there's also AU Optronics listed as 玻璃厂家 ("glass manufacturer"?)
fwiw, though the display also uses Corning Gorilla Glass 5 so not sure
who's supplying what.
Regards
Luca
>
> Neil
>
> >
> > Regards
> > Luca
> >
> >>
> >> Yours,
> >> Linus Walleij
> >
^ permalink raw reply [relevance 95%]
* Re: [PATCH v2 2/4] drm/panel: Add driver for DJN HX83112A LCD panel
@ 2024-01-12 9:00 97% ` Luca Weiss
0 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-01-12 9:00 UTC (permalink / raw)
To: Linus Walleij
Cc: Neil Armstrong, Jessica Zhang, Sam Ravnborg, David Airlie,
Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bjorn Andersson, Konrad Dybcio, Andy Gross,
devicetree, linux-arm-msm, linux-kernel, dri-devel,
~postmarketos/upstreaming, phone-devel
On Thu Jan 11, 2024 at 8:05 PM CET, Linus Walleij wrote:
> On Thu, Jan 11, 2024 at 4:28 PM Luca Weiss <luca.weiss@fairphone.com> wrote:
>
> > In some internal documentation it says "LCD Driver IC" "HX83112A" and I
> > don't see any reference to Truly 5P65 anywhere.
>
> In the Android directory I pointed to I see this file:
> HX83112_Android_Driver/Truly_5p65_module_fw/UpdateFW.bat
>
> (Notice the 5p65 fw dir is *inside* the HX82112 dir)
>
> And in that file:
> adb push TRULY_5P65_1080_2160_HX83112A_D01C01.bin
> /system/etc/firmware/Himax_firmware.bin
>
> Clearly indicating that they are pushing a Truly 5P65 firmware into
> the Himax display firmware directory.
>
> To be fair, that is the driver for the touchscreen part of HX83112A,
> but ... Truly is a well known manufacturer of display controllers?
>
> But... given that you have a @fairphone.com mal address and
> a working relationship with them, can't you just ask?
>
> > On their website they have this sentence:
>
> All OEMs want to look like everything is their own product. It is
> business as usual.
I can't tell you anything there that I don't know, sorry.
>
> Further on the same note since I guess you have a datasheet)
> please bring in #defines for the commands (the first byte in the
> write sequences, for examples:
>
> + mipi_dsi_dcs_write_seq(dsi, 0xbd, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0xd8,
> + 0xaa, 0xff, 0xff, 0xff, 0xff, 0xff, 0xaa, 0xff,
> + 0xff, 0xff, 0xff, 0xff);
> + mipi_dsi_dcs_write_seq(dsi, 0xbd, 0x03);
>
> Clearly 0xbd is HX83112_CMD_SETREGBANK?
> (This is easily spotted from the similar structure in the
> existing panel-himax-hx8394.c.) So please add #defines
> for all commands you know, especially if you have a datasheet
> because we reviewers don't have them and "it's just magic
> bytes" isn't very compelling. It adds a lot to understanding.
Right, the register names seem to match more or less the ones from that
driver, plus some new ones and some differently named ones. Will send a
v3 with that.
>
> I strongly suspect other Himax displays such as HX8394 to
> be using a Truly controller as well, hence the similarities.
>
> In a datasheet for their TFT800480-84-V1-E display controller
> Truly kept the init sequence name of void LCD_INIT_HX8290(void)
> for example.
In that datasheet (assuming I'm looking at the same one?) it says
"Driver IC" "HX8290-A[...]" so there the display driver is manufactured
by Himax and not Truly to my understanding. Truly is assembling together
Driver + all the other parts that go into an LCD.
For the panel used on Fairphone 4 that part is done by the company DJN.
Regards
Luca
>
> Yours,
> Linus Walleij
^ permalink raw reply [relevance 97%]
* Re: [PATCH v2 2/4] drm/panel: Add driver for DJN HX83112A LCD panel
@ 2024-01-11 15:28 97% ` Luca Weiss
0 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-01-11 15:28 UTC (permalink / raw)
To: Linus Walleij
Cc: Neil Armstrong, Jessica Zhang, Sam Ravnborg, David Airlie,
Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bjorn Andersson, Konrad Dybcio, Andy Gross,
devicetree, linux-arm-msm, linux-kernel, dri-devel,
~postmarketos/upstreaming, phone-devel
On Thu Jan 11, 2024 at 3:57 PM CET, Linus Walleij wrote:
> On Wed, Jan 10, 2024 at 4:14 PM Luca Weiss <luca.weiss@fairphone.com> wrote:
>
> > Add support for the 2340x1080 LCD DJN panel bundled with a HX83112A
> > driver IC, as found on the Fairphone 4 smartphone.
> >
> > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
>
> This makes it sound like the Himax HX83112A is the driver IC.
>
> This does not seem to be the case:
> https://github.com/HimaxSoftware/HX83112_Android_Driver
>
> The driver IC seems to be a truly 5p65.
Hi Linus,
In some internal documentation it says "LCD Driver IC" "HX83112A" and I
don't see any reference to Truly 5P65 anywhere.
On their website they have this sentence:
Himax offers display drivers for mobile handset displays that combine
source driver, gate driver, timing controller, frame buffer, and DC to
DC circuits into a single chip in various display technologies, such
as TFT-LCD, LTPS, In-Cell Touch and AMOLED.
https://www.himax.com.tw/products/display-drivers/mobile-handset-applications/
While I'm not super well versed in panel driver ICs, this sounds like it
should be the one to take the name from?
Regards
Luca
>
> If this is right, could you rename the driver file to truly-5p65.c
> and all symbols containing hx83112 to truly_5965 or something
> that indicate the driver IC instead of the panel?
>
> My main concern is that the next display using the same IC
> need to find the right file to patch.
>
> Yours,
> Linus Walleij
^ permalink raw reply [relevance 97%]
* [PATCH] drm/bridge: Select DRM_KMS_HELPER for DRM_PANEL_BRIDGE
@ 2024-01-11 12:38 93% Luca Weiss
0 siblings, 2 replies; 200+ results
From: Luca Weiss @ 2024-01-11 12:38 UTC (permalink / raw)
To: Andrzej Hajda, Neil Armstrong, Robert Foss, Laurent Pinchart,
Jonas Karlman, Jernej Skrabec, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, David Airlie, Daniel Vetter
Cc: ~postmarketos/upstreaming, phone-devel, dri-devel, linux-kernel,
Luca Weiss
Since the kconfig symbol of DRM_PANEL_BRIDGE is only adding
bridge/panel.o to drm_kms_helper object, we need to select
DRM_KMS_HELPER to make sure the file is actually getting built.
Otherwise with certain defconfigs e.g. devm_drm_of_get_bridge will not
be properly available:
aarch64-linux-gnu-ld: drivers/phy/qualcomm/phy-qcom-qmp-combo.o: in function `qmp_combo_bridge_attach':
drivers/phy/qualcomm/phy-qcom-qmp-combo.c:3204:(.text+0x8f4): undefined reference to `devm_drm_of_get_bridge'
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
I can see "depends on DRM_KMS_HELPER" was removed with commit
3c3384050d68 ("drm: Don't make DRM_PANEL_BRIDGE dependent on DRM_KMS_HELPERS")
I'm not too familiar with Kconfig but it feels more correct if
PHY_QCOM_QMP_COMBO selects DRM_PANEL_BRIDGE that that's enough; and it
doesn't also has to explicitly select DRM_KMS_HELPER because of how the
objects are built in the Makefile.
Alternatively solution to this patch could be adjusting this line in
include/drm/drm_bridge.h:
-#if defined(CONFIG_OF) && defined(CONFIG_DRM_PANEL_BRIDGE)
+#if defined(CONFIG_OF) && defined(CONFIG_DRM_PANEL_BRIDGE) && defined(CONFIG_DRM_KMS_HELPER)
struct drm_bridge *devm_drm_of_get_bridge(struct device *dev, struct device_node *node,
u32 port, u32 endpoint);
.. and then selecting DRM_KMS_HELPER for PHY_QCOM_QMP_COMBO.
But I think the solution in this patch is better. Let me know what you
think.
---
drivers/gpu/drm/bridge/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
index ac9ec5073619..ae782b427829 100644
--- a/drivers/gpu/drm/bridge/Kconfig
+++ b/drivers/gpu/drm/bridge/Kconfig
@@ -8,6 +8,7 @@ config DRM_BRIDGE
config DRM_PANEL_BRIDGE
def_bool y
depends on DRM_BRIDGE
+ select DRM_KMS_HELPER
select DRM_PANEL
help
DRM bridge wrapper of DRM panels
---
base-commit: b9c3a1fa6fb324e691a03cf124b79f4842e65d76
change-id: 20240111-drm-panel-bridge-fixup-5c2977fb969f
Best regards,
--
Luca Weiss <luca.weiss@fairphone.com>
^ permalink raw reply related [relevance 93%]
* Re: [PATCH 2/2] arm64: dts: qcom: sm7225-fairphone-fp4: Add PM6150L thermals
@ 2024-01-11 8:55 97% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-01-11 8:55 UTC (permalink / raw)
To: Konrad Dybcio, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel, AngeloGioacchino Del Regno
On Wed Jan 10, 2024 at 8:16 PM CET, Konrad Dybcio wrote:
>
>
> On 1/9/24 12:24, Luca Weiss wrote:
> > On Tue Jan 9, 2024 at 11:09 AM CET, Konrad Dybcio wrote:
> >>
> >>
> >> On 1/5/24 15:54, Luca Weiss wrote:
> >>> Configure the thermals for the PA_THERM1, MSM_THERM, PA_THERM0,
> >>> RFC_CAM_THERM, CAM_FLASH_THERM and QUIET_THERM thermistors connected to
> >>> PM6150L.
> >>>
> >>> Due to hardware constraints we can only register 4 zones with
> >>> pm6150l_adc_tm, the other 2 we can register via generic-adc-thermal.
> >>
> >> Ugh.. so the ADC can support more inputs than the ADC_TM that was
> >> designed to ship alongside it can?
> >>
> >> And that's why the "generic-adc-thermal"-provided zones need to
> >> be polled?
> >
> > This part of the code from qcom-spmi-adc-tm5.c was trigerring if I
> > define more than 4 channels, and looking at downstream I can also see
> > that only 4 zones are registered properly with adc_tm, the rest is
> > registered with "qcom,adc-tm5-iio" which skips from what I could tell
> > basically all the HW bits and only registering the thermal zone.
> >
> >
> > ret = adc_tm5_read(chip, ADC_TM5_NUM_BTM,
> > &channels_available, sizeof(channels_available));
> > if (ret) {
> > dev_err(chip->dev, "read failed for BTM channels\n");
> > return ret;
> > }
> >
> > for (i = 0; i < chip->nchannels; i++) {
> > if (chip->channels[i].channel >= channels_available) {
> > dev_err(chip->dev, "Invalid channel %d\n", chip->channels[i].channel);
> > return -EINVAL;
> > }
> > }
> >
> >
> >>
> >>>
> >>> The trip points can really only be considered as placeholders, more
> >>> configuration with cooling etc. can be added later.
> >>>
> >>> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
> >>> ---
> >> [...]
> >>
> >> I've read the sentence above, but..
> >>> + sdm-skin-thermal {
> >>> + polling-delay-passive = <1000>;
> >>> + polling-delay = <5000>;
> >>> + thermal-sensors = <&msm_therm_sensor>;
> >>> +
> >>> + trips {
> >>> + active-config0 {
> >>> + temperature = <125000>;
> >>> + hysteresis = <1000>;
> >>> + type = "passive";
> >>
> >> I don't fancy burnt fingers for dinner!
> >
> > With passive trip point it wouldn't even do anything now, but at what
> > temp do you think it should do what? I'd definitely need more time to
> > understand more of how the thermal setup works in downstream Android,
> > and then replicate a sane configuration for mainline with proper
> > temperatures, cooling, etc.
> If "skin therm" means "the temperature of some part of the phone's
> body that can be felt with a human hand", then definitely some
> throttling should happen at 40ish with heavy throttling at 50
> and crit at 55 or so..
>
> We should probably make this a broader topic and keep a single
> policy for all supported phones.
I agree that this shouldn't be implemented differently per device since
it's really more a question "what should Linux do" that's quite a
general question and not device-specific. Of course some device-specific
tweaks could be here and there, like if the phone has metal back or
plastic back but it's only minor.
Based on the config here
https://gerrit-public.fairphone.software/plugins/gitiles/platform/hardware/qcom/thermal/+/refs/heads/odm/dev/target/13/fp5/thermalConfig.cpp#946
it looks like throtteling starts for internal components at 95degC with
a shutdown threshold of 115degC.
The skin sensor here has a throttling threshold of 40degC and shutdown
threshold of 95degC.
But actually I'm not even sure this config gets active for QCM6490 with
socid=497. So yeah I need more time digging into the thermal code to see
what it's actually doing.. Not that it would/should be much different
for socid=497 I guess though.
There's also plenty of thermal code in qcom proprietary.
Regards
Luca
>
> + CC AGdR, may be interested in where this leads
>
> Konrad
^ permalink raw reply [relevance 97%]
* Re: [PATCH RESEND v3] arm64: dts: qcom: qcs6490-idp: Add definition for three LEDs.
@ 2024-01-11 8:47 99% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-01-11 8:47 UTC (permalink / raw)
To: quic_huliu, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel
On Thu Jan 11, 2024 at 3:52 AM CET, Hui Liu via B4 Relay wrote:
> From: Hui Liu <quic_huliu@quicinc.com>
>
> Add definition for three LEDs to make sure they can
> be enabled base on QCOM LPG LED driver.
>
> Signed-off-by: Hui Liu <quic_huliu@quicinc.com>
> ---
> Changes in v3:
> - Rephrased commit text and updated the nodes to qcm6490-idp board file.
> - Link to v2: https://lore.kernel.org/all/20231110-qcom_leds-v2-1-3cad1fbbc65a@quicinc.com/
>
> Changes in v2:
> - Rephrased commit text and updated the nodes to board file.
> - Link to v1: https://lore.kernel.org/r/20231108-qcom_leds-v1-1-c3e1c8572cb0@quicinc.com
> ---
> arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 25 +++++++++++++++++++++++++
> 1 file changed, 25 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
> index 37c91fdf3ab9..f801144a1556 100644
> --- a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
> +++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
> @@ -5,6 +5,7 @@
>
> /dts-v1/;
>
> +#include <dt-bindings/leds/common.h>
> #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
> #include "sc7280.dtsi"
> #include "pm7325.dtsi"
> @@ -414,6 +415,30 @@ vreg_bob_3p296: bob {
> };
> };
>
> +&pm8350c_pwm {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
> + led@1 {
> + reg = <1>;
Hi Hui Liu,
> + color = <LED_COLOR_ID_RED>;
> + label = "red";
Please remove the deprecated "label" property. Since you already have
"color" set you only need to add "function". On phones for the
notification LED we usually use "function = LED_FUNCTION_STATUS;"
Also depends on what your hardware looks like, if it's 3 separate LEDs
then with label replaced it would be okay.
If the 3 LEDs are in one spot (so you can mix the colors with it), then
please make it a RGB multi-led like e.g. in sm8550-qrd.dts.
Regards
Luca
> + };
> +
> + led@2 {
> + reg = <2>;
> + color = <LED_COLOR_ID_GREEN>;
> + label = "green";
> + };
> +
> + led@3 {
> + reg = <3>;
> + color = <LED_COLOR_ID_BLUE>;
> + label = "blue";
> + };
> +};
> +
> &qupv3_id_0 {
> status = "okay";
> };
>
> ---
> base-commit: 17cb8a20bde66a520a2ca7aad1063e1ce7382240
> change-id: 20231215-lpg-4aadd374811a
>
> Best regards,
^ permalink raw reply [relevance 99%]
* [PATCH] arm64: dts: qcom: sm7225-fairphone-fp4: Switch firmware ext to .mbn
@ 2024-01-10 15:21 96% Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-01-10 15:21 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel, Luca Weiss
Specify the file name for the squashed/non-split firmware with the .mbn
extension instead of the split .mdt. The kernel can load both but the
squashed version is preferred in dts nowadays.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts
index ade619805519..9ed349ec076a 100644
--- a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts
+++ b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts
@@ -116,7 +116,7 @@ active-config0 {
};
&adsp {
- firmware-name = "qcom/sm7225/fairphone4/adsp.mdt";
+ firmware-name = "qcom/sm7225/fairphone4/adsp.mbn";
status = "okay";
};
@@ -361,7 +361,7 @@ &cci1_i2c0 {
};
&cdsp {
- firmware-name = "qcom/sm7225/fairphone4/cdsp.mdt";
+ firmware-name = "qcom/sm7225/fairphone4/cdsp.mbn";
status = "okay";
};
@@ -400,12 +400,12 @@ &i2c10 {
&ipa {
qcom,gsi-loader = "self";
memory-region = <&pil_ipa_fw_mem>;
- firmware-name = "qcom/sm7225/fairphone4/ipa_fws.mdt";
+ firmware-name = "qcom/sm7225/fairphone4/ipa_fws.mbn";
status = "okay";
};
&mpss {
- firmware-name = "qcom/sm7225/fairphone4/modem.mdt";
+ firmware-name = "qcom/sm7225/fairphone4/modem.mbn";
status = "okay";
};
---
base-commit: 0dd3ee31125508cd67f7e7172247f05b7fd1753a
change-id: 20240110-fp4-mbn-74b1a7547342
Best regards,
--
Luca Weiss <luca.weiss@fairphone.com>
^ permalink raw reply related [relevance 96%]
* [PATCH v2 3/4] arm64: dts: qcom: sm6350: Remove "disabled" state of GMU
2024-01-10 15:14 94% [PATCH v2 0/4] Add display support for Fairphone 4 Luca Weiss
2024-01-10 15:14 92% ` [PATCH v2 1/4] dt-bindings: display: panel: Add Himax HX83112A Luca Weiss
2024-01-10 15:14 66% ` [PATCH v2 2/4] drm/panel: Add driver for DJN HX83112A LCD panel Luca Weiss
@ 2024-01-10 15:14 98% ` Luca Weiss
2024-01-10 15:14 91% ` [PATCH v2 4/4] arm64: dts: qcom: sm7225-fairphone-fp4: Enable display and GPU Luca Weiss
3 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-01-10 15:14 UTC (permalink / raw)
To: Neil Armstrong, Jessica Zhang, Sam Ravnborg, David Airlie,
Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bjorn Andersson, Konrad Dybcio, Andy Gross
Cc: ~postmarketos/upstreaming, phone-devel, dri-devel, devicetree,
linux-kernel, linux-arm-msm, Luca Weiss
The GMU won't probe without GPU being enabled, so we can remove the
disabled status so we don't have to explicitly enable the GMU in all the
devices that enable GPU.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
arch/arm64/boot/dts/qcom/sm6350.dtsi | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 8fd6f4d03490..29008e155d62 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -1449,8 +1449,6 @@ gmu: gmu@3d6a000 {
operating-points-v2 = <&gmu_opp_table>;
- status = "disabled";
-
gmu_opp_table: opp-table {
compatible = "operating-points-v2";
--
2.43.0
^ permalink raw reply related [relevance 98%]
* [PATCH v2 4/4] arm64: dts: qcom: sm7225-fairphone-fp4: Enable display and GPU
2024-01-10 15:14 94% [PATCH v2 0/4] Add display support for Fairphone 4 Luca Weiss
` (2 preceding siblings ...)
2024-01-10 15:14 98% ` [PATCH v2 3/4] arm64: dts: qcom: sm6350: Remove "disabled" state of GMU Luca Weiss
@ 2024-01-10 15:14 91% ` Luca Weiss
3 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-01-10 15:14 UTC (permalink / raw)
To: Neil Armstrong, Jessica Zhang, Sam Ravnborg, David Airlie,
Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bjorn Andersson, Konrad Dybcio, Andy Gross
Cc: ~postmarketos/upstreaming, phone-devel, dri-devel, devicetree,
linux-kernel, linux-arm-msm, Luca Weiss
Add the description for the display panel found on this phone.
Unfortunately the LCDB module on PM6150L isn't yet supported upstream so
we need to use a dummy regulator-fixed in the meantime.
And with this done we can also enable the GPU and set the zap shader
firmware path.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
arch/arm64/boot/dts/qcom/sm6350.dtsi | 2 +-
arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts | 53 +++++++++++++++++++++++
2 files changed, 54 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 29008e155d62..b9f4b6be7da9 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -1338,7 +1338,7 @@ gpu: gpu@3d00000 {
status = "disabled";
- zap-shader {
+ gpu_zap_shader: zap-shader {
memory-region = <&pil_gpu_mem>;
};
diff --git a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts
index ade619805519..9a7d0448fb68 100644
--- a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts
+++ b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts
@@ -68,6 +68,14 @@ key-volume-up {
};
};
+ /* Dummy regulator until PM6150L has LCDB VSP/VSN support */
+ lcdb_dummy: regulator-lcdb-dummy {
+ compatible = "regulator-fixed";
+ regulator-name = "lcdb_dummy";
+ regulator-min-microvolt = <5500000>;
+ regulator-max-microvolt = <5500000>;
+ };
+
reserved-memory {
/*
* The rmtfs memory region in downstream is 'dynamically allocated'
@@ -373,6 +381,14 @@ &gpi_dma1 {
status = "okay";
};
+&gpu {
+ status = "okay";
+};
+
+&gpu_zap_shader {
+ firmware-name = "qcom/sm7225/fairphone4/a615_zap.mbn";
+};
+
&i2c0 {
clock-frequency = <400000>;
status = "okay";
@@ -404,6 +420,43 @@ &ipa {
status = "okay";
};
+&mdss {
+ status = "okay";
+};
+
+&mdss_dsi0 {
+ vdda-supply = <&vreg_l22a>;
+ status = "okay";
+
+ panel@0 {
+ compatible = "fairphone,fp4-hx83112a-djn", "himax,hx83112a";
+ reg = <0>;
+
+ backlight = <&pm6150l_wled>;
+ reset-gpios = <&pm6150l_gpios 9 GPIO_ACTIVE_LOW>;
+
+ vdd1-supply = <&vreg_l1e>;
+ vsn-supply = <&lcdb_dummy>;
+ vsp-supply = <&lcdb_dummy>;
+
+ port {
+ panel_in: endpoint {
+ remote-endpoint = <&mdss_dsi0_out>;
+ };
+ };
+ };
+};
+
+&mdss_dsi0_out {
+ data-lanes = <0 1 2 3>;
+ remote-endpoint = <&panel_in>;
+};
+
+&mdss_dsi0_phy {
+ vdds-supply = <&vreg_l18a>;
+ status = "okay";
+};
+
&mpss {
firmware-name = "qcom/sm7225/fairphone4/modem.mdt";
status = "okay";
--
2.43.0
^ permalink raw reply related [relevance 91%]
* [PATCH v2 2/4] drm/panel: Add driver for DJN HX83112A LCD panel
2024-01-10 15:14 94% [PATCH v2 0/4] Add display support for Fairphone 4 Luca Weiss
2024-01-10 15:14 92% ` [PATCH v2 1/4] dt-bindings: display: panel: Add Himax HX83112A Luca Weiss
@ 2024-01-10 15:14 66% ` Luca Weiss
2024-01-10 15:14 98% ` [PATCH v2 3/4] arm64: dts: qcom: sm6350: Remove "disabled" state of GMU Luca Weiss
2024-01-10 15:14 91% ` [PATCH v2 4/4] arm64: dts: qcom: sm7225-fairphone-fp4: Enable display and GPU Luca Weiss
3 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-01-10 15:14 UTC (permalink / raw)
To: Neil Armstrong, Jessica Zhang, Sam Ravnborg, David Airlie,
Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bjorn Andersson, Konrad Dybcio, Andy Gross
Cc: ~postmarketos/upstreaming, phone-devel, dri-devel, devicetree,
linux-kernel, linux-arm-msm, Luca Weiss
Add support for the 2340x1080 LCD DJN panel bundled with a HX83112A
driver IC, as found on the Fairphone 4 smartphone.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
drivers/gpu/drm/panel/Kconfig | 10 +
drivers/gpu/drm/panel/Makefile | 1 +
drivers/gpu/drm/panel/panel-himax-hx83112a.c | 352 +++++++++++++++++++++++++++
3 files changed, 363 insertions(+)
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 99e14dc212ec..3379b13df4b8 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -162,6 +162,16 @@ config DRM_PANEL_FEIYANG_FY07024DI26A30D
Say Y if you want to enable support for panels based on the
Feiyang FY07024DI26A30-D MIPI-DSI interface.
+config DRM_PANEL_HIMAX_HX83112A
+ tristate "Himax HX83112A-based DSI panel"
+ depends on OF
+ depends on DRM_MIPI_DSI
+ depends on BACKLIGHT_CLASS_DEVICE
+ select DRM_KMS_HELPER
+ help
+ Say Y here if you want to enable support for Himax HX83112A-based
+ display panels, such as the one found in the Fairphone 4 smartphone.
+
config DRM_PANEL_HIMAX_HX8394
tristate "HIMAX HX8394 MIPI-DSI LCD panels"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index d10c3de51c6d..c2fc4c8c8340 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_DRM_PANEL_EBBG_FT8719) += panel-ebbg-ft8719.o
obj-$(CONFIG_DRM_PANEL_ELIDA_KD35T133) += panel-elida-kd35t133.o
obj-$(CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02) += panel-feixin-k101-im2ba02.o
obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) += panel-feiyang-fy07024di26a30d.o
+obj-$(CONFIG_DRM_PANEL_HIMAX_HX83112A) += panel-himax-hx83112a.o
obj-$(CONFIG_DRM_PANEL_HIMAX_HX8394) += panel-himax-hx8394.o
obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9341) += panel-ilitek-ili9341.o
diff --git a/drivers/gpu/drm/panel/panel-himax-hx83112a.c b/drivers/gpu/drm/panel/panel-himax-hx83112a.c
new file mode 100644
index 000000000000..cccc6075fd8e
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-himax-hx83112a.c
@@ -0,0 +1,352 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Generated with linux-mdss-dsi-panel-driver-generator from vendor device tree.
+ * Copyright (c) 2024 Luca Weiss <luca.weiss@fairphone.com>
+ */
+
+#include <linux/delay.h>
+#include <linux/gpio/consumer.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/regulator/consumer.h>
+
+#include <drm/drm_mipi_dsi.h>
+#include <drm/drm_modes.h>
+#include <drm/drm_panel.h>
+#include <drm/drm_probe_helper.h>
+
+struct hx83112a_panel {
+ struct drm_panel panel;
+ struct mipi_dsi_device *dsi;
+ struct regulator_bulk_data supplies[3];
+ struct gpio_desc *reset_gpio;
+};
+
+static inline struct hx83112a_panel *to_hx83112a_panel(struct drm_panel *panel)
+{
+ return container_of(panel, struct hx83112a_panel, panel);
+}
+
+static void hx83112a_reset(struct hx83112a_panel *ctx)
+{
+ gpiod_set_value_cansleep(ctx->reset_gpio, 0);
+ msleep(20);
+ gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+ msleep(20);
+ gpiod_set_value_cansleep(ctx->reset_gpio, 0);
+ msleep(50);
+}
+
+static int hx83112a_on(struct hx83112a_panel *ctx)
+{
+ struct mipi_dsi_device *dsi = ctx->dsi;
+ struct device *dev = &dsi->dev;
+ int ret;
+
+ dsi->mode_flags |= MIPI_DSI_MODE_LPM;
+
+ mipi_dsi_dcs_write_seq(dsi, 0xb9, 0x83, 0x11, 0x2a);
+ mipi_dsi_dcs_write_seq(dsi, 0xb1,
+ 0x08, 0x28, 0x28, 0x83, 0x83, 0x4c, 0x4f, 0x33);
+ mipi_dsi_dcs_write_seq(dsi, 0xb2,
+ 0x00, 0x02, 0x00, 0x90, 0x24, 0x00, 0x08, 0x19,
+ 0xea, 0x11, 0x11, 0x00, 0x11, 0xa3);
+ mipi_dsi_dcs_write_seq(dsi, 0xb4,
+ 0x58, 0x68, 0x58, 0x68, 0x0f, 0xef, 0x0b, 0xc0,
+ 0x0b, 0xc0, 0x0b, 0xc0, 0x00, 0xff, 0x00, 0xff,
+ 0x00, 0x00, 0x14, 0x15, 0x00, 0x29, 0x11, 0x07,
+ 0x12, 0x00, 0x29);
+ mipi_dsi_dcs_write_seq(dsi, 0xbd, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0xb4,
+ 0x00, 0x12, 0x12, 0x11, 0x88, 0x12, 0x12, 0x00,
+ 0x53);
+ mipi_dsi_dcs_write_seq(dsi, 0xbd, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xbd, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0xc1,
+ 0xff, 0xfe, 0xfb, 0xf8, 0xf4, 0xf1, 0xed, 0xe6,
+ 0xe2, 0xde, 0xdb, 0xd6, 0xd3, 0xcf, 0xca, 0xc6,
+ 0xc2, 0xbe, 0xb9, 0xb0, 0xa7, 0x9e, 0x96, 0x8d,
+ 0x84, 0x7c, 0x74, 0x6b, 0x62, 0x5a, 0x51, 0x49,
+ 0x41, 0x39, 0x31, 0x29, 0x21, 0x19, 0x12, 0x0a,
+ 0x06, 0x05, 0x02, 0x01, 0x00, 0x00, 0xc9, 0xb3,
+ 0x08, 0x0e, 0xf2, 0xe1, 0x59, 0xf4, 0x22, 0xad,
+ 0x40);
+ mipi_dsi_dcs_write_seq(dsi, 0xbd, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0xc1,
+ 0xff, 0xfe, 0xfb, 0xf8, 0xf4, 0xf1, 0xed, 0xe6,
+ 0xe2, 0xde, 0xdb, 0xd6, 0xd3, 0xcf, 0xca, 0xc6,
+ 0xc2, 0xbe, 0xb9, 0xb0, 0xa7, 0x9e, 0x96, 0x8d,
+ 0x84, 0x7c, 0x74, 0x6b, 0x62, 0x5a, 0x51, 0x49,
+ 0x41, 0x39, 0x31, 0x29, 0x21, 0x19, 0x12, 0x0a,
+ 0x06, 0x05, 0x02, 0x01, 0x00, 0x00, 0xc9, 0xb3,
+ 0x08, 0x0e, 0xf2, 0xe1, 0x59, 0xf4, 0x22, 0xad,
+ 0x40);
+ mipi_dsi_dcs_write_seq(dsi, 0xbd, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xc1,
+ 0xff, 0xfe, 0xfb, 0xf8, 0xf4, 0xf1, 0xed, 0xe6,
+ 0xe2, 0xde, 0xdb, 0xd6, 0xd3, 0xcf, 0xca, 0xc6,
+ 0xc2, 0xbe, 0xb9, 0xb0, 0xa7, 0x9e, 0x96, 0x8d,
+ 0x84, 0x7c, 0x74, 0x6b, 0x62, 0x5a, 0x51, 0x49,
+ 0x41, 0x39, 0x31, 0x29, 0x21, 0x19, 0x12, 0x0a,
+ 0x06, 0x05, 0x02, 0x01, 0x00, 0x00, 0xc9, 0xb3,
+ 0x08, 0x0e, 0xf2, 0xe1, 0x59, 0xf4, 0x22, 0xad,
+ 0x40);
+ mipi_dsi_dcs_write_seq(dsi, 0xbd, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xc1, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xc7, 0x70, 0x00, 0x04, 0xe0, 0x33, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xcc, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0xd2, 0x2b, 0x2b);
+ mipi_dsi_dcs_write_seq(dsi, 0xd3,
+ 0x80, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x08,
+ 0x08, 0x03, 0x03, 0x22, 0x18, 0x07, 0x07, 0x07,
+ 0x07, 0x32, 0x10, 0x06, 0x00, 0x06, 0x32, 0x10,
+ 0x07, 0x00, 0x07, 0x32, 0x19, 0x31, 0x09, 0x31,
+ 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x08,
+ 0x09, 0x30, 0x00, 0x00, 0x00, 0x06, 0x0d, 0x00,
+ 0x0f);
+ mipi_dsi_dcs_write_seq(dsi, 0xbd, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xd3,
+ 0x00, 0x00, 0x19, 0x10, 0x00, 0x0a, 0x00, 0x81);
+ mipi_dsi_dcs_write_seq(dsi, 0xbd, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xd5,
+ 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+ 0xc0, 0xc0, 0x18, 0x18, 0x19, 0x19, 0x18, 0x18,
+ 0x40, 0x40, 0x18, 0x18, 0x18, 0x18, 0x3f, 0x3f,
+ 0x28, 0x28, 0x24, 0x24, 0x02, 0x03, 0x02, 0x03,
+ 0x00, 0x01, 0x00, 0x01, 0x31, 0x31, 0x31, 0x31,
+ 0x30, 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f);
+ mipi_dsi_dcs_write_seq(dsi, 0xd6,
+ 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+ 0x40, 0x40, 0x18, 0x18, 0x18, 0x18, 0x19, 0x19,
+ 0x40, 0x40, 0x18, 0x18, 0x18, 0x18, 0x3f, 0x3f,
+ 0x24, 0x24, 0x28, 0x28, 0x01, 0x00, 0x01, 0x00,
+ 0x03, 0x02, 0x03, 0x02, 0x31, 0x31, 0x31, 0x31,
+ 0x30, 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f);
+ mipi_dsi_dcs_write_seq(dsi, 0xd8,
+ 0xaa, 0xea, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xea,
+ 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xea, 0xab, 0xaa,
+ 0xaa, 0xaa, 0xaa, 0xea, 0xab, 0xaa, 0xaa, 0xaa);
+ mipi_dsi_dcs_write_seq(dsi, 0xbd, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xd8,
+ 0xaa, 0x2e, 0x28, 0x00, 0x00, 0x00, 0xaa, 0x2e,
+ 0x28, 0x00, 0x00, 0x00, 0xaa, 0xee, 0xaa, 0xaa,
+ 0xaa, 0xaa, 0xaa, 0xee, 0xaa, 0xaa, 0xaa, 0xaa);
+ mipi_dsi_dcs_write_seq(dsi, 0xbd, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0xd8,
+ 0xaa, 0xff, 0xff, 0xff, 0xff, 0xff, 0xaa, 0xff,
+ 0xff, 0xff, 0xff, 0xff);
+ mipi_dsi_dcs_write_seq(dsi, 0xbd, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0xd8,
+ 0xaa, 0xaa, 0xea, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
+ 0xea, 0xaa, 0xaa, 0xaa, 0xaa, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xaa, 0xff, 0xff, 0xff, 0xff, 0xff);
+ mipi_dsi_dcs_write_seq(dsi, 0xbd, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xe7,
+ 0x0e, 0x0e, 0x1e, 0x65, 0x1c, 0x65, 0x00, 0x50,
+ 0x20, 0x20, 0x00, 0x00, 0x02, 0x02, 0x02, 0x05,
+ 0x14, 0x14, 0x32, 0xb9, 0x23, 0xb9, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0xbd, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xe7,
+ 0x02, 0x00, 0xa8, 0x01, 0xa8, 0x0d, 0xa4, 0x0e);
+ mipi_dsi_dcs_write_seq(dsi, 0xbd, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0xe7,
+ 0x00, 0x00, 0x08, 0x00, 0x01, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00,
+ 0x00, 0x00, 0x00, 0x02, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xbd, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xe9, 0xc3);
+ mipi_dsi_dcs_write_seq(dsi, 0xcb, 0xd1, 0xd6);
+ mipi_dsi_dcs_write_seq(dsi, 0xe9, 0x3f);
+ mipi_dsi_dcs_write_seq(dsi, 0xe9, 0xc6);
+ mipi_dsi_dcs_write_seq(dsi, 0xbf, 0x37);
+ mipi_dsi_dcs_write_seq(dsi, 0xe9, 0x3f);
+
+ ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
+ if (ret < 0) {
+ dev_err(dev, "Failed to exit sleep mode: %d\n", ret);
+ return ret;
+ }
+ msleep(150);
+
+ ret = mipi_dsi_dcs_set_display_on(dsi);
+ if (ret < 0) {
+ dev_err(dev, "Failed to set display on: %d\n", ret);
+ return ret;
+ }
+ msleep(50);
+
+ return 0;
+}
+
+static int hx83112a_disable(struct drm_panel *panel)
+{
+ struct hx83112a_panel *ctx = to_hx83112a_panel(panel);
+ struct mipi_dsi_device *dsi = ctx->dsi;
+ struct device *dev = &dsi->dev;
+ int ret;
+
+ dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
+
+ ret = mipi_dsi_dcs_set_display_off(dsi);
+ if (ret < 0) {
+ dev_err(dev, "Failed to set display off: %d\n", ret);
+ return ret;
+ }
+ msleep(20);
+
+ ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
+ if (ret < 0) {
+ dev_err(dev, "Failed to enter sleep mode: %d\n", ret);
+ return ret;
+ }
+ msleep(120);
+
+ return 0;
+}
+
+static int hx83112a_prepare(struct drm_panel *panel)
+{
+ struct hx83112a_panel *ctx = to_hx83112a_panel(panel);
+ struct device *dev = &ctx->dsi->dev;
+ int ret;
+
+ ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
+ if (ret < 0) {
+ dev_err(dev, "Failed to enable regulators: %d\n", ret);
+ return ret;
+ }
+
+ hx83112a_reset(ctx);
+
+ ret = hx83112a_on(ctx);
+ if (ret < 0) {
+ dev_err(dev, "Failed to initialize panel: %d\n", ret);
+ gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+ regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int hx83112a_unprepare(struct drm_panel *panel)
+{
+ struct hx83112a_panel *ctx = to_hx83112a_panel(panel);
+
+ gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+ regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
+
+ return 0;
+}
+
+static const struct drm_display_mode hx83112a_mode = {
+ .clock = (1080 + 28 + 8 + 8) * (2340 + 27 + 5 + 5) * 60 / 1000,
+ .hdisplay = 1080,
+ .hsync_start = 1080 + 28,
+ .hsync_end = 1080 + 28 + 8,
+ .htotal = 1080 + 28 + 8 + 8,
+ .vdisplay = 2340,
+ .vsync_start = 2340 + 27,
+ .vsync_end = 2340 + 27 + 5,
+ .vtotal = 2340 + 27 + 5 + 5,
+ .width_mm = 67,
+ .height_mm = 145,
+ .type = DRM_MODE_TYPE_DRIVER,
+};
+
+static int hx83112a_get_modes(struct drm_panel *panel,
+ struct drm_connector *connector)
+{
+ return drm_connector_helper_get_modes_fixed(connector, &hx83112a_mode);
+}
+
+static const struct drm_panel_funcs hx83112a_panel_funcs = {
+ .prepare = hx83112a_prepare,
+ .unprepare = hx83112a_unprepare,
+ .disable = hx83112a_disable,
+ .get_modes = hx83112a_get_modes,
+};
+
+static int hx83112a_probe(struct mipi_dsi_device *dsi)
+{
+ struct device *dev = &dsi->dev;
+ struct hx83112a_panel *ctx;
+ int ret;
+
+ ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
+ if (!ctx)
+ return -ENOMEM;
+
+ ctx->supplies[0].supply = "vdd1";
+ ctx->supplies[1].supply = "vsn";
+ ctx->supplies[2].supply = "vsp";
+ ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(ctx->supplies),
+ ctx->supplies);
+ if (ret < 0)
+ return dev_err_probe(dev, ret, "Failed to get regulators\n");
+
+ ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
+ if (IS_ERR(ctx->reset_gpio))
+ return dev_err_probe(dev, PTR_ERR(ctx->reset_gpio),
+ "Failed to get reset-gpios\n");
+
+ ctx->dsi = dsi;
+ mipi_dsi_set_drvdata(dsi, ctx);
+
+ dsi->lanes = 4;
+ dsi->format = MIPI_DSI_FMT_RGB888;
+ dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+ MIPI_DSI_MODE_VIDEO_HSE |
+ MIPI_DSI_CLOCK_NON_CONTINUOUS;
+
+ drm_panel_init(&ctx->panel, dev, &hx83112a_panel_funcs,
+ DRM_MODE_CONNECTOR_DSI);
+ ctx->panel.prepare_prev_first = true;
+
+ ret = drm_panel_of_backlight(&ctx->panel);
+ if (ret)
+ return dev_err_probe(dev, ret, "Failed to get backlight\n");
+
+ drm_panel_add(&ctx->panel);
+
+ ret = mipi_dsi_attach(dsi);
+ if (ret < 0) {
+ dev_err_probe(dev, ret, "Failed to attach to DSI host\n");
+ drm_panel_remove(&ctx->panel);
+ return ret;
+ }
+
+ return 0;
+}
+
+static void hx83112a_remove(struct mipi_dsi_device *dsi)
+{
+ struct hx83112a_panel *ctx = mipi_dsi_get_drvdata(dsi);
+ int ret;
+
+ ret = mipi_dsi_detach(dsi);
+ if (ret < 0)
+ dev_err(&dsi->dev, "Failed to detach from DSI host: %d\n", ret);
+
+ drm_panel_remove(&ctx->panel);
+}
+
+static const struct of_device_id hx83112a_of_match[] = {
+ { .compatible = "fairphone,fp4-hx83112a-djn" },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, hx83112a_of_match);
+
+static struct mipi_dsi_driver hx83112a_driver = {
+ .probe = hx83112a_probe,
+ .remove = hx83112a_remove,
+ .driver = {
+ .name = "panel-himax-hx83112a",
+ .of_match_table = hx83112a_of_match,
+ },
+};
+module_mipi_dsi_driver(hx83112a_driver);
+
+MODULE_DESCRIPTION("DRM driver for hx83112a-equipped DSI panels");
+MODULE_LICENSE("GPL");
--
2.43.0
^ permalink raw reply related [relevance 66%]
* [PATCH v2 1/4] dt-bindings: display: panel: Add Himax HX83112A
2024-01-10 15:14 94% [PATCH v2 0/4] Add display support for Fairphone 4 Luca Weiss
@ 2024-01-10 15:14 92% ` Luca Weiss
2024-01-10 15:14 66% ` [PATCH v2 2/4] drm/panel: Add driver for DJN HX83112A LCD panel Luca Weiss
` (2 subsequent siblings)
3 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-01-10 15:14 UTC (permalink / raw)
To: Neil Armstrong, Jessica Zhang, Sam Ravnborg, David Airlie,
Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bjorn Andersson, Konrad Dybcio, Andy Gross
Cc: ~postmarketos/upstreaming, phone-devel, dri-devel, devicetree,
linux-kernel, linux-arm-msm, Luca Weiss, Krzysztof Kozlowski
Himax HX83112A is a display driver IC used to drive LCD DSI panels.
Describe it.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
.../bindings/display/panel/himax,hx83112a.yaml | 75 ++++++++++++++++++++++
1 file changed, 75 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/panel/himax,hx83112a.yaml b/Documentation/devicetree/bindings/display/panel/himax,hx83112a.yaml
new file mode 100644
index 000000000000..22f58f1da9fd
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/himax,hx83112a.yaml
@@ -0,0 +1,75 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/himax,hx83112a.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Himax HX83112A-based DSI display panels
+
+maintainers:
+ - Luca Weiss <luca.weiss@fairphone.com>
+
+description:
+ The Himax HX83112A is a generic DSI Panel IC used to control
+ LCD panels.
+
+allOf:
+ - $ref: panel-common.yaml#
+
+properties:
+ compatible:
+ items:
+ - const: fairphone,fp4-hx83112a-djn
+ - const: himax,hx83112a
+
+ vdd1-supply:
+ description: Digital voltage rail
+
+ vsn-supply:
+ description: Positive source voltage rail
+
+ vsp-supply:
+ description: Negative source voltage rail
+
+ reg: true
+ port: true
+
+required:
+ - compatible
+ - reg
+ - reset-gpios
+ - vdd1-supply
+ - vsn-supply
+ - vsp-supply
+ - port
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+
+ dsi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ panel@0 {
+ compatible = "fairphone,fp4-hx83112a-djn", "himax,hx83112a";
+ reg = <0>;
+
+ backlight = <&pm6150l_wled>;
+ reset-gpios = <&pm6150l_gpios 9 GPIO_ACTIVE_LOW>;
+
+ vdd1-supply = <&vreg_l1e>;
+ vsn-supply = <&pm6150l_lcdb_ncp>;
+ vsp-supply = <&pm6150l_lcdb_ldo>;
+
+ port {
+ panel_in_0: endpoint {
+ remote-endpoint = <&dsi0_out>;
+ };
+ };
+ };
+ };
+
+...
--
2.43.0
^ permalink raw reply related [relevance 92%]
* [PATCH v2 0/4] Add display support for Fairphone 4
@ 2024-01-10 15:14 94% Luca Weiss
2024-01-10 15:14 92% ` [PATCH v2 1/4] dt-bindings: display: panel: Add Himax HX83112A Luca Weiss
` (3 more replies)
0 siblings, 4 replies; 200+ results
From: Luca Weiss @ 2024-01-10 15:14 UTC (permalink / raw)
To: Neil Armstrong, Jessica Zhang, Sam Ravnborg, David Airlie,
Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bjorn Andersson, Konrad Dybcio, Andy Gross
Cc: ~postmarketos/upstreaming, phone-devel, dri-devel, devicetree,
linux-kernel, linux-arm-msm, Luca Weiss, Krzysztof Kozlowski
Introduce the bindings and panel driver for the DJN LCD panel using
HX83112A driver IC.
Then we can add the panel to the device dts and also enable the GPU.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
Changes in v2:
- Driver:
- Drop "bool prepared" from driver (Dmitry)
- Use drm_connector_helper_get_modes_fixed (Dmitry)
- Use dev_err_probe in error path (Dmitry)
- Fix width/height variables (myself)
- Dts:
- Don't drop simple-framebuffer (Konrad)
- Drop disablement of gmu in dtsi (Konrad)
- Set zap shader path (myself)
- Pick up tags
- Link to v1: https://lore.kernel.org/r/20240105-fp4-panel-v1-0-1afbabc55276@fairphone.com
---
Luca Weiss (4):
dt-bindings: display: panel: Add Himax HX83112A
drm/panel: Add driver for DJN HX83112A LCD panel
arm64: dts: qcom: sm6350: Remove "disabled" state of GMU
arm64: dts: qcom: sm7225-fairphone-fp4: Enable display and GPU
.../bindings/display/panel/himax,hx83112a.yaml | 75 +++++
arch/arm64/boot/dts/qcom/sm6350.dtsi | 4 +-
arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts | 53 ++++
drivers/gpu/drm/panel/Kconfig | 10 +
drivers/gpu/drm/panel/Makefile | 1 +
drivers/gpu/drm/panel/panel-himax-hx83112a.c | 352 +++++++++++++++++++++
6 files changed, 492 insertions(+), 3 deletions(-)
---
base-commit: c03393f04b540b66d267a402fcc9ac2d3733b9e3
change-id: 20240105-fp4-panel-50aba8536a0a
Best regards,
--
Luca Weiss <luca.weiss@fairphone.com>
^ permalink raw reply [relevance 94%]
* Re: [PATCH 3/3] arm64: dts: qcom: sm7225-fairphone-fp4: Enable display and GPU
@ 2024-01-10 11:30 99% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-01-10 11:30 UTC (permalink / raw)
To: Maxime Ripard
Cc: Konrad Dybcio, Neil Armstrong, Jessica Zhang, Sam Ravnborg,
David Airlie, Daniel Vetter, Maarten Lankhorst,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bjorn Andersson, ~postmarketos/upstreaming,
phone-devel, dri-devel, devicetree, linux-kernel, linux-arm-msm
On Wed Jan 10, 2024 at 12:23 PM CET, Maxime Ripard wrote:
> On Wed, Jan 10, 2024 at 12:00:23PM +0100, Luca Weiss wrote:
> > On Wed Jan 10, 2024 at 11:58 AM CET, Konrad Dybcio wrote:
> > >
> > >
> > > On 1/5/24 15:29, Luca Weiss wrote:
> > > > Add the description for the display panel found on this phone and remove
> > > > the simple-framebuffer that was in place until now
> > >
> > > Why? They should be able to coexist with a smooth-ish handoff
> >
> > Does that work upstream? I'm aware that downstream can do this but
> > thought this was still missing upstream.
>
> It depends what you call smooth-ish I guess, but KMS handles the
> handover just fine. You're likely to get a flicker during the transition
> though.
Right, seems to work. Also visually looks okay.
fairphone-fp4:~$ dmesg | grep "frame buffer device"
[ 0.250511] Console: switching to colour frame buffer device 135x146
[ 0.284146] simple-framebuffer a0000000.framebuffer: [drm] fb0: simpledrmdrmfb frame buffer device
[ 2.576712] Console: switching to colour frame buffer device 135x146
[ 2.604907] msm_dpu ae01000.display-controller: [drm] fb0: msmdrmfb frame buffer device
I thought before that having two outputs like this would cause two
different framebuffers/display devices to appear, but yeah as I said
seems okay. Will change in v2.
Regards
Luca
>
> Either way, the DT isn't the right place to choose, you should enable
> both, and the distro will choose its policy through configuration.
>
> Maxime
^ permalink raw reply [relevance 99%]
* Re: [PATCH 3/3] arm64: dts: qcom: sm7225-fairphone-fp4: Enable display and GPU
@ 2024-01-10 11:00 99% ` Luca Weiss
0 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-01-10 11:00 UTC (permalink / raw)
To: Konrad Dybcio, Neil Armstrong, Jessica Zhang, Sam Ravnborg,
David Airlie, Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bjorn Andersson
Cc: ~postmarketos/upstreaming, phone-devel, dri-devel, devicetree,
linux-kernel, linux-arm-msm
On Wed Jan 10, 2024 at 11:58 AM CET, Konrad Dybcio wrote:
>
>
> On 1/5/24 15:29, Luca Weiss wrote:
> > Add the description for the display panel found on this phone and remove
> > the simple-framebuffer that was in place until now
>
> Why? They should be able to coexist with a smooth-ish handoff
Does that work upstream? I'm aware that downstream can do this but
thought this was still missing upstream.
Didn't check what happens when you have both enabled.
>
> [...]
>
> >
> > +&gmu {
> > + status = "okay";
>
> Please kick the disablement from the SoC dtsi instead, it won't
> probe without the GPU being enabled
Ack, will include a patch in v2 for that.
>
> Konrad
^ permalink raw reply [relevance 99%]
* Re: [PATCH 0/2] Add Crypto Engine support for SM6350
@ 2024-01-09 11:27 99% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-01-09 11:27 UTC (permalink / raw)
To: Konrad Dybcio, Andy Gross, Bjorn Andersson, Thara Gopinath,
Herbert Xu, David S. Miller, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bhupesh Sharma
Cc: ~postmarketos/upstreaming, phone-devel, linux-crypto,
linux-arm-msm, devicetree, linux-kernel
On Mon Jan 8, 2024 at 1:40 PM CET, Konrad Dybcio wrote:
> On 5.01.2024 17:15, Luca Weiss wrote:
> > Add the compatible and nodes for the QCE found on SM6350 SoC.
> >
> > Not completely sure how to fully test it but "kcapi-speed --all" shows
> > no issues. Let me know if I can/should test this more.
>
> I think I used `cryptsetup benchmark` with and without the ICE enabled
> a couple years back. IIRC the CPU should be faaar faster but also chug
> power while at it.
Are you sure you mean QCE here (which this patch is about) and not ICE?
I'm not aware of them working together somehow but I wouldn't be
surprised if there's something since I don't know much of this area at
all.
Regards
Luca
>
> Konrad
^ permalink raw reply [relevance 99%]
* Re: [PATCH 2/2] arm64: dts: qcom: sm7225-fairphone-fp4: Add PM6150L thermals
@ 2024-01-09 11:24 97% ` Luca Weiss
0 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-01-09 11:24 UTC (permalink / raw)
To: Konrad Dybcio, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel
On Tue Jan 9, 2024 at 11:09 AM CET, Konrad Dybcio wrote:
>
>
> On 1/5/24 15:54, Luca Weiss wrote:
> > Configure the thermals for the PA_THERM1, MSM_THERM, PA_THERM0,
> > RFC_CAM_THERM, CAM_FLASH_THERM and QUIET_THERM thermistors connected to
> > PM6150L.
> >
> > Due to hardware constraints we can only register 4 zones with
> > pm6150l_adc_tm, the other 2 we can register via generic-adc-thermal.
>
> Ugh.. so the ADC can support more inputs than the ADC_TM that was
> designed to ship alongside it can?
>
> And that's why the "generic-adc-thermal"-provided zones need to
> be polled?
This part of the code from qcom-spmi-adc-tm5.c was trigerring if I
define more than 4 channels, and looking at downstream I can also see
that only 4 zones are registered properly with adc_tm, the rest is
registered with "qcom,adc-tm5-iio" which skips from what I could tell
basically all the HW bits and only registering the thermal zone.
ret = adc_tm5_read(chip, ADC_TM5_NUM_BTM,
&channels_available, sizeof(channels_available));
if (ret) {
dev_err(chip->dev, "read failed for BTM channels\n");
return ret;
}
for (i = 0; i < chip->nchannels; i++) {
if (chip->channels[i].channel >= channels_available) {
dev_err(chip->dev, "Invalid channel %d\n", chip->channels[i].channel);
return -EINVAL;
}
}
>
> >
> > The trip points can really only be considered as placeholders, more
> > configuration with cooling etc. can be added later.
> >
> > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
> > ---
> [...]
>
> I've read the sentence above, but..
> > + sdm-skin-thermal {
> > + polling-delay-passive = <1000>;
> > + polling-delay = <5000>;
> > + thermal-sensors = <&msm_therm_sensor>;
> > +
> > + trips {
> > + active-config0 {
> > + temperature = <125000>;
> > + hysteresis = <1000>;
> > + type = "passive";
>
> I don't fancy burnt fingers for dinner!
With passive trip point it wouldn't even do anything now, but at what
temp do you think it should do what? I'd definitely need more time to
understand more of how the thermal setup works in downstream Android,
and then replicate a sane configuration for mainline with proper
temperatures, cooling, etc.
Regards
Luca
>
> Konrad
^ permalink raw reply [relevance 97%]
* Re: [PATCH RFT] arm64: dts: qcom: sm8350: Reenable crypto & cryptobam
@ 2024-01-08 14:22 92% ` Luca Weiss
0 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-01-08 14:22 UTC (permalink / raw)
To: Konrad Dybcio, Andy Gross, Bjorn Andersson, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bhupesh Sharma,
David Heidelberg, Stephan Gerhold
Cc: ~postmarketos/upstreaming, phone-devel, Krzysztof Kozlowski,
linux-arm-msm, devicetree, linux-kernel
On Mon Jan 8, 2024 at 3:18 PM CET, Konrad Dybcio wrote:
> On 8.01.2024 14:49, Luca Weiss wrote:
> > When num-channels and qcom,num-ees is not provided in devicetree, the
> > driver will try to read these values from the registers during probe but
> > this fails if the interconnect is not on and then crashes the system.
> >
> > So we can provide these properties in devicetree (queried after patching
> > BAM driver to enable the necessary interconnect) so we can probe
> > cryptobam without reading registers and then also use the QCE as
> > expected.
>
> This really feels a bit backwards.. Enable the resource to query the
> hardware for numbers, so that said resource can be enabled, but
> slightly later :/
If you think adding interconnect support to driver and dtsi is better,
let me know.
Stephan (+CC) mentioned it should be okay like this *shrug*
For the record, this is the same way I got the values for sc7280[0] and
sm6350[1].
[0] https://lore.kernel.org/linux-arm-msm/20231229-sc7280-cryptobam-fixup-v1-1-bd8f68589b80@fairphone.com/
[1] https://lore.kernel.org/linux-arm-msm/20240105-sm6350-qce-v1-0-416e5c7319ac@fairphone.com/
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index b46236235b7f..cd4dd9852d9e 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -1756,8 +1756,8 @@ cryptobam: dma-controller@1dc4000 {
qcom,controlled-remotely;
iommus = <&apps_smmu 0x594 0x0011>,
<&apps_smmu 0x596 0x0011>;
- /* FIXME: Probing BAM DMA causes some abort and system hang */
- status = "fail";
+ interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>;
+ interconnect-names = "memory";
};
crypto: crypto@1dfa000 {
diff --git a/drivers/dma/qcom/bam_dma.c b/drivers/dma/qcom/bam_dma.c
index 5e7d332731e0..9de28f615639 100644
--- a/drivers/dma/qcom/bam_dma.c
+++ b/drivers/dma/qcom/bam_dma.c
@@ -40,6 +40,7 @@
#include <linux/circ_buf.h>
#include <linux/clk.h>
#include <linux/dmaengine.h>
+#include <linux/interconnect.h>
#include <linux/pm_runtime.h>
#include "../dmaengine.h"
@@ -394,6 +395,7 @@ struct bam_device {
const struct reg_offset_data *layout;
struct clk *bamclk;
+ struct icc_path *mem_path;
int irq;
/* dma start transaction tasklet */
@@ -1206,6 +1208,7 @@ static int bam_init(struct bam_device *bdev)
bdev->num_channels = val & BAM_NUM_PIPES_MASK;
}
+ printk(KERN_ERR "%s:%d DBG num_ees=%u num_channels=%u\n", __func__, __LINE__, bdev->num_ees, bdev->num_channels);
/* Reset BAM now if fully controlled locally */
if (!bdev->controlled_remotely && !bdev->powered_remotely)
bam_reset(bdev);
@@ -1298,6 +1301,14 @@ static int bam_dma_probe(struct platform_device *pdev)
return ret;
}
+ bdev->mem_path = devm_of_icc_get(bdev->dev, "memory");
+ if (IS_ERR(bdev->mem_path))
+ return PTR_ERR(bdev->mem_path);
+
+ ret = icc_set_bw(bdev->mem_path, 1, 1);
+ if (ret)
+ return ret;
+
ret = bam_init(bdev);
if (ret)
goto err_disable_clk;
^ permalink raw reply related [relevance 92%]
* [PATCH RFT] arm64: dts: qcom: sm8350: Reenable crypto & cryptobam
@ 2024-01-08 13:49 93% Luca Weiss
0 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-01-08 13:49 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bhupesh Sharma,
David Heidelberg
Cc: ~postmarketos/upstreaming, phone-devel, Krzysztof Kozlowski,
linux-arm-msm, devicetree, linux-kernel, Luca Weiss
When num-channels and qcom,num-ees is not provided in devicetree, the
driver will try to read these values from the registers during probe but
this fails if the interconnect is not on and then crashes the system.
So we can provide these properties in devicetree (queried after patching
BAM driver to enable the necessary interconnect) so we can probe
cryptobam without reading registers and then also use the QCE as
expected.
Fixes: 4d29db204361 ("arm64: dts: qcom: sm8350: fix BAM DMA crash and reboot")
Fixes: f1040a7fe8f0 ("arm64: dts: qcom: sm8350: Add Crypto Engine support")
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
Not tested myself, but David Heidelberg was so nice and ran it on a
SM8350 board in a test farm and it seems to be working as expected.
But still please test it on some other boards so make sure it actually
works as expected there also.
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index b46236235b7f..3cd75ab552c5 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -1754,10 +1754,10 @@ cryptobam: dma-controller@1dc4000 {
#dma-cells = <1>;
qcom,ee = <0>;
qcom,controlled-remotely;
+ num-channels = <16>;
+ qcom,num-ees = <4>;
iommus = <&apps_smmu 0x594 0x0011>,
<&apps_smmu 0x596 0x0011>;
- /* FIXME: Probing BAM DMA causes some abort and system hang */
- status = "fail";
};
crypto: crypto@1dfa000 {
@@ -1769,8 +1769,6 @@ crypto: crypto@1dfa000 {
<&apps_smmu 0x596 0x0011>;
interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "memory";
- /* FIXME: dependency BAM DMA is disabled */
- status = "disabled";
};
ipa: ipa@1e40000 {
---
base-commit: 0dd3ee31125508cd67f7e7172247f05b7fd1753a
change-id: 20240108-sm8350-qce-6ada49f90657
Best regards,
--
Luca Weiss <luca.weiss@fairphone.com>
^ permalink raw reply related [relevance 93%]
* Re: [PATCH 2/3] clk: qcom: hfpll: Add QCS404-specific compatible
@ 2024-01-06 10:19 86% ` Luca Weiss
0 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-01-06 10:19 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Konrad Dybcio, Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Krzysztof Kozlowski
Cc: linux-arm-msm, linux-clk, devicetree, linux-kernel
On Dienstag, 2. Jänner 2024 11:41:26 CET Krzysztof Kozlowski wrote:
> On 31/12/2023 15:48, Luca Weiss wrote:
> > It doesn't appear that the configuration is for the HFPLL is generic, so
>
> That's ok...
>
> > add a qcs404-specific compatible and rename the existing struct to
>
> but why this is the solution? If the qcom,hfpll compatible was
> deprecated, but it is not. This commit is contradictory to the bindings.
>
> > qcs404.
> >
> > Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
> > ---
> >
> > drivers/clk/qcom/hfpll.c | 6 ++++--
> > 1 file changed, 4 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/clk/qcom/hfpll.c b/drivers/clk/qcom/hfpll.c
> > index dac27e31ef60..5b12982519be 100644
> > --- a/drivers/clk/qcom/hfpll.c
> > +++ b/drivers/clk/qcom/hfpll.c
> > @@ -14,7 +14,7 @@
> >
> > #include "clk-regmap.h"
> > #include "clk-hfpll.h"
> >
> > -static const struct hfpll_data hdata = {
> > +static const struct hfpll_data qcs404 = {
> >
> > .mode_reg = 0x00,
> > .l_reg = 0x04,
> > .m_reg = 0x08,
> >
> > @@ -84,10 +84,12 @@ static const struct hfpll_data msm8976_cci = {
> >
> > };
> >
> > static const struct of_device_id qcom_hfpll_match_table[] = {
> >
> > - { .compatible = "qcom,hfpll", .data = &hdata },
> >
> > { .compatible = "qcom,msm8976-hfpll-a53", .data = &msm8976_a53 },
> > { .compatible = "qcom,msm8976-hfpll-a72", .data = &msm8976_a72 },
> > { .compatible = "qcom,msm8976-hfpll-cci", .data = &msm8976_cci },
> >
> > + { .compatible = "qcom,qcs404-hfpll", .data = &qcs404 },
> > + /* deprecated, use SoC-specific compatible */
>
> Why? That's not a deprecated compatible. You now expect to create many
> unnecessary entries, which is not really needed. This is opposite of
> what we try to achieve with compatibility lists.
Just "qcom,hfpll" is not allowed by the bindings.
The problem is that it's actually unclear to me what "qcom,hfpll" was supposed
to be currently. It was added originally for MSM8974 and friends (see git log)
but then is currently only used by QCS404 while in QCS404 downstream msm-4.4
(I think it was 4.4) I see different driver data than what's here.
So I wanted to just move what's used here to be qcs404-specific and then in an
upcoming patch add a msm8974-specific compatible with different driver data.
Also wouldn't the "don't extend driver lists when not neccessary" mean using
something like "qcom,msm1234-hfpll", "qcom,qcs404-hfpll", "qcom,hfpll" then?
That was kind of my idea if some other SoC can reuse e.g. qcs404 data?
Regards
Luca
>
> Best regards,
> Krzysztof
^ permalink raw reply [relevance 86%]
* [PATCH 1/2] dt-bindings: qcom-qce: Add compatible for SM6350
2024-01-05 16:15 99% [PATCH 0/2] Add Crypto Engine support for SM6350 Luca Weiss
@ 2024-01-05 16:15 99% ` Luca Weiss
2024-01-05 16:15 96% ` [PATCH 2/2] arm64: dts: qcom: sm6350: Add Crypto Engine Luca Weiss
2 siblings, 0 replies; 200+ results
From: Luca Weiss @ 2024-01-05 16:15 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Thara Gopinath,
Herbert Xu, David S. Miller, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bhupesh Sharma
Cc: ~postmarketos/upstreaming, phone-devel, linux-crypto,
linux-arm-msm, devicetree, linux-kernel, Luca Weiss
Add a compatible for the crypto block found on the SM6350 SoC.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
Documentation/devicetree/bindings/crypto/qcom-qce.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
index 8e665d910e6e..69d1c4929935 100644
--- a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
+++ b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
@@ -44,6 +44,7 @@ properties:
- items:
- enum:
+ - qcom,sm6350-qce
- qcom,sm8250-qce
- qcom,sm8350-qce
- qcom,sm8450-qce
--
2.43.0
^ permalink raw reply related [relevance 99%]
* [PATCH 2/2] arm64: dts: qcom: sm6350: Add Crypto Engine
2024-01-05 16:15 99% [PATCH 0/2] Add Crypto Engine support for SM6350 Luca Weiss
2024-01-05 16:15 99% ` [PATCH 1/2] dt-bindings: qcom-qce: Add compatible " Luca Weiss
@ 2024-01-05 16:15 96% ` Luca Weiss
2 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-01-05 16:15 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Thara Gopinath,
Herbert Xu, David S. Miller, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bhupesh Sharma
Cc: ~postmarketos/upstreaming, phone-devel, linux-crypto,
linux-arm-msm, devicetree, linux-kernel, Luca Weiss
Add crypto engine (CE) and CE BAM related nodes and definitions for this
SoC.
For reference:
[ 2.297419] qcrypto 1dfa000.crypto: Crypto device found, version 5.5.1
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
arch/arm64/boot/dts/qcom/sm6350.dtsi | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 8fd6f4d03490..516aadbb16bb 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -1212,6 +1212,37 @@ ufs_mem_phy_lanes: phy@1d87400 {
};
};
+ cryptobam: dma-controller@1dc4000 {
+ compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
+ reg = <0 0x01dc4000 0 0x24000>;
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ qcom,ee = <0>;
+ qcom,controlled-remotely;
+ num-channels = <16>;
+ qcom,num-ees = <4>;
+ iommus = <&apps_smmu 0x432 0x0000>,
+ <&apps_smmu 0x438 0x0001>,
+ <&apps_smmu 0x43f 0x0000>,
+ <&apps_smmu 0x426 0x0011>,
+ <&apps_smmu 0x436 0x0011>;
+ };
+
+ crypto: crypto@1dfa000 {
+ compatible = "qcom,sm6350-qce", "qcom,sm8150-qce", "qcom,qce";
+ reg = <0 0x01dfa000 0 0x6000>;
+ dmas = <&cryptobam 4>, <&cryptobam 5>;
+ dma-names = "rx", "tx";
+ iommus = <&apps_smmu 0x432 0x0000>,
+ <&apps_smmu 0x438 0x0001>,
+ <&apps_smmu 0x43f 0x0000>,
+ <&apps_smmu 0x426 0x0011>,
+ <&apps_smmu 0x436 0x0011>;
+ interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 QCOM_ICC_TAG_ALWAYS
+ &clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>;
+ interconnect-names = "memory";
+ };
+
ipa: ipa@1e40000 {
compatible = "qcom,sm6350-ipa";
--
2.43.0
^ permalink raw reply related [relevance 96%]
* [PATCH 0/2] Add Crypto Engine support for SM6350
@ 2024-01-05 16:15 99% Luca Weiss
2024-01-05 16:15 99% ` [PATCH 1/2] dt-bindings: qcom-qce: Add compatible " Luca Weiss
` (2 more replies)
0 siblings, 3 replies; 200+ results
From: Luca Weiss @ 2024-01-05 16:15 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Thara Gopinath,
Herbert Xu, David S. Miller, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bhupesh Sharma
Cc: ~postmarketos/upstreaming, phone-devel, linux-crypto,
linux-arm-msm, devicetree, linux-kernel, Luca Weiss
Add the compatible and nodes for the QCE found on SM6350 SoC.
Not completely sure how to fully test it but "kcapi-speed --all" shows
no issues. Let me know if I can/should test this more.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
Luca Weiss (2):
dt-bindings: qcom-qce: Add compatible for SM6350
arm64: dts: qcom: sm6350: Add Crypto Engine
.../devicetree/bindings/crypto/qcom-qce.yaml | 1 +
arch/arm64/boot/dts/qcom/sm6350.dtsi | 31 ++++++++++++++++++++++
2 files changed, 32 insertions(+)
---
base-commit: 610a9b8f49fbcf1100716370d3b5f6f884a2835a
change-id: 20240105-sm6350-qce-c6233abbf54f
Best regards,
--
Luca Weiss <luca.weiss@fairphone.com>
^ permalink raw reply [relevance 99%]
* [PATCH 2/2] arm64: dts: qcom: sm7225-fairphone-fp4: Add PM6150L thermals
2024-01-05 14:54 99% [PATCH 0/2] More thermal configuration for Fairphone 4 Luca Weiss
@ 2024-01-05 14:54 86% ` Luca Weiss
0 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-01-05 14:54 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel, Luca Weiss
Configure the thermals for the PA_THERM1, MSM_THERM, PA_THERM0,
RFC_CAM_THERM, CAM_FLASH_THERM and QUIET_THERM thermistors connected to
PM6150L.
Due to hardware constraints we can only register 4 zones with
pm6150l_adc_tm, the other 2 we can register via generic-adc-thermal.
The trip points can really only be considered as placeholders, more
configuration with cooling etc. can be added later.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts | 191 ++++++++++++++++++++++
1 file changed, 191 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts
index b7ccfe4011bb..6f435a7ed855 100644
--- a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts
+++ b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts
@@ -84,6 +84,20 @@ memory@efe01000 {
};
};
+ msm_therm_sensor: thermal-sensor-msm {
+ compatible = "generic-adc-thermal";
+ #thermal-sensor-cells = <0>;
+ io-channels = <&pm6150l_adc ADC5_AMUX_THM2_100K_PU>;
+ io-channel-names = "sensor-channel";
+ };
+
+ rear_cam_sensor: thermal-sensor-rear-cam {
+ compatible = "generic-adc-thermal";
+ #thermal-sensor-cells = <0>;
+ io-channels = <&pm6150l_adc ADC5_GPIO2_100K_PU>;
+ io-channel-names = "sensor-channel";
+ };
+
thermal-zones {
chg-skin-thermal {
polling-delay-passive = <0>;
@@ -113,6 +127,90 @@ active-config0 {
};
};
+ pa0-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&pm6150l_adc_tm 1>;
+
+ trips {
+ active-config0 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+
+ pa1-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&pm6150l_adc_tm 0>;
+
+ trips {
+ active-config0 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+
+ quiet-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&pm6150l_adc_tm 3>;
+
+ trips {
+ active-config0 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+
+ rear-cam-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+ thermal-sensors = <&rear_cam_sensor>;
+
+ trips {
+ active-config0 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+
+ rfc-flash-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&pm6150l_adc_tm 2>;
+
+ trips {
+ active-config0 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+
+ sdm-skin-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+ thermal-sensors = <&msm_therm_sensor>;
+
+ trips {
+ active-config0 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+
xo-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
@@ -423,6 +521,91 @@ &mpss {
status = "okay";
};
+&pm6150l_adc {
+ pinctrl-0 = <&pm6150l_adc_default>;
+ pinctrl-names = "default";
+
+ channel@4d {
+ reg = <ADC5_AMUX_THM1_100K_PU>;
+ qcom,ratiometric;
+ qcom,hw-settle-time = <200>;
+ qcom,pre-scaling = <1 1>;
+ label = "pa_therm1";
+ };
+
+ channel@4e {
+ reg = <ADC5_AMUX_THM2_100K_PU>;
+ qcom,ratiometric;
+ qcom,hw-settle-time = <200>;
+ qcom,pre-scaling = <1 1>;
+ label = "msm_therm";
+ };
+
+ channel@4f {
+ reg = <ADC5_AMUX_THM3_100K_PU>;
+ qcom,ratiometric;
+ qcom,hw-settle-time = <200>;
+ qcom,pre-scaling = <1 1>;
+ label = "pa_therm0";
+ };
+
+ channel@53 {
+ reg = <ADC5_GPIO2_100K_PU>;
+ qcom,ratiometric;
+ qcom,hw-settle-time = <200>;
+ qcom,pre-scaling = <1 1>;
+ label = "rear_cam_therm";
+ };
+
+ channel@54 {
+ reg = <ADC5_GPIO3_100K_PU>;
+ qcom,ratiometric;
+ qcom,hw-settle-time = <200>;
+ qcom,pre-scaling = <1 1>;
+ label = "rear_cam_flash_therm";
+ };
+
+ channel@55 {
+ reg = <ADC5_GPIO4_100K_PU>;
+ qcom,ratiometric;
+ qcom,hw-settle-time = <200>;
+ qcom,pre-scaling = <1 1>;
+ label = "quiet_therm";
+ };
+};
+
+&pm6150l_adc_tm {
+ status = "okay";
+
+ pa-therm1@0 {
+ reg = <0>;
+ io-channels = <&pm6150l_adc ADC5_AMUX_THM1_100K_PU>;
+ qcom,ratiometric;
+ qcom,hw-settle-time-us = <200>;
+ };
+
+ pa-therm0@1 {
+ reg = <1>;
+ io-channels = <&pm6150l_adc ADC5_AMUX_THM3_100K_PU>;
+ qcom,ratiometric;
+ qcom,hw-settle-time-us = <200>;
+ };
+
+ rear-cam-flash-therm@2 {
+ reg = <2>;
+ io-channels = <&pm6150l_adc ADC5_GPIO3_100K_PU>;
+ qcom,ratiometric;
+ qcom,hw-settle-time-us = <200>;
+ };
+
+ quiet-therm@3 {
+ reg = <3>;
+ io-channels = <&pm6150l_adc ADC5_GPIO4_100K_PU>;
+ qcom,ratiometric;
+ qcom,hw-settle-time-us = <200>;
+ };
+};
+
&pm6150l_flash {
status = "okay";
@@ -445,6 +628,14 @@ led-1 {
};
};
+&pm6150l_gpios {
+ pm6150l_adc_default: adc-default-state {
+ pins = "gpio6", "gpio7", "gpio10";
+ function = PMIC_GPIO_FUNC_NORMAL;
+ bias-high-impedance;
+ };
+};
+
&pm6150l_wled {
qcom,switching-freq = <800>;
qcom,current-limit-microamp = <20000>;
--
2.43.0
^ permalink raw reply related [relevance 86%]
* [PATCH 0/2] More thermal configuration for Fairphone 4
@ 2024-01-05 14:54 99% Luca Weiss
2024-01-05 14:54 86% ` [PATCH 2/2] arm64: dts: qcom: sm7225-fairphone-fp4: Add PM6150L thermals Luca Weiss
0 siblings, 1 reply; 200+ results
From: Luca Weiss @ 2024-01-05 14:54 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel, Luca Weiss
Add the thermal configuration for the thermistors connected to PMK8003
and PM6150L. With that all the external thermistors on the phone should
be present in the dts.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
Luca Weiss (2):
arm64: dts: qcom: sm7225-fairphone-fp4: Add PMK8003 thermals
arm64: dts: qcom: sm7225-fairphone-fp4: Add PM6150L thermals
arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts | 216 ++++++++++++++++++++++
1 file changed, 216 insertions(+)
---
base-commit: 50c107ee601a3d57e4fb13a9ecd9cf6c8df187f2
change-id: 20240105-fp4-thermals-f3c8e0417b70
Best regards,
--
Luca Weiss <luca.weiss@fairphone.com>
^ permalink raw reply [relevance 99%]
Results 1-200 of ~2000 next (older) | reverse | options above
-- pct% links below jump to the message on this page, permalinks otherwise --
2023-12-04 10:24 [PATCH v5 0/3] Add UFS host controller and Phy nodes for sc7280 Luca Weiss
2023-12-04 10:24 ` [PATCH v5 2/3] arm64: dts: qcom: sc7280: Add UFS nodes for sc7280 soc Luca Weiss
2023-12-04 12:15 ` Nitin Rawat
2023-12-04 12:21 ` Luca Weiss
2023-12-04 17:28 ` Manivannan Sadhasivam
2024-03-22 7:59 99% ` Luca Weiss
2023-12-20 10:02 [PATCH 0/3] Fairphone 5 PMIC-GLINK support (USB-C, charger, fuel gauge) Luca Weiss
2023-12-20 12:32 ` Konrad Dybcio
2023-12-21 7:33 ` Luca Weiss
2023-12-21 10:34 ` Dmitry Baryshkov
2023-12-21 12:53 ` Konrad Dybcio
2023-12-21 13:45 ` Luca Weiss
2024-01-02 13:36 ` Greg Kroah-Hartman
2024-01-02 13:43 ` Luca Weiss
2024-01-02 13:53 ` Greg Kroah-Hartman
2024-02-06 23:20 99% ` Luca Weiss
2023-12-31 14:48 [PATCH 0/3] Convert qcom,hfpll documentation to yaml + related changes Luca Weiss
2023-12-31 14:48 ` [PATCH 2/3] clk: qcom: hfpll: Add QCS404-specific compatible Luca Weiss
2024-01-02 10:41 ` Krzysztof Kozlowski
2024-01-06 10:19 86% ` Luca Weiss
2024-01-05 14:29 [PATCH 0/3] Add display support for Fairphone 4 Luca Weiss
2024-01-05 14:29 ` [PATCH 3/3] arm64: dts: qcom: sm7225-fairphone-fp4: Enable display and GPU Luca Weiss
2024-01-10 10:58 ` Konrad Dybcio
2024-01-10 11:00 99% ` Luca Weiss
2024-01-10 11:23 ` Maxime Ripard
2024-01-10 11:30 99% ` Luca Weiss
2024-01-05 14:54 99% [PATCH 0/2] More thermal configuration for Fairphone 4 Luca Weiss
2024-01-05 14:54 86% ` [PATCH 2/2] arm64: dts: qcom: sm7225-fairphone-fp4: Add PM6150L thermals Luca Weiss
2024-01-09 10:09 ` Konrad Dybcio
2024-01-09 11:24 97% ` Luca Weiss
2024-01-10 19:16 ` Konrad Dybcio
2024-01-11 8:55 97% ` Luca Weiss
2024-01-05 16:15 99% [PATCH 0/2] Add Crypto Engine support for SM6350 Luca Weiss
2024-01-05 16:15 99% ` [PATCH 1/2] dt-bindings: qcom-qce: Add compatible " Luca Weiss
2024-01-05 16:15 96% ` [PATCH 2/2] arm64: dts: qcom: sm6350: Add Crypto Engine Luca Weiss
2024-01-05 16:30 ` Stephan Gerhold
2024-02-16 10:46 99% ` Luca Weiss
2024-02-16 18:09 ` Bjorn Andersson
2024-02-19 10:35 99% ` Luca Weiss
2024-01-08 12:40 ` [PATCH 0/2] Add Crypto Engine support for SM6350 Konrad Dybcio
2024-01-09 11:27 99% ` Luca Weiss
2024-01-08 13:49 93% [PATCH RFT] arm64: dts: qcom: sm8350: Reenable crypto & cryptobam Luca Weiss
2024-01-08 14:18 ` Konrad Dybcio
2024-01-08 14:22 92% ` Luca Weiss
2024-01-08 22:45 ` Dmitry Baryshkov
2024-02-16 10:36 98% ` Luca Weiss
2024-01-10 15:14 94% [PATCH v2 0/4] Add display support for Fairphone 4 Luca Weiss
2024-01-10 15:14 92% ` [PATCH v2 1/4] dt-bindings: display: panel: Add Himax HX83112A Luca Weiss
2024-01-10 15:14 66% ` [PATCH v2 2/4] drm/panel: Add driver for DJN HX83112A LCD panel Luca Weiss
2024-01-11 14:57 ` Linus Walleij
2024-01-11 15:28 97% ` Luca Weiss
2024-01-11 19:05 ` Linus Walleij
2024-01-12 9:00 97% ` Luca Weiss
2024-01-12 9:14 ` Neil Armstrong
2024-01-12 9:51 95% ` Luca Weiss
2024-01-12 10:23 ` Linus Walleij
2024-01-12 10:26 ` neil.armstrong
2024-01-22 11:27 99% ` Luca Weiss
2024-02-14 9:33 99% ` Luca Weiss
2024-01-10 15:14 98% ` [PATCH v2 3/4] arm64: dts: qcom: sm6350: Remove "disabled" state of GMU Luca Weiss
2024-01-10 15:14 91% ` [PATCH v2 4/4] arm64: dts: qcom: sm7225-fairphone-fp4: Enable display and GPU Luca Weiss
2024-01-10 15:21 96% [PATCH] arm64: dts: qcom: sm7225-fairphone-fp4: Switch firmware ext to .mbn Luca Weiss
2024-01-11 2:52 [PATCH RESEND v3] arm64: dts: qcom: qcs6490-idp: Add definition for three LEDs Hui Liu via B4 Relay
2024-01-11 8:47 99% ` Luca Weiss
2024-01-11 12:38 93% [PATCH] drm/bridge: Select DRM_KMS_HELPER for DRM_PANEL_BRIDGE Luca Weiss
2024-01-15 8:43 ` Neil Armstrong
2024-01-17 8:59 13% ` Luca Weiss
2024-02-29 9:27 99% ` Luca Weiss
2024-03-03 20:37 ` Dmitry Baryshkov
2024-03-08 9:29 99% ` Luca Weiss
2024-03-18 9:09 ` Neil Armstrong
2024-03-18 10:52 ` Jani Nikula
2024-03-18 10:59 ` Jani Nikula
2024-03-18 13:48 99% ` Luca Weiss
2024-01-15 9:29 [PATCH] dt-bindings: usb: add common Type-C USB Switch schema Krzysztof Kozlowski
2024-01-15 9:34 99% ` Luca Weiss
2024-01-16 11:59 [PATCH] arm64: dts: qcom: sdm845: Fix wild reboot during Antutu test Daniel Lezcano
2024-01-16 12:37 99% ` Luca Weiss
2024-01-16 12:51 ` Daniel Lezcano
2024-01-16 14:03 99% ` Luca Weiss
2024-01-21 10:09 84% [PATCH] ARM: dts: qcom: apq8026-lg-lenok: Add vibrator support Luca Weiss
2024-01-21 10:21 86% [PATCH] ARM: dts: qcom: msm8926-htc-memul: Add rmtfs memory node Luca Weiss
2024-01-22 10:53 ` Konrad Dybcio
2024-01-22 17:11 88% ` Luca Weiss
2024-01-21 10:40 84% [PATCH v2 0/2] Add GPU support for MSM8226 (Adreno A305B) Luca Weiss
2024-01-21 10:40 81% ` [PATCH v2 1/2] dt-bindings: display/msm: gpu: Allow multiple digits for patchid Luca Weiss
2024-01-21 10:40 73% ` [PATCH v2 2/2] drm/msm/adreno: Add A305B support Luca Weiss
2024-01-22 9:44 [PATCH v2] dt-bindings: usb: add common Type-C USB Switch schema Krzysztof Kozlowski
2024-04-11 7:13 99% ` Luca Weiss
2024-04-11 7:25 ` Krzysztof Kozlowski
2024-04-11 7:35 98% ` Luca Weiss
2024-01-23 21:03 87% [PATCH 0/3] Add MDSS_BCR reset for MSM8953 Luca Weiss
2024-01-23 21:03 87% ` [PATCH 1/3] dt-bindings: clock: gcc-msm8953: add reset for MDSS subsystem Luca Weiss
2024-01-23 21:03 87% ` [PATCH 2/3] clk: qcom: gcc-msm8953: add MDSS_BCR reset Luca Weiss
2024-01-24 12:10 ` Konrad Dybcio
2024-01-25 21:25 88% ` Luca Weiss
2024-01-23 21:03 87% ` [PATCH 3/3] arm64: dts: qcom: msm8953: add reset for display subsystem Luca Weiss
2024-01-24 15:31 74% [PATCH] arm64: dts: qcom: sm6350: Add tsens thermal zones Luca Weiss
2024-01-25 16:30 ` Konrad Dybcio
2024-01-26 7:49 99% ` Luca Weiss
2024-01-25 21:35 85% [PATCH v2 0/3] Add MDSS_BCR reset (+some more) for MSM8953 Luca Weiss
2024-01-25 21:35 86% ` [PATCH v2 1/3] dt-bindings: clock: gcc-msm8953: add more resets Luca Weiss
2024-01-25 21:35 87% ` [PATCH v2 2/3] clk: qcom: " Luca Weiss
2024-01-25 21:35 86% ` [PATCH v2 3/3] arm64: dts: qcom: msm8953: add reset for display subsystem Luca Weiss
2024-01-25 21:56 77% [PATCH RFC 0/2] Add GPU support to MSM8953 SoC Luca Weiss
2024-01-25 21:56 86% ` [PATCH RFC 1/2] arm64: dts: qcom: msm8953: Add GPU IOMMU Luca Weiss
2024-01-25 21:56 71% ` [PATCH RFC 2/2] arm64: dts: qcom: msm8953: Add GPU Luca Weiss
2024-01-25 23:50 ` Konrad Dybcio
2024-01-27 17:32 88% ` Luca Weiss
2024-01-25 22:24 ` [PATCH RFC 1/2] arm64: dts: qcom: msm8953: Add GPU IOMMU Dmitry Baryshkov
2024-01-25 23:49 ` Konrad Dybcio
2024-01-27 17:24 88% ` Luca Weiss
2024-01-29 7:48 98% [PATCH] media: dt-bindings: qcom,sc7280-venus: Allow one IOMMU entry Luca Weiss
2024-01-29 17:37 ` Conor Dooley
2024-01-30 7:47 99% ` Luca Weiss
2024-01-30 19:32 [PATCH v3 0/6] usb: typec: qcom-pmic-typec: enable support for PMI632 PMIC Dmitry Baryshkov
2024-01-31 7:49 99% ` Luca Weiss
2024-02-05 9:51 99% [PATCH 0/3] Add PPG support for PMI632 LPG dtsi Luca Weiss
2024-02-05 9:51 99% ` [PATCH 1/3] dt-bindings: mfd: qcom,spmi-pmic: Add pbs to SPMI device types Luca Weiss
2024-02-05 13:46 ` Rob Herring
2024-02-05 15:44 88% ` Luca Weiss
2024-02-05 9:51 98% ` [PATCH 2/3] arm64: dts: qcom: pmi632: Add PBS client and use in LPG node Luca Weiss
2024-02-05 9:51 99% ` [PATCH 3/3] arm64: defconfig: Enable QCOM PBS Luca Weiss
2024-02-08 9:52 97% [PATCH v2 0/2] Fairphone 5 PMIC-GLINK support (USB-C, charger, fuel gauge) Luca Weiss
2024-02-08 9:52 98% ` [PATCH v2 1/2] dt-bindings: soc: qcom: qcom,pmic-glink: document QCM6490 compatible Luca Weiss
2024-02-08 9:52 97% ` [PATCH v2 2/2] usb: typec: ucsi: Add qcm6490-pmic-glink as needing PDOS quirk Luca Weiss
2024-02-09 16:21 [PATCH] arm64: dts: qcom: qcs6490-rb3gen2: Declare GCC clocks protected Bjorn Andersson
2024-02-09 16:47 99% ` Luca Weiss
2024-02-10 14:12 86% [PATCH 0/3] Add RPMPD support for MSM8974 Luca Weiss
2024-02-10 14:12 84% ` [PATCH 1/3] dt-bindings: power: rpmpd: Add MSM8974 power domains Luca Weiss
2024-02-10 14:12 80% ` [PATCH 2/3] pmdomain: qcom: rpmpd: Add MSM8974+PM8841 " Luca Weiss
2024-02-10 14:19 ` Konrad Dybcio
2024-02-10 16:31 88% ` Luca Weiss
2024-02-10 14:12 82% ` [PATCH 3/3] pmdomain: qcom: rpmpd: Add MSM8974PRO+PMA8084 " Luca Weiss
2024-02-10 16:28 85% [PATCH v2 0/3] Bring up more CPU cores on MSM8226 Luca Weiss
2024-02-10 16:28 88% ` [PATCH v2 1/3] dt-bindings: soc: qcom: qcom,saw2: add msm8226 l2 compatible Luca Weiss
2024-02-10 16:28 47% ` [PATCH v2 2/3] ARM: dts: qcom: msm8226: Sort and clean up nodes Luca Weiss
2024-02-10 16:28 77% ` [PATCH v2 3/3] ARM: dts: qcom: msm8226: Add CPU and SAW/ACC nodes Luca Weiss
2024-02-10 16:38 85% [PATCH v2 0/3] Add RPMPD support for MSM8974 Luca Weiss
2024-02-10 16:38 84% ` [PATCH v2 1/3] dt-bindings: power: rpmpd: Add MSM8974 power domains Luca Weiss
2024-02-11 11:03 ` Stephan Gerhold
2024-02-11 11:19 88% ` Luca Weiss
2024-02-10 16:38 81% ` [PATCH v2 2/3] pmdomain: qcom: rpmpd: Add MSM8974+PM8841 " Luca Weiss
2024-02-10 16:38 83% ` [PATCH v2 3/3] pmdomain: qcom: rpmpd: Add MSM8974PRO+PMA8084 " Luca Weiss
2024-02-10 16:45 82% [PATCH v3] ARM: dts: qcom: msm8974: correct qfprom node size Luca Weiss
2024-02-14 21:46 84% [PATCH v2] ARM: dts: qcom: msm8226: Add watchdog node Luca Weiss
2024-02-15 17:19 [PATCH v2 0/2] Add samsung-milletwifi Bryant Mairs
2024-02-15 17:19 ` [PATCH v2 2/2] ARM: dts: qcom: Add support for Samsung Galaxy Tab 4 8.0 Wi-Fi Bryant Mairs
2024-02-15 17:55 88% ` Luca Weiss
2024-02-16 10:10 92% [PATCH v3 0/4] Add display support for Fairphone 4 Luca Weiss
2024-02-16 10:10 92% ` [PATCH v3 1/4] dt-bindings: display: panel: Add Himax HX83112A Luca Weiss
2024-02-16 10:10 65% ` [PATCH v3 2/4] drm/panel: Add driver for DJN HX83112A LCD panel Luca Weiss
2024-02-16 10:10 97% ` [PATCH v3 3/4] arm64: dts: qcom: sm6350: Remove "disabled" state of GMU Luca Weiss
2024-02-16 10:10 90% ` [PATCH v3 4/4] arm64: dts: qcom: sm7225-fairphone-fp4: Enable display and GPU Luca Weiss
2024-02-16 13:11 99% [PATCH] arm64: dts: qcom: sm6350: Add interconnect for MDSS Luca Weiss
2024-02-16 13:22 97% [PATCH] Bluetooth: Add more Bluetooth version defines Luca Weiss
2024-04-12 14:23 99% ` Luca Weiss
2024-02-18 20:57 85% [PATCH v2 0/3] Convert qcom,hfpll documentation to yaml + related changes Luca Weiss
2024-02-18 20:57 71% ` [PATCH v2 1/3] dt-bindings: clock: qcom,hfpll: Convert to YAML Luca Weiss
2024-02-18 20:57 85% ` [PATCH v2 2/3] clk: qcom: hfpll: Add QCS404-specific compatible Luca Weiss
2024-02-18 20:57 87% ` [PATCH v2 3/3] arm64: dts: qcom: qcs404: Use qcs404-hfpll compatible for hfpll Luca Weiss
2024-02-19 10:16 93% [PATCH v2] arm64: dts: qcom: sm6350: Add Crypto Engine Luca Weiss
2024-02-19 14:33 82% [PATCH] arm64: dts: qcom: Fix type of "wdog" IRQs for remoteprocs Luca Weiss
2024-02-19 23:11 82% [PATCH 0/4] Various fixes for the lm3630a backlight driver Luca Weiss
2024-02-19 23:11 86% ` [PATCH 1/4] backlight: lm3630a: Initialize backlight_properties on init Luca Weiss
2024-02-19 23:11 81% ` [PATCH 2/4] backlight: lm3630a: Don't set bl->props.brightness in get_brightness Luca Weiss
2024-02-19 23:11 79% ` [PATCH 3/4] backlight: lm3630a: Use backlight_get_brightness helper in update_status Luca Weiss
2024-02-20 14:11 ` Daniel Thompson
2024-02-20 16:43 87% ` Luca Weiss
2024-02-19 23:11 85% ` [PATCH 4/4] ARM: dts: qcom: msm8974-hammerhead: Hook up backlight Luca Weiss
2024-02-20 14:12 ` Daniel Thompson
2024-02-20 16:45 88% ` Luca Weiss
2024-02-20 12:01 95% [PATCH] arm64: dts: qcom: sdm632-fairphone-fp3: enable USB-C port handling Luca Weiss
2024-02-20 15:35 [PATCH RESEND 0/4] Ensure all backlight drivers zero the properties structure Daniel Thompson
2024-02-20 16:48 88% ` Luca Weiss
2024-02-29 13:07 [PATCH RFT 0/7] arm64: qcom: allow up to 4 lanes for the Type-C DisplayPort Altmode Neil Armstrong
2024-03-15 17:19 83% ` Luca Weiss
2024-03-15 17:35 ` Neil Armstrong
2024-03-16 16:01 ` Bjorn Andersson
2024-03-18 10:45 99% ` Luca Weiss
2024-03-26 21:02 ` Konrad Dybcio
2024-03-29 9:02 99% ` Luca Weiss
2024-04-05 8:08 ` Neil Armstrong
2024-04-05 10:19 99% ` Luca Weiss
2024-03-05 23:18 88% [PATCH 0/5] Some devicetree cleanup for MSM8974 Sony Xperia Z2 Tablet Luca Weiss
2024-03-05 23:18 70% ` [PATCH 1/5] ARM: dts: qcom: msm8974pro-castor: Clean up formatting Luca Weiss
2024-03-05 23:18 88% ` [PATCH 2/5] ARM: dts: qcom: msm8974pro-castor: Add mmc aliases Luca Weiss
2024-03-05 23:18 86% ` [PATCH 3/5] ARM: dts: qcom: msm8974pro-castor: Remove camera button definitions Luca Weiss
2024-03-05 23:18 88% ` [PATCH 4/5] ARM: dts: qcom: msm8974pro-castor: Add debounce-interval for keys Luca Weiss
2024-03-05 23:18 88% ` [PATCH 5/5] ARM: dts: qcom: msm8974pro-castor: Rename wifi node name Luca Weiss
2024-03-10 11:41 87% [PATCH 0/3] Split sony-castor into shinano-common and add Sony Xperia Z3 Luca Weiss
2024-03-10 11:41 41% ` [PATCH 1/3] ARM: dts: qcom: msm8974-sony-castor: Split into shinano-common Luca Weiss
2024-03-10 11:41 88% ` [PATCH 2/3] dt-bindings: arm: qcom: Add Sony Xperia Z3 Luca Weiss
2024-03-10 11:41 83% ` [PATCH 3/3] ARM: dts: qcom: Add Sony Xperia Z3 smartphone Luca Weiss
2024-03-10 11:52 88% ` Luca Weiss
2024-03-10 14:13 88% [PATCH 0/2] Add Samsung Galaxy Note 3 support Luca Weiss
2024-03-10 14:13 88% ` [PATCH 1/2] dt-bindings: arm: qcom: Add Samsung Galaxy Note 3 Luca Weiss
2024-03-10 14:13 62% ` [PATCH 2/2] ARM: dts: qcom: msm8974: " Luca Weiss
2024-03-11 14:23 ` [PATCH 0/2] Add Samsung Galaxy Note 3 support Rob Herring
2024-03-11 16:53 88% ` Luca Weiss
2024-03-13 12:53 99% [PATCH 0/2] Add Inline Crypto Engine for SC7280 UFS Luca Weiss
2024-03-13 12:53 99% ` [PATCH 1/2] dt-bindings: crypto: ice: Document sc7280 inline crypto engine Luca Weiss
2024-03-13 12:53 98% ` [PATCH 2/2] arm64: dts: qcom: sc7280: Add " Luca Weiss
2024-03-14 18:56 85% [PATCH v2 0/3] Split sony-castor into shinano-common and add Sony Xperia Z3 Luca Weiss
2024-03-14 18:56 41% ` [PATCH v2 1/3] ARM: dts: qcom: msm8974-sony-castor: Split into shinano-common Luca Weiss
2024-03-14 18:56 88% ` [PATCH v2 2/3] dt-bindings: arm: qcom: Add Sony Xperia Z3 Luca Weiss
2024-03-14 18:56 80% ` [PATCH v2 3/3] ARM: dts: qcom: Add Sony Xperia Z3 smartphone Luca Weiss
2024-03-14 19:00 88% [PATCH v2 0/2] Add Samsung Galaxy Note 3 support Luca Weiss
2024-03-14 19:00 88% ` [PATCH v2 1/2] dt-bindings: arm: qcom: Add Samsung Galaxy Note 3 Luca Weiss
2024-03-14 19:00 62% ` [PATCH v2 2/2] ARM: dts: qcom: msm8974: " Luca Weiss
2024-03-15 16:04 91% [PATCH] usb: typec: ptn36502: switch to DRM_AUX_BRIDGE Luca Weiss
2024-03-16 6:23 ERROR: modpost: "devm_drm_of_get_bridge" [drivers/usb/typec/mux/ptn36502.ko] undefined! kernel test robot
2024-03-18 7:55 99% ` Luca Weiss
2024-03-18 9:24 88% [PATCH 0/2] Small fixes for MSM8974 SoC dtsi Luca Weiss
2024-03-18 9:24 87% ` [PATCH 1/2] ARM: dts: qcom: msm8974: Add @0 to memory node name Luca Weiss
2024-03-18 9:24 88% ` [PATCH 2/2] ARM: dts: qcom: msm8974: Add empty chosen node Luca Weiss
2024-03-22 8:01 96% [PATCH 0/5] Add TCPM support for PM7250B and Fairphone 4 Luca Weiss
2024-03-22 8:01 98% ` [PATCH 1/5] dt-bindings: regulator: qcom,usb-vbus-regulator: Add PM7250B compatible Luca Weiss
2024-03-22 8:01 98% ` [PATCH 2/5] dt-bindings: usb: qcom,pmic-typec: Add support for the PM7250B PMIC Luca Weiss
2024-03-22 8:01 98% ` [PATCH 3/5] arm64: dts: qcom: pm7250b: Add node for PMIC VBUS booster Luca Weiss
2024-03-22 8:01 94% ` [PATCH 4/5] arm64: dts: qcom: pm7250b: Add a TCPM description Luca Weiss
2024-03-22 8:01 88% ` [PATCH 5/5] arm64: dts: qcom: sm7225-fairphone-fp4: Enable USB role switching Luca Weiss
2024-03-28 8:02 95% [PATCH] drm/msm/adreno: Set highest_bank_bit for A619 Luca Weiss
2024-03-28 9:42 96% [PATCH 0/3] DisplayPort support for SM6350/SM7225 Luca Weiss
2024-03-28 9:42 97% ` [PATCH 1/3] dt-bindings: display: msm: dp-controller: document SM8250 compatible Luca Weiss
2024-03-28 9:49 99% ` Luca Weiss
2024-03-28 9:42 97% ` [PATCH 2/3] dt-bindings: display: msm: sm6350-mdss: document DP controller subnode Luca Weiss
2024-03-28 9:42 92% ` [PATCH 3/3] arm64: dts: qcom: sm6350: Add DisplayPort controller Luca Weiss
2024-03-29 7:45 95% [PATCH v2 0/3] DisplayPort support for SM6350/SM7225 Luca Weiss
2024-03-29 7:45 97% ` [PATCH v2 1/3] dt-bindings: display: msm: dp-controller: document SM6350 compatible Luca Weiss
2024-03-29 7:45 97% ` [PATCH v2 2/3] dt-bindings: display: msm: sm6350-mdss: document DP controller subnode Luca Weiss
2024-03-29 7:45 92% ` [PATCH v2 3/3] arm64: dts: qcom: sm6350: Add DisplayPort controller Luca Weiss
2024-03-29 12:26 94% [PATCH v2 0/3] Add TCPM support for PM7250B and Fairphone 4 Luca Weiss
2024-03-29 12:26 99% ` [PATCH v2 1/3] arm64: dts: qcom: pm7250b: Add node for PMIC VBUS booster Luca Weiss
2024-03-29 12:26 95% ` [PATCH v2 2/3] arm64: dts: qcom: pm7250b: Add a TCPM description Luca Weiss
2024-03-29 12:26 89% ` [PATCH v2 3/3] arm64: dts: qcom: sm7225-fairphone-fp4: Enable USB role switching Luca Weiss
2024-04-04 12:35 [PATCH] usb: typec: ptn36502: fix CONFIG_OF dependency Arnd Bergmann
2024-04-04 12:37 99% ` Luca Weiss
2024-04-06 15:27 88% [PATCH] ARM: dts: qcom: msm8974-sony-shinano: Enable vibrator Luca Weiss
2024-04-06 15:31 88% [PATCH] Documentation: ABI: document in_temp_input file Luca Weiss
2024-04-06 16:45 ` Jonathan Cameron
2024-04-06 17:47 88% ` Luca Weiss
2024-04-07 9:58 81% [PATCH 0/3] Fix up qcom,halt-regs definition in various schemas Luca Weiss
2024-04-07 9:58 86% ` [PATCH 1/3] dt-bindings: remoteproc: qcom,qcs404-cdsp-pil: Fix qcom,halt-regs definition Luca Weiss
2024-04-07 9:58 86% ` [PATCH 2/3] dt-bindings: remoteproc: qcom,sc7280-wpss-pil: " Luca Weiss
2024-04-07 9:58 86% ` [PATCH 3/3] dt-bindings: remoteproc: qcom,sdm845-adsp-pil: " Luca Weiss
2024-04-09 15:10 ` [PATCH 0/3] Fix up qcom,halt-regs definition in various schemas Rob Herring
2024-04-09 18:32 88% ` Luca Weiss
2024-04-08 2:33 [PATCH 0/4] arm64: dts: qcom: add USB-C orientation GPIOs Dmitry Baryshkov
2024-04-08 7:02 99% ` Luca Weiss
2024-04-08 7:03 ` Dmitry Baryshkov
2024-04-08 7:04 99% ` Luca Weiss
2024-04-08 7:50 99% ` Luca Weiss
2024-04-08 11:47 [PATCH 0/4] clk: qcom: dispcc: fix DisplayPort link clocks Dmitry Baryshkov
2024-04-08 11:47 ` [PATCH 2/4] clk: qcom: dispcc-sm6350: fix DisplayPort clocks Dmitry Baryshkov
2024-04-11 11:33 99% ` Luca Weiss
2024-04-08 16:34 82% [PATCH] dt-bindings: iio: imu: mpu6050: Improve i2c-gate disallow list Luca Weiss
2024-04-08 16:39 88% [PATCH 0/2] Allow gpio-hog nodes in qcom,pmic-gpio bindings (& dt fixup) Luca Weiss
2024-04-08 16:39 86% ` [PATCH 1/2] dt-bindings: pinctrl: qcom,pmic-gpio: Allow gpio-hog nodes Luca Weiss
2024-04-08 17:26 ` Konrad Dybcio
2024-04-08 18:36 88% ` Luca Weiss
2024-04-08 16:39 87% ` [PATCH 2/2] ARM: dts: qcom: msm8974-hammerhead: Update gpio hog node name Luca Weiss
2024-04-08 19:32 87% [PATCH 0/2] Fix msm8974 apcs syscon compatible Luca Weiss
2024-04-08 19:32 87% ` [PATCH 1/2] dt-bindings: mailbox: qcom: Add MSM8974 APCS compatible Luca Weiss
2024-04-08 19:32 78% ` [PATCH 2/2] ARM: dts: qcom: msm8974: Use proper compatible for APCS syscon Luca Weiss
2024-04-09 18:36 87% [PATCH v2 0/2] Allow gpio-hog nodes in qcom,pmic-gpio bindings (& dt fixup) Luca Weiss
2024-04-09 18:36 86% ` [PATCH v2 1/2] dt-bindings: pinctrl: qcom,pmic-gpio: Allow gpio-hog nodes Luca Weiss
2024-04-09 18:36 87% ` [PATCH v2 2/2] ARM: dts: qcom: msm8974-hammerhead: Update gpio hog node name Luca Weiss
2024-04-11 7:06 98% [PATCH] arm64: dts: qcom: qcm6490-fairphone-fp5: Add USB-C orientation GPIO Luca Weiss
2024-04-12 14:19 96% [PATCH v2] media: dt-bindings: qcom,sc7280-venus: Allow one IOMMU entry Luca Weiss
2024-04-12 14:22 97% [PATCH v2] dt-bindings: mfd: qcom,spmi-pmic: Add pbs to SPMI device types Luca Weiss
2024-04-16 10:56 [PATCH v1] arm64: dts: qcom: sc7280: Remove CTS/RTS configuration Viken Dadhaniya
2024-04-16 11:38 98% ` Luca Weiss
2024-04-18 6:36 99% [PATCH 0/2] Enable vibrator on PMI632 + Fairphone 3 Luca Weiss
2024-04-18 6:36 99% ` [PATCH 1/2] arm64: dts: qcom: pmi632: Add vibrator Luca Weiss
2024-04-18 10:01 ` Konrad Dybcio
2024-04-18 10:03 99% ` Luca Weiss
2024-04-18 6:36 99% ` [PATCH 2/2] arm64: dts: qcom: sdm632-fairphone-fp3: Enable vibrator Luca Weiss
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