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received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: 0dczoCsZ62W8zLCdTd3LMlHpB7mTXoKjujRzuXcb7Al7+G/sJluDH6Sln8T0Dw+QWgoNbQPOgoEBKed5AP6yTgSVTeXmXiFJQwSI5g1xshgI6FSYUvIcJXWmAW7gUwC+ih7o7FhjyK53EyDWMevBwcSAZjRkHi0h1fSBKM7rWxF27n1OXg6bv01tFCQ+67MWQiKm/hMa77NYmUTgQ9sZVTZuEXkljZvhov5B2FhJ0B33By8mAwyA3LCC+V2O76Z7Y5CnWq+vhmOLrf99m8w1eabCoWM0u+y7l7lZ0zjZ8Fvqw6T4/2DUgJ244VF7vpVulWJCDZ1AYJC9DMW38bASy/veOZ48S3MGPlZZG1yUEhu+pkNU/lpoySmP7jxcgocoVsGzKqwLO3VbUxe67cb2GPgmwOTp0LHUYiatmCG1EZg= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 7783c7de-e7a0-43d2-16c1-08d74108065b X-MS-Exchange-CrossTenant-originalarrivaltime: 24 Sep 2019 15:58:21.7621 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: VwlBb0n5LXv/Eu24Va0FshGFl3ssvrRmM+sUAJIdhUFKPWCi2CFG8UIOyflug7muzzNkouhYArBkIh2i9PwPhw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB5602 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: Biwen Li > Sent: Monday, September 23, 2019 9:46 PM > To: Leo Li ; shawnguo@kernel.org; > robh+dt@kernel.org; mark.rutland@arm.com; Ran Wang > > Cc: linuxppc-dev@lists.ozlabs.org; linux-arm-kernel@lists.infradead.org; > linux-kernel@vger.kernel.org; devicetree@vger.kernel.org; Biwen Li > > Subject: [v3,3/3] Documentation: dt: binding: fsl: Add 'fsl,ippdexpcr-alt= -addr' > property >=20 > The 'fsl,ippdexpcr-alt-addr' property is used to handle an errata A-00864= 6 on > LS1021A >=20 > Signed-off-by: Biwen Li > --- > Change in v3: > - rename property name > fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr >=20 > Change in v2: > - update desc of the property 'fsl,rcpm-scfg' >=20 > Documentation/devicetree/bindings/soc/fsl/rcpm.txt | 14 > ++++++++++++++ > 1 file changed, 14 insertions(+) >=20 > diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > index 5a33619d881d..157dcf6da17c 100644 > --- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > @@ -34,6 +34,11 @@ Chassis Version Example Chips > Optional properties: > - little-endian : RCPM register block is Little Endian. Without it RCPM > will be Big Endian (default case). > + - fsl,ippdexpcr-alt-addr : Must add the property for SoC LS1021A, You probably should mention this is related to a hardware issue on LS1021a = and only needed on LS1021a. > + Must include n + 1 entries (n =3D #fsl,rcpm-wakeup-cells, such as: > + #fsl,rcpm-wakeup-cells equal to 2, then must include 2 + 1 entries). #fsl,rcpm-wakeup-cells is the number of IPPDEXPCR registers on an SoC. How= ever you are defining an offset to scfg registers here. Why these two are = related? The length here should actually be related to the #address-cells = of the soc/. But since this is only needed for LS1021, you can just make i= t 3. > + The first entry must be a link to the SCFG device node. > + The non-first entry must be offset of registers of SCFG. >=20 > Example: > The RCPM node for T4240: > @@ -43,6 +48,15 @@ The RCPM node for T4240: > #fsl,rcpm-wakeup-cells =3D <2>; > }; >=20 > +The RCPM node for LS1021A: > + rcpm: rcpm@1ee2140 { > + compatible =3D "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+"; > + reg =3D <0x0 0x1ee2140 0x0 0x8>; > + #fsl,rcpm-wakeup-cells =3D <2>; > + fsl,ippdexpcr-alt-addr =3D <&scfg 0x0 0x51c>; /* > SCFG_SPARECR8 */ > + }; > + > + > * Freescale RCPM Wakeup Source Device Tree Bindings > ------------------------------------------- > Required fsl,rcpm-wakeup property should be added to a device node if th= e > device > -- > 2.17.1