From: Xiaowei Bao <xiaowei.bao@nxp.com>
To: Andrew Murray <andrew.murray@arm.com>
Cc: "robh+dt@kernel.org" <robh+dt@kernel.org>,
"mark.rutland@arm.com" <mark.rutland@arm.com>,
"shawnguo@kernel.org" <shawnguo@kernel.org>,
Leo Li <leoyang.li@nxp.com>, "kishon@ti.com" <kishon@ti.com>,
"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
"M.h. Lian" <minghuan.lian@nxp.com>,
Mingkai Hu <mingkai.hu@nxp.com>, Roy Zang <roy.zang@nxp.com>,
"jingoohan1@gmail.com" <jingoohan1@gmail.com>,
"gustavo.pimentel@synopsys.com" <gustavo.pimentel@synopsys.com>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linuxppc-dev@lists.ozlabs.org" <linuxppc-dev@lists.ozlabs.org>,
"arnd@arndb.de" <arnd@arndb.de>,
"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
"Z.q. Hou" <zhiqiang.hou@nxp.com>
Subject: RE: [PATCH v3 10/11] arm64: dts: layerscape: Add PCIe EP node for ls1088a
Date: Tue, 3 Sep 2019 02:01:32 +0000 [thread overview]
Message-ID: <AM5PR04MB329926C6F424C4BE1CE9B787F5B90@AM5PR04MB3299.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <20190902130628.GL9720@e119886-lin.cambridge.arm.com>
> -----Original Message-----
> From: Andrew Murray <andrew.murray@arm.com>
> Sent: 2019年9月2日 21:06
> To: Xiaowei Bao <xiaowei.bao@nxp.com>
> Cc: robh+dt@kernel.org; mark.rutland@arm.com; shawnguo@kernel.org; Leo
> Li <leoyang.li@nxp.com>; kishon@ti.com; lorenzo.pieralisi@arm.com; M.h.
> Lian <minghuan.lian@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; Roy
> Zang <roy.zang@nxp.com>; jingoohan1@gmail.com;
> gustavo.pimentel@synopsys.com; linux-pci@vger.kernel.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; linuxppc-dev@lists.ozlabs.org;
> arnd@arndb.de; gregkh@linuxfoundation.org; Z.q. Hou
> <zhiqiang.hou@nxp.com>
> Subject: Re: [PATCH v3 10/11] arm64: dts: layerscape: Add PCIe EP node for
> ls1088a
>
> On Mon, Sep 02, 2019 at 11:17:15AM +0800, Xiaowei Bao wrote:
> > Add PCIe EP node for ls1088a to support EP mode.
> >
> > Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
> > ---
> > v2:
> > - Remove the pf-offset proparty.
> > v3:
> > - No change.
> >
> > arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 31
> ++++++++++++++++++++++++++
> > 1 file changed, 31 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> > index c676d07..da246ab 100644
> > --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> > @@ -483,6 +483,17 @@
> > status = "disabled";
> > };
> >
> > + pcie_ep@3400000 {
> > + compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";
>
> Here you specify a fallback "fsl,ls-pcie-ep" that is removed by this series.
>
> Besides that, this looks OK.
As explained, the "fsl,ls-pcie-ep" is needed, due to the u-boot will fixup the status
property base on this compatible, I think we reserve this compatible is helpfully,
if delate this compatible, I have to modify the code of bootloader.
Thanks
XIaowei
>
> Thanks,
>
> Andrew Murray
>
> > + reg = <0x00 0x03400000 0x0 0x00100000
> > + 0x20 0x00000000 0x8 0x00000000>;
> > + reg-names = "regs", "addr_space";
> > + num-ib-windows = <24>;
> > + num-ob-windows = <128>;
> > + max-functions = /bits/ 8 <2>;
> > + status = "disabled";
> > + };
> > +
> > pcie@3500000 {
> > compatible = "fsl,ls1088a-pcie";
> > reg = <0x00 0x03500000 0x0 0x00100000 /* controller
> registers */
> > @@ -508,6 +519,16 @@
> > status = "disabled";
> > };
> >
> > + pcie_ep@3500000 {
> > + compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";
> > + reg = <0x00 0x03500000 0x0 0x00100000
> > + 0x28 0x00000000 0x8 0x00000000>;
> > + reg-names = "regs", "addr_space";
> > + num-ib-windows = <6>;
> > + num-ob-windows = <8>;
> > + status = "disabled";
> > + };
> > +
> > pcie@3600000 {
> > compatible = "fsl,ls1088a-pcie";
> > reg = <0x00 0x03600000 0x0 0x00100000 /* controller
> registers */
> > @@ -533,6 +554,16 @@
> > status = "disabled";
> > };
> >
> > + pcie_ep@3600000 {
> > + compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";
> > + reg = <0x00 0x03600000 0x0 0x00100000
> > + 0x30 0x00000000 0x8 0x00000000>;
> > + reg-names = "regs", "addr_space";
> > + num-ib-windows = <6>;
> > + num-ob-windows = <8>;
> > + status = "disabled";
> > + };
> > +
> > smmu: iommu@5000000 {
> > compatible = "arm,mmu-500";
> > reg = <0 0x5000000 0 0x800000>;
> > --
> > 2.9.5
> >
next prev parent reply other threads:[~2019-09-03 2:01 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-02 3:17 [PATCH v3 00/11] *** SUBJECT HERE *** Xiaowei Bao
2019-09-02 3:17 ` [PATCH v3 01/11] PCI: designware-ep: Add multiple PFs support for DWC Xiaowei Bao
2019-09-02 16:26 ` Andrew Murray
2019-09-03 3:43 ` Xiaowei Bao
2019-09-26 10:29 ` Andrew Murray
2019-09-26 13:38 ` Gustavo Pimentel
2019-09-02 3:17 ` [PATCH v3 02/11] PCI: designware-ep: Add the doorbell mode of MSI-X in EP mode Xiaowei Bao
2019-09-02 3:17 ` [PATCH v3 03/11] PCI: designware-ep: Move the function of getting MSI capability forward Xiaowei Bao
2019-09-02 3:17 ` [PATCH v3 04/11] PCI: designware-ep: Modify MSI and MSIX CAP way of finding Xiaowei Bao
2019-09-02 15:07 ` Andrew Murray
2019-09-03 2:33 ` Xiaowei Bao
2019-09-02 3:17 ` [PATCH v3 05/11] dt-bindings: pci: layerscape-pci: add compatible strings for ls1088a and ls2088a Xiaowei Bao
2019-09-02 12:31 ` Andrew Murray
2019-09-03 1:33 ` Xiaowei Bao
2019-09-02 3:17 ` [PATCH v3 06/11] PCI: layerscape: Fix some format issue of the code Xiaowei Bao
2019-09-02 3:17 ` [PATCH v3 07/11] PCI: layerscape: Modify the way of getting capability with different PEX Xiaowei Bao
2019-09-02 13:37 ` Andrew Murray
2019-09-03 2:13 ` Xiaowei Bao
2019-09-02 3:17 ` [PATCH v3 08/11] PCI: layerscape: Modify the MSIX to the doorbell mode Xiaowei Bao
2019-09-02 12:01 ` Andrew Murray
2019-09-12 11:24 ` Gustavo Pimentel
2019-09-14 6:37 ` Xiaowei Bao
2019-09-16 8:54 ` Gustavo Pimentel
2019-09-02 3:17 ` [PATCH v3 09/11] PCI: layerscape: Add EP mode support for ls1088a and ls2088a Xiaowei Bao
2019-09-02 12:46 ` Andrew Murray
2019-09-03 1:47 ` Xiaowei Bao
2019-09-12 12:49 ` Andrew Murray
2019-09-14 4:10 ` Xiaowei Bao
2019-09-16 14:37 ` Andrew Murray
2019-09-18 3:17 ` Xiaowei Bao
2019-09-02 3:17 ` [PATCH v3 10/11] arm64: dts: layerscape: Add PCIe EP node for ls1088a Xiaowei Bao
2019-09-02 13:06 ` Andrew Murray
2019-09-03 2:01 ` Xiaowei Bao [this message]
2019-09-12 13:01 ` Andrew Murray
2019-09-14 4:15 ` Xiaowei Bao
2019-09-02 3:17 ` [PATCH v3 11/11] misc: pci_endpoint_test: Add LS1088a in pci_device_id table Xiaowei Bao
2019-09-02 12:54 ` Andrew Murray
2019-09-03 1:52 ` Xiaowei Bao
2019-09-12 12:59 ` Andrew Murray
2019-09-14 4:13 ` Xiaowei Bao
2019-09-02 3:52 ` [PATCH v3 00/11] *** SUBJECT HERE *** Z.q. Hou
2019-09-02 3:54 ` Xiaowei Bao
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