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x-ms-exchange-antispam-messagedata: z5QsRKz4uwjVt9uC7KC7Wb0K9TJbwKDQBXY1o665QIXn/DtCMtVWEzNSdqlDC7eGWpL9HG7oJX122hyjp1ZGTjQA/HMPXcqHwqQYjtRlYuEs4RT3sc9vax5wY2DesXNhAIxOsWSxhS3F11G0oNnsZ+b/ipg1OmHOUuxxijTy3YOAbqf7PW0UGxANTFvBrFCBBuQFqqTnxdgvpzWoRzOWScfqZcq3eb0b573Y/95wk/QT0ci8QyRKBAdtrfSP13KYpa8nZagB3l9S5ZV/OS14N+ohc+oqGO1V3j9EOyhJdjl8u+TngJxmb2bKZg+Pbr2NJsJE5mZFRCAT4QQP27s+Gy+LKqN/1O9CjiM10J4T4E7kGIKHblbUISuxFlW0TqVy0rKDAGrD+u4Yfb9GbRH00YqrDwRXP6vgPkbaKmLUnAFWLA79WWzEEtzyIcY1DEaM4565ZHGD/jhTjGHUkCt7H5zrzuMcsIMIv0RDg4e78jCbF3e5FOtwgPFq5C2C2mGv/ugYi/NfcyuVPtSq2hAbdvnognAalwpEtSeiky1HGv1K4Mzk/U4H+XRDr+R2o1kOMPx+KLe5FwwrqEUK0R9BO7rbb1PgXCSLB/qxHwp6yl0BNUvdfhhDo0sbhAppPw1h2f+pDmkakiSlmWWIN61rcg== Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AM6PR04MB5413.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1e2cacb3-af09-404f-b502-08d862b63dde X-MS-Exchange-CrossTenant-originalarrivaltime: 27 Sep 2020 07:23:33.3880 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: mTrTw2c8upL7VRqrOVk3fqmHDMLO9TogowTWSLlb3RFAaUDAmQzffbWTtpAcbghzmgkvSdxXWV270fY7QMCm/A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM6PR04MB5206 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Rob Not sure whether you have missed this mail with my query. Regards, Ran On Wednesday, September 23, 2020 2:44 PM Ran Wang wrote: >=20 > Hi Rob, >=20 > On Wednesday, September 23, 2020 10:33 AM, Rob Herring wrote: > > > > On Wed, Sep 16, 2020 at 04:18:27PM +0800, Ran Wang wrote: > > > From: Biwen Li > > > > > > The 'fsl,ippdexpcr1-alt-addr' property is used to handle an errata > > > A-008646 on LS1021A > > > > > > Signed-off-by: Biwen Li > > > Signed-off-by: Ran Wang > > > --- > > > Documentation/devicetree/bindings/soc/fsl/rcpm.txt | 19 > > > +++++++++++++++++++ > > > 1 file changed, 19 insertions(+) > > > > > > diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > index 5a33619..1be58a3 100644 > > > --- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > @@ -34,6 +34,11 @@ Chassis Version Example Chips > > > Optional properties: > > > - little-endian : RCPM register block is Little Endian. Without it = RCPM > > > will be Big Endian (default case). > > > + - fsl,ippdexpcr1-alt-addr : The property is related to a hardware i= ssue > > > + on SoC LS1021A and only needed on SoC LS1021A. > > > + Must include 2 entries: > > > + The first entry must be a link to the SCFG device node. > > > + The 2nd entry must be offset of register IPPDEXPCR1 in SCFG. > > > > You don't need a DT change for this. You can find SCFG node by its > > compatible string and then the offset should be known given this issue = is > only on 1 SoC. >=20 > Did you mean that RCPM driver just to access IPPDEXPCR1 shadowed register > in SCFG directly without fetching it's offset info. from DT? >=20 > Regards, > Ran