* [PATCH 1/2] dt-bindings: arm64: add compatible for LX2162A QDS Board
@ 2020-09-02 15:13 meenakshi.aggarwal
2020-09-02 15:13 ` [PATCH 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds board meenakshi.aggarwal
2020-09-14 20:23 ` [PATCH 1/2] dt-bindings: arm64: add compatible for LX2162A QDS Board Rob Herring
0 siblings, 2 replies; 20+ messages in thread
From: meenakshi.aggarwal @ 2020-09-02 15:13 UTC (permalink / raw)
To: shawnguo, robh+dt, V.sethi, leoyang.li, linux-arm-kernel,
devicetree, linux-kernel
Cc: Meenakshi Aggarwal
From: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Add support for LX2162A, LX2162A is LX2160A based SoC.
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
---
Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index 6da9d73..5c7b7dd 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -518,6 +518,7 @@ properties:
- enum:
- fsl,lx2160a-qds
- fsl,lx2160a-rdb
+ - fsl,lx2162a-qds
- const: fsl,lx2160a
- description: S32V234 based Boards
--
2.7.4
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds board
2020-09-02 15:13 [PATCH 1/2] dt-bindings: arm64: add compatible for LX2162A QDS Board meenakshi.aggarwal
@ 2020-09-02 15:13 ` meenakshi.aggarwal
2020-09-05 7:54 ` Shawn Guo
2020-09-29 10:01 ` [PATCH v3 0/2] Add device tree support for LX2162AQDS board meenakshi.aggarwal
2020-09-14 20:23 ` [PATCH 1/2] dt-bindings: arm64: add compatible for LX2162A QDS Board Rob Herring
1 sibling, 2 replies; 20+ messages in thread
From: meenakshi.aggarwal @ 2020-09-02 15:13 UTC (permalink / raw)
To: shawnguo, robh+dt, V.sethi, leoyang.li, linux-arm-kernel,
devicetree, linux-kernel
Cc: Meenakshi Aggarwal, Ioana Ciornei, Kuldeep Singh
From: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Add device tree support for LX2162AQDS board.
LX2162A has same die as of LX2160A with different packaging.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
---
arch/arm64/boot/dts/freescale/Makefile | 1 +
arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts | 336 ++++++++++++++++++++++
2 files changed, 337 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index a39f0a1..ab9fbd3 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -27,6 +27,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-clearfog-cx.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-honeycomb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2162a-qds.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-evk.dtb
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
new file mode 100644
index 0000000..a81c6a4
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
@@ -0,0 +1,336 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+//
+// Device Tree file for LX2162AQDS
+//
+// Copyright 2020 NXP
+
+/dts-v1/;
+
+#include "fsl-lx2160a.dtsi"
+
+/ {
+ model = "NXP Layerscape LX2162AQDS";
+ compatible = "nxp,lx2162a-qds", "fsl,lx2160a";
+
+ aliases {
+ crypto = &crypto;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ sb_3v3: regulator-sb3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "MC34717-3.3VSB";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ mdio-mux-1 {
+ compatible = "mdio-mux-multiplexer";
+ mux-controls = <&mux 0>;
+ mdio-parent-bus = <&emdio1>;
+ #address-cells=<1>;
+ #size-cells = <0>;
+
+ mdio@0 { /* On-board RTL8211F PHY #1 RGMII1*/
+ reg = <0x00>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rgmii_phy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-id001c.c916";
+ reg = <0x1>;
+ eee-broken-1000t;
+ };
+ };
+
+ mdio@8 { /* On-board RTL8211F PHY #2 RGMII2*/
+ reg = <0x8>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rgmii_phy2: ethernet-phy@2 {
+ compatible = "ethernet-phy-id001c.c916";
+ reg = <0x2>;
+ eee-broken-1000t;
+ };
+ };
+
+ mdio@18 { /* Slot #1 */
+ reg = <0x18>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@19 { /* Slot #2 */
+ reg = <0x19>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@1a { /* Slot #3 */
+ reg = <0x1a>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@1b { /* Slot #4 */
+ reg = <0x1b>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@1c { /* Slot #5 */
+ reg = <0x1c>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@1d { /* Slot #6 */
+ reg = <0x1d>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@1e { /* Slot #7 */
+ reg = <0x1e>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@1f { /* Slot #8 */
+ reg = <0x1f>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ mdio-mux-2 {
+ compatible = "mdio-mux-multiplexer";
+ mux-controls = <&mux 1>;
+ mdio-parent-bus = <&emdio2>;
+ #address-cells=<1>;
+ #size-cells = <0>;
+
+ mdio@0 { /* Slot #1 (secondary EMI) */
+ reg = <0x00>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@1 { /* Slot #2 (secondary EMI) */
+ reg = <0x01>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@2 { /* Slot #3 (secondary EMI) */
+ reg = <0x02>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@3 { /* Slot #4 (secondary EMI) */
+ reg = <0x03>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@4 { /* Slot #5 (secondary EMI) */
+ reg = <0x04>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@5 { /* Slot #6 (secondary EMI) */
+ reg = <0x05>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@6 { /* Slot #7 (secondary EMI) */
+ reg = <0x06>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@7 { /* Slot #8 (secondary EMI) */
+ reg = <0x07>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+};
+
+&crypto {
+ status = "okay";
+};
+
+&dpmac17 {
+ phy-handle = <&rgmii_phy1>;
+ phy-connection-type = "rgmii-id";
+};
+
+&dpmac18 {
+ phy-handle = <&rgmii_phy2>;
+ phy-connection-type = "rgmii-id";
+};
+
+&dspi0 {
+ status = "okay";
+
+ dflash0: flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&dspi1 {
+ status = "okay";
+
+ dflash1: flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&dspi2 {
+ status = "okay";
+
+ dflash2: flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&emdio1 {
+ status = "okay";
+};
+
+&emdio2 {
+ status = "okay";
+};
+
+&esdhc0 {
+ status = "okay";
+};
+
+&esdhc1 {
+ status = "okay";
+};
+
+&fspi {
+ status = "okay";
+
+ mt35xu512aba0: flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ m25p,fast-read;
+ spi-max-frequency = <50000000>;
+ reg = <0>;
+ spi-rx-bus-width = <8>;
+ spi-tx-bus-width = <8>;
+ };
+};
+
+&i2c0 {
+ status = "okay";
+
+ fpga@66 {
+ compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c",
+ "simple-mfd";
+ reg = <0x66>;
+
+ mux: mux-controller {
+ compatible = "reg-mux";
+ #mux-control-cells = <1>;
+ mux-reg-masks = <0x54 0xf8>, /* 0: reg 0x54, bits 7:3 */
+ <0x54 0x07>; /* 1: reg 0x54, bit 2:0 */
+ };
+ };
+
+ i2c-mux@77 {
+ compatible = "nxp,pca9547";
+ reg = <0x77>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x2>;
+
+ power-monitor@40 {
+ compatible = "ti,ina220";
+ reg = <0x40>;
+ shunt-resistor = <500>;
+ };
+
+ power-monitor@41 {
+ compatible = "ti,ina220";
+ reg = <0x41>;
+ shunt-resistor = <1000>;
+ };
+ };
+
+ i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x3>;
+
+ temperature-sensor@4c {
+ compatible = "nxp,sa56004";
+ reg = <0x4c>;
+ vcc-supply = <&sb_3v3>;
+ };
+
+ rtc@51 {
+ compatible = "nxp,pcf2129";
+ reg = <0x51>;
+ };
+ };
+ };
+};
+
+&sata0 {
+ status = "okay";
+};
+
+&sata1 {
+ status = "okay";
+};
+
+&sata2 {
+ status = "okay";
+};
+
+&sata3 {
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+};
--
2.7.4
^ permalink raw reply related [flat|nested] 20+ messages in thread
* Re: [PATCH 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds board
2020-09-02 15:13 ` [PATCH 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds board meenakshi.aggarwal
@ 2020-09-05 7:54 ` Shawn Guo
2020-09-09 7:10 ` Meenakshi Aggarwal
2020-09-29 10:01 ` [PATCH v3 0/2] Add device tree support for LX2162AQDS board meenakshi.aggarwal
1 sibling, 1 reply; 20+ messages in thread
From: Shawn Guo @ 2020-09-05 7:54 UTC (permalink / raw)
To: meenakshi.aggarwal
Cc: robh+dt, V.sethi, leoyang.li, linux-arm-kernel, devicetree,
linux-kernel, Ioana Ciornei, Kuldeep Singh
On Wed, Sep 02, 2020 at 08:43:30PM +0530, meenakshi.aggarwal@nxp.com wrote:
> From: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
>
> Add device tree support for LX2162AQDS board.
> LX2162A has same die as of LX2160A with different packaging.
>
> Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
> Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
> Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> ---
> arch/arm64/boot/dts/freescale/Makefile | 1 +
> arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts | 336 ++++++++++++++++++++++
> 2 files changed, 337 insertions(+)
> create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
>
> diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
> index a39f0a1..ab9fbd3 100644
> --- a/arch/arm64/boot/dts/freescale/Makefile
> +++ b/arch/arm64/boot/dts/freescale/Makefile
> @@ -27,6 +27,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-clearfog-cx.dtb
> dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-honeycomb.dtb
> dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-qds.dtb
> dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
> +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2162a-qds.dtb
>
> dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx8mn-evk.dtb
> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
> new file mode 100644
> index 0000000..a81c6a4
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
> @@ -0,0 +1,336 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +//
> +// Device Tree file for LX2162AQDS
> +//
> +// Copyright 2020 NXP
> +
> +/dts-v1/;
> +
> +#include "fsl-lx2160a.dtsi"
> +
> +/ {
> + model = "NXP Layerscape LX2162AQDS";
> + compatible = "nxp,lx2162a-qds", "fsl,lx2160a";
> +
> + aliases {
> + crypto = &crypto;
> + serial0 = &uart0;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + sb_3v3: regulator-sb3v3 {
> + compatible = "regulator-fixed";
> + regulator-name = "MC34717-3.3VSB";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
I do not see any point to have regulator-boot-on or regulator-always-on
for a regulator that doesn't have on/off control.
> + };
> +
> + mdio-mux-1 {
> + compatible = "mdio-mux-multiplexer";
> + mux-controls = <&mux 0>;
> + mdio-parent-bus = <&emdio1>;
> + #address-cells=<1>;
> + #size-cells = <0>;
> +
> + mdio@0 { /* On-board RTL8211F PHY #1 RGMII1*/
> + reg = <0x00>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + rgmii_phy1: ethernet-phy@1 {
> + compatible = "ethernet-phy-id001c.c916";
> + reg = <0x1>;
> + eee-broken-1000t;
> + };
> + };
> +
> + mdio@8 { /* On-board RTL8211F PHY #2 RGMII2*/
Missing one space before closing comment.
Shawn
> + reg = <0x8>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + rgmii_phy2: ethernet-phy@2 {
> + compatible = "ethernet-phy-id001c.c916";
> + reg = <0x2>;
> + eee-broken-1000t;
> + };
> + };
> +
> + mdio@18 { /* Slot #1 */
> + reg = <0x18>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mdio@19 { /* Slot #2 */
> + reg = <0x19>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mdio@1a { /* Slot #3 */
> + reg = <0x1a>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mdio@1b { /* Slot #4 */
> + reg = <0x1b>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mdio@1c { /* Slot #5 */
> + reg = <0x1c>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mdio@1d { /* Slot #6 */
> + reg = <0x1d>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mdio@1e { /* Slot #7 */
> + reg = <0x1e>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mdio@1f { /* Slot #8 */
> + reg = <0x1f>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> + };
> +
> + mdio-mux-2 {
> + compatible = "mdio-mux-multiplexer";
> + mux-controls = <&mux 1>;
> + mdio-parent-bus = <&emdio2>;
> + #address-cells=<1>;
> + #size-cells = <0>;
> +
> + mdio@0 { /* Slot #1 (secondary EMI) */
> + reg = <0x00>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mdio@1 { /* Slot #2 (secondary EMI) */
> + reg = <0x01>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mdio@2 { /* Slot #3 (secondary EMI) */
> + reg = <0x02>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mdio@3 { /* Slot #4 (secondary EMI) */
> + reg = <0x03>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mdio@4 { /* Slot #5 (secondary EMI) */
> + reg = <0x04>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mdio@5 { /* Slot #6 (secondary EMI) */
> + reg = <0x05>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mdio@6 { /* Slot #7 (secondary EMI) */
> + reg = <0x06>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mdio@7 { /* Slot #8 (secondary EMI) */
> + reg = <0x07>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> + };
> +};
> +
> +&crypto {
> + status = "okay";
> +};
> +
> +&dpmac17 {
> + phy-handle = <&rgmii_phy1>;
> + phy-connection-type = "rgmii-id";
> +};
> +
> +&dpmac18 {
> + phy-handle = <&rgmii_phy2>;
> + phy-connection-type = "rgmii-id";
> +};
> +
> +&dspi0 {
> + status = "okay";
> +
> + dflash0: flash@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + spi-max-frequency = <1000000>;
> + };
> +};
> +
> +&dspi1 {
> + status = "okay";
> +
> + dflash1: flash@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + spi-max-frequency = <1000000>;
> + };
> +};
> +
> +&dspi2 {
> + status = "okay";
> +
> + dflash2: flash@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + spi-max-frequency = <1000000>;
> + };
> +};
> +
> +&emdio1 {
> + status = "okay";
> +};
> +
> +&emdio2 {
> + status = "okay";
> +};
> +
> +&esdhc0 {
> + status = "okay";
> +};
> +
> +&esdhc1 {
> + status = "okay";
> +};
> +
> +&fspi {
> + status = "okay";
> +
> + mt35xu512aba0: flash@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "jedec,spi-nor";
> + m25p,fast-read;
> + spi-max-frequency = <50000000>;
> + reg = <0>;
> + spi-rx-bus-width = <8>;
> + spi-tx-bus-width = <8>;
> + };
> +};
> +
> +&i2c0 {
> + status = "okay";
> +
> + fpga@66 {
> + compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c",
> + "simple-mfd";
> + reg = <0x66>;
> +
> + mux: mux-controller {
> + compatible = "reg-mux";
> + #mux-control-cells = <1>;
> + mux-reg-masks = <0x54 0xf8>, /* 0: reg 0x54, bits 7:3 */
> + <0x54 0x07>; /* 1: reg 0x54, bit 2:0 */
> + };
> + };
> +
> + i2c-mux@77 {
> + compatible = "nxp,pca9547";
> + reg = <0x77>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + i2c@2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x2>;
> +
> + power-monitor@40 {
> + compatible = "ti,ina220";
> + reg = <0x40>;
> + shunt-resistor = <500>;
> + };
> +
> + power-monitor@41 {
> + compatible = "ti,ina220";
> + reg = <0x41>;
> + shunt-resistor = <1000>;
> + };
> + };
> +
> + i2c@3 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x3>;
> +
> + temperature-sensor@4c {
> + compatible = "nxp,sa56004";
> + reg = <0x4c>;
> + vcc-supply = <&sb_3v3>;
> + };
> +
> + rtc@51 {
> + compatible = "nxp,pcf2129";
> + reg = <0x51>;
> + };
> + };
> + };
> +};
> +
> +&sata0 {
> + status = "okay";
> +};
> +
> +&sata1 {
> + status = "okay";
> +};
> +
> +&sata2 {
> + status = "okay";
> +};
> +
> +&sata3 {
> + status = "okay";
> +};
> +
> +&uart0 {
> + status = "okay";
> +};
> +
> +&uart1 {
> + status = "okay";
> +};
> +
> +&usb0 {
> + status = "okay";
> +};
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* RE: [PATCH 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds board
2020-09-05 7:54 ` Shawn Guo
@ 2020-09-09 7:10 ` Meenakshi Aggarwal
2020-09-12 9:49 ` Shawn Guo
0 siblings, 1 reply; 20+ messages in thread
From: Meenakshi Aggarwal @ 2020-09-09 7:10 UTC (permalink / raw)
To: Shawn Guo
Cc: robh+dt, Varun Sethi, Leo Li, linux-arm-kernel, devicetree,
linux-kernel, Ioana Ciornei, Kuldeep Singh
> -----Original Message-----
> From: Shawn Guo <shawnguo@kernel.org>
> Sent: Saturday, September 5, 2020 1:24 PM
> To: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> Cc: robh+dt@kernel.org; Varun Sethi <V.Sethi@nxp.com>; Leo Li
> <leoyang.li@nxp.com>; linux-arm-kernel@lists.infradead.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; Ioana Ciornei
> <ioana.ciornei@nxp.com>; Kuldeep Singh <kuldeep.singh@nxp.com>
> Subject: Re: [PATCH 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds
> board
>
> On Wed, Sep 02, 2020 at 08:43:30PM +0530, meenakshi.aggarwal@nxp.com
> wrote:
> > From: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> >
> > Add device tree support for LX2162AQDS board.
> > LX2162A has same die as of LX2160A with different packaging.
> >
> > Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
> > Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
> > Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> > ---
> > arch/arm64/boot/dts/freescale/Makefile | 1 +
> > arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts | 336
> > ++++++++++++++++++++++
> > 2 files changed, 337 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
> >
> > diff --git a/arch/arm64/boot/dts/freescale/Makefile
> > b/arch/arm64/boot/dts/freescale/Makefile
> > index a39f0a1..ab9fbd3 100644
> > --- a/arch/arm64/boot/dts/freescale/Makefile
> > +++ b/arch/arm64/boot/dts/freescale/Makefile
> > @@ -27,6 +27,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) +=
> > fsl-lx2160a-clearfog-cx.dtb
> > dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-honeycomb.dtb
> > dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-qds.dtb
> > dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
> > +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2162a-qds.dtb
> >
> > dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
> > dtb-$(CONFIG_ARCH_MXC) += imx8mn-evk.dtb diff --git
> > a/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
> > b/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
> > new file mode 100644
> > index 0000000..a81c6a4
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
> > @@ -0,0 +1,336 @@
> > +// SPDX-License-Identifier: (GPL-2.0 OR MIT) // // Device Tree file
> > +for LX2162AQDS // // Copyright 2020 NXP
> > +
> > +/dts-v1/;
> > +
> > +#include "fsl-lx2160a.dtsi"
> > +
> > +/ {
> > + model = "NXP Layerscape LX2162AQDS";
> > + compatible = "nxp,lx2162a-qds", "fsl,lx2160a";
> > +
> > + aliases {
> > + crypto = &crypto;
> > + serial0 = &uart0;
> > + };
> > +
> > + chosen {
> > + stdout-path = "serial0:115200n8";
> > + };
> > +
> > + sb_3v3: regulator-sb3v3 {
> > + compatible = "regulator-fixed";
> > + regulator-name = "MC34717-3.3VSB";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + regulator-boot-on;
> > + regulator-always-on;
>
> I do not see any point to have regulator-boot-on or regulator-always-on for a
> regulator that doesn't have on/off control.
[Meenakshi Aggarwal] Properties are added to specify that platform firmware's out of reset configuration enabled the regulator and
regulator should never be disabled or change its operative status.
Can you help in understanding why these optional properties cannot be used together
>
> > + };
> > +
> > + mdio-mux-1 {
> > + compatible = "mdio-mux-multiplexer";
> > + mux-controls = <&mux 0>;
> > + mdio-parent-bus = <&emdio1>;
> > + #address-cells=<1>;
> > + #size-cells = <0>;
> > +
> > + mdio@0 { /* On-board RTL8211F PHY #1 RGMII1*/
> > + reg = <0x00>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + rgmii_phy1: ethernet-phy@1 {
> > + compatible = "ethernet-phy-id001c.c916";
> > + reg = <0x1>;
> > + eee-broken-1000t;
> > + };
> > + };
> > +
> > + mdio@8 { /* On-board RTL8211F PHY #2 RGMII2*/
>
> Missing one space before closing comment.
[Meenakshi Aggarwal] will correct in next version
>
> Shawn
>
> > + reg = <0x8>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + rgmii_phy2: ethernet-phy@2 {
> > + compatible = "ethernet-phy-id001c.c916";
> > + reg = <0x2>;
> > + eee-broken-1000t;
> > + };
> > + };
> > +
> > + mdio@18 { /* Slot #1 */
> > + reg = <0x18>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + };
> > +
> > + mdio@19 { /* Slot #2 */
> > + reg = <0x19>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + };
> > +
> > + mdio@1a { /* Slot #3 */
> > + reg = <0x1a>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + };
> > +
> > + mdio@1b { /* Slot #4 */
> > + reg = <0x1b>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + };
> > +
> > + mdio@1c { /* Slot #5 */
> > + reg = <0x1c>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + };
> > +
> > + mdio@1d { /* Slot #6 */
> > + reg = <0x1d>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + };
> > +
> > + mdio@1e { /* Slot #7 */
> > + reg = <0x1e>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + };
> > +
> > + mdio@1f { /* Slot #8 */
> > + reg = <0x1f>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + };
> > + };
> > +
> > + mdio-mux-2 {
> > + compatible = "mdio-mux-multiplexer";
> > + mux-controls = <&mux 1>;
> > + mdio-parent-bus = <&emdio2>;
> > + #address-cells=<1>;
> > + #size-cells = <0>;
> > +
> > + mdio@0 { /* Slot #1 (secondary EMI) */
> > + reg = <0x00>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + };
> > +
> > + mdio@1 { /* Slot #2 (secondary EMI) */
> > + reg = <0x01>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + };
> > +
> > + mdio@2 { /* Slot #3 (secondary EMI) */
> > + reg = <0x02>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + };
> > +
> > + mdio@3 { /* Slot #4 (secondary EMI) */
> > + reg = <0x03>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + };
> > +
> > + mdio@4 { /* Slot #5 (secondary EMI) */
> > + reg = <0x04>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + };
> > +
> > + mdio@5 { /* Slot #6 (secondary EMI) */
> > + reg = <0x05>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + };
> > +
> > + mdio@6 { /* Slot #7 (secondary EMI) */
> > + reg = <0x06>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + };
> > +
> > + mdio@7 { /* Slot #8 (secondary EMI) */
> > + reg = <0x07>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + };
> > + };
> > +};
> > +
> > +&crypto {
> > + status = "okay";
> > +};
> > +
> > +&dpmac17 {
> > + phy-handle = <&rgmii_phy1>;
> > + phy-connection-type = "rgmii-id";
> > +};
> > +
> > +&dpmac18 {
> > + phy-handle = <&rgmii_phy2>;
> > + phy-connection-type = "rgmii-id";
> > +};
> > +
> > +&dspi0 {
> > + status = "okay";
> > +
> > + dflash0: flash@0 {
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + compatible = "jedec,spi-nor";
> > + reg = <0>;
> > + spi-max-frequency = <1000000>;
> > + };
> > +};
> > +
> > +&dspi1 {
> > + status = "okay";
> > +
> > + dflash1: flash@0 {
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + compatible = "jedec,spi-nor";
> > + reg = <0>;
> > + spi-max-frequency = <1000000>;
> > + };
> > +};
> > +
> > +&dspi2 {
> > + status = "okay";
> > +
> > + dflash2: flash@0 {
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + compatible = "jedec,spi-nor";
> > + reg = <0>;
> > + spi-max-frequency = <1000000>;
> > + };
> > +};
> > +
> > +&emdio1 {
> > + status = "okay";
> > +};
> > +
> > +&emdio2 {
> > + status = "okay";
> > +};
> > +
> > +&esdhc0 {
> > + status = "okay";
> > +};
> > +
> > +&esdhc1 {
> > + status = "okay";
> > +};
> > +
> > +&fspi {
> > + status = "okay";
> > +
> > + mt35xu512aba0: flash@0 {
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + compatible = "jedec,spi-nor";
> > + m25p,fast-read;
> > + spi-max-frequency = <50000000>;
> > + reg = <0>;
> > + spi-rx-bus-width = <8>;
> > + spi-tx-bus-width = <8>;
> > + };
> > +};
> > +
> > +&i2c0 {
> > + status = "okay";
> > +
> > + fpga@66 {
> > + compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c",
> > + "simple-mfd";
> > + reg = <0x66>;
> > +
> > + mux: mux-controller {
> > + compatible = "reg-mux";
> > + #mux-control-cells = <1>;
> > + mux-reg-masks = <0x54 0xf8>, /* 0: reg 0x54, bits 7:3
> */
> > + <0x54 0x07>; /* 1: reg 0x54, bit 2:0 */
> > + };
> > + };
> > +
> > + i2c-mux@77 {
> > + compatible = "nxp,pca9547";
> > + reg = <0x77>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + i2c@2 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <0x2>;
> > +
> > + power-monitor@40 {
> > + compatible = "ti,ina220";
> > + reg = <0x40>;
> > + shunt-resistor = <500>;
> > + };
> > +
> > + power-monitor@41 {
> > + compatible = "ti,ina220";
> > + reg = <0x41>;
> > + shunt-resistor = <1000>;
> > + };
> > + };
> > +
> > + i2c@3 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <0x3>;
> > +
> > + temperature-sensor@4c {
> > + compatible = "nxp,sa56004";
> > + reg = <0x4c>;
> > + vcc-supply = <&sb_3v3>;
> > + };
> > +
> > + rtc@51 {
> > + compatible = "nxp,pcf2129";
> > + reg = <0x51>;
> > + };
> > + };
> > + };
> > +};
> > +
> > +&sata0 {
> > + status = "okay";
> > +};
> > +
> > +&sata1 {
> > + status = "okay";
> > +};
> > +
> > +&sata2 {
> > + status = "okay";
> > +};
> > +
> > +&sata3 {
> > + status = "okay";
> > +};
> > +
> > +&uart0 {
> > + status = "okay";
> > +};
> > +
> > +&uart1 {
> > + status = "okay";
> > +};
> > +
> > +&usb0 {
> > + status = "okay";
> > +};
> > --
> > 2.7.4
> >
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds board
2020-09-09 7:10 ` Meenakshi Aggarwal
@ 2020-09-12 9:49 ` Shawn Guo
2020-09-21 6:00 ` Meenakshi Aggarwal
0 siblings, 1 reply; 20+ messages in thread
From: Shawn Guo @ 2020-09-12 9:49 UTC (permalink / raw)
To: Meenakshi Aggarwal
Cc: robh+dt, Varun Sethi, Leo Li, linux-arm-kernel, devicetree,
linux-kernel, Ioana Ciornei, Kuldeep Singh
On Wed, Sep 09, 2020 at 07:10:12AM +0000, Meenakshi Aggarwal wrote:
> > > + sb_3v3: regulator-sb3v3 {
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "MC34717-3.3VSB";
> > > + regulator-min-microvolt = <3300000>;
> > > + regulator-max-microvolt = <3300000>;
> > > + regulator-boot-on;
> > > + regulator-always-on;
> >
> > I do not see any point to have regulator-boot-on or regulator-always-on for a
> > regulator that doesn't have on/off control.
> [Meenakshi Aggarwal] Properties are added to specify that platform firmware's out of reset configuration enabled the regulator and
> regulator should never be disabled or change its operative status.
What I was wondering if how this regulator is enabled by firmware, by
some GPIO control? In that case, 'gpio' property should be there to
describe the GPIO control.
>
> Can you help in understanding why these optional properties cannot be used together
It's totally fine to use these properties together. But if the
regulator doesn't have on/off control, neither of them makes sense.
Shawn
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 1/2] dt-bindings: arm64: add compatible for LX2162A QDS Board
2020-09-02 15:13 [PATCH 1/2] dt-bindings: arm64: add compatible for LX2162A QDS Board meenakshi.aggarwal
2020-09-02 15:13 ` [PATCH 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds board meenakshi.aggarwal
@ 2020-09-14 20:23 ` Rob Herring
1 sibling, 0 replies; 20+ messages in thread
From: Rob Herring @ 2020-09-14 20:23 UTC (permalink / raw)
To: meenakshi.aggarwal
Cc: linux-arm-kernel, devicetree, leoyang.li, robh+dt, shawnguo,
V.sethi, linux-kernel
On Wed, 02 Sep 2020 20:43:29 +0530, meenakshi.aggarwal@nxp.com wrote:
> From: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
>
> Add support for LX2162A, LX2162A is LX2160A based SoC.
>
> Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> ---
> Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 20+ messages in thread
* RE: [PATCH 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds board
2020-09-12 9:49 ` Shawn Guo
@ 2020-09-21 6:00 ` Meenakshi Aggarwal
2020-09-21 13:03 ` Shawn Guo
0 siblings, 1 reply; 20+ messages in thread
From: Meenakshi Aggarwal @ 2020-09-21 6:00 UTC (permalink / raw)
To: Shawn Guo
Cc: robh+dt, Varun Sethi, Leo Li, linux-arm-kernel, devicetree,
linux-kernel, Ioana Ciornei, Kuldeep Singh
> -----Original Message-----
> From: Shawn Guo <shawnguo@kernel.org>
> Sent: Saturday, September 12, 2020 3:19 PM
> To: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> Cc: robh+dt@kernel.org; Varun Sethi <V.Sethi@nxp.com>; Leo Li
> <leoyang.li@nxp.com>; linux-arm-kernel@lists.infradead.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; Ioana Ciornei
> <ioana.ciornei@nxp.com>; Kuldeep Singh <kuldeep.singh@nxp.com>
> Subject: Re: [PATCH 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds
> board
>
> On Wed, Sep 09, 2020 at 07:10:12AM +0000, Meenakshi Aggarwal wrote:
> > > > + sb_3v3: regulator-sb3v3 {
> > > > + compatible = "regulator-fixed";
> > > > + regulator-name = "MC34717-3.3VSB";
> > > > + regulator-min-microvolt = <3300000>;
> > > > + regulator-max-microvolt = <3300000>;
> > > > + regulator-boot-on;
> > > > + regulator-always-on;
> > >
> > > I do not see any point to have regulator-boot-on or
> > > regulator-always-on for a regulator that doesn't have on/off control.
> > [Meenakshi Aggarwal] Properties are added to specify that platform
> > firmware's out of reset configuration enabled the regulator and regulator
> should never be disabled or change its operative status.
>
> What I was wondering if how this regulator is enabled by firmware, by some
> GPIO control? In that case, 'gpio' property should be there to describe the GPIO
> control.
>
[Meenakshi Aggarwal] Its not controlled by GPIO. Its gets power on with board.
> >
> > Can you help in understanding why these optional properties cannot be
> > used together
>
> It's totally fine to use these properties together. But if the regulator doesn't
> have on/off control, neither of them makes sense.
[Meenakshi Aggarwal] As per documentation, we should keep " regulator-always-on " as per description, we
Can remove " regulator-boot-on" property from dts.
regulator-always-on:
description: boolean, regulator should never be disabled
.
>
> Shawn
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds board
2020-09-21 6:00 ` Meenakshi Aggarwal
@ 2020-09-21 13:03 ` Shawn Guo
2020-09-21 13:34 ` Meenakshi Aggarwal
0 siblings, 1 reply; 20+ messages in thread
From: Shawn Guo @ 2020-09-21 13:03 UTC (permalink / raw)
To: Meenakshi Aggarwal
Cc: robh+dt, Varun Sethi, Leo Li, linux-arm-kernel, devicetree,
linux-kernel, Ioana Ciornei, Kuldeep Singh
On Mon, Sep 21, 2020 at 06:00:53AM +0000, Meenakshi Aggarwal wrote:
>
>
> > -----Original Message-----
> > From: Shawn Guo <shawnguo@kernel.org>
> > Sent: Saturday, September 12, 2020 3:19 PM
> > To: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> > Cc: robh+dt@kernel.org; Varun Sethi <V.Sethi@nxp.com>; Leo Li
> > <leoyang.li@nxp.com>; linux-arm-kernel@lists.infradead.org;
> > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; Ioana Ciornei
> > <ioana.ciornei@nxp.com>; Kuldeep Singh <kuldeep.singh@nxp.com>
> > Subject: Re: [PATCH 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds
> > board
> >
> > On Wed, Sep 09, 2020 at 07:10:12AM +0000, Meenakshi Aggarwal wrote:
> > > > > + sb_3v3: regulator-sb3v3 {
> > > > > + compatible = "regulator-fixed";
> > > > > + regulator-name = "MC34717-3.3VSB";
> > > > > + regulator-min-microvolt = <3300000>;
> > > > > + regulator-max-microvolt = <3300000>;
> > > > > + regulator-boot-on;
> > > > > + regulator-always-on;
> > > >
> > > > I do not see any point to have regulator-boot-on or
> > > > regulator-always-on for a regulator that doesn't have on/off control.
> > > [Meenakshi Aggarwal] Properties are added to specify that platform
> > > firmware's out of reset configuration enabled the regulator and regulator
> > should never be disabled or change its operative status.
> >
> > What I was wondering if how this regulator is enabled by firmware, by some
> > GPIO control? In that case, 'gpio' property should be there to describe the GPIO
> > control.
> >
> [Meenakshi Aggarwal] Its not controlled by GPIO. Its gets power on with board.
> > >
> > > Can you help in understanding why these optional properties cannot be
> > > used together
> >
> > It's totally fine to use these properties together. But if the regulator doesn't
> > have on/off control, neither of them makes sense.
> [Meenakshi Aggarwal] As per documentation, we should keep " regulator-always-on " as per description, we
> Can remove " regulator-boot-on" property from dts.
>
> regulator-always-on:
> description: boolean, regulator should never be disabled
Again, the property is only meaningful for a regulator that can possibly
be disabled.
Shawn
^ permalink raw reply [flat|nested] 20+ messages in thread
* RE: [PATCH 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds board
2020-09-21 13:03 ` Shawn Guo
@ 2020-09-21 13:34 ` Meenakshi Aggarwal
0 siblings, 0 replies; 20+ messages in thread
From: Meenakshi Aggarwal @ 2020-09-21 13:34 UTC (permalink / raw)
To: Shawn Guo
Cc: robh+dt, Varun Sethi, Leo Li, linux-arm-kernel, devicetree,
linux-kernel, Ioana Ciornei, Kuldeep Singh
Ok, I will update the dts with your suggestions.
Thanks,
Meenakshi
> -----Original Message-----
> From: Shawn Guo <shawnguo@kernel.org>
> Sent: Monday, September 21, 2020 6:33 PM
> To: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> Cc: robh+dt@kernel.org; Varun Sethi <V.Sethi@nxp.com>; Leo Li
> <leoyang.li@nxp.com>; linux-arm-kernel@lists.infradead.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; Ioana Ciornei
> <ioana.ciornei@nxp.com>; Kuldeep Singh <kuldeep.singh@nxp.com>
> Subject: Re: [PATCH 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds
> board
>
> On Mon, Sep 21, 2020 at 06:00:53AM +0000, Meenakshi Aggarwal wrote:
> >
> >
> > > -----Original Message-----
> > > From: Shawn Guo <shawnguo@kernel.org>
> > > Sent: Saturday, September 12, 2020 3:19 PM
> > > To: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> > > Cc: robh+dt@kernel.org; Varun Sethi <V.Sethi@nxp.com>; Leo Li
> > > <leoyang.li@nxp.com>; linux-arm-kernel@lists.infradead.org;
> > > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; Ioana
> > > Ciornei <ioana.ciornei@nxp.com>; Kuldeep Singh
> > > <kuldeep.singh@nxp.com>
> > > Subject: Re: [PATCH 2/2] arm64: dts: lx2160a: add device tree for
> > > lx2162aqds board
> > >
> > > On Wed, Sep 09, 2020 at 07:10:12AM +0000, Meenakshi Aggarwal wrote:
> > > > > > + sb_3v3: regulator-sb3v3 {
> > > > > > + compatible = "regulator-fixed";
> > > > > > + regulator-name = "MC34717-3.3VSB";
> > > > > > + regulator-min-microvolt = <3300000>;
> > > > > > + regulator-max-microvolt = <3300000>;
> > > > > > + regulator-boot-on;
> > > > > > + regulator-always-on;
> > > > >
> > > > > I do not see any point to have regulator-boot-on or
> > > > > regulator-always-on for a regulator that doesn't have on/off control.
> > > > [Meenakshi Aggarwal] Properties are added to specify that platform
> > > > firmware's out of reset configuration enabled the regulator and
> > > > regulator
> > > should never be disabled or change its operative status.
> > >
> > > What I was wondering if how this regulator is enabled by firmware,
> > > by some GPIO control? In that case, 'gpio' property should be there
> > > to describe the GPIO control.
> > >
> > [Meenakshi Aggarwal] Its not controlled by GPIO. Its gets power on with board.
> > > >
> > > > Can you help in understanding why these optional properties cannot
> > > > be used together
> > >
> > > It's totally fine to use these properties together. But if the
> > > regulator doesn't have on/off control, neither of them makes sense.
> > [Meenakshi Aggarwal] As per documentation, we should keep "
> > regulator-always-on " as per description, we Can remove " regulator-boot-on"
> property from dts.
> >
> > regulator-always-on:
> > description: boolean, regulator should never be disabled
>
> Again, the property is only meaningful for a regulator that can possibly be
> disabled.
>
> Shawn
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH v3 0/2] Add device tree support for LX2162AQDS board
2020-09-02 15:13 ` [PATCH 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds board meenakshi.aggarwal
2020-09-05 7:54 ` Shawn Guo
@ 2020-09-29 10:01 ` meenakshi.aggarwal
2020-09-29 10:01 ` [PATCH v3 1/2] dt-bindings: arm64: add compatible for LX2162A QDS Board meenakshi.aggarwal
2020-09-29 10:01 ` [PATCH v3 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds board meenakshi.aggarwal
1 sibling, 2 replies; 20+ messages in thread
From: meenakshi.aggarwal @ 2020-09-29 10:01 UTC (permalink / raw)
To: shawnguo, robh+dt, V.sethi, leoyang.li, linux-arm-kernel,
devicetree, linux-kernel
Cc: Meenakshi Aggarwal
From: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
LX2162A has same die as of LX2160A with different packaging.
Changes:
v2:
- divided patch into two, binding and dts support
v3:
- incorporated review comments on voltage regulator node
Meenakshi Aggarwal (2):
dt-bindings: arm64: add compatible for LX2162A QDS Board
arm64: dts: lx2160a: add device tree for lx2162aqds board
Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
arch/arm64/boot/dts/freescale/Makefile | 1 +
arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts | 334 ++++++++++++++++++++++
3 files changed, 336 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
--
2.7.4
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH v3 1/2] dt-bindings: arm64: add compatible for LX2162A QDS Board
2020-09-29 10:01 ` [PATCH v3 0/2] Add device tree support for LX2162AQDS board meenakshi.aggarwal
@ 2020-09-29 10:01 ` meenakshi.aggarwal
2020-09-29 10:01 ` [PATCH v3 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds board meenakshi.aggarwal
1 sibling, 0 replies; 20+ messages in thread
From: meenakshi.aggarwal @ 2020-09-29 10:01 UTC (permalink / raw)
To: shawnguo, robh+dt, V.sethi, leoyang.li, linux-arm-kernel,
devicetree, linux-kernel
Cc: Meenakshi Aggarwal
From: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Add support for LX2162A, LX2162A is LX2160A based SoC.
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index 6da9d73..5c7b7dd 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -518,6 +518,7 @@ properties:
- enum:
- fsl,lx2160a-qds
- fsl,lx2160a-rdb
+ - fsl,lx2162a-qds
- const: fsl,lx2160a
- description: S32V234 based Boards
--
2.7.4
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v3 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds board
2020-09-29 10:01 ` [PATCH v3 0/2] Add device tree support for LX2162AQDS board meenakshi.aggarwal
2020-09-29 10:01 ` [PATCH v3 1/2] dt-bindings: arm64: add compatible for LX2162A QDS Board meenakshi.aggarwal
@ 2020-09-29 10:01 ` meenakshi.aggarwal
2020-10-19 9:00 ` Meenakshi Aggarwal
2020-11-02 5:59 ` [PATCH v4 0/2] Add device tree support for LX2162AQDS board meenakshi.aggarwal
1 sibling, 2 replies; 20+ messages in thread
From: meenakshi.aggarwal @ 2020-09-29 10:01 UTC (permalink / raw)
To: shawnguo, robh+dt, V.sethi, leoyang.li, linux-arm-kernel,
devicetree, linux-kernel
Cc: Meenakshi Aggarwal, Ioana Ciornei, Kuldeep Singh
From: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Add device tree support for LX2162AQDS board.
LX2162A has same die as of LX2160A with different packaging.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
---
arch/arm64/boot/dts/freescale/Makefile | 1 +
arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts | 334 ++++++++++++++++++++++
2 files changed, 335 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 903c0eb..0edc8ab 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -27,6 +27,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-clearfog-cx.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-honeycomb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2162a-qds.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
new file mode 100644
index 0000000..b29174e
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
@@ -0,0 +1,334 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+//
+// Device Tree file for LX2162AQDS
+//
+// Copyright 2020 NXP
+
+/dts-v1/;
+
+#include "fsl-lx2160a.dtsi"
+
+/ {
+ model = "NXP Layerscape LX2162AQDS";
+ compatible = "nxp,lx2162a-qds", "fsl,lx2160a";
+
+ aliases {
+ crypto = &crypto;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ sb_3v3: regulator-sb3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "LTM4619-3.3VSB";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ mdio-mux-1 {
+ compatible = "mdio-mux-multiplexer";
+ mux-controls = <&mux 0>;
+ mdio-parent-bus = <&emdio1>;
+ #address-cells=<1>;
+ #size-cells = <0>;
+
+ mdio@0 { /* On-board RTL8211F PHY #1 RGMII1 */
+ reg = <0x00>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rgmii_phy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-id001c.c916";
+ reg = <0x1>;
+ eee-broken-1000t;
+ };
+ };
+
+ mdio@8 { /* On-board RTL8211F PHY #2 RGMII2 */
+ reg = <0x8>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rgmii_phy2: ethernet-phy@2 {
+ compatible = "ethernet-phy-id001c.c916";
+ reg = <0x2>;
+ eee-broken-1000t;
+ };
+ };
+
+ mdio@18 { /* Slot #1 */
+ reg = <0x18>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@19 { /* Slot #2 */
+ reg = <0x19>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@1a { /* Slot #3 */
+ reg = <0x1a>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@1b { /* Slot #4 */
+ reg = <0x1b>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@1c { /* Slot #5 */
+ reg = <0x1c>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@1d { /* Slot #6 */
+ reg = <0x1d>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@1e { /* Slot #7 */
+ reg = <0x1e>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@1f { /* Slot #8 */
+ reg = <0x1f>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ mdio-mux-2 {
+ compatible = "mdio-mux-multiplexer";
+ mux-controls = <&mux 1>;
+ mdio-parent-bus = <&emdio2>;
+ #address-cells=<1>;
+ #size-cells = <0>;
+
+ mdio@0 { /* Slot #1 (secondary EMI) */
+ reg = <0x00>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@1 { /* Slot #2 (secondary EMI) */
+ reg = <0x01>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@2 { /* Slot #3 (secondary EMI) */
+ reg = <0x02>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@3 { /* Slot #4 (secondary EMI) */
+ reg = <0x03>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@4 { /* Slot #5 (secondary EMI) */
+ reg = <0x04>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@5 { /* Slot #6 (secondary EMI) */
+ reg = <0x05>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@6 { /* Slot #7 (secondary EMI) */
+ reg = <0x06>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@7 { /* Slot #8 (secondary EMI) */
+ reg = <0x07>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+};
+
+&crypto {
+ status = "okay";
+};
+
+&dpmac17 {
+ phy-handle = <&rgmii_phy1>;
+ phy-connection-type = "rgmii-id";
+};
+
+&dpmac18 {
+ phy-handle = <&rgmii_phy2>;
+ phy-connection-type = "rgmii-id";
+};
+
+&dspi0 {
+ status = "okay";
+
+ dflash0: flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&dspi1 {
+ status = "okay";
+
+ dflash1: flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&dspi2 {
+ status = "okay";
+
+ dflash2: flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&emdio1 {
+ status = "okay";
+};
+
+&emdio2 {
+ status = "okay";
+};
+
+&esdhc0 {
+ status = "okay";
+};
+
+&esdhc1 {
+ status = "okay";
+};
+
+&fspi {
+ status = "okay";
+
+ mt35xu512aba0: flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ m25p,fast-read;
+ spi-max-frequency = <50000000>;
+ reg = <0>;
+ spi-rx-bus-width = <8>;
+ spi-tx-bus-width = <8>;
+ };
+};
+
+&i2c0 {
+ status = "okay";
+
+ fpga@66 {
+ compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c",
+ "simple-mfd";
+ reg = <0x66>;
+
+ mux: mux-controller {
+ compatible = "reg-mux";
+ #mux-control-cells = <1>;
+ mux-reg-masks = <0x54 0xf8>, /* 0: reg 0x54, bits 7:3 */
+ <0x54 0x07>; /* 1: reg 0x54, bit 2:0 */
+ };
+ };
+
+ i2c-mux@77 {
+ compatible = "nxp,pca9547";
+ reg = <0x77>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x2>;
+
+ power-monitor@40 {
+ compatible = "ti,ina220";
+ reg = <0x40>;
+ shunt-resistor = <500>;
+ };
+
+ power-monitor@41 {
+ compatible = "ti,ina220";
+ reg = <0x41>;
+ shunt-resistor = <1000>;
+ };
+ };
+
+ i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x3>;
+
+ temperature-sensor@4c {
+ compatible = "nxp,sa56004";
+ reg = <0x4c>;
+ vcc-supply = <&sb_3v3>;
+ };
+
+ rtc@51 {
+ compatible = "nxp,pcf2129";
+ reg = <0x51>;
+ };
+ };
+ };
+};
+
+&sata0 {
+ status = "okay";
+};
+
+&sata1 {
+ status = "okay";
+};
+
+&sata2 {
+ status = "okay";
+};
+
+&sata3 {
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+};
--
2.7.4
^ permalink raw reply related [flat|nested] 20+ messages in thread
* RE: [PATCH v3 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds board
2020-09-29 10:01 ` [PATCH v3 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds board meenakshi.aggarwal
@ 2020-10-19 9:00 ` Meenakshi Aggarwal
2020-10-26 7:18 ` Shawn Guo
2020-11-02 5:59 ` [PATCH v4 0/2] Add device tree support for LX2162AQDS board meenakshi.aggarwal
1 sibling, 1 reply; 20+ messages in thread
From: Meenakshi Aggarwal @ 2020-10-19 9:00 UTC (permalink / raw)
To: Meenakshi Aggarwal, shawnguo, robh+dt, Varun Sethi, Leo Li,
linux-arm-kernel, devicetree, linux-kernel
Cc: Ioana Ciornei, Kuldeep Singh
Hi,
Any further comments?
Thanks,
Meenakshi
> -----Original Message-----
> From: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> Sent: Tuesday, September 29, 2020 3:33 PM
> To: shawnguo@kernel.org; robh+dt@kernel.org; Varun Sethi
> <V.Sethi@nxp.com>; Leo Li <leoyang.li@nxp.com>; linux-arm-
> kernel@lists.infradead.org; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org
> Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>; Ioana Ciornei
> <ioana.ciornei@nxp.com>; Kuldeep Singh <kuldeep.singh@nxp.com>
> Subject: [PATCH v3 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds
> board
>
> From: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
>
> Add device tree support for LX2162AQDS board.
> LX2162A has same die as of LX2160A with different packaging.
>
> Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
> Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
> Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> ---
> arch/arm64/boot/dts/freescale/Makefile | 1 +
> arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts | 334
> ++++++++++++++++++++++
> 2 files changed, 335 insertions(+)
> create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
>
> diff --git a/arch/arm64/boot/dts/freescale/Makefile
> b/arch/arm64/boot/dts/freescale/Makefile
> index 903c0eb..0edc8ab 100644
> --- a/arch/arm64/boot/dts/freescale/Makefile
> +++ b/arch/arm64/boot/dts/freescale/Makefile
> @@ -27,6 +27,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-
> clearfog-cx.dtb
> dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-honeycomb.dtb
> dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-qds.dtb
> dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
> +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2162a-qds.dtb
>
> dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb diff --git
> a/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
> b/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
> new file mode 100644
> index 0000000..b29174e
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
> @@ -0,0 +1,334 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT) // // Device Tree file for
> +LX2162AQDS // // Copyright 2020 NXP
> +
> +/dts-v1/;
> +
> +#include "fsl-lx2160a.dtsi"
> +
> +/ {
> + model = "NXP Layerscape LX2162AQDS";
> + compatible = "nxp,lx2162a-qds", "fsl,lx2160a";
> +
> + aliases {
> + crypto = &crypto;
> + serial0 = &uart0;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + sb_3v3: regulator-sb3v3 {
> + compatible = "regulator-fixed";
> + regulator-name = "LTM4619-3.3VSB";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + };
> +
> + mdio-mux-1 {
> + compatible = "mdio-mux-multiplexer";
> + mux-controls = <&mux 0>;
> + mdio-parent-bus = <&emdio1>;
> + #address-cells=<1>;
> + #size-cells = <0>;
> +
> + mdio@0 { /* On-board RTL8211F PHY #1 RGMII1 */
> + reg = <0x00>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + rgmii_phy1: ethernet-phy@1 {
> + compatible = "ethernet-phy-id001c.c916";
> + reg = <0x1>;
> + eee-broken-1000t;
> + };
> + };
> +
> + mdio@8 { /* On-board RTL8211F PHY #2 RGMII2 */
> + reg = <0x8>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + rgmii_phy2: ethernet-phy@2 {
> + compatible = "ethernet-phy-id001c.c916";
> + reg = <0x2>;
> + eee-broken-1000t;
> + };
> + };
> +
> + mdio@18 { /* Slot #1 */
> + reg = <0x18>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mdio@19 { /* Slot #2 */
> + reg = <0x19>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mdio@1a { /* Slot #3 */
> + reg = <0x1a>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mdio@1b { /* Slot #4 */
> + reg = <0x1b>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mdio@1c { /* Slot #5 */
> + reg = <0x1c>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mdio@1d { /* Slot #6 */
> + reg = <0x1d>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mdio@1e { /* Slot #7 */
> + reg = <0x1e>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mdio@1f { /* Slot #8 */
> + reg = <0x1f>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> + };
> +
> + mdio-mux-2 {
> + compatible = "mdio-mux-multiplexer";
> + mux-controls = <&mux 1>;
> + mdio-parent-bus = <&emdio2>;
> + #address-cells=<1>;
> + #size-cells = <0>;
> +
> + mdio@0 { /* Slot #1 (secondary EMI) */
> + reg = <0x00>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mdio@1 { /* Slot #2 (secondary EMI) */
> + reg = <0x01>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mdio@2 { /* Slot #3 (secondary EMI) */
> + reg = <0x02>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mdio@3 { /* Slot #4 (secondary EMI) */
> + reg = <0x03>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mdio@4 { /* Slot #5 (secondary EMI) */
> + reg = <0x04>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mdio@5 { /* Slot #6 (secondary EMI) */
> + reg = <0x05>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mdio@6 { /* Slot #7 (secondary EMI) */
> + reg = <0x06>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mdio@7 { /* Slot #8 (secondary EMI) */
> + reg = <0x07>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> + };
> +};
> +
> +&crypto {
> + status = "okay";
> +};
> +
> +&dpmac17 {
> + phy-handle = <&rgmii_phy1>;
> + phy-connection-type = "rgmii-id";
> +};
> +
> +&dpmac18 {
> + phy-handle = <&rgmii_phy2>;
> + phy-connection-type = "rgmii-id";
> +};
> +
> +&dspi0 {
> + status = "okay";
> +
> + dflash0: flash@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + spi-max-frequency = <1000000>;
> + };
> +};
> +
> +&dspi1 {
> + status = "okay";
> +
> + dflash1: flash@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + spi-max-frequency = <1000000>;
> + };
> +};
> +
> +&dspi2 {
> + status = "okay";
> +
> + dflash2: flash@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + spi-max-frequency = <1000000>;
> + };
> +};
> +
> +&emdio1 {
> + status = "okay";
> +};
> +
> +&emdio2 {
> + status = "okay";
> +};
> +
> +&esdhc0 {
> + status = "okay";
> +};
> +
> +&esdhc1 {
> + status = "okay";
> +};
> +
> +&fspi {
> + status = "okay";
> +
> + mt35xu512aba0: flash@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "jedec,spi-nor";
> + m25p,fast-read;
> + spi-max-frequency = <50000000>;
> + reg = <0>;
> + spi-rx-bus-width = <8>;
> + spi-tx-bus-width = <8>;
> + };
> +};
> +
> +&i2c0 {
> + status = "okay";
> +
> + fpga@66 {
> + compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c",
> + "simple-mfd";
> + reg = <0x66>;
> +
> + mux: mux-controller {
> + compatible = "reg-mux";
> + #mux-control-cells = <1>;
> + mux-reg-masks = <0x54 0xf8>, /* 0: reg 0x54, bits 7:3
> */
> + <0x54 0x07>; /* 1: reg 0x54, bit 2:0 */
> + };
> + };
> +
> + i2c-mux@77 {
> + compatible = "nxp,pca9547";
> + reg = <0x77>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + i2c@2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x2>;
> +
> + power-monitor@40 {
> + compatible = "ti,ina220";
> + reg = <0x40>;
> + shunt-resistor = <500>;
> + };
> +
> + power-monitor@41 {
> + compatible = "ti,ina220";
> + reg = <0x41>;
> + shunt-resistor = <1000>;
> + };
> + };
> +
> + i2c@3 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x3>;
> +
> + temperature-sensor@4c {
> + compatible = "nxp,sa56004";
> + reg = <0x4c>;
> + vcc-supply = <&sb_3v3>;
> + };
> +
> + rtc@51 {
> + compatible = "nxp,pcf2129";
> + reg = <0x51>;
> + };
> + };
> + };
> +};
> +
> +&sata0 {
> + status = "okay";
> +};
> +
> +&sata1 {
> + status = "okay";
> +};
> +
> +&sata2 {
> + status = "okay";
> +};
> +
> +&sata3 {
> + status = "okay";
> +};
> +
> +&uart0 {
> + status = "okay";
> +};
> +
> +&uart1 {
> + status = "okay";
> +};
> +
> +&usb0 {
> + status = "okay";
> +};
> --
> 2.7.4
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v3 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds board
2020-10-19 9:00 ` Meenakshi Aggarwal
@ 2020-10-26 7:18 ` Shawn Guo
2020-10-26 14:35 ` Leo Li
0 siblings, 1 reply; 20+ messages in thread
From: Shawn Guo @ 2020-10-26 7:18 UTC (permalink / raw)
To: Meenakshi Aggarwal
Cc: robh+dt, Varun Sethi, Leo Li, linux-arm-kernel, devicetree,
linux-kernel, Ioana Ciornei, Kuldeep Singh
On Mon, Oct 19, 2020 at 09:00:33AM +0000, Meenakshi Aggarwal wrote:
> Hi,
>
> Any further comments?
Please address the following checkpatch warnings.
WARNING: DT compatible string "nxp,lx2162a-qds" appears un-documented -- check ./Documentation/devicetree/bindings/
#49: FILE: arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts:13:
+ compatible = "nxp,lx2162a-qds", "fsl,lx2160a";
WARNING: DT compatible string "ethernet-phy-id001c.c916" appears un-documented -- check ./Documentation/devicetree/bindings/
#80: FILE: arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts:44:
+ compatible = "ethernet-phy-id001c.c916";
WARNING: DT compatible string "ethernet-phy-id001c.c916" appears un-documented -- check ./Documentation/devicetree/bindings/
#92: FILE: arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts:56:
+ compatible = "ethernet-phy-id001c.c916";
Shawn
^ permalink raw reply [flat|nested] 20+ messages in thread
* RE: [PATCH v3 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds board
2020-10-26 7:18 ` Shawn Guo
@ 2020-10-26 14:35 ` Leo Li
2020-10-30 8:59 ` Meenakshi Aggarwal
0 siblings, 1 reply; 20+ messages in thread
From: Leo Li @ 2020-10-26 14:35 UTC (permalink / raw)
To: Shawn Guo, Meenakshi Aggarwal
Cc: robh+dt, Varun Sethi, linux-arm-kernel, devicetree, linux-kernel,
Ioana Ciornei, Kuldeep Singh
> -----Original Message-----
> From: Shawn Guo <shawnguo@kernel.org>
> Sent: Monday, October 26, 2020 2:19 AM
> To: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> Cc: robh+dt@kernel.org; Varun Sethi <V.Sethi@nxp.com>; Leo Li
> <leoyang.li@nxp.com>; linux-arm-kernel@lists.infradead.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; Ioana Ciornei
> <ioana.ciornei@nxp.com>; Kuldeep Singh <kuldeep.singh@nxp.com>
> Subject: Re: [PATCH v3 2/2] arm64: dts: lx2160a: add device tree for
> lx2162aqds board
>
> On Mon, Oct 19, 2020 at 09:00:33AM +0000, Meenakshi Aggarwal wrote:
> > Hi,
> >
> > Any further comments?
>
> Please address the following checkpatch warnings.
>
> WARNING: DT compatible string "nxp,lx2162a-qds" appears un-documented
> -- check ./Documentation/devicetree/bindings/
> #49: FILE: arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts:13:
> + compatible = "nxp,lx2162a-qds", "fsl,lx2160a";
>
> WARNING: DT compatible string "ethernet-phy-id001c.c916" appears un-
> documented -- check ./Documentation/devicetree/bindings/
> #80: FILE: arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts:44:
> + compatible = "ethernet-phy-id001c.c916";
Interesting that it doesn't match the following in Documentation/devicetree/bindings/net/ethernet-phy.yaml
- pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$"
description:
If the PHY reports an incorrect ID (or none at all) then the
compatible list may contain an entry with the correct PHY ID
in the above form.
The first group of digits is the 16 bit Phy Identifier 1
register, this is the chip vendor OUI bits 3:18. The
second group of digits is the Phy Identifier 2 register,
this is the chip vendor OUI bits 19:24, followed by 10
bits of a vendor specific ID.
>
> WARNING: DT compatible string "ethernet-phy-id001c.c916" appears un-
> documented -- check ./Documentation/devicetree/bindings/
> #92: FILE: arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts:56:
> + compatible = "ethernet-phy-id001c.c916";
>
>
> Shawn
^ permalink raw reply [flat|nested] 20+ messages in thread
* RE: [PATCH v3 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds board
2020-10-26 14:35 ` Leo Li
@ 2020-10-30 8:59 ` Meenakshi Aggarwal
0 siblings, 0 replies; 20+ messages in thread
From: Meenakshi Aggarwal @ 2020-10-30 8:59 UTC (permalink / raw)
To: Leo Li, Shawn Guo
Cc: robh+dt, Varun Sethi, linux-arm-kernel, devicetree, linux-kernel,
Ioana Ciornei, Kuldeep Singh
Hi Shawn,
I will document "nxp,lx2162a-qds".
For ethernet string, documentation seems correct.
Thanks,
Meenakshi
> -----Original Message-----
> From: Leo Li <leoyang.li@nxp.com>
> Sent: Monday, October 26, 2020 8:06 PM
> To: Shawn Guo <shawnguo@kernel.org>; Meenakshi Aggarwal
> <meenakshi.aggarwal@nxp.com>
> Cc: robh+dt@kernel.org; Varun Sethi <V.Sethi@nxp.com>; linux-arm-
> kernel@lists.infradead.org; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org; Ioana Ciornei <ioana.ciornei@nxp.com>; Kuldeep Singh
> <kuldeep.singh@nxp.com>
> Subject: RE: [PATCH v3 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds
> board
>
>
>
> > -----Original Message-----
> > From: Shawn Guo <shawnguo@kernel.org>
> > Sent: Monday, October 26, 2020 2:19 AM
> > To: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> > Cc: robh+dt@kernel.org; Varun Sethi <V.Sethi@nxp.com>; Leo Li
> > <leoyang.li@nxp.com>; linux-arm-kernel@lists.infradead.org;
> > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; Ioana
> > Ciornei <ioana.ciornei@nxp.com>; Kuldeep Singh <kuldeep.singh@nxp.com>
> > Subject: Re: [PATCH v3 2/2] arm64: dts: lx2160a: add device tree for
> > lx2162aqds board
> >
> > On Mon, Oct 19, 2020 at 09:00:33AM +0000, Meenakshi Aggarwal wrote:
> > > Hi,
> > >
> > > Any further comments?
> >
> > Please address the following checkpatch warnings.
> >
> > WARNING: DT compatible string "nxp,lx2162a-qds" appears un-documented
> > -- check ./Documentation/devicetree/bindings/
> > #49: FILE: arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts:13:
> > + compatible = "nxp,lx2162a-qds", "fsl,lx2160a";
> >
> > WARNING: DT compatible string "ethernet-phy-id001c.c916" appears un-
> > documented -- check ./Documentation/devicetree/bindings/
> > #80: FILE: arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts:44:
> > + compatible = "ethernet-phy-id001c.c916";
>
> Interesting that it doesn't match the following in
> Documentation/devicetree/bindings/net/ethernet-phy.yaml
>
> - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$"
> description:
> If the PHY reports an incorrect ID (or none at all) then the
> compatible list may contain an entry with the correct PHY ID
> in the above form.
> The first group of digits is the 16 bit Phy Identifier 1
> register, this is the chip vendor OUI bits 3:18. The
> second group of digits is the Phy Identifier 2 register,
> this is the chip vendor OUI bits 19:24, followed by 10
> bits of a vendor specific ID.
>
> >
> > WARNING: DT compatible string "ethernet-phy-id001c.c916" appears un-
> > documented -- check ./Documentation/devicetree/bindings/
> > #92: FILE: arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts:56:
> > + compatible = "ethernet-phy-id001c.c916";
> >
> >
> > Shawn
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH v4 0/2] Add device tree support for LX2162AQDS board
2020-09-29 10:01 ` [PATCH v3 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds board meenakshi.aggarwal
2020-10-19 9:00 ` Meenakshi Aggarwal
@ 2020-11-02 5:59 ` meenakshi.aggarwal
2020-11-02 5:59 ` [PATCH v4 1/2] dt-bindings: arm64: add compatible for LX2162A QDS Board meenakshi.aggarwal
` (2 more replies)
1 sibling, 3 replies; 20+ messages in thread
From: meenakshi.aggarwal @ 2020-11-02 5:59 UTC (permalink / raw)
To: shawnguo, robh+dt, V.sethi, leoyang.li, linux-arm-kernel,
devicetree, linux-kernel
Cc: Meenakshi Aggarwal
From: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
LX2162A has same die as of LX2160A with different packaging.
Changes:
v2:
- divided patch into two, binding and dts support
v3:
- incorporated review comments on voltage regulator node
v4:
- fixed check-patch warning.
Meenakshi Aggarwal (2):
dt-bindings: arm64: add compatible for LX2162A QDS Board
arm64: dts: lx2160a: add device tree for lx2162aqds board
Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
arch/arm64/boot/dts/freescale/Makefile | 1 +
arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts | 334 ++++++++++++++++++++++
3 files changed, 336 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
--
2.7.4
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH v4 1/2] dt-bindings: arm64: add compatible for LX2162A QDS Board
2020-11-02 5:59 ` [PATCH v4 0/2] Add device tree support for LX2162AQDS board meenakshi.aggarwal
@ 2020-11-02 5:59 ` meenakshi.aggarwal
2020-11-02 5:59 ` [PATCH v4 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds board meenakshi.aggarwal
2020-11-02 23:25 ` [PATCH v4 0/2] Add device tree support for LX2162AQDS board Shawn Guo
2 siblings, 0 replies; 20+ messages in thread
From: meenakshi.aggarwal @ 2020-11-02 5:59 UTC (permalink / raw)
To: shawnguo, robh+dt, V.sethi, leoyang.li, linux-arm-kernel,
devicetree, linux-kernel
Cc: Meenakshi Aggarwal
From: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Add support for LX2162A, LX2162A is LX2160A based SoC.
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index 6da9d73..5c7b7dd 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -518,6 +518,7 @@ properties:
- enum:
- fsl,lx2160a-qds
- fsl,lx2160a-rdb
+ - fsl,lx2162a-qds
- const: fsl,lx2160a
- description: S32V234 based Boards
--
2.7.4
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v4 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds board
2020-11-02 5:59 ` [PATCH v4 0/2] Add device tree support for LX2162AQDS board meenakshi.aggarwal
2020-11-02 5:59 ` [PATCH v4 1/2] dt-bindings: arm64: add compatible for LX2162A QDS Board meenakshi.aggarwal
@ 2020-11-02 5:59 ` meenakshi.aggarwal
2020-11-02 23:25 ` [PATCH v4 0/2] Add device tree support for LX2162AQDS board Shawn Guo
2 siblings, 0 replies; 20+ messages in thread
From: meenakshi.aggarwal @ 2020-11-02 5:59 UTC (permalink / raw)
To: shawnguo, robh+dt, V.sethi, leoyang.li, linux-arm-kernel,
devicetree, linux-kernel
Cc: Meenakshi Aggarwal, Ioana Ciornei, Kuldeep Singh
From: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Add device tree support for LX2162AQDS board.
LX2162A has same die as of LX2160A with different packaging.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
---
arch/arm64/boot/dts/freescale/Makefile | 1 +
arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts | 334 ++++++++++++++++++++++
2 files changed, 335 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 903c0eb..0edc8ab 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -27,6 +27,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-clearfog-cx.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-honeycomb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2162a-qds.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
new file mode 100644
index 0000000..9178684
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
@@ -0,0 +1,334 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+//
+// Device Tree file for LX2162AQDS
+//
+// Copyright 2020 NXP
+
+/dts-v1/;
+
+#include "fsl-lx2160a.dtsi"
+
+/ {
+ model = "NXP Layerscape LX2162AQDS";
+ compatible = "fsl,lx2162a-qds", "fsl,lx2160a";
+
+ aliases {
+ crypto = &crypto;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ sb_3v3: regulator-sb3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "LTM4619-3.3VSB";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ mdio-mux-1 {
+ compatible = "mdio-mux-multiplexer";
+ mux-controls = <&mux 0>;
+ mdio-parent-bus = <&emdio1>;
+ #address-cells=<1>;
+ #size-cells = <0>;
+
+ mdio@0 { /* On-board RTL8211F PHY #1 RGMII1 */
+ reg = <0x00>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rgmii_phy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-id001c.c916";
+ reg = <0x1>;
+ eee-broken-1000t;
+ };
+ };
+
+ mdio@8 { /* On-board RTL8211F PHY #2 RGMII2 */
+ reg = <0x8>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rgmii_phy2: ethernet-phy@2 {
+ compatible = "ethernet-phy-id001c.c916";
+ reg = <0x2>;
+ eee-broken-1000t;
+ };
+ };
+
+ mdio@18 { /* Slot #1 */
+ reg = <0x18>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@19 { /* Slot #2 */
+ reg = <0x19>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@1a { /* Slot #3 */
+ reg = <0x1a>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@1b { /* Slot #4 */
+ reg = <0x1b>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@1c { /* Slot #5 */
+ reg = <0x1c>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@1d { /* Slot #6 */
+ reg = <0x1d>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@1e { /* Slot #7 */
+ reg = <0x1e>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@1f { /* Slot #8 */
+ reg = <0x1f>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ mdio-mux-2 {
+ compatible = "mdio-mux-multiplexer";
+ mux-controls = <&mux 1>;
+ mdio-parent-bus = <&emdio2>;
+ #address-cells=<1>;
+ #size-cells = <0>;
+
+ mdio@0 { /* Slot #1 (secondary EMI) */
+ reg = <0x00>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@1 { /* Slot #2 (secondary EMI) */
+ reg = <0x01>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@2 { /* Slot #3 (secondary EMI) */
+ reg = <0x02>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@3 { /* Slot #4 (secondary EMI) */
+ reg = <0x03>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@4 { /* Slot #5 (secondary EMI) */
+ reg = <0x04>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@5 { /* Slot #6 (secondary EMI) */
+ reg = <0x05>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@6 { /* Slot #7 (secondary EMI) */
+ reg = <0x06>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mdio@7 { /* Slot #8 (secondary EMI) */
+ reg = <0x07>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+};
+
+&crypto {
+ status = "okay";
+};
+
+&dpmac17 {
+ phy-handle = <&rgmii_phy1>;
+ phy-connection-type = "rgmii-id";
+};
+
+&dpmac18 {
+ phy-handle = <&rgmii_phy2>;
+ phy-connection-type = "rgmii-id";
+};
+
+&dspi0 {
+ status = "okay";
+
+ dflash0: flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&dspi1 {
+ status = "okay";
+
+ dflash1: flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&dspi2 {
+ status = "okay";
+
+ dflash2: flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&emdio1 {
+ status = "okay";
+};
+
+&emdio2 {
+ status = "okay";
+};
+
+&esdhc0 {
+ status = "okay";
+};
+
+&esdhc1 {
+ status = "okay";
+};
+
+&fspi {
+ status = "okay";
+
+ mt35xu512aba0: flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ m25p,fast-read;
+ spi-max-frequency = <50000000>;
+ reg = <0>;
+ spi-rx-bus-width = <8>;
+ spi-tx-bus-width = <8>;
+ };
+};
+
+&i2c0 {
+ status = "okay";
+
+ fpga@66 {
+ compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c",
+ "simple-mfd";
+ reg = <0x66>;
+
+ mux: mux-controller {
+ compatible = "reg-mux";
+ #mux-control-cells = <1>;
+ mux-reg-masks = <0x54 0xf8>, /* 0: reg 0x54, bits 7:3 */
+ <0x54 0x07>; /* 1: reg 0x54, bit 2:0 */
+ };
+ };
+
+ i2c-mux@77 {
+ compatible = "nxp,pca9547";
+ reg = <0x77>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x2>;
+
+ power-monitor@40 {
+ compatible = "ti,ina220";
+ reg = <0x40>;
+ shunt-resistor = <500>;
+ };
+
+ power-monitor@41 {
+ compatible = "ti,ina220";
+ reg = <0x41>;
+ shunt-resistor = <1000>;
+ };
+ };
+
+ i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x3>;
+
+ temperature-sensor@4c {
+ compatible = "nxp,sa56004";
+ reg = <0x4c>;
+ vcc-supply = <&sb_3v3>;
+ };
+
+ rtc@51 {
+ compatible = "nxp,pcf2129";
+ reg = <0x51>;
+ };
+ };
+ };
+};
+
+&sata0 {
+ status = "okay";
+};
+
+&sata1 {
+ status = "okay";
+};
+
+&sata2 {
+ status = "okay";
+};
+
+&sata3 {
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+};
--
2.7.4
^ permalink raw reply related [flat|nested] 20+ messages in thread
* Re: [PATCH v4 0/2] Add device tree support for LX2162AQDS board
2020-11-02 5:59 ` [PATCH v4 0/2] Add device tree support for LX2162AQDS board meenakshi.aggarwal
2020-11-02 5:59 ` [PATCH v4 1/2] dt-bindings: arm64: add compatible for LX2162A QDS Board meenakshi.aggarwal
2020-11-02 5:59 ` [PATCH v4 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds board meenakshi.aggarwal
@ 2020-11-02 23:25 ` Shawn Guo
2 siblings, 0 replies; 20+ messages in thread
From: Shawn Guo @ 2020-11-02 23:25 UTC (permalink / raw)
To: meenakshi.aggarwal
Cc: robh+dt, V.sethi, leoyang.li, linux-arm-kernel, devicetree, linux-kernel
On Mon, Nov 02, 2020 at 11:29:39AM +0530, meenakshi.aggarwal@nxp.com wrote:
> From: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
>
> LX2162A has same die as of LX2160A with different packaging.
>
> Changes:
>
> v2:
> - divided patch into two, binding and dts support
>
> v3:
> - incorporated review comments on voltage regulator node
>
> v4:
> - fixed check-patch warning.
>
> Meenakshi Aggarwal (2):
> dt-bindings: arm64: add compatible for LX2162A QDS Board
> arm64: dts: lx2160a: add device tree for lx2162aqds board
Applied both, thanks.
^ permalink raw reply [flat|nested] 20+ messages in thread
end of thread, other threads:[~2020-11-02 23:25 UTC | newest]
Thread overview: 20+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-09-02 15:13 [PATCH 1/2] dt-bindings: arm64: add compatible for LX2162A QDS Board meenakshi.aggarwal
2020-09-02 15:13 ` [PATCH 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds board meenakshi.aggarwal
2020-09-05 7:54 ` Shawn Guo
2020-09-09 7:10 ` Meenakshi Aggarwal
2020-09-12 9:49 ` Shawn Guo
2020-09-21 6:00 ` Meenakshi Aggarwal
2020-09-21 13:03 ` Shawn Guo
2020-09-21 13:34 ` Meenakshi Aggarwal
2020-09-29 10:01 ` [PATCH v3 0/2] Add device tree support for LX2162AQDS board meenakshi.aggarwal
2020-09-29 10:01 ` [PATCH v3 1/2] dt-bindings: arm64: add compatible for LX2162A QDS Board meenakshi.aggarwal
2020-09-29 10:01 ` [PATCH v3 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds board meenakshi.aggarwal
2020-10-19 9:00 ` Meenakshi Aggarwal
2020-10-26 7:18 ` Shawn Guo
2020-10-26 14:35 ` Leo Li
2020-10-30 8:59 ` Meenakshi Aggarwal
2020-11-02 5:59 ` [PATCH v4 0/2] Add device tree support for LX2162AQDS board meenakshi.aggarwal
2020-11-02 5:59 ` [PATCH v4 1/2] dt-bindings: arm64: add compatible for LX2162A QDS Board meenakshi.aggarwal
2020-11-02 5:59 ` [PATCH v4 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds board meenakshi.aggarwal
2020-11-02 23:25 ` [PATCH v4 0/2] Add device tree support for LX2162AQDS board Shawn Guo
2020-09-14 20:23 ` [PATCH 1/2] dt-bindings: arm64: add compatible for LX2162A QDS Board Rob Herring
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).