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From: Hongxing Zhu <hongxing.zhu@nxp.com>
To: Vinod Koul <vkoul@kernel.org>
Cc: "l.stach@pengutronix.de" <l.stach@pengutronix.de>,
	"bhelgaas@google.com" <bhelgaas@google.com>,
	"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
	Marcel Ziswiler <marcel.ziswiler@toradex.com>,
	"tharvey@gateworks.com" <tharvey@gateworks.com>,
	"kishon@ti.com" <kishon@ti.com>,
	"robh@kernel.org" <robh@kernel.org>,
	"galak@kernel.crashing.org" <galak@kernel.crashing.org>,
	"shawnguo@kernel.org" <shawnguo@kernel.org>,
	"linux-phy@lists.infradead.org" <linux-phy@lists.infradead.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"kernel@pengutronix.de" <kernel@pengutronix.de>,
	dl-linux-imx <linux-imx@nxp.com>
Subject: RE: [PATCH v6 5/8] phy: freescale: pcie: Initialize the imx8 pcie standalone phy driver
Date: Thu, 2 Dec 2021 05:57:30 +0000	[thread overview]
Message-ID: <AS8PR04MB86761C166EB0A6555252C4178C699@AS8PR04MB8676.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <YahL1TMkt8S0RNX5@matsya>

> -----Original Message-----
> From: Vinod Koul <vkoul@kernel.org>
> Sent: Thursday, December 2, 2021 12:30 PM
> To: Hongxing Zhu <hongxing.zhu@nxp.com>
> Cc: l.stach@pengutronix.de; bhelgaas@google.com;
> lorenzo.pieralisi@arm.com; Marcel Ziswiler
> <marcel.ziswiler@toradex.com>; tharvey@gateworks.com;
> kishon@ti.com; robh@kernel.org; galak@kernel.crashing.org;
> shawnguo@kernel.org; linux-phy@lists.infradead.org;
> devicetree@vger.kernel.org; linux-pci@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
> kernel@pengutronix.de; dl-linux-imx <linux-imx@nxp.com>
> Subject: Re: [PATCH v6 5/8] phy: freescale: pcie: Initialize the imx8 pcie
> standalone phy driver
> 
> On 18-11-21, 09:54, Richard Zhu wrote:
> > Add the standalone i.MX8 PCIe PHY driver.
> >
> > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> > Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> > Reviewed-by: Tim Harvey <tharvey@gateworks.com>
> > Tested-by: Tim Harvey <tharvey@gateworks.com>
> > ---
> >  drivers/phy/freescale/Kconfig              |   9 +
> >  drivers/phy/freescale/Makefile             |   1 +
> >  drivers/phy/freescale/phy-fsl-imx8m-pcie.c | 237
> > +++++++++++++++++++++
> >  3 files changed, 247 insertions(+)
> >  create mode 100644 drivers/phy/freescale/phy-fsl-imx8m-pcie.c
> >
> > diff --git a/drivers/phy/freescale/Kconfig
> > b/drivers/phy/freescale/Kconfig index 320630ffe3cd..e821498b1f7f
> > 100644
> > --- a/drivers/phy/freescale/Kconfig
> > +++ b/drivers/phy/freescale/Kconfig
> > @@ -14,3 +14,12 @@ config PHY_MIXEL_MIPI_DPHY
> >  	help
> >  	  Enable this to add support for the Mixel DSI PHY as found
> >  	  on NXP's i.MX8 family of SOCs.
> > +
> > +config PHY_FSL_IMX8M_PCIE
> > +	tristate "Freescale i.MX8M PCIE PHY"
> > +	depends on OF && HAS_IOMEM
> > +	select GENERIC_PHY
> > +	default ARCH_MXC && ARM64
> 
> Why should this be default ? We dont do that for new drivers.. You may
> add this to respective config file though...
> 
[Richard Zhu] First of all, thanks a lot for your review comments.
I see, and would remove the default in the kconfig.

> > +static int imx8_pcie_phy_init(struct phy *phy) {
> > +	int ret;
> > +	u32 val, pad_mode;
> > +	struct imx8_pcie_phy *imx8_phy = phy_get_drvdata(phy);
> > +
> > +	reset_control_assert(imx8_phy->reset);
> > +
> > +	pad_mode = imx8_phy->refclk_pad_mode;
> > +	/* Set AUX_EN_OVERRIDE 1'b0, when the CLKREQ# isn't hooked */
> > +	regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14,
> > +			   IMX8MM_GPR_PCIE_AUX_EN_OVERRIDE,
> > +			   imx8_phy->clkreq_unused ?
> > +			   0 : IMX8MM_GPR_PCIE_AUX_EN_OVERRIDE);
> > +	regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14,
> > +			   IMX8MM_GPR_PCIE_AUX_EN,
> > +			   IMX8MM_GPR_PCIE_AUX_EN);
> > +	regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14,
> > +			   IMX8MM_GPR_PCIE_POWER_OFF, 0);
> > +	regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14,
> > +			   IMX8MM_GPR_PCIE_SSC_EN, 0);
> > +
> > +	regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14,
> > +			   IMX8MM_GPR_PCIE_REF_CLK_SEL,
> > +			   pad_mode == IMX8_PCIE_REFCLK_PAD_INPUT ?
> > +			   IMX8MM_GPR_PCIE_REF_CLK_EXT :
> > +			   IMX8MM_GPR_PCIE_REF_CLK_PLL);
> > +	usleep_range(100, 200);
> > +
> > +	/* Do the PHY common block reset */
> > +	regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14,
> > +			   IMX8MM_GPR_PCIE_CMN_RST,
> > +			   IMX8MM_GPR_PCIE_CMN_RST);
> > +	usleep_range(200, 500);
> > +
> > +
> 
> No multi blank line please
[Richard Zhu] Ok, got that.
> 
> > +static struct platform_driver imx8_pcie_phy_driver = {
> > +	.probe	= imx8_pcie_phy_probe,
> > +	.driver = {
> > +		.name	= "imx8-pcie-phy",
> > +		.of_match_table	= imx8_pcie_phy_of_match,
> > +	}
> > +};
> > +module_platform_driver(imx8_pcie_phy_driver);
> > +
> > +MODULE_DESCRIPTION("FSL IMX8 PCIE PHY driver");
> > +MODULE_LICENSE("GPL");
> 
> This does not match the SPDX tag you have given
[Richard Zhu] Should the "GPL v2" correct one?
If yes, I would change it this way later.
Thanks.

Best Regards
Richard
> 
> --
> ~Vinod

  reply	other threads:[~2021-12-02  5:57 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-18  1:54 [PATCH v6 0/8] Add the imx8m pcie phy driver and imx8mm pcie support Richard Zhu
2021-11-18  1:54 ` [PATCH v6 1/8] dt-bindings: phy: phy-imx8-pcie: Add binding for the pad modes of imx8 pcie phy Richard Zhu
2021-11-18  1:54 ` [PATCH v6 2/8] dt-bindings: phy: Add imx8 pcie phy driver support Richard Zhu
2021-11-18 23:50   ` Rob Herring
2021-11-19  1:17     ` Hongxing Zhu
2021-11-18  1:54 ` [PATCH v6 3/8] dt-bindings: imx6q-pcie: Add PHY phandles and name properties Richard Zhu
2021-11-18  1:54 ` [PATCH v6 4/8] arm64: dts: imx8mm: Add the pcie phy support Richard Zhu
2021-11-18  1:54 ` [PATCH v6 5/8] phy: freescale: pcie: Initialize the imx8 pcie standalone phy driver Richard Zhu
2021-12-02  4:30   ` Vinod Koul
2021-12-02  5:57     ` Hongxing Zhu [this message]
2021-12-02  6:03       ` Vinod Koul
2021-11-18  1:54 ` [PATCH v6 6/8] arm64: dts: imx8mm: Add the pcie support Richard Zhu
2021-11-18  1:54 ` [PATCH v6 7/8] arm64: dts: imx8mm-evk: Add the pcie support on imx8mm evk board Richard Zhu
2021-11-18  1:54 ` [PATCH v6 8/8] PCI: imx: Add the imx8mm pcie support Richard Zhu
2021-12-01 12:44 ` [PATCH v6 0/8] Add the imx8m pcie phy driver and " Lorenzo Pieralisi
2021-12-02  5:43   ` Hongxing Zhu
2021-12-02  6:03     ` Vinod Koul
2021-12-03  2:12       ` Hongxing Zhu
  -- strict thread matches above, loose matches on Subject: below --
2021-11-16  2:16 Richard Zhu
2021-11-16  2:16 ` [PATCH v6 5/8] phy: freescale: pcie: Initialize the imx8 pcie standalone phy driver Richard Zhu

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