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Tue, 27 Nov 2018 00:12:31 +0000 Received: from AT5PR8401MB1169.NAMPRD84.PROD.OUTLOOK.COM (10.169.8.145) by AT5PR8401MB0788.NAMPRD84.PROD.OUTLOOK.COM (10.169.6.7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1361.18; Tue, 27 Nov 2018 00:12:28 +0000 Received: from AT5PR8401MB1169.NAMPRD84.PROD.OUTLOOK.COM ([fe80::ac27:c64c:76db:414a]) by AT5PR8401MB1169.NAMPRD84.PROD.OUTLOOK.COM ([fe80::ac27:c64c:76db:414a%7]) with mapi id 15.20.1361.019; Tue, 27 Nov 2018 00:12:28 +0000 From: "Elliott, Robert (Persistent Memory)" To: 'Daniel Jordan' CC: "linux-mm@kvack.org" , "kvm@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "aarcange@redhat.com" , "aaron.lu@intel.com" , "akpm@linux-foundation.org" , "alex.williamson@redhat.com" , "bsd@redhat.com" , "darrick.wong@oracle.com" , "dave.hansen@linux.intel.com" , "jgg@mellanox.com" , "jwadams@google.com" , "jiangshanlai@gmail.com" , "mhocko@kernel.org" , "mike.kravetz@oracle.com" , "Pavel.Tatashin@microsoft.com" , "prasad.singamsetty@oracle.com" , "rdunlap@infradead.org" , "steven.sistare@oracle.com" , "tim.c.chen@intel.com" , "tj@kernel.org" , "vbabka@suse.cz" Subject: RE: [RFC PATCH v4 11/13] mm: parallelize deferred struct page initialization within each node Thread-Topic: [RFC PATCH v4 11/13] mm: parallelize deferred struct page initialization within each node Thread-Index: AQHUdSj7cDxnfAHYlE+9G8mzBVcDKqVIX+eQgAQGcwCAAFfMgIAKmdYAgAt4pHA= Date: Tue, 27 Nov 2018 00:12:28 +0000 Message-ID: References: <20181105165558.11698-1-daniel.m.jordan@oracle.com> <20181105165558.11698-12-daniel.m.jordan@oracle.com> <20181112165412.vizeiv6oimsuxkbk@ca-dmjordan1.us.oracle.com> <20181119160137.72zha7dbsr3adkfs@ca-dmjordan1.us.oracle.com> In-Reply-To: <20181119160137.72zha7dbsr3adkfs@ca-dmjordan1.us.oracle.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=elliott@hpe.com; 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received-spf: None (protection.outlook.com: hpe.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: 9PYvwuE9svhGi3Qjbj0CtEKE8rlA42da18NgEHXot8KPfrUTNiIMnSfR3xrP/2nfWrE1B9/dZVrZW5xWgXYwfctOZNZ70CoiL25qH1qrJBl3WSB418ePBSfjlb18wL559icOh96kvks1METBdRBb5ejXK+yMbF+rY0Cm/LuJDxlpvdSSLF//VxDpN/vGg3/AD4NvIQC0yHp7NbAvCtrR0GnmA5Vur6HFPoqUhPK0yS5hgGXAx2ji3bK+kmg6rSxCeNVpERK85iD/s8+PtU8Gl2BRL24fmjLg4oCNQxYZIgMbSjJBpMLdrz0MfMwEoiIKumXA5nCCO3E81RToWcSYHsuVpp3gfM+pSboLVzU3NCU= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: 2a8c98d8-972e-471f-5c58-08d653fd046e X-MS-Exchange-CrossTenant-originalarrivaltime: 27 Nov 2018 00:12:28.3176 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 105b2061-b669-4b31-92ac-24d304d195dc X-MS-Exchange-Transport-CrossTenantHeadersStamped: AT5PR8401MB0788 X-OriginatorOrg: hpe.com Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: Daniel Jordan [mailto:daniel.m.jordan@oracle.com] > Sent: Monday, November 19, 2018 10:02 AM > On Mon, Nov 12, 2018 at 10:15:46PM +0000, Elliott, Robert (Persistent Memory) wrote: > > > > > -----Original Message----- > > > From: Daniel Jordan > > > Sent: Monday, November 12, 2018 11:54 AM > > > > > > On Sat, Nov 10, 2018 at 03:48:14AM +0000, Elliott, Robert (Persistent > > > Memory) wrote: > > > > > -----Original Message----- > > > > > From: linux-kernel-owner@vger.kernel.org > > > > owner@vger.kernel.org> On Behalf Of Daniel Jordan > > > > > Sent: Monday, November 05, 2018 10:56 AM > > > > > Subject: [RFC PATCH v4 11/13] mm: parallelize deferred struct page > > > > > initialization within each node > > > > > > > ... > > > > > In testing, a reasonable value turned out to be about a quarter of the > > > > > CPUs on the node. > > > > ... > > > > > + /* > > > > > + * We'd like to know the memory bandwidth of the chip to > > > > > calculate the > > > > > + * most efficient number of threads to start, but we can't. > > > > > + * In testing, a good value for a variety of systems was a > > > > > quarter of the CPUs on the node. > > > > > + */ > > > > > + nr_node_cpus = DIV_ROUND_UP(cpumask_weight(cpumask), 4); > > > > > > > > > > > > You might want to base that calculation on and limit the threads to > > > > physical cores, not hyperthreaded cores. > > > > > > Why? Hyperthreads can be beneficial when waiting on memory. That said, I > > > don't have data that shows that in this case. > > > > I think that's only if there are some register-based calculations to do while > > waiting. If both threads are just doing memory accesses, they'll both stall, and > > there doesn't seem to be any benefit in having two contexts generate the IOs > > rather than one (at least on the systems I've used). I think it takes longer > > to switch contexts than to just turnaround the next IO. > > (Sorry for the delay, Plumbers is over now...) > > I guess we're both just waving our hands without data. I've only got x86, so > using a quarter of the CPUs rules out HT on my end. Do you have a system that > you can test this on, where using a quarter of the CPUs will involve HT? I ran a short test with: * HPE ProLiant DL360 Gen9 system * Intel Xeon E5-2699 CPU with 18 physical cores (0-17) and 18 hyperthreaded cores (36-53) * DDR4 NVDIMM-Ns (which run at regular DRAM DIMM speeds) * fio workload generator * cores on one CPU socket talking to a pmem device on the same CPU * large (1 MiB) random writes (to minimize the threads getting CPU cache hits from each other) Results: * 31.7 GB/s four threads, four physical cores (0,1,2,3) * 22.2 GB/s four threads, two physical cores (0,1,36,37) * 21.4 GB/s two threads, two physical cores (0,1) * 12.1 GB/s two threads, one physical core (0,36) * 11.2 GB/s one thread, one physical core (0) So, I think it's important that the initialization threads run on separate physical cores. For the number of cores to use, one approach is: memory bandwidth (number of interleaved channels * speed) divided by CPU core max sustained write bandwidth For example, this 2133 MT/s system is roughly: 68 GB/s (4 * 17 GB/s nominal) divided by 11.2 GB/s (one core's performance) which is 6 cores ACPI HMAT will report that 68 GB/s number. I'm not sure of a good way to discover the 11.2 GB/s number. fio job file: [global] direct=1 ioengine=sync norandommap randrepeat=0 bs=1M runtime=20 time_based=1 group_reporting thread gtod_reduce=1 zero_buffers cpus_allowed_policy=split # pick the desired number of threads numjobs=4 numjobs=2 numjobs=1 # CPU0: cores 0-17, hyperthreaded cores 36-53 [pmem0] filename=/dev/pmem0 # pick the desired cpus_allowed list cpus_allowed=0,1,2,3 cpus_allowed=0,1,36,37 cpus_allowed=0,36 cpus_allowed=0,1 cpus_allowed=0 rw=randwrite Although most CPU time is in movnti instructions (non-temporal stores), there is overhead in clearing the page cache and in the pmem block driver; those won't be present in your initialization function. perf top shows: 82.00% [kernel] [k] memcpy_flushcache 5.23% [kernel] [k] gup_pgd_range 3.41% [kernel] [k] __blkdev_direct_IO_simple 2.38% [kernel] [k] pmem_make_request 1.46% [kernel] [k] write_pmem 1.29% [kernel] [k] pmem_do_bvec --- Robert Elliott, HPE Persistent Memory