From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751716AbdKYQzS (ORCPT ); Sat, 25 Nov 2017 11:55:18 -0500 Received: from mail-io0-f194.google.com ([209.85.223.194]:39933 "EHLO mail-io0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751231AbdKYQzR (ORCPT ); Sat, 25 Nov 2017 11:55:17 -0500 X-Google-Smtp-Source: AGs4zMYMUZEoHsFy15n3RaCtozlrbc3+LHCCjZQIrr7jZDTHwlG7yuMQlis/PrpsWZcuyS+Hz20xUg== Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (1.0) Subject: Re: [PATCH 20/43] x86/entry: Clean up SYSENTER_stack code From: Andy Lutomirski X-Mailer: iPhone Mail (15B150) In-Reply-To: Date: Sat, 25 Nov 2017 09:55:15 -0700 Cc: Borislav Petkov , Ingo Molnar , linux-kernel@vger.kernel.org, Dave Hansen , "H . Peter Anvin" , Peter Zijlstra , Linus Torvalds Message-Id: References: <20171124172411.19476-1-mingo@kernel.org> <20171124172411.19476-21-mingo@kernel.org> <20171125163956.nrxpobf5xetnavo6@pd.tnic> To: Thomas Gleixner Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from quoted-printable to 8bit by nfs id vAPGtOXh023079 > On Nov 25, 2017, at 9:50 AM, Thomas Gleixner wrote: > > On Sat, 25 Nov 2017, Borislav Petkov wrote: >>> - >>> + wrmsr(MSR_IA32_SYSENTER_ESP, (unsigned long)(cpu_SYSENTER_stack(cpu) + 1), 0); >>> wrmsr(MSR_IA32_SYSENTER_EIP, (unsigned long)entry_SYSENTER_32, 0); >> >> Right, so we have now two TSS thingies, AFAICT: >> >> tss = &per_cpu(cpu_tss, cpu); >> >> which is cpu_tss and then indirectly, we have also: >> >> &get_cpu_entry_area((cpu))->tss >> >> And those are two different things in my guest here: >> >> [ 0.044002] tss: 0xf5747000 >> [ 0.044706] entry area tss: 0xffef1000 >> >> What is the logic here? We carry two TSSs per CPU - one which is RO >> for the entry area and the other is the actual cpu_tss thing? Or am I >> misreading it? > > entry area tss is a alias mapping of cpu_tss > > + set_percpu_fixmap_pages(get_cpu_entry_area_index(cpu, tss), > + &per_cpu(cpu_tss, cpu), > + sizeof(struct tss_struct) / PAGE_SIZE, > + PAGE_KERNEL); > Exactly. And, in the patch I haven't emailed, the alias is RO on x86_64. Maybe I should rename cpu_tss to cpu_tss_rw in that patch. > Thanks, > > tglx