From: Lu Jingchang-B35083 <B35083@freescale.com>
To: Vinod Koul <vinod.koul@intel.com>
Cc: "djbw@fb.com" <djbw@fb.com>,
"shawn.guo@linaro.org" <shawn.guo@linaro.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Subject: RE: [PATCH 3/3] dma: Add Freescale eDMA engine driver support
Date: Tue, 17 Sep 2013 07:37:48 +0000 [thread overview]
Message-ID: <B56CDBE15CE27145A4B77D2D24263E85223E0C@039-SN1MPN1-003.039d.mgd.msft.net> (raw)
In-Reply-To: <20130917045359.GN17188@intel.com>
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> -----Original Message-----
> From: Vinod Koul [mailto:vinod.koul@intel.com]
> Sent: Tuesday, September 17, 2013 12:54 PM
> To: Lu Jingchang-B35083
> Cc: djbw@fb.com; shawn.guo@linaro.org; linux-kernel@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; devicetree@vger.kernel.org; Wang
> Huan-B18965
> Subject: Re: [PATCH 3/3] dma: Add Freescale eDMA engine driver support
>
> I need ACK from DT maintainers on the above parts
Should I cc this to one of the DT maintainers? Thanks.
>
> > +static int fsl_edma_control(struct dma_chan *chan, enum dma_ctrl_cmd
> cmd,
> > + unsigned long arg)
> > +{
> > + struct fsl_edma_chan *fsl_chan = to_fsl_edma_chan(chan);
> > + struct dma_slave_config *cfg = (void *)arg;
> > +
> > + switch (cmd) {
> > + case DMA_TERMINATE_ALL:
> > + fsl_edma_disable_request(fsl_chan);
> > + fsl_chan->edesc = NULL;
> you need to hold the lock here to prevent race here!
Thanks, I will fix this in the next version of the patch.
>
> > + vchan_free_chan_resources(&fsl_chan->vchan);
> > + return 0;
> > +
> > + case DMA_SLAVE_CONFIG:
> > + fsl_chan->fsc.dir = cfg->direction;
> > + if (cfg->direction == DMA_DEV_TO_MEM) {
> > + fsl_chan->fsc.dev_addr = cfg->src_addr;
> > + fsl_chan->fsc.addr_width = cfg->src_addr_width;
> > + fsl_chan->fsc.burst = cfg->src_maxburst;
> > + fsl_chan->fsc.attr = fsl_edma_get_tcd_attr(cfg-
> >src_addr_width);
> > + } else if (cfg->direction == DMA_MEM_TO_DEV) {
> > + fsl_chan->fsc.dev_addr = cfg->dst_addr;
> > + fsl_chan->fsc.addr_width = cfg->dst_addr_width;
> > + fsl_chan->fsc.burst = cfg->dst_maxburst;
> > + fsl_chan->fsc.attr = fsl_edma_get_tcd_attr(cfg-
> >dst_addr_width);
> > + } else {
> > + return -EINVAL;
> > + }
> > +
> > + if (!cfg->slave_id) {
> > + return -EINVAL;
> should you check for this first, you wrote the channel with config above
> and now
> returning error?
Yes, the slave id should be checked first, thanks!
> > + spin_lock_irqsave(&fsl_chan->vchan.lock, flags);
> > + vdesc = vchan_find_desc(&fsl_chan->vchan, cookie);
> > + if (fsl_chan->edesc && cookie == fsl_chan->edesc->vdesc.tx.cookie)
> > + txstate->residue = fsl_edma_desc_residue(fsl_chan, vdesc, 1);
> why not use true/false for the last bool arg?
Thanks, I will use true/false instead.
Best Regards,
Jingchang
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next prev parent reply other threads:[~2013-09-17 7:54 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-09-05 9:53 [PATCH 3/3] dma: Add Freescale eDMA engine driver support Jingchang Lu
2013-09-17 4:53 ` Vinod Koul
2013-09-17 7:37 ` Lu Jingchang-B35083 [this message]
2013-09-17 8:08 ` Lu Jingchang-B35083
2013-09-23 4:25 ` Vinod Koul
2013-09-23 6:56 ` Lu Jingchang-B35083
-- strict thread matches above, loose matches on Subject: below --
2013-08-02 7:55 [PATCH 1/3] ARM: imx: Add DMAMUX clock for Vybrid vf610 SoC Jingchang Lu
2013-08-02 7:55 ` [PATCH 3/3] dma: Add Freescale eDMA engine driver support Jingchang Lu
2013-08-04 13:55 ` Shawn Guo
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