From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752238AbdJPLqY convert rfc822-to-8bit (ORCPT ); Mon, 16 Oct 2017 07:46:24 -0400 Received: from szxga03-in.huawei.com ([45.249.212.189]:13341 "EHLO szxga03-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751398AbdJPLqX (ORCPT ); Mon, 16 Oct 2017 07:46:23 -0400 From: "Liuwenliang (Lamb)" To: kbuild test robot CC: "kbuild-all@01.org" , "linux@armlinux.org.uk" , "aryabinin@virtuozzo.com" , "afzal.mohd.ma@gmail.com" , "f.fainelli@gmail.com" , "labbott@redhat.com" , "kirill.shutemov@linux.intel.com" , "mhocko@suse.com" , "cdall@linaro.org" , "marc.zyngier@arm.com" , "catalin.marinas@arm.com" , "akpm@linux-foundation.org" , "mawilcox@microsoft.com" , "tglx@linutronix.de" , "thgarnie@google.com" , "keescook@chromium.org" , "arnd@arndb.de" , "vladimir.murzin@arm.com" , "tixy@linaro.org" , "ard.biesheuvel@linaro.org" , "robin.murphy@arm.com" , "mingo@kernel.org" , "grygorii.strashko@linaro.org" , "glider@google.com" , "dvyukov@google.com" , "opendmb@gmail.com" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "kasan-dev@googlegroups.com" , "linux-mm@kvack.org" , Jiazhenghua , Dailei , Zengweilin , Heshaoliang Subject: Re: [PATCH 04/11] Define the virtual space of KASan's shadow region Thread-Topic: [PATCH 04/11] Define the virtual space of KASan's shadow region Thread-Index: AQHTQmojF4blZnsX90GevfXlGaKSjKLit+AAgAOfd2A= Date: Mon, 16 Oct 2017 11:42:05 +0000 Message-ID: References: <20171011082227.20546-5-liuwenliang@huawei.com> <201710141957.mbxeZJHB%fengguang.wu@intel.com> In-Reply-To: <201710141957.mbxeZJHB%fengguang.wu@intel.com> Accept-Language: en-US Content-Language: zh-CN X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.57.90.243] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020202.59E49B1E.0065,ss=1,re=0.000,recu=0.000,reip=0.000,cl=1,cld=1,fgs=0, ip=169.254.12.139, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: fe954e4176a8e0d1bcdb2b552fc9173c Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10/16/2017 07:03 PM, Abbott Liu wrote: >arch/arm/kernel/entry-armv.S:348: Error: selected processor does not support `movw r1, #:lower16:((((0xC0000000-0x01000000)>>3)+((0xC0000000-0x01000000)-(1<<29))))' in ARM mode >arch/arm/kernel/entry-armv.S:348: Error: selected processor does not support `movt r1, #:upper16:((((0xC0000000-0x01000000)>>3)+((0xC0000000-0x01000000)-(1<<29))))' in ARM mode Thanks for building test. This error can be solved by following code: --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S @@ -188,8 +188,7 @@ ENDPROC(__und_invalid) get_thread_info tsk ldr r0, [tsk, #TI_ADDR_LIMIT] #ifdef CONFIG_KASAN - movw r1, #:lower16:TASK_SIZE - movt r1, #:upper16:TASK_SIZE + ldr r1, =TASK_SIZE #else mov r1, #TASK_SIZE #endif @@ -446,7 +445,12 @@ ENDPROC(__fiq_abt) @ if it was interrupted in a critical region. Here we @ perform a quick test inline since it should be false @ 99.9999% of the time. The rest is done out of line. +#if CONFIG_KASAN + ldr r0, =TASK_SIZE + cmp r4, r0 +#else cmp r4, #TASK_SIZE +#endif blhs kuser_cmpxchg64_fixup #endif #endif movt,movw can only be used in ARMv6*, ARMv7 instruction set. But ldr can be used in ARMv4*, ARMv5T*, ARMv6*, ARMv7. Maybe the performance is going to fall down by using ldr, but I think the influence of performance is very limited.