From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753666AbcEYNBO (ORCPT ); Wed, 25 May 2016 09:01:14 -0400 Received: from mail1.bemta12.messagelabs.com ([216.82.251.14]:23978 "EHLO mail1.bemta12.messagelabs.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751223AbcEYNBM (ORCPT ); Wed, 25 May 2016 09:01:12 -0400 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrCKsWRWlGSWpSXmKPExsWSLvdKT1dkkWu 4wYIGRYslTRkWr86sZbOYtHY5s8XlXXPYLM7OO85mcX7XWlaLdz962S3uXJvG5MDhsWBTqUfL kbesHptWdbJ5vN93lc3j8ya5ANYo1sy8pPyKBNaMlasnshe8VKxY+HoFawPjBsUuRi4OIYHHj BJPj35i7WLkBHIWMkpcWpcKYrMJqErcXP0KKM7BISKgJtHVHgpSzyzwl0nixuE7LCBxYYEoib lrskHKRQSiJdqutzJB2FYSL649B7NZgMacPr4dbDyvgI/EpcWboFalSKx8+A/M5hTQl5i+9C0 7iM0oICsx7dF9sF5mAXGJudNmgdVICAhILNlznhnCFpV4+fgf2GkSAvISW2YJQpRrScxr+A3V qigxpfshO8RaQYmTM5+wTGAUmYVk6iwkLbOQtMxC0rKAkWUVo0ZxalFZapGukbleUlFmekZJb mJmjq6hoZFebmpxcWJ6ak5iUrFecn7uJkZg7NUzMDDuYNzU6HWIUZKDSUmU16fONVyILyk/pT IjsTgjvqg0J7X4EKMMB4eSBO/cBUA5waLU9NSKtMwcYBKASUtw8CiJ8CotBErzFhck5hZnpkO kTjEqSonzLgTpEwBJZJTmwbXBEs8lRlkpYV5GBgYGIZ6C1KLczBJU+VeM4hyMSsK8LiDjeTLz SuCmvwJazAS02P+LM8jikkSElFQDo1pz47rF1zinuFjdEn38ePe19elsqn+YyrYVz9tzWYexa JlQXUSch/2zV68EDuYEGAWEJ/1g4uC2WjDb8uT1rWu0J3MUXnGLOd2gEdDzyuD3h2t1ugcy9l Y6SilF9EaYPvbZruakbqg8zWuRzpYLO2a07NlyWOj9sT0hOzv1617/fnbtJt8BXSWW4oxEQy3 mouJEAJtqgpA3AwAA X-Env-Sender: hehy1@lenovo.com X-Msg-Ref: server-5.tower-168.messagelabs.com!1464181262!25202752!1 X-Originating-IP: [103.30.234.46] X-StarScan-Received: X-StarScan-Version: 8.34; banners=-,-,- X-VirusChecked: Checked From: Ocean HY1 He To: Bjorn Helgaas CC: "bhelgaas@google.com" , "wangyijing@huawei.com" , "luto@kernel.org" , "linux-pci@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "prarit@redhat.com" , "jcm@redhat.com" , Nagananda Chumbalkar Subject: RE: [PATCH] PCI/ASPM: fix reverse ASPM L0s assignment of upstream and downstream Thread-Topic: [PATCH] PCI/ASPM: fix reverse ASPM L0s assignment of upstream and downstream Thread-Index: AQHRtYWpsg8lpcvx/02vlThlKiXkr5/HdKOAgAIjNOA= Date: Wed, 25 May 2016 12:58:38 +0000 Message-ID: References: <1464071269-79954-1-git-send-email-hehy1@lenovo.com> <20160524115333.GA19140@localhost> In-Reply-To: <20160524115333.GA19140@localhost> Accept-Language: zh-CN, en-US Content-Language: zh-CN X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.96.19.89] Content-Type: text/plain; charset="gb2312" MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by mail.home.local id u4PD1JWn004808 Hi Bjorn, I file a bug today: https://bugzilla.kernel.org/show_bug.cgi?id=118941 My patch passed in my test machine, but it's sad that Lenovo PA team still find reset issue when do batch test even applied my patch. So please ignore it at this time. I am sorry for it. But I will spend more time to find if the patch is still right but has no impact on above bug report. The section "5.4.1.1.1. Entry into the L0s State" of PCIE spec says: "Software must not enable L0s in either direction on a given Link unless components on both sides of the Link each support L0s; otherwise, the result is undefined." So I think the issue may be caused by different ASPM L0s setting in each side of the link. After disable both of them, the issue gone. And I find both sides of the link always keep ASPM L1 the same. Why ASPM L0s is treated in different way even PCIE spec has concern? Is it valuable and acceptable to let ASPM L0s always keep the same in both sides of a link? Thanks! Ocean He / ºÎº£Ñó SW Development Dept. Beijing Design Center Enterprise Product Group Mobile: 18911778926 E-mail: hehy1@lenovo.com No.6 Chuang Ye Road, Haidian District, Beijing, China 100085 -----Original Message----- From: Bjorn Helgaas [mailto:helgaas@kernel.org] Sent: Tuesday, May 24, 2016 7:54 PM To: Ocean HY1 He Cc: bhelgaas@google.com; wangyijing@huawei.com; luto@kernel.org; linux-pci@vger.kernel.org; linux-kernel@vger.kernel.org; prarit@redhat.com; jcm@redhat.com; Nagananda Chumbalkar Subject: Re: [PATCH] PCI/ASPM: fix reverse ASPM L0s assignment of upstream and downstream Hi Ocean, On Tue, May 24, 2016 at 06:29:44AM +0000, Ocean HY1 He wrote: > In pcie_config_aspm_link(), when convert ASPM state to > upstream/downstream ASPM register state, the upstream variable and > dwsream variable are reversed. This causes PCI/E link enter ASPM L0s > even it should be disabled and PCI/E endpoint may reset randomly. Random resets of an endpoint sounds like a pretty bad problem. Do you have a bug report? We've had lots of issues with ASPM; I wonder if this could account for some of them. > Signed-off-by: Ocean He > --- > drivers/pci/pcie/aspm.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c > index 2dfe7fd..3f8a44d 100644 > --- a/drivers/pci/pcie/aspm.c > +++ b/drivers/pci/pcie/aspm.c > @@ -439,9 +439,9 @@ static void pcie_config_aspm_link(struct pcie_link_state *link, u32 state) > return; > /* Convert ASPM state to upstream/downstream ASPM register state */ > if (state & ASPM_STATE_L0S_UP) > - dwstream |= PCI_EXP_LNKCTL_ASPM_L0S; > - if (state & ASPM_STATE_L0S_DW) > upstream |= PCI_EXP_LNKCTL_ASPM_L0S; > + if (state & ASPM_STATE_L0S_DW) > + dwstream |= PCI_EXP_LNKCTL_ASPM_L0S; > if (state & ASPM_STATE_L1) { > upstream |= PCI_EXP_LNKCTL_ASPM_L1; > dwstream |= PCI_EXP_LNKCTL_ASPM_L1; > -- > 1.8.3.1 > -- > To unsubscribe from this list: send the line "unsubscribe linux-pci" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html