From: "Tian, Kevin" <kevin.tian@intel.com>
To: Baolu Lu <baolu.lu@linux.intel.com>,
"iommu@lists.linux.dev" <iommu@lists.linux.dev>
Cc: Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
"Robin Murphy" <robin.murphy@arm.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH 1/1] iommu/vt-d: Enable PASID during iommu device probe
Date: Tue, 13 Sep 2022 07:42:21 +0000 [thread overview]
Message-ID: <BN9PR11MB5276B919C9E933088473224F8C479@BN9PR11MB5276.namprd11.prod.outlook.com> (raw)
In-Reply-To: <af6a3ae8-d4b2-517d-8b14-15dd20392a00@linux.intel.com>
> From: Baolu Lu <baolu.lu@linux.intel.com>
> Sent: Tuesday, September 13, 2022 2:01 PM
>
> Hi Kevin,
>
> On 2022/9/13 11:13, Tian, Kevin wrote:
> >> From: Lu Baolu <baolu.lu@linux.intel.com>
> >> Sent: Monday, September 12, 2022 10:48 AM
> >>
> >> Previously PASID supports on both IOMMU and PCI devices are enabled in
> >> the
> >> iommu_dev_enable_feature(dev, IOMMU_DEV_FEAT_SVA) path. It's
> >> functionally
> >> correct as the SVA is the only feature that requires PASID setup. However,
> >> looking ahead, we will add more features that need to enable pasid (for
> >> example, kernel DMA with PASID, SIOV, VM guest SVA, etc.). It makes
> more
> >> sense to enable PASID during iommu probing device.
> >>
> >> This enables PASID during iommu probing device and deprecates the
> >> intel_iommu_enable_pasid() helper. This is safe because the IOMMU
> >> hardware
> >> will block any PCI TLP with a PASID prefix if there is no IOMMU domain
> >> attached to the PASID of the device.
> >>
> >
> > IMHO it's better to enable something only when it's actually required,
> > e.g. does it make more sense to have a IOMMU_DEV_FEAT_PASID
> > instead?
>
> PASID is a capability (not a feature) of a device. Hence from my point
> of view, the IOMMU driver could enable it by default as long as the
> IOMMU can handle transactions with PASID. Currently other PCIe
> capabilities like ATS and PRI are also handled in this way.
>
OK, then it makes some sense. and later the PASID capability can
be reported so a driver can query to enable certain usage (e.g. SIOV)
based on it.
next prev parent reply other threads:[~2022-09-13 7:42 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-12 2:48 [PATCH 1/1] iommu/vt-d: Enable PASID during iommu device probe Lu Baolu
2022-09-13 3:13 ` Tian, Kevin
2022-09-13 6:01 ` Baolu Lu
2022-09-13 7:42 ` Tian, Kevin [this message]
2022-09-13 7:46 ` Ethan Zhao
2022-09-13 9:30 ` Baolu Lu
[not found] ` <e26efaee-d84a-3b60-8400-90d8e49a9b25@linux.intel.com>
2022-09-15 3:00 ` Baolu Lu
2022-09-16 2:40 ` Ethan Zhao
2022-09-16 3:05 ` Baolu Lu
2022-09-16 3:37 ` Ethan Zhao
[not found] ` <a6ac5953-7372-9894-58d4-d1ee2905d4dd@linux.intel.com>
2022-09-16 4:01 ` Baolu Lu
2022-09-13 8:01 ` Tian, Kevin
2022-09-13 9:25 ` Baolu Lu
2022-09-15 3:22 ` Tian, Kevin
2022-09-15 7:21 ` Baolu Lu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=BN9PR11MB5276B919C9E933088473224F8C479@BN9PR11MB5276.namprd11.prod.outlook.com \
--to=kevin.tian@intel.com \
--cc=baolu.lu@linux.intel.com \
--cc=iommu@lists.linux.dev \
--cc=joro@8bytes.org \
--cc=linux-kernel@vger.kernel.org \
--cc=robin.murphy@arm.com \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).