From: "Tian, Kevin" <kevin.tian@intel.com>
To: Thomas Gleixner <tglx@linutronix.de>, "Dey, Megha" <megha.dey@intel.com>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"Raj, Ashok" <ashok.raj@intel.com>,
"Jiang, Dave" <dave.jiang@intel.com>,
"Pan, Jacob jun" <jacob.jun.pan@intel.com>,
"Liu, Yi L" <yi.l.liu@intel.com>,
"jgg@mellanox.com" <jgg@mellanox.com>,
"Kumar, Sanjay K" <sanjay.k.kumar@intel.com>,
"Van De Ven, Arjan" <arjan.van.de.ven@intel.com>,
"Williams, Dan J" <dan.j.williams@intel.com>,
"Shankar, Ravi V" <ravi.v.shankar@intel.com>
Subject: RE: Programming PASID in IMS entries
Date: Wed, 7 Jul 2021 23:51:21 +0000 [thread overview]
Message-ID: <BN9PR11MB5433A4B8031D696A61BB43378C1A9@BN9PR11MB5433.namprd11.prod.outlook.com> (raw)
In-Reply-To: <87k0m2qzgz.ffs@nanos.tec.linutronix.de>
> From: Thomas Gleixner <tglx@linutronix.de>
> Sent: Wednesday, July 7, 2021 4:51 PM
>
> > Also, from a previous discussion [1], we want to make IMS more dynamic:
> >
> > Given the QEMU behavior it doesn't ask for all IRQs upfront. It only
> > allocates 1, and when it unmasks the 2nd, it wants to dynamically add a
> > second. This will allow adding a second IRQ without having to free all
> > the old irqs and reacquire the new number (as it is done today).
> >
> > This dynamic behavior is only for MSIx/IMS backed entries. For legacy
> > MSI, QEMU will allocate everything upfront. Since it has a
> > "num_vectors" enabled, nothing can be dynamically done for MSI. Kevin
> > is looking to have this fixed for legacy to stop the dynamic part for
> > MSI. We are pursuing this change just for IMS first, and once it
> > works, we can replicate the same for MSIx too.
>
> No. Fix the existing stuff first and then IMS just works.
>
Does below sound a plan?
1. Fix Qemu to allocate all possible irqs when guest unmasks MSI/MSI-X,
instead of freeing and re-allocating in the fly. This is an improvement
for existing kernels which don't support dynamic resize.
2. Extend MSI-X core to support dynamic resize. Via VFIO_IRQ_INFO_
NORESIZE Qemu can enable dynamic resize if the flag is false. and
from your comment dev-msi resize will be covered too with this change.
3. Add hypercall (or a pv irqchip) to provide feedback into guest in case
of irq shortage. This is also necessary to enable guest ims.
Thanks
Kevin
prev parent reply other threads:[~2021-07-07 23:51 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <bd509e3d-f59d-1200-44ce-93cf9132bd8c@intel.com>
2021-07-07 8:50 ` Programming PASID in IMS entries Thomas Gleixner
2021-07-07 12:15 ` Jason Gunthorpe
2021-07-07 23:41 ` Tian, Kevin
2021-07-07 22:12 ` Raj, Ashok
2021-07-07 23:58 ` Jason Gunthorpe
2021-07-08 0:33 ` Raj, Ashok
2021-07-08 12:08 ` Jason Gunthorpe
2021-07-08 14:36 ` Raj, Ashok
2021-07-08 18:45 ` Thomas Gleixner
2021-07-08 21:33 ` Raj, Ashok
2021-07-08 13:00 ` Thomas Gleixner
2021-07-07 23:51 ` Tian, Kevin [this message]
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