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Mon, 21 Feb 2022 07:54:54 +0000 Received: from BN9PR11MB5483.namprd11.prod.outlook.com ([fe80::8c4b:e24c:c69f:7809]) by BN9PR11MB5483.namprd11.prod.outlook.com ([fe80::8c4b:e24c:c69f:7809%5]) with mapi id 15.20.4995.027; Mon, 21 Feb 2022 07:54:54 +0000 From: "Zhang, Tianfei" To: "Xu, Yilun" , Tom Rix CC: "Wu, Hao" , "mdf@kernel.org" , "linux-fpga@vger.kernel.org" , "linux-doc@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "corbet@lwn.net" Subject: RE: [PATCH v1 2/7] fpga: dfl: check feature type before parse irq info Thread-Topic: [PATCH v1 2/7] fpga: dfl: check feature type before parse irq info Thread-Index: AQHYI6ii288SiYkZKUC48TEHx/h38qydqJGA Date: Mon, 21 Feb 2022 07:54:54 +0000 Message-ID: References: <20220214112619.219761-1-tianfei.zhang@intel.com> <20220214112619.219761-3-tianfei.zhang@intel.com> <0de9c8fb-0f04-684f-630c-1d13b0b55ba1@redhat.com> <20220217023816.GD1145049@yilunxu-OptiPlex-7050> In-Reply-To: <20220217023816.GD1145049@yilunxu-OptiPlex-7050> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.6.200.16 dlp-reaction: no-action authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BN9PR11MB5483.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 2d072596-5079-4466-5267-08d9f50f72cb X-MS-Exchange-CrossTenant-originalarrivaltime: 21 Feb 2022 07:54:54.7784 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: /mS4e44oIJ/9kiZj2x1hdrP4pkcuilXJkpTIBFMcIkVbYivO4LJavCFU7KgwKu3AxdYgCIgXhwy47e1UEocGvA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA2PR11MB4987 X-OriginatorOrg: intel.com Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: Xu, Yilun > Sent: Thursday, February 17, 2022 10:38 AM > To: Tom Rix > Cc: Zhang, Tianfei ; Wu, Hao ; > mdf@kernel.org; linux-fpga@vger.kernel.org; linux-doc@vger.kernel.org; li= nux- > kernel@vger.kernel.org; corbet@lwn.net > Subject: Re: [PATCH v1 2/7] fpga: dfl: check feature type before parse ir= q info >=20 > On Tue, Feb 15, 2022 at 06:49:05AM -0800, Tom Rix wrote: > > > > On 2/14/22 3:26 AM, Tianfei zhang wrote: > > > From: Tianfei Zhang > > > > > > The feature ID of "Port User Interrupt" and the "PMCI Subsystem" are > > > identical, 0x12, but one is for FME, other is for Port. It should > > > check the feature type While parsing the irq info in > > > parse_feature_irqs(). > > > > This seems like a bug fix and not part of iofs feature. > > > > Split this out of the patchset. > > > > This is a workaround a hardware problem, there should be some comments > > to the effect that you can't trust _this_ or _that_ feature id and > > some special handling earlier. > > > > The ambiguity of feature id is a problem, and this sort of bug will > > happen >=20 > Actually this is not the feature id definition problem. The identity of t= he feature > is determined by the dfl_id_type(FME, PORT) AND feature_id. So the driver > should match the dfl_id_type & feature_id to know what feature it is. In this function flow, create_feature_instance() -> parse_feature_irqs(), t= he DFL driver has not check the dfl_id_type yet. >=20 > Thanks, > Yilun >=20 > > again. > > > > What can be done to prevent this in the future ? > > > > > > > > Signed-off-by: Tianfei Zhang > > > --- > > > drivers/fpga/dfl.c | 11 +++++++++++ > > > 1 file changed, 11 insertions(+) > > > > > > diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c index > > > 599bb21d86af..26f8cf890700 100644 > > > --- a/drivers/fpga/dfl.c > > > +++ b/drivers/fpga/dfl.c > > > @@ -940,9 +940,14 @@ static int parse_feature_irqs(struct > build_feature_devs_info *binfo, > > > { > > > void __iomem *base =3D binfo->ioaddr + ofst; > > > unsigned int i, ibase, inr =3D 0; > > > + enum dfl_id_type type; > > > int virq; > > > u64 v; > > > + type =3D feature_dev_id_type(binfo->feature_dev); > > > + if (type >=3D DFL_ID_MAX) > > > + return -EINVAL; > > > + > > > /* > > > * Ideally DFL framework should only read info from DFL header, bu= t > > > * current version DFL only provides mmio resources information > > > for @@ -959,16 +964,22 @@ static int parse_feature_irqs(struct > build_feature_devs_info *binfo, > > > */ > > > switch (fid) { > > > case PORT_FEATURE_ID_UINT: > > > + if (type !=3D PORT_ID) > > > + break; > > > > Instead of embedding a break in the switch, break the switch into fme > > switch and port switch > > > > if (type =3D=3D PORT_ID) > > > > =A0 port-switch > > > > else if (type =3D=3D FME_ID > > > > =A0 fme-switch > > > > Tom > > > > > v =3D readq(base + PORT_UINT_CAP); > > > ibase =3D FIELD_GET(PORT_UINT_CAP_FST_VECT, v); > > > inr =3D FIELD_GET(PORT_UINT_CAP_INT_NUM, v); > > > break; > > > case PORT_FEATURE_ID_ERROR: > > > + if (type !=3D PORT_ID) > > > + break; > > > v =3D readq(base + PORT_ERROR_CAP); > > > ibase =3D FIELD_GET(PORT_ERROR_CAP_INT_VECT, v); > > > inr =3D FIELD_GET(PORT_ERROR_CAP_SUPP_INT, v); > > > break; > > > case FME_FEATURE_ID_GLOBAL_ERR: > > > + if (type !=3D FME_ID) > > > + break; > > > v =3D readq(base + FME_ERROR_CAP); > > > ibase =3D FIELD_GET(FME_ERROR_CAP_INT_VECT, v); > > > inr =3D FIELD_GET(FME_ERROR_CAP_SUPP_INT, v);