From: Amit Sunil Dhamne <amitsuni@xilinx.com>
To: Michael Tretter <m.tretter@pengutronix.de>
Cc: "mturquette@baylibre.com" <mturquette@baylibre.com>,
"sboyd@codeaurora.org" <sboyd@codeaurora.org>,
"sboyd@kernel.org" <sboyd@kernel.org>,
Michal Simek <michals@xilinx.com>,
"mark.rutland@arm.com" <mark.rutland@arm.com>,
"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
Rajan Vaja <RAJANV@xilinx.com>, Jolly Shah <JOLLYS@xilinx.com>,
Tejas Patel <TEJASP@xilinx.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Rajan Vaja <RAJANV@xilinx.com>, Tejas Patel <TEJASP@xilinx.com>
Subject: RE: [PATCH v2 2/3] clk: zynqmp: Use firmware specific divider clock flags
Date: Thu, 23 Jul 2020 23:59:43 +0000 [thread overview]
Message-ID: <BYAPR02MB5622F9742DED5D3E4FF893B3A7760@BYAPR02MB5622.namprd02.prod.outlook.com> (raw)
In-Reply-To: <20200722132708.GD21264@pengutronix.de>
Hi Michael,
Thanks for the review. Will push the Flag conversion to a new function.
Thanks,
Amit
> -----Original Message-----
> From: Michael Tretter <m.tretter@pengutronix.de>
> Sent: Wednesday, July 22, 2020 6:27 AM
> To: Amit Sunil Dhamne <amitsuni@xilinx.com>
> Cc: mturquette@baylibre.com; sboyd@codeaurora.org; sboyd@kernel.org;
> Michal Simek <michals@xilinx.com>; mark.rutland@arm.com; linux-
> clk@vger.kernel.org; Rajan Vaja <RAJANV@xilinx.com>; Jolly Shah
> <JOLLYS@xilinx.com>; Tejas Patel <TEJASP@xilinx.com>; linux-arm-
> kernel@lists.infradead.org; linux-kernel@vger.kernel.org; Rajan Vaja
> <RAJANV@xilinx.com>; Tejas Patel <TEJASP@xilinx.com>
> Subject: Re: [PATCH v2 2/3] clk: zynqmp: Use firmware specific divider clock
> flags
>
> On Tue, 21 Jul 2020 23:55:31 -0700, Amit Sunil Dhamne wrote:
> > From: Rajan Vaja <rajan.vaja@xilinx.com>
> >
> > Use ZynqMP specific divider clock flags instead of using CCF flags.
> >
> > Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
> > Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
> > Signed-off-by: Amit Sunil Dhamne <amit.sunil.dhamne@xilinx.com>
> > ---
> > drivers/clk/zynqmp/clk-zynqmp.h | 9 +++++++++
> > drivers/clk/zynqmp/divider.c | 16 +++++++++++++++-
> > 2 files changed, 24 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/clk/zynqmp/clk-zynqmp.h
> > b/drivers/clk/zynqmp/clk-zynqmp.h index 3cb6149..ec33525 100644
> > --- a/drivers/clk/zynqmp/clk-zynqmp.h
> > +++ b/drivers/clk/zynqmp/clk-zynqmp.h
> > @@ -32,6 +32,15 @@
> > /* do not gate, ever */
> > #define ZYNQMP_CLK_IS_CRITICAL BIT(11)
> >
> > +/* Type Flags for divider clock */
> > +#define ZYNQMP_CLK_DIVIDER_ONE_BASED BIT(0)
> > +#define ZYNQMP_CLK_DIVIDER_POWER_OF_TWO BIT(1)
> > +#define ZYNQMP_CLK_DIVIDER_ALLOW_ZERO BIT(2)
> > +#define ZYNQMP_CLK_DIVIDER_HIWORD_MASK BIT(3)
> > +#define ZYNQMP_CLK_DIVIDER_ROUND_CLOSEST BIT(4)
> > +#define ZYNQMP_CLK_DIVIDER_READ_ONLY BIT(5)
> > +#define ZYNQMP_CLK_DIVIDER_MAX_AT_ZERO BIT(6)
> > +
> > enum topology_type {
> > TYPE_INVALID,
> > TYPE_MUX,
> > diff --git a/drivers/clk/zynqmp/divider.c
> > b/drivers/clk/zynqmp/divider.c index 3ab57d9..86cb785 100644
> > --- a/drivers/clk/zynqmp/divider.c
> > +++ b/drivers/clk/zynqmp/divider.c
> > @@ -320,7 +320,21 @@ struct clk_hw *zynqmp_clk_register_divider(const
> char *name,
> > /* struct clk_divider assignments */
> > div->is_frac = !!((nodes->flag & CLK_FRAC) |
> > (nodes->custom_type_flag & CUSTOM_FLAG_CLK_FRAC));
> > - div->flags = nodes->type_flag;
> > + div->flags = 0;
> > + div->flags |= (nodes->type_flag &
> ZYNQMP_CLK_DIVIDER_ONE_BASED) ?
> > + CLK_DIVIDER_ONE_BASED : 0;
> > + div->flags |= (nodes->type_flag &
> ZYNQMP_CLK_DIVIDER_POWER_OF_TWO) ?
> > + CLK_DIVIDER_POWER_OF_TWO : 0;
> > + div->flags |= (nodes->type_flag &
> ZYNQMP_CLK_DIVIDER_ALLOW_ZERO) ?
> > + CLK_DIVIDER_ALLOW_ZERO : 0;
> > + div->flags |= (nodes->type_flag &
> ZYNQMP_CLK_DIVIDER_POWER_OF_TWO) ?
> > + CLK_DIVIDER_HIWORD_MASK : 0;
> > + div->flags |= (nodes->type_flag &
> ZYNQMP_CLK_DIVIDER_ROUND_CLOSEST) ?
> > + CLK_DIVIDER_ROUND_CLOSEST : 0;
> > + div->flags |= (nodes->type_flag &
> ZYNQMP_CLK_DIVIDER_READ_ONLY) ?
> > + CLK_DIVIDER_READ_ONLY : 0;
> > + div->flags |= (nodes->type_flag &
> ZYNQMP_CLK_DIVIDER_MAX_AT_ZERO) ?
> > + CLK_DIVIDER_MAX_AT_ZERO : 0;
>
> Add a helper function for converting the flags.
>
> Michael
>
> > div->hw.init = &init;
> > div->clk_id = clk_id;
> > div->div_type = nodes->type;
> > --
> > 2.7.4
> >
> > This email and any attachments are intended for the sole use of the named
> recipient(s) and contain(s) confidential information that may be proprietary,
> privileged or copyrighted under applicable law. If you are not the intended
> recipient, do not read, copy, or forward this email message or any
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next prev parent reply other threads:[~2020-07-23 23:59 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-22 6:55 [PATCH v2 0/3] clk: zynqmp: Add firmware specific clock flags Amit Sunil Dhamne
2020-07-22 6:55 ` [PATCH v2 1/3] clk: zynqmp: Use firmware specific common " Amit Sunil Dhamne
2020-07-22 13:22 ` Michael Tretter
2020-07-23 23:46 ` Amit Sunil Dhamne
2020-07-22 6:55 ` [PATCH v2 2/3] clk: zynqmp: Use firmware specific divider " Amit Sunil Dhamne
2020-07-22 13:27 ` Michael Tretter
2020-07-23 23:59 ` Amit Sunil Dhamne [this message]
2020-07-22 6:55 ` [PATCH v2 3/3] clk: zynqmp: Use firmware specific mux " Amit Sunil Dhamne
2020-07-22 13:28 ` Michael Tretter
2020-07-23 22:35 ` [PATCH v2 0/3] clk: zynqmp: Add firmware specific " Stephen Boyd
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