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Thu, 18 Mar 2021 06:46:11 +0000 From: Manish Narani To: Manish Narani , "laurent.pinchart@ideasonboard.com" , "kishon@ti.com" , "vkoul@kernel.org" , Michal Simek CC: "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , git Subject: RE: [PATCH v2] phy: zynqmp: Handle the clock enable/disable properly Thread-Topic: [PATCH v2] phy: zynqmp: Handle the clock enable/disable properly Thread-Index: AQHXFNXb37xOX0K7zEeEA5AD8pvy5qqJWuzQ Date: Thu, 18 Mar 2021 06:46:11 +0000 Message-ID: References: <1615288664-45034-1-git-send-email-manish.narani@xilinx.com> In-Reply-To: <1615288664-45034-1-git-send-email-manish.narani@xilinx.com> Accept-Language: en-IN, en-US Content-Language: en-US X-MS-Has-Attach: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-TNEF-Correlator: authentication-results: xilinx.com; dkim=none (message not signed) header.d=none;xilinx.com; dmarc=none action=none header.from=xilinx.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [149.199.50.129] x-ms-publictraffictype: Email x-ms-office365-filtering-ht: Tenant x-ms-office365-filtering-correlation-id: 246d41a6-9f54-4c8b-db5d-08d8e9d98497 x-ms-traffictypediagnostic: BYAPR02MB4277: x-ld-processed: 657af505-d5df-48d0-8300-c31994686c5c,ExtAddr x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:1002; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BYAPR02MB5896.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 246d41a6-9f54-4c8b-db5d-08d8e9d98497 X-MS-Exchange-CrossTenant-originalarrivaltime: 18 Mar 2021 06:46:11.3485 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: Bs4Sc6fEvJRd2GtzbzKa/BWdZUtYs89HLWgeLuWWHaKfk6C+Hc2uCZuwXXCdfHqbpVl3d3col9mGmZCGcWmjQQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR02MB4277 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Gentle Ping! > -----Original Message----- > From: Manish Narani > Sent: Tuesday, March 9, 2021 4:48 PM > To: laurent.pinchart@ideasonboard.com; kishon@ti.com; vkoul@kernel.org; > Michal Simek > Cc: linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; g= it > ; Manish Narani > Subject: [PATCH v2] phy: zynqmp: Handle the clock enable/disable properly >=20 > The current driver is not handling the clock enable/disable operations > properly. The clocks need to be handled correctly by enabling or > disabling at appropriate places. This patch adds code to handle the > same. >=20 > Signed-off-by: Manish Narani > --- > drivers/phy/xilinx/phy-zynqmp.c | 57 > ++++++++++++++++++++++++++++++++++++----- > 1 file changed, 50 insertions(+), 7 deletions(-) >=20 > diff --git a/drivers/phy/xilinx/phy-zynqmp.c b/drivers/phy/xilinx/phy- > zynqmp.c > index 2b65f84..37fcecf 100644 > --- a/drivers/phy/xilinx/phy-zynqmp.c > +++ b/drivers/phy/xilinx/phy-zynqmp.c > @@ -219,6 +219,7 @@ struct xpsgtr_dev { > struct mutex gtr_mutex; /* mutex for locking */ > struct xpsgtr_phy phys[NUM_LANES]; > const struct xpsgtr_ssc *refclk_sscs[NUM_LANES]; > + struct clk *clk[NUM_LANES]; > bool tx_term_fix; > unsigned int saved_icm_cfg0; > unsigned int saved_icm_cfg1; > @@ -818,11 +819,15 @@ static struct phy *xpsgtr_xlate(struct device *dev, > static int __maybe_unused xpsgtr_suspend(struct device *dev) > { > struct xpsgtr_dev *gtr_dev =3D dev_get_drvdata(dev); > + unsigned int i; >=20 > /* Save the snapshot ICM_CFG registers. */ > gtr_dev->saved_icm_cfg0 =3D xpsgtr_read(gtr_dev, ICM_CFG0); > gtr_dev->saved_icm_cfg1 =3D xpsgtr_read(gtr_dev, ICM_CFG1); >=20 > + for (i =3D 0; i < ARRAY_SIZE(gtr_dev->clk); i++) > + clk_disable_unprepare(gtr_dev->clk[i]); > + > return 0; > } >=20 > @@ -832,6 +837,13 @@ static int __maybe_unused xpsgtr_resume(struct > device *dev) > unsigned int icm_cfg0, icm_cfg1; > unsigned int i; > bool skip_phy_init; > + int err; > + > + for (i =3D 0; i < ARRAY_SIZE(gtr_dev->clk); i++) { > + err =3D clk_prepare_enable(gtr_dev->clk[i]); > + if (err) > + goto err_clk_put; > + } >=20 > icm_cfg0 =3D xpsgtr_read(gtr_dev, ICM_CFG0); > icm_cfg1 =3D xpsgtr_read(gtr_dev, ICM_CFG1); > @@ -852,6 +864,12 @@ static int __maybe_unused xpsgtr_resume(struct > device *dev) > gtr_dev->phys[i].skip_phy_init =3D skip_phy_init; >=20 > return 0; > + > +err_clk_put: > + for (i =3D 0; i < ARRAY_SIZE(gtr_dev->clk); i++) > + clk_disable_unprepare(gtr_dev->clk[i]); > + > + return err; > } >=20 > static const struct dev_pm_ops xpsgtr_pm_ops =3D { > @@ -865,6 +883,7 @@ static const struct dev_pm_ops xpsgtr_pm_ops =3D { > static int xpsgtr_get_ref_clocks(struct xpsgtr_dev *gtr_dev) > { > unsigned int refclk; > + int ret; >=20 > for (refclk =3D 0; refclk < ARRAY_SIZE(gtr_dev->refclk_sscs); ++refclk)= { > unsigned long rate; > @@ -874,14 +893,22 @@ static int xpsgtr_get_ref_clocks(struct xpsgtr_dev > *gtr_dev) >=20 > snprintf(name, sizeof(name), "ref%u", refclk); > clk =3D devm_clk_get_optional(gtr_dev->dev, name); > - if (IS_ERR(clk)) > - return dev_err_probe(gtr_dev->dev, PTR_ERR(clk), > - "Failed to get reference clock > %u\n", > - refclk); > + if (IS_ERR(clk)) { > + ret =3D dev_err_probe(gtr_dev->dev, PTR_ERR(clk), > + "Failed to get reference clock > %u\n", > + refclk); > + goto err_clk_put; > + } >=20 > if (!clk) > continue; >=20 > + gtr_dev->clk[refclk] =3D clk; > + > + ret =3D clk_prepare_enable(gtr_dev->clk[refclk]); > + if (ret) > + goto err_clk_put; > + > /* > * Get the spread spectrum (SSC) settings for the reference > * clock rate. > @@ -899,11 +926,18 @@ static int xpsgtr_get_ref_clocks(struct xpsgtr_dev > *gtr_dev) > dev_err(gtr_dev->dev, > "Invalid rate %lu for reference clock %u\n", > rate, refclk); > - return -EINVAL; > + ret =3D -EINVAL; > + goto err_clk_put; > } > } >=20 > return 0; > + > +err_clk_put: > + for (refclk =3D 0; refclk < ARRAY_SIZE(gtr_dev->clk); refclk++) > + clk_disable_unprepare(gtr_dev->clk[refclk]); > + > + return ret; > } >=20 > static int xpsgtr_probe(struct platform_device *pdev) > @@ -912,6 +946,7 @@ static int xpsgtr_probe(struct platform_device *pdev) > struct xpsgtr_dev *gtr_dev; > struct phy_provider *provider; > unsigned int port; > + unsigned int i; > int ret; >=20 > gtr_dev =3D devm_kzalloc(&pdev->dev, sizeof(*gtr_dev), GFP_KERNEL); > @@ -951,7 +986,8 @@ static int xpsgtr_probe(struct platform_device *pdev) > phy =3D devm_phy_create(&pdev->dev, np, &xpsgtr_phyops); > if (IS_ERR(phy)) { > dev_err(&pdev->dev, "failed to create PHY\n"); > - return PTR_ERR(phy); > + ret =3D PTR_ERR(phy); > + goto err_clk_put; > } >=20 > gtr_phy->phy =3D phy; > @@ -962,9 +998,16 @@ static int xpsgtr_probe(struct platform_device > *pdev) > provider =3D devm_of_phy_provider_register(&pdev->dev, > xpsgtr_xlate); > if (IS_ERR(provider)) { > dev_err(&pdev->dev, "registering provider failed\n"); > - return PTR_ERR(provider); > + ret =3D PTR_ERR(provider); > + goto err_clk_put; > } > return 0; > + > +err_clk_put: > + for (i =3D 0; i < ARRAY_SIZE(gtr_dev->clk); i++) > + clk_disable_unprepare(gtr_dev->clk[i]); > + > + return ret; > } >=20 > static const struct of_device_id xpsgtr_of_match[] =3D { > -- > 2.1.1