From: "Moore, Robert" <robert.moore@intel.com>
To: Marcin Wojtas <mw@semihalf.com>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-acpi@vger.kernel.org" <linux-acpi@vger.kernel.org>,
"devel@acpica.org" <devel@acpica.org>,
"jaz@semihalf.com" <jaz@semihalf.com>,
"gjb@semihalf.com" <gjb@semihalf.com>,
"upstream@semihalf.com" <upstream@semihalf.com>,
"Samer.El-Haj-Mahmoud@arm.com" <Samer.El-Haj-Mahmoud@arm.com>,
"jon@solid-run.com" <jon@solid-run.com>,
"tn@semihalf.com" <tn@semihalf.com>,
"rjw@rjwysocki.net" <rjw@rjwysocki.net>,
"lenb@kernel.org" <lenb@kernel.org>
Subject: RE: [PATCH 1/2] ACPICA: Add new DBG2 Serial Port Subtypes
Date: Fri, 16 Jul 2021 14:08:56 +0000 [thread overview]
Message-ID: <BYAPR11MB3256747AF68B07DE102E2B4D87119@BYAPR11MB3256.namprd11.prod.outlook.com> (raw)
In-Reply-To: <CAPv3WKcBKNAD880Mpf8z4vpY=3wbyyd3PiQ=uzKupaw=P_JpQg@mail.gmail.com>
-----Original Message-----
From: Marcin Wojtas <mw@semihalf.com>
Sent: Thursday, July 15, 2021 8:47 AM
To: Moore, Robert <robert.moore@intel.com>
Cc: linux-kernel@vger.kernel.org; linux-acpi@vger.kernel.org; devel@acpica.org; jaz@semihalf.com; gjb@semihalf.com; upstream@semihalf.com; Samer.El-Haj-Mahmoud@arm.com; jon@solid-run.com; tn@semihalf.com; rjw@rjwysocki.net; lenb@kernel.org
Subject: Re: [PATCH 1/2] ACPICA: Add new DBG2 Serial Port Subtypes
czw., 15 lip 2021 o 17:44 Moore, Robert <robert.moore@intel.com> napisał(a):
>
> The patch was posted as a pull request on our github site.
>
I'm aware of that, semihalf-wojtas-marcin is me :)
> The merged patch will be released as part of the normal ACPICA release process, which will then make it into Linux. You should then rebase.
Ok, thanks for explanation. When approximately can this happen?
About the end of the month
Bob
Best regards,
Marcin
> Bob
>
>
> -----Original Message-----
> From: Marcin Wojtas <mw@semihalf.com>
> Sent: Thursday, July 15, 2021 7:17 AM
> To: Moore, Robert <robert.moore@intel.com>
> Cc: linux-kernel@vger.kernel.org; linux-acpi@vger.kernel.org;
> devel@acpica.org; jaz@semihalf.com; gjb@semihalf.com;
> upstream@semihalf.com; Samer.El-Haj-Mahmoud@arm.com;
> jon@solid-run.com; tn@semihalf.com; rjw@rjwysocki.net; lenb@kernel.org
> Subject: Re: [PATCH 1/2] ACPICA: Add new DBG2 Serial Port Subtypes
>
> Hi,
>
>
> czw., 15 lip 2021 o 16:07 Moore, Robert <robert.moore@intel.com> napisał(a):
> >
> > This was already reported (with a patch that we've already merged)
> > by semihalf-wojtas-marcin
> >
>
> I'm not sure to be aware of the process. Reported where?
> Are you planning to import the upstream patch on your own and I should rebase the SPCR driver change on top once it lands?
>
> Best regards,
> Marcin
>
> > -----Original Message-----
> > From: Marcin Wojtas <mw@semihalf.com>
> > Sent: Wednesday, July 14, 2021 2:44 PM
> > To: linux-kernel@vger.kernel.org; linux-acpi@vger.kernel.org;
> > devel@acpica.org
> > Cc: jaz@semihalf.com; gjb@semihalf.com; upstream@semihalf.com;
> > Samer.El-Haj-Mahmoud@arm.com; jon@solid-run.com; tn@semihalf.com;
> > rjw@rjwysocki.net; lenb@kernel.org; Moore, Robert
> > <robert.moore@intel.com>; Marcin Wojtas <mw@semihalf.com>
> > Subject: [PATCH 1/2] ACPICA: Add new DBG2 Serial Port Subtypes
> >
> > ACPICA commit d95c7d206b5836c7770e8e9cd613859887fded8f
> >
> > The Microsoft Debug Port Table 2 (DBG2) specification revision September 21, 2020 comprises additional Serial Port Subtypes [1].
> > Reflect that in the actbl1.h header file.
> >
> > [1]
> > https://docs.microsoft.com/en-us/windows-hardware/drivers/bringup/ac
> > pi
> > -debug-port-table
> >
> > Link: https://github.com/acpica/acpica/commit/d95c7d20
> > Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> > ---
> > include/acpi/actbl1.h | 15 ++++++++++++++-
> > 1 file changed, 14 insertions(+), 1 deletion(-)
> >
> > diff --git a/include/acpi/actbl1.h b/include/acpi/actbl1.h index
> > ef2872dea01c..7bbb3e2bd33f 100644
> > --- a/include/acpi/actbl1.h
> > +++ b/include/acpi/actbl1.h
> > @@ -482,7 +482,7 @@ struct acpi_csrt_descriptor {
> > * DBG2 - Debug Port Table 2
> > * Version 0 (Both main table and subtables)
> > *
> > - * Conforms to "Microsoft Debug Port Table 2 (DBG2)", December 10,
> > 2015
> > + * Conforms to "Microsoft Debug Port Table 2 (DBG2)", September 21,
> > + 2020
> > *
> >
> > ********************************************************************
> > **
> > ********/
> >
> > @@ -532,11 +532,24 @@ struct acpi_dbg2_device {
> >
> > #define ACPI_DBG2_16550_COMPATIBLE 0x0000
> > #define ACPI_DBG2_16550_SUBSET 0x0001
> > +#define ACPI_DBG2_MAX311XE_SPI 0x0002
> > #define ACPI_DBG2_ARM_PL011 0x0003
> > +#define ACPI_DBG2_MSM8X60 0x0004
> > +#define ACPI_DBG2_16550_NVIDIA 0x0005
> > +#define ACPI_DBG2_TI_OMAP 0x0006
> > +#define ACPI_DBG2_APM88XXXX 0x0008
> > +#define ACPI_DBG2_MSM8974 0x0009
> > +#define ACPI_DBG2_SAM5250 0x000A
> > +#define ACPI_DBG2_INTEL_USIF 0x000B
> > +#define ACPI_DBG2_IMX6 0x000C
> > #define ACPI_DBG2_ARM_SBSA_32BIT 0x000D
> > #define ACPI_DBG2_ARM_SBSA_GENERIC 0x000E
> > #define ACPI_DBG2_ARM_DCC 0x000F
> > #define ACPI_DBG2_BCM2835 0x0010
> > +#define ACPI_DBG2_SDM845_1_8432MHZ 0x0011
> > +#define ACPI_DBG2_16550_WITH_GAS 0x0012
> > +#define ACPI_DBG2_SDM845_7_372MHZ 0x0013
> > +#define ACPI_DBG2_INTEL_LPSS 0x0014
> >
> > #define ACPI_DBG2_1394_STANDARD 0x0000
> >
> > --
> > 2.29.0
> >
next prev parent reply other threads:[~2021-07-16 14:09 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-14 21:43 [PATCH 0/2] ACPI: Update DBG2 Serial Port Subtypes list Marcin Wojtas
2021-07-14 21:43 ` [PATCH 1/2] ACPICA: Add new DBG2 Serial Port Subtypes Marcin Wojtas
2021-07-15 14:07 ` Moore, Robert
2021-07-15 14:17 ` Marcin Wojtas
2021-07-15 15:44 ` Moore, Robert
2021-07-15 15:46 ` Marcin Wojtas
2021-07-16 14:08 ` Moore, Robert [this message]
2021-07-14 21:43 ` [PATCH 2/2] ACPI: SPCR: Add support for the new 16550-compatible Serial Port Subtype Marcin Wojtas
2021-08-16 16:39 ` Rafael J. Wysocki
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