From: Jose Abreu <Jose.Abreu@synopsys.com>
To: Jon Hunter <jonathanh@nvidia.com>,
Jose Abreu <Jose.Abreu@synopsys.com>,
Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: David Miller <davem@davemloft.net>,
"robin.murphy@arm.com" <robin.murphy@arm.com>,
"lists@bofh.nu" <lists@bofh.nu>,
"Joao.Pinto@synopsys.com" <Joao.Pinto@synopsys.com>,
"alexandre.torgue@st.com" <alexandre.torgue@st.com>,
"maxime.ripard@bootlin.com" <maxime.ripard@bootlin.com>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-stm32@st-md-mailman.stormreply.com"
<linux-stm32@st-md-mailman.stormreply.com>,
"wens@csie.org" <wens@csie.org>,
"mcoquelin.stm32@gmail.com" <mcoquelin.stm32@gmail.com>,
"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
"peppe.cavallaro@st.com" <peppe.cavallaro@st.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: RE: [PATCH net-next 3/3] net: stmmac: Introducing support for Page Pool
Date: Wed, 24 Jul 2019 11:34:26 +0000 [thread overview]
Message-ID: <BYAPR12MB32696F0A2BFDF69F31C4311CD3C60@BYAPR12MB3269.namprd12.prod.outlook.com> (raw)
In-Reply-To: <33de62bf-2f8a-bf00-9260-418b12bed24c@nvidia.com>
From: Jon Hunter <jonathanh@nvidia.com>
Date: Jul/24/2019, 12:10:47 (UTC+00:00)
>
> On 24/07/2019 11:04, Jose Abreu wrote:
>
> ...
>
> > Jon, I was able to replicate (at some level) your setup:
> >
> > # dmesg | grep -i arm-smmu
> > [ 1.337322] arm-smmu 70040000.iommu: probing hardware
> > configuration...
> > [ 1.337330] arm-smmu 70040000.iommu: SMMUv2 with:
> > [ 1.337338] arm-smmu 70040000.iommu: stage 1 translation
> > [ 1.337346] arm-smmu 70040000.iommu: stage 2 translation
> > [ 1.337354] arm-smmu 70040000.iommu: nested translation
> > [ 1.337363] arm-smmu 70040000.iommu: stream matching with 128
> > register groups
> > [ 1.337374] arm-smmu 70040000.iommu: 1 context banks (0
> > stage-2 only)
> > [ 1.337383] arm-smmu 70040000.iommu: Supported page sizes:
> > 0x61311000
> > [ 1.337393] arm-smmu 70040000.iommu: Stage-1: 48-bit VA ->
> > 48-bit IPA
> > [ 1.337402] arm-smmu 70040000.iommu: Stage-2: 48-bit IPA ->
> > 48-bit PA
> >
> > # dmesg | grep -i stmmac
> > [ 1.344106] stmmaceth 70000000.ethernet: Adding to iommu group 0
> > [ 1.344233] stmmaceth 70000000.ethernet: no reset control found
> > [ 1.348276] stmmaceth 70000000.ethernet: User ID: 0x10, Synopsys ID:
> > 0x51
> > [ 1.348285] stmmaceth 70000000.ethernet: DWMAC4/5
> > [ 1.348293] stmmaceth 70000000.ethernet: DMA HW capability register
> > supported
> > [ 1.348302] stmmaceth 70000000.ethernet: RX Checksum Offload Engine
> > supported
> > [ 1.348311] stmmaceth 70000000.ethernet: TX Checksum insertion
> > supported
> > [ 1.348320] stmmaceth 70000000.ethernet: TSO supported
> > [ 1.348328] stmmaceth 70000000.ethernet: Enable RX Mitigation via HW
> > Watchdog Timer
> > [ 1.348337] stmmaceth 70000000.ethernet: TSO feature enabled
> > [ 1.348409] libphy: stmmac: probed
> > [ 4159.140990] stmmaceth 70000000.ethernet eth0: PHY [stmmac-0:01]
> > driver [Generic PHY]
> > [ 4159.141005] stmmaceth 70000000.ethernet eth0: phy: setting supported
> > 00,00000000,000062ff advertising 00,00000000,000062ff
> > [ 4159.142359] stmmaceth 70000000.ethernet eth0: No Safety Features
> > support found
> > [ 4159.142369] stmmaceth 70000000.ethernet eth0: IEEE 1588-2008 Advanced
> > Timestamp supported
> > [ 4159.142429] stmmaceth 70000000.ethernet eth0: registered PTP clock
> > [ 4159.142439] stmmaceth 70000000.ethernet eth0: configuring for
> > phy/gmii link mode
> > [ 4159.142452] stmmaceth 70000000.ethernet eth0: phylink_mac_config:
> > mode=phy/gmii/Unknown/Unknown adv=00,00000000,000062ff pause=10 link=0
> > an=1
> > [ 4159.142466] stmmaceth 70000000.ethernet eth0: phy link up
> > gmii/1Gbps/Full
> > [ 4159.142475] stmmaceth 70000000.ethernet eth0: phylink_mac_config:
> > mode=phy/gmii/1Gbps/Full adv=00,00000000,00000000 pause=0f link=1 an=0
> > [ 4159.142481] stmmaceth 70000000.ethernet eth0: Link is Up - 1Gbps/Full
> > - flow control rx/tx
> >
> > The only missing point is the NFS boot that I can't replicate with this
> > setup. But I did some sanity checks:
> >
> > Remote Enpoint:
> > # dd if=/dev/urandom of=output.dat bs=128M count=1
> > # nc -c 192.168.0.2 1234 < output.dat
> > # md5sum output.dat
> > fde9e0818281836e4fc0edfede2b8762 output.dat
> >
> > DUT:
> > # nc -l -c -p 1234 > output.dat
> > # md5sum output.dat
> > fde9e0818281836e4fc0edfede2b8762 output.dat
>
> On my setup, if I do not use NFS to mount the rootfs, but then manually
> mount the NFS share after booting, I do not see any problems reading or
> writing to files on the share. So I am not sure if it is some sort of
> race that is occurring when mounting the NFS share on boot. It is 100%
> reproducible when using NFS for the root file-system.
I don't understand how can there be corruption then unless the IP AXI
parameters are misconfigured which can lead to sporadic undefined
behavior.
These prints from your logs:
[ 14.579392] Run /init as init process
/init: line 58: chmod: command not found
[ 10:22:46 ] L4T-INITRD Build DATE: Mon Jul 22 10:22:46 UTC 2019
[ 10:22:46 ] Root device found: nfs
[ 10:22:46 ] Ethernet interfaces: eth0
[ 10:22:46 ] IP Address: 10.21.140.41
Where are they coming from ? Do you have any extra init script ?
---
Thanks,
Jose Miguel Abreu
next prev parent reply other threads:[~2019-07-24 11:34 UTC|newest]
Thread overview: 87+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-03 10:37 [PATCH net-next 0/3] net: stmmac: Some performance improvements and a fix Jose Abreu
2019-07-03 10:37 ` [PATCH net-next 1/3] net: stmmac: Implement RX Coalesce Frames setting Jose Abreu
2019-07-03 20:41 ` Jakub Kicinski
2019-07-03 10:37 ` [PATCH net-next 2/3] net: stmmac: Fix descriptors address being in > 32 bits address space Jose Abreu
2019-07-03 10:37 ` [PATCH net-next 3/3] net: stmmac: Introducing support for Page Pool Jose Abreu
2019-07-03 10:40 ` Jose Abreu
2019-07-04 9:39 ` Jesper Dangaard Brouer
2019-07-04 14:45 ` Jose Abreu
2019-07-04 15:09 ` Jesper Dangaard Brouer
2019-07-04 15:18 ` Jose Abreu
2019-07-04 15:33 ` Jesper Dangaard Brouer
2019-07-04 9:48 ` Jesper Dangaard Brouer
2019-07-04 10:00 ` Jesper Dangaard Brouer
2019-07-04 10:13 ` Jose Abreu
2019-07-04 11:11 ` Ilias Apalodimas
2019-07-04 11:54 ` Jesper Dangaard Brouer
2019-07-04 12:04 ` Ilias Apalodimas
2019-07-04 12:59 ` Jose Abreu
2019-07-04 13:06 ` Ilias Apalodimas
2019-07-04 10:30 ` Ilias Apalodimas
2019-07-04 12:14 ` Arnd Bergmann
2019-07-04 12:49 ` Ilias Apalodimas
2019-07-17 18:58 ` Jon Hunter
2019-07-18 7:29 ` Jose Abreu
2019-07-18 7:48 ` Jose Abreu
2019-07-18 9:16 ` Jon Hunter
2019-07-19 7:51 ` Jose Abreu
2019-07-19 8:37 ` Jon Hunter
2019-07-19 8:44 ` Jose Abreu
2019-07-19 8:49 ` Jon Hunter
2019-07-19 10:25 ` Jose Abreu
2019-07-19 12:28 ` Jose Abreu
2019-07-19 13:33 ` Jon Hunter
2019-07-19 12:30 ` Jon Hunter
2019-07-19 12:32 ` Jose Abreu
2019-07-19 13:35 ` Jon Hunter
2019-07-22 7:23 ` Jose Abreu
2019-07-22 9:37 ` Jon Hunter
2019-07-22 9:47 ` Jose Abreu
2019-07-22 9:57 ` Jose Abreu
2019-07-22 10:27 ` Jon Hunter
2019-07-22 10:18 ` Ilias Apalodimas
2019-07-22 11:11 ` Lars Persson
2019-07-22 11:39 ` Jose Abreu
2019-07-22 12:05 ` Jon Hunter
2019-07-22 14:04 ` Jose Abreu
2019-07-23 8:14 ` Jose Abreu
2019-07-23 10:01 ` Jon Hunter
2019-07-23 10:07 ` Jose Abreu
2019-07-23 10:29 ` Robin Murphy
2019-07-23 11:22 ` Jose Abreu
2019-07-23 12:09 ` Jon Hunter
2019-07-23 13:19 ` Robin Murphy
2019-07-23 21:39 ` Jon Hunter
2019-07-24 10:03 ` Robin Murphy
2019-07-23 18:51 ` David Miller
2019-07-24 8:54 ` Ilias Apalodimas
2019-07-24 9:43 ` Jose Abreu
2019-07-24 9:53 ` Ilias Apalodimas
2019-07-24 10:04 ` Jose Abreu
2019-07-24 11:10 ` Jon Hunter
2019-07-24 11:34 ` Jose Abreu [this message]
2019-07-24 11:58 ` Jon Hunter
2019-07-25 7:44 ` Jose Abreu
2019-07-25 9:45 ` Jon Hunter
2019-07-25 11:39 ` Ilias Apalodimas
2019-07-23 10:38 ` Jon Hunter
2019-07-23 10:49 ` Jose Abreu
2019-07-23 11:58 ` Jon Hunter
2019-07-23 12:51 ` Jose Abreu
2019-07-23 13:34 ` Jon Hunter
2019-07-29 9:45 ` Mikko Perttunen
2019-07-25 13:20 ` Jon Hunter
2019-07-25 13:26 ` Jose Abreu
2019-07-25 14:25 ` Jon Hunter
2019-07-25 15:12 ` Jose Abreu
2019-07-26 14:11 ` Jon Hunter
2019-07-27 15:56 ` Jose Abreu
2019-07-29 8:16 ` Jose Abreu
2019-07-29 10:55 ` Jon Hunter
2019-07-29 11:29 ` Jose Abreu
2019-07-29 11:52 ` Robin Murphy
2019-07-29 14:08 ` Jose Abreu
2019-07-29 21:33 ` Jon Hunter
2019-07-30 9:39 ` Jose Abreu
2019-07-30 13:36 ` Jon Hunter
2019-07-30 13:58 ` Jose Abreu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=BYAPR12MB32696F0A2BFDF69F31C4311CD3C60@BYAPR12MB3269.namprd12.prod.outlook.com \
--to=jose.abreu@synopsys.com \
--cc=Joao.Pinto@synopsys.com \
--cc=alexandre.torgue@st.com \
--cc=davem@davemloft.net \
--cc=ilias.apalodimas@linaro.org \
--cc=jonathanh@nvidia.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-stm32@st-md-mailman.stormreply.com \
--cc=linux-tegra@vger.kernel.org \
--cc=lists@bofh.nu \
--cc=maxime.ripard@bootlin.com \
--cc=mcoquelin.stm32@gmail.com \
--cc=netdev@vger.kernel.org \
--cc=peppe.cavallaro@st.com \
--cc=robin.murphy@arm.com \
--cc=wens@csie.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).