From: Appana Durga Kedareswara Rao <appana.durga.rao@xilinx.com>
To: Jose Abreu <Jose.Abreu@synopsys.com>,
"dan.j.williams@intel.com" <dan.j.williams@intel.com>,
"vinod.koul@intel.com" <vinod.koul@intel.com>,
"michal.simek@xilinx.com" <michal.simek@xilinx.com>,
Soren Brinkmann <sorenb@xilinx.com>,
"moritz.fischer@ettus.com" <moritz.fischer@ettus.com>,
"laurent.pinchart@ideasonboard.com"
<laurent.pinchart@ideasonboard.com>,
"luis@debethencourt.com" <luis@debethencourt.com>,
Anirudha Sarangi <anirudh@xilinx.com>
Cc: "dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH 2/3] dmaeninge: xilinx_dma: Fix bug in multiple frame stores scenario in vdma
Date: Thu, 15 Dec 2016 19:09:39 +0000 [thread overview]
Message-ID: <C246CAC1457055469EF09E3A7AC4E11A4A65C9D3@XAP-PVEXMBX01.xlnx.xilinx.com> (raw)
In-Reply-To: <9d92984b-e04a-cd29-e933-d8ea4d610c94@synopsys.com>
Hi Jose Miguel Abreu,
Thanks for the review....
> > - last = segment;
> > + for (j = 0; j < chan->num_frms; ) {
> > + list_for_each_entry(segment, &desc->segments, node)
> {
> > + if (chan->ext_addr)
> > + vdma_desc_write_64(chan,
> > +
> XILINX_VDMA_REG_START_ADDRESS_64(i++),
> > + segment->hw.buf_addr,
> > + segment->hw.buf_addr_msb);
> > + else
> > + vdma_desc_write(chan,
> > +
> XILINX_VDMA_REG_START_ADDRESS(i++),
> > + segment->hw.buf_addr);
> > +
> > + last = segment;
>
> Hmm, is it possible to submit more than one segment? If so, then i and j will get
> out of sync.
If h/w is configured for more than 1 frame buffer and user submits more than one frame buffer
We can submit more than one frame/ segment to hw right??
>
> > + }
> > + list_del(&desc->node);
> > + list_add_tail(&desc->node, &chan->active_list);
> > + j++;
>
> But if i is non zero and pending_list has more than num_frms then i will not
> wrap-around as it should and will write to invalid framebuffer location, right?
Yep will fix in v2...
If (if (list_empty(&chan->pending_list)) || (i == chan->num_frms)
break;
Above condition is sufficient right???
>
> > + if (list_empty(&chan->pending_list))
> > + break;
> > + desc = list_first_entry(&chan->pending_list,
> > + struct
> xilinx_dma_tx_descriptor,
> > + node);
> > }
> >
> > if (!last)
> > @@ -1114,14 +1124,13 @@ static void xilinx_vdma_start_transfer(struct
> xilinx_dma_chan *chan)
> > vdma_desc_write(chan, XILINX_DMA_REG_FRMDLY_STRIDE,
> > last->hw.stride);
> > vdma_desc_write(chan, XILINX_DMA_REG_VSIZE, last-
> >hw.vsize);
>
> Maybe a check that all framebuffers contain valid addresses should be done
> before programming vsize so that VDMA does not try to write to invalid
> addresses.
Do we really need to check for valid address???
I didn't get you what to do you mean by invalid address could you please explain???
In the driver we are reading form the pending_list which will be updated by pep_interleaved_dma
Call so we are under assumption that user sends the proper address right???
>
> > +
> > + chan->desc_submitcount += j;
> > + chan->desc_pendingcount -= j;
> > }
> >
> > chan->idle = false;
> > if (!chan->has_sg) {
> > - list_del(&desc->node);
> > - list_add_tail(&desc->node, &chan->active_list);
> > - chan->desc_submitcount++;
> > - chan->desc_pendingcount--;
> > if (chan->desc_submitcount == chan->num_frms)
> > chan->desc_submitcount = 0;
>
> "desc_submitcount >= chan->num_frms would be safer here.
Sure will fix in v2...
Regards,
Kedar.
>
> > } else {
>
> Best regards,
> Jose Miguel Abreu
> --
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next prev parent reply other threads:[~2016-12-15 19:09 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-15 15:11 [PATCH 0/3] dmaengine: xilinx_dma: Bug fixes Kedareswara rao Appana
2016-12-15 15:11 ` [PATCH 1/3] dmaengine: xilinx_dma: Check for channel idle state before submitting dma descriptor Kedareswara rao Appana
2016-12-15 15:45 ` Jose Abreu
2016-12-15 18:49 ` Appana Durga Kedareswara Rao
2016-12-16 15:35 ` Laurent Pinchart
2016-12-19 15:39 ` Appana Durga Kedareswara Rao
2016-12-19 17:18 ` Laurent Pinchart
2016-12-23 8:49 ` Appana Durga Kedareswara Rao
2016-12-15 15:11 ` [PATCH 2/3] dmaeninge: xilinx_dma: Fix bug in multiple frame stores scenario in vdma Kedareswara rao Appana
2016-12-15 16:10 ` Jose Abreu
2016-12-15 19:09 ` Appana Durga Kedareswara Rao [this message]
2016-12-16 10:11 ` Jose Abreu
2016-12-19 15:40 ` Appana Durga Kedareswara Rao
2016-12-16 15:54 ` Laurent Pinchart
2016-12-19 15:41 ` Appana Durga Kedareswara Rao
2016-12-15 15:11 ` [PATCH 3/3] dmaengine: xilinx_dma: Fix race condition in the driver for multiple descriptor scenario Kedareswara rao Appana
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