From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753273AbdKNC2p (ORCPT ); Mon, 13 Nov 2017 21:28:45 -0500 Received: from mail-it0-f67.google.com ([209.85.214.67]:35522 "EHLO mail-it0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751171AbdKNC2o (ORCPT ); Mon, 13 Nov 2017 21:28:44 -0500 X-Google-Smtp-Source: AGs4zMZkrxtWFuaJHFZy1k5Ly7SDHCSzAZ289ayxiPpjMvJ5VHHYiMuv0lWEXWlOebk4qu+bB8pXaho2lAbpKBapOPE= MIME-Version: 1.0 In-Reply-To: References: <5b424fefa9230917995d0584b40bc539a9bd9224.1510371795.git.luto@kernel.org> <3e2bdf66-cbd4-4e78-ead1-e5c99d2a6d08@intel.com> From: Linus Torvalds Date: Mon, 13 Nov 2017 18:28:42 -0800 X-Google-Sender-Auth: DCA6GLJdojgnQvjoNcYbfighfM0 Message-ID: Subject: Re: [RFC 6/7] x86/asm: Remap the TSS into the cpu entry area To: Andy Lutomirski Cc: Dave Hansen , X86 ML , Borislav Petkov , "linux-kernel@vger.kernel.org" , Brian Gerst Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Nov 13, 2017 at 6:25 PM, Andy Lutomirski wrote: > On Mon, Nov 13, 2017 at 11:36 AM, Linus Torvalds > wrote: >> >> I forget what the actual size is, but aligning the hardware TSS struct >> to 128 bytes might be sufficient. It's not that big. > > 104 bytes, so it's probably already fine. For anything except an > actual task switch, only the first 12 or so bytes matter. Note that historically, about half of the Intel errata (that don't get fixed) are about TSS in oddball situations, mainly page crossers. I may be exaggerating just a tiny bit, but it's definitely a "don't do it". Linus