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[209.85.210.47]) by smtp.gmail.com with ESMTPSA id j40sm2020812ota.8.2020.11.20.13.04.31 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 20 Nov 2020 13:04:32 -0800 (PST) Received: by mail-ot1-f47.google.com with SMTP id h16so10030825otq.9 for ; Fri, 20 Nov 2020 13:04:31 -0800 (PST) X-Received: by 2002:a05:6830:2083:: with SMTP id y3mr16408151otq.203.1605906270889; Fri, 20 Nov 2020 13:04:30 -0800 (PST) MIME-Version: 1.0 References: <20201028142433.18501-1-kitakar@gmail.com> <20201028142433.18501-2-kitakar@gmail.com> <8fa12bfff1cc30b655934e303cad78ae75b0fcde.camel@gmail.com> In-Reply-To: <8fa12bfff1cc30b655934e303cad78ae75b0fcde.camel@gmail.com> From: Brian Norris Date: Fri, 20 Nov 2020 13:04:19 -0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 1/3] mwifiex: disable ps_mode explicitly by default instead To: Tsuchiya Yuto Cc: Amitkumar Karwar , Ganapathi Bhat , Xinming Hu , Kalle Valo , "David S. Miller" , Jakub Kicinski , linux-wireless , "" , Linux Kernel , Maximilian Luz , Andy Shevchenko , verdre@v0yd.nl Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Oct 30, 2020 at 1:04 AM Tsuchiya Yuto wrote: > On Thu, 2020-10-29 at 11:25 -0700, Brian Norris wrote: > > For the record, Chrome OS supports plenty of mwifiex systems with 8897 > > (SDIO only) and 8997 (PCIe), with PS enabled, and you're hurting > > those. Your problem sounds to be exclusively a problem with the PCIe > > 8897 firmware. > > Actually, I already know that some Chromebooks use these mwifiex cards > (but not out PCIe-88W8897) because I personally like chromiumos. I'm > always wondering what is the difference. If the difference is firmware, > our PCIe-88W8897 firmware should really be fixed instead of this stupid > series. PCIe is a very different beast. (For one, it uses DMA and memory-mapped registers, where SDIO has neither.) It was a very difficult slog to get PCIe/8997 working reliably for the few Chromebooks that shipped it, and lots of that work is in firmware. I would not be surprised if the PCIe-related changes Marvell made for 8997 never fed back into their PCIe-8897 firmware. Or maybe they only ever launched PCIe-8897 for Windows, and the Windows driver included workarounds that were never published to their Linux driver. But now I'm just speculating. > Yes, I'm sorry that I know this series is just a stupid one but I have to > send this anyway because this stability issue has not been fixed for a > long time. I should have added this buglink to every commit as well: > > BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=109681 > > If the firmware can't be fixed, I'm afraid I have to go this way. It makes > no sense to keep enabling power_save for the affected devices if we know > it's broken. Condolences and sympathy, seriously. You likely have little chance of getting the firmware fixed, so without new information (e.g,. other workarounds?), this is the probably the right way to go. Brian