From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756812AbcKDJBD (ORCPT ); Fri, 4 Nov 2016 05:01:03 -0400 Received: from mail-qk0-f179.google.com ([209.85.220.179]:34976 "EHLO mail-qk0-f179.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754848AbcKDJBB (ORCPT ); Fri, 4 Nov 2016 05:01:01 -0400 MIME-Version: 1.0 In-Reply-To: <1478246311-15944-1-git-send-email-maninder.s2@samsung.com> References: <1478246311-15944-1-git-send-email-maninder.s2@samsung.com> From: Benjamin Gaignard Date: Fri, 4 Nov 2016 10:00:59 +0100 Message-ID: Subject: Re: [PATCH] staging: st-cec: add parentheses around complex macros To: Maninder Singh Cc: Mauro Carvalho Chehab , Greg Kroah-Hartman , kernel@stlinux.com, "linux-media@vger.kernel.org" , devel@driverdev.osuosl.org, Ravikant Bijendra Sharma , Linux Kernel Mailing List Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from quoted-printable to 8bit by mail.home.local id uA492gla020322 Thanks, Acked-by: Benjamin Gaignard 2016-11-04 8:58 GMT+01:00 Maninder Singh : > This patch fixes the following checkpatch.pl error: > ERROR: Macros with complex values should be enclosed in parentheses > > Signed-off-by: Maninder Singh > --- > drivers/staging/media/st-cec/stih-cec.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/staging/media/st-cec/stih-cec.c b/drivers/staging/media/st-cec/stih-cec.c > index 2143448..b22394a 100644 > --- a/drivers/staging/media/st-cec/stih-cec.c > +++ b/drivers/staging/media/st-cec/stih-cec.c > @@ -108,11 +108,11 @@ > > /* Constants for CEC_BIT_TOUT_THRESH register */ > #define CEC_SBIT_TOUT_47MS BIT(1) > -#define CEC_SBIT_TOUT_48MS BIT(0) | BIT(1) > +#define CEC_SBIT_TOUT_48MS (BIT(0) | BIT(1)) > #define CEC_SBIT_TOUT_50MS BIT(2) > #define CEC_DBIT_TOUT_27MS BIT(0) > #define CEC_DBIT_TOUT_28MS BIT(1) > -#define CEC_DBIT_TOUT_29MS BIT(0) | BIT(1) > +#define CEC_DBIT_TOUT_29MS (BIT(0) | BIT(1)) > > /* Constants for CEC_BIT_PULSE_THRESH register */ > #define CEC_BIT_LPULSE_03MS BIT(1) > -- > 1.7.9.5 > -- Benjamin Gaignard Graphic Study Group Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog