From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D4AB2EB64DB for ; Fri, 16 Jun 2023 12:23:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344579AbjFPMXa (ORCPT ); Fri, 16 Jun 2023 08:23:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60830 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235200AbjFPMX2 (ORCPT ); Fri, 16 Jun 2023 08:23:28 -0400 Received: from mail-io1-xd2d.google.com (mail-io1-xd2d.google.com [IPv6:2607:f8b0:4864:20::d2d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2DBA930DD; Fri, 16 Jun 2023 05:23:27 -0700 (PDT) Received: by mail-io1-xd2d.google.com with SMTP id ca18e2360f4ac-77b6e2f0c9fso21361839f.1; Fri, 16 Jun 2023 05:23:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1686918206; x=1689510206; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=dZhz7YgM6JWkeN2t67VeqyPX8iJ9vmsDBYbVnAPaL3g=; b=QY+V/f+bBr4PSt/2Ht9ot0Pj7xPZSgS9tVHbR9hM9bW2P7gxbWhIsdYOsAA5bhxT4g FRnIoATqDvRWV/doaQxv7UlK8n0Is/d4y+zaT09Q04M+rHhvyRmWVbuXAdEUTq1wmnX5 k7O6cViMk3YnaX8lf0Q+iDibpkrRFIGBxGHhEcO/J8pFGMPxp4xDqLkG9JlWoOmvw/mS 3T3qPmNOdQOQKQCYkHxAB+xtUQxgIdz2t6wLlooEurHATTY7Zpa1YC2RMSRXSLFmZ+tb 4qfM42pqXK2ezqhsOZZJg213skJido04lgsvo0PNwfZI7EvjHDnv85UQT5zeCTSXYu7A p5PA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686918206; x=1689510206; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=dZhz7YgM6JWkeN2t67VeqyPX8iJ9vmsDBYbVnAPaL3g=; b=FCtB6gWIeJfmaaVTcivMBBydwZ09Ac5WzP/FfwTtarYRsfA1rAzJTh3VbuAX/91BJ7 230SDg81NoU+SzNr7Lza1SDso7gDqL14A6LKQrbilAxcHW1HEOClwWbgWAdJpZxU2G1l m8OpRHbNFk47i2v4pjmL8li9ADuSKJtG7TJ9kNRCfUDpjEHKVahVDLGAQ+uO0phTVBys rsM6b0MHQMfNmCghWSbB+6QAnrOP/RlYSU46BFAAqkCycBoKUkUYEwhwjjnMep1P3tdu y4AU8JwYDXR3ofScPQAVBFGmQF+CDAKuY30xIl0zbrZf2Xgvlv1OOvHAhnkaUtZsz3Eq 6d6A== X-Gm-Message-State: AC+VfDzczsnrRYbpzyz5L5K5zmtPomiABN17dVRY2WKGYttbXuvHzpqB anw9KLDjqeNt7AUVEdmPkWFMEtYHG5oLpTAjvDg= X-Google-Smtp-Source: ACHHUZ6UP2QhxkudXsSJQadW+DwhGcn3wuF7ALSz5Z8Exzm26iTW42trlXQmqDsa51Wcscjd25D4r1uRN9wS/MYetew= X-Received: by 2002:a6b:6d0d:0:b0:77a:c494:b4b9 with SMTP id a13-20020a6b6d0d000000b0077ac494b4b9mr1932815iod.20.1686918206451; Fri, 16 Jun 2023 05:23:26 -0700 (PDT) MIME-Version: 1.0 References: <20230614104759.228372-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20230614104759.228372-4-prabhakar.mahadev-lad.rj@bp.renesas.com> In-Reply-To: From: "Lad, Prabhakar" Date: Fri, 16 Jun 2023 13:23:00 +0100 Message-ID: Subject: Re: [PATCH v9 3/6] riscv: mm: dma-noncoherent: nonstandard cache operations support To: Geert Uytterhoeven Cc: Arnd Bergmann , Conor Dooley , Guo Ren , Andrew Jones , Paul Walmsley , Palmer Dabbelt , Albert Ou , Samuel Holland , linux-riscv@lists.infradead.org, Christoph Hellwig , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Biju Das , Lad Prabhakar Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Geert, Thank you for the review. On Wed, Jun 14, 2023 at 1:53=E2=80=AFPM Geert Uytterhoeven wrote: > > Hi Prabhakar, > > On Wed, Jun 14, 2023 at 12:48=E2=80=AFPM Prabhakar wrote: > > From: Lad Prabhakar > > > > Introduce support for nonstandard noncoherent systems in the RISC-V > > architecture. It enables function pointer support to handle cache > > management in such systems. > > > > This patch adds a new configuration option called > > "RISCV_NONSTANDARD_CACHE_OPS." This option is a boolean flag that > > depends on "RISCV_DMA_NONCOHERENT" and enables the function pointer > > support for cache management in nonstandard noncoherent systems. > > > > Signed-off-by: Lad Prabhakar > > --- > > v8 -> v9 > > * New patch > > Thanks for your patch! > > > --- /dev/null > > +++ b/arch/riscv/include/asm/dma-noncoherent.h > > @@ -0,0 +1,28 @@ > > +/* SPDX-License-Identifier: GPL-2.0-only */ > > +/* > > + * Copyright (C) 2023 Renesas Electronics Corp. > > + */ > > + > > +#ifndef __ASM_DMA_NONCOHERENT_H > > +#define __ASM_DMA_NONCOHERENT_H > > + > > +#include > > + > > +/* > > + * struct riscv_cache_ops - Structure for CMO function pointers > > + * > > + * @clean: Function pointer for clean cache > > + * @inval: Function pointer for invalidate cache > > + * @flush: Function pointer for flushing the cache > > + */ > > +struct riscv_cache_ops { > > + void (*clean)(phys_addr_t paddr, unsigned long size); > > + void (*inval)(phys_addr_t paddr, unsigned long size); > > + void (*flush)(phys_addr_t paddr, unsigned long size); > > +}; > > I guess the naming can be improved? > > .clean() is used by arch_dma_cache_wback() / arch_wb_cache_pmem(), > .inval() is used by arch_dma_cache_inv() / arch_invalidate_pmem(), > .flush() is used by arch_dma_cache_wback_inv() / arch_dma_prep_coherent()= . > > Perhaps .wback(), .inv(), .wback_inv() are more clear? > Ok I will update pointer names in the next version. Cheers, Prabhakar