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Mon, 05 Sep 2022 18:38:22 -0700 (PDT) MIME-Version: 1.0 References: <20220905083125.29426-1-zong.li@sifive.com> <20220905083125.29426-6-zong.li@sifive.com> <74571708-be33-bee2-fdc2-01492f121cda@microchip.com> In-Reply-To: <74571708-be33-bee2-fdc2-01492f121cda@microchip.com> From: Zong Li Date: Tue, 6 Sep 2022 09:38:10 +0800 Message-ID: Subject: Re: [PATCH v2 5/6] soc: sifive: ccache: use pr_fmt() to remove CCACHE: prefixes To: Conor.Dooley@microchip.com Cc: zong.li@sifive.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, palmer@dabbelt.com, paul.walmsley@sifive.com, aou@eecs.berkeley.edu, greentime.hu@sifive.com, ben.dooks@sifive.com, bp@alien8.de, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org =E6=96=BC 2022=E5=B9=B49=E6=9C=886=E6=97=A5 = =E9=80=B1=E4=BA=8C =E5=87=8C=E6=99=A82:47=E5=AF=AB=E9=81=93=EF=BC=9A > > On 05/09/2022 09:31, Zong Li wrote: > > EXTERNAL EMAIL: Do not click links or open attachments unless you know = the content is safe > > > > From: Ben Dooks > > > > Use the pr_fmt() macro to prefix all the output with "CCACHE:" > > to avoid having to write it out each time, or make a large diff > > when the next change comes along. > > > > Signed-off-by: Ben Dooks > > Missing your SoB again here Zong Li btw, other than that: > Reviewed-by: Conor Dooley Thanks, I would add it in V3. > > > --- > > drivers/soc/sifive/sifive_ccache.c | 15 +++++++++------ > > 1 file changed, 9 insertions(+), 6 deletions(-) > > > > diff --git a/drivers/soc/sifive/sifive_ccache.c b/drivers/soc/sifive/si= five_ccache.c > > index 401c67a485e2..d749600c0bf8 100644 > > --- a/drivers/soc/sifive/sifive_ccache.c > > +++ b/drivers/soc/sifive/sifive_ccache.c > > @@ -5,6 +5,9 @@ > > * Copyright (C) 2018-2022 SiFive, Inc. > > * > > */ > > + > > +#define pr_fmt(fmt) "CCACHE: " fmt > > + > > #include > > #include > > #include > > @@ -85,13 +88,13 @@ static void ccache_config_read(void) > > > > cfg =3D readl(ccache_base + SIFIVE_CCACHE_CONFIG); > > > > - pr_info("CCACHE: %u banks, %u ways, sets/bank=3D%llu, bytes/blo= ck=3D%llu\n", > > + pr_info("%u banks, %u ways, sets/bank=3D%llu, bytes/block=3D%ll= u\n", > > (cfg & 0xff), (cfg >> 8) & 0xff, > > BIT_ULL((cfg >> 16) & 0xff), > > BIT_ULL((cfg >> 24) & 0xff)); > > > > cfg =3D readl(ccache_base + SIFIVE_CCACHE_WAYENABLE); > > - pr_info("CCACHE: Index of the largest way enabled: %d\n", cfg); > > + pr_info("Index of the largest way enabled: %d\n", cfg); > > } > > > > static const struct of_device_id sifive_ccache_ids[] =3D { > > @@ -154,7 +157,7 @@ static irqreturn_t ccache_int_handler(int irq, void= *device) > > if (irq =3D=3D g_irq[DIR_CORR]) { > > add_h =3D readl(ccache_base + SIFIVE_CCACHE_DIRECCFIX_H= IGH); > > add_l =3D readl(ccache_base + SIFIVE_CCACHE_DIRECCFIX_L= OW); > > - pr_err("CCACHE: DirError @ 0x%08X.%08X\n", add_h, add_l= ); > > + pr_err("DirError @ 0x%08X.%08X\n", add_h, add_l); > > /* Reading this register clears the DirError interrupt = sig */ > > readl(ccache_base + SIFIVE_CCACHE_DIRECCFIX_COUNT); > > atomic_notifier_call_chain(&ccache_err_chain, SIFIVE_CC= ACHE_ERR_TYPE_CE, > > @@ -172,7 +175,7 @@ static irqreturn_t ccache_int_handler(int irq, void= *device) > > if (irq =3D=3D g_irq[DATA_CORR]) { > > add_h =3D readl(ccache_base + SIFIVE_CCACHE_DATECCFIX_H= IGH); > > add_l =3D readl(ccache_base + SIFIVE_CCACHE_DATECCFIX_L= OW); > > - pr_err("CCACHE: DataError @ 0x%08X.%08X\n", add_h, add_= l); > > + pr_err("DataError @ 0x%08X.%08X\n", add_h, add_l); > > /* Reading this register clears the DataError interrupt= sig */ > > readl(ccache_base + SIFIVE_CCACHE_DATECCFIX_COUNT); > > atomic_notifier_call_chain(&ccache_err_chain, SIFIVE_CC= ACHE_ERR_TYPE_CE, > > @@ -181,7 +184,7 @@ static irqreturn_t ccache_int_handler(int irq, void= *device) > > if (irq =3D=3D g_irq[DATA_UNCORR]) { > > add_h =3D readl(ccache_base + SIFIVE_CCACHE_DATECCFAIL_= HIGH); > > add_l =3D readl(ccache_base + SIFIVE_CCACHE_DATECCFAIL_= LOW); > > - pr_err("CCACHE: DataFail @ 0x%08X.%08X\n", add_h, add_l= ); > > + pr_err("DataFail @ 0x%08X.%08X\n", add_h, add_l); > > /* Reading this register clears the DataFail interrupt = sig */ > > readl(ccache_base + SIFIVE_CCACHE_DATECCFAIL_COUNT); > > atomic_notifier_call_chain(&ccache_err_chain, SIFIVE_CC= ACHE_ERR_TYPE_UE, > > @@ -221,7 +224,7 @@ static int __init sifive_ccache_init(void) > > g_irq[i] =3D irq_of_parse_and_map(np, i); > > rc =3D request_irq(g_irq[i], ccache_int_handler, 0, "cc= ache_ecc", NULL); > > if (rc) { > > - pr_err("CCACHE: Could not request IRQ %d\n", g_= irq[i]); > > + pr_err("Could not request IRQ %d\n", g_irq[i]); > > return rc; > > } > > } > > -- > > 2.17.1 > > >