linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Philip Chen <philipchen@chromium.org>
To: Stephen Boyd <swboyd@chromium.org>
Cc: LKML <linux-kernel@vger.kernel.org>,
	Douglas Anderson <dianders@chromium.org>,
	Andrzej Hajda <a.hajda@samsung.com>,
	Daniel Vetter <daniel@ffwll.ch>, David Airlie <airlied@linux.ie>,
	Jernej Skrabec <jernej.skrabec@gmail.com>,
	Jonas Karlman <jonas@kwiboo.se>,
	Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
	Neil Armstrong <narmstrong@baylibre.com>,
	Robert Foss <robert.foss@linaro.org>,
	dri-devel <dri-devel@lists.freedesktop.org>
Subject: Re: [PATCH 1/2] drm/bridge: parade-ps8640: Use regmap APIs
Date: Thu, 9 Sep 2021 11:29:19 -0700	[thread overview]
Message-ID: <CA+cxXh=FJtvAzb0UeMXYs3PKxcdoR7hG23BJQ5Xtj_ywjLUQ_w@mail.gmail.com> (raw)
In-Reply-To: <CAE-0n52ia_Em6GYU-ketmzi4OQxcdux3uLjMGhzVTUJbC0Yz-Q@mail.gmail.com>

Hi,

On Wed, Sep 8, 2021 at 2:54 PM Stephen Boyd <swboyd@chromium.org> wrote:
>
> Quoting Philip Chen (2021-09-08 11:18:05)
> > diff --git a/drivers/gpu/drm/bridge/parade-ps8640.c b/drivers/gpu/drm/bridge/parade-ps8640.c
> > index 685e9c38b2db..a16725dbf912 100644
> > --- a/drivers/gpu/drm/bridge/parade-ps8640.c
> > +++ b/drivers/gpu/drm/bridge/parade-ps8640.c
> > @@ -64,12 +65,29 @@ struct ps8640 {
> >         struct drm_bridge *panel_bridge;
> >         struct mipi_dsi_device *dsi;
> >         struct i2c_client *page[MAX_DEVS];
> > +       struct regmap   *regmap[MAX_DEVS];
> >         struct regulator_bulk_data supplies[2];
> >         struct gpio_desc *gpio_reset;
> >         struct gpio_desc *gpio_powerdown;
> >         bool powered;
> >  };
> >
> > +static const struct regmap_range ps8640_volatile_ranges[] = {
> > +       { .range_min = 0, .range_max = 0xff },
>
> Is the plan to fill this out later or is 0xff the max register? If it's
> the latter then I think adding the max register to regmap_config is
> simpler.
It's the former.
The real accessible register range is different per page, E.g.:
- For page0, the register range is 0x00 - 0xbf.
- For page1, the register range is 0x00 - 0xff.
- For page2, the register range is 0x80 - 0xff.
Even if we don't specify the accurate per-page register range later,
the default register range here (0x00 - 0xff) can cover the available
registers in each page.
>
> > +};
> > +
> > +static const struct regmap_access_table ps8640_volatile_table = {
> > +       .yes_ranges = ps8640_volatile_ranges,
> > +       .n_yes_ranges = ARRAY_SIZE(ps8640_volatile_ranges),
> > +};
> > +
> > +static const struct regmap_config ps8640_regmap_config = {
> > +       .reg_bits = 8,
> > +       .val_bits = 8,
> > +       .volatile_table = &ps8640_volatile_table,
> > +       .cache_type = REGCACHE_NONE,
> > +};
> > +
> >  static inline struct ps8640 *bridge_to_ps8640(struct drm_bridge *e)
> >  {
> >         return container_of(e, struct ps8640, bridge);
> > @@ -78,13 +96,13 @@ static inline struct ps8640 *bridge_to_ps8640(struct drm_bridge *e)
> >  static int ps8640_bridge_vdo_control(struct ps8640 *ps_bridge,
> >                                      const enum ps8640_vdo_control ctrl)
> >  {
> > -       struct i2c_client *client = ps_bridge->page[PAGE3_DSI_CNTL1];
> > -       u8 vdo_ctrl_buf[] = { VDO_CTL_ADD, ctrl };
> > +       struct regmap *map = ps_bridge->regmap[PAGE3_DSI_CNTL1];
> > +       u8 vdo_ctrl_buf[] = {VDO_CTL_ADD, ctrl};
>
> Nitpick: Add a space after { and before }.
Thanks. Will fix this in the next version.
>
> >         int ret;
> >
> > -       ret = i2c_smbus_write_i2c_block_data(client, PAGE3_SET_ADD,
> > -                                            sizeof(vdo_ctrl_buf),
> > -                                            vdo_ctrl_buf);
> > +       ret = regmap_bulk_write(map, PAGE3_SET_ADD,
> > +                               vdo_ctrl_buf, sizeof(vdo_ctrl_buf));
> > +
> >         if (ret < 0) {
> >                 DRM_ERROR("failed to %sable VDO: %d\n",
> >                           ctrl == ENABLE ? "en" : "dis", ret);

  reply	other threads:[~2021-09-09 18:29 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-08 18:18 [PATCH 1/2] drm/bridge: parade-ps8640: Use regmap APIs Philip Chen
2021-09-08 18:18 ` [PATCH 2/2] drm/bridge: parade-ps8640: Add support for AUX channel Philip Chen
2021-09-08 22:27   ` Stephen Boyd
2021-09-09 18:15     ` Philip Chen
2021-09-09 19:07       ` Stephen Boyd
2021-09-13 21:35         ` Philip Chen
2021-09-08 21:54 ` [PATCH 1/2] drm/bridge: parade-ps8640: Use regmap APIs Stephen Boyd
2021-09-09 18:29   ` Philip Chen [this message]
2021-09-09 19:09     ` Stephen Boyd
2021-09-09 21:14       ` Doug Anderson
2021-09-09 21:27         ` Stephen Boyd
2021-09-13 21:36           ` Philip Chen

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to='CA+cxXh=FJtvAzb0UeMXYs3PKxcdoR7hG23BJQ5Xtj_ywjLUQ_w@mail.gmail.com' \
    --to=philipchen@chromium.org \
    --cc=Laurent.pinchart@ideasonboard.com \
    --cc=a.hajda@samsung.com \
    --cc=airlied@linux.ie \
    --cc=daniel@ffwll.ch \
    --cc=dianders@chromium.org \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=jernej.skrabec@gmail.com \
    --cc=jonas@kwiboo.se \
    --cc=linux-kernel@vger.kernel.org \
    --cc=narmstrong@baylibre.com \
    --cc=robert.foss@linaro.org \
    --cc=swboyd@chromium.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).