From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Kalyan Thota <kalyan_t@codeaurora.org>
Cc: "open list:DRM DRIVER FOR MSM ADRENO GPU"
<dri-devel@lists.freedesktop.org>,
"open list:DRM DRIVER FOR MSM ADRENO GPU"
<linux-arm-msm@vger.kernel.org>,
freedreno <freedreno@lists.freedesktop.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
open list <linux-kernel@vger.kernel.org>,
Rob Clark <robdclark@gmail.com>,
Douglas Anderson <dianders@chromium.org>,
Krishna Manikandan <mkrishn@codeaurora.org>,
Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>,
Rajendra Nayak <rnayak@codeaurora.org>
Subject: Re: [v1] drm/msm/disp/dpu1: add safe lut config in dpu driver
Date: Fri, 9 Jul 2021 14:38:13 +0300 [thread overview]
Message-ID: <CAA8EJpp9nRhpE5HP+qzmSsY6_8XTW0yXqj_Hx0WvV8F3cnTcAQ@mail.gmail.com> (raw)
In-Reply-To: <1625827244-23274-1-git-send-email-kalyan_t@codeaurora.org>
On Fri, 9 Jul 2021 at 13:41, Kalyan Thota <kalyan_t@codeaurora.org> wrote:
>
> Add safe lut configuration for all the targets in dpu
> driver as per QOS recommendation.
>
> Issue reported on SC7280:
>
> With wait-for-safe feature in smmu enabled, RT client
> buffer levels are checked to be safe before smmu invalidation.
> Since display was always set to unsafe it was delaying the
> invalidaiton process thus impacting the performance on NRT clients
> such as eMMC and NVMe.
>
> Validated this change on SC7280, With this change eMMC performance
> has improved significantly.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
It might be a good option to push it to the stable tree also.
>
> Signed-off-by: Kalyan Thota <kalyan_t@codeaurora.org>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> index d01c4c9..2e482cd 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> @@ -974,6 +974,7 @@ static const struct dpu_perf_cfg sdm845_perf_data = {
> .amortizable_threshold = 25,
> .min_prefill_lines = 24,
> .danger_lut_tbl = {0xf, 0xffff, 0x0},
> + .safe_lut_tbl = {0xfff0, 0xf000, 0xffff},
> .qos_lut_tbl = {
> {.nentry = ARRAY_SIZE(sdm845_qos_linear),
> .entries = sdm845_qos_linear
> @@ -1001,6 +1002,7 @@ static const struct dpu_perf_cfg sc7180_perf_data = {
> .min_dram_ib = 1600000,
> .min_prefill_lines = 24,
> .danger_lut_tbl = {0xff, 0xffff, 0x0},
> + .safe_lut_tbl = {0xfff0, 0xff00, 0xffff},
> .qos_lut_tbl = {
> {.nentry = ARRAY_SIZE(sc7180_qos_linear),
> .entries = sc7180_qos_linear
> @@ -1028,6 +1030,7 @@ static const struct dpu_perf_cfg sm8150_perf_data = {
> .min_dram_ib = 800000,
> .min_prefill_lines = 24,
> .danger_lut_tbl = {0xf, 0xffff, 0x0},
> + .safe_lut_tbl = {0xfff8, 0xf000, 0xffff},
> .qos_lut_tbl = {
> {.nentry = ARRAY_SIZE(sm8150_qos_linear),
> .entries = sm8150_qos_linear
> @@ -1056,6 +1059,7 @@ static const struct dpu_perf_cfg sm8250_perf_data = {
> .min_dram_ib = 800000,
> .min_prefill_lines = 35,
> .danger_lut_tbl = {0xf, 0xffff, 0x0},
> + .safe_lut_tbl = {0xfff0, 0xff00, 0xffff},
> .qos_lut_tbl = {
> {.nentry = ARRAY_SIZE(sc7180_qos_linear),
> .entries = sc7180_qos_linear
> @@ -1084,6 +1088,7 @@ static const struct dpu_perf_cfg sc7280_perf_data = {
> .min_dram_ib = 1600000,
> .min_prefill_lines = 24,
> .danger_lut_tbl = {0xffff, 0xffff, 0x0},
> + .safe_lut_tbl = {0xff00, 0xff00, 0xffff},
> .qos_lut_tbl = {
> {.nentry = ARRAY_SIZE(sc7180_qos_macrotile),
> .entries = sc7180_qos_macrotile
> --
> 2.7.4
>
--
With best wishes
Dmitry
next prev parent reply other threads:[~2021-07-09 11:38 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-09 10:40 [v1] drm/msm/disp/dpu1: add safe lut config in dpu driver Kalyan Thota
2021-07-09 11:38 ` Dmitry Baryshkov [this message]
2021-07-12 3:41 ` Sai Prakash Ranjan
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