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From: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
To: Harvey Hunt <harvey.hunt@imgtec.com>
Cc: "linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>,
	Alex Smith <alex.smith@imgtec.com>,
	Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>,
	David Woodhouse <dwmw2@infradead.org>,
	Brian Norris <computersforpeace@gmail.com>,
	Paul Burton <paul.burton@imgtec.com>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	linux-mips@linux-mips.org, Alex Smith <alex@alex-smith.me.uk>
Subject: Re: [PATCH v7,3/3] MIPS: dts: jz4780/ci20: Add NEMC, BCH and NAND device tree nodes
Date: Thu, 8 Oct 2015 18:22:36 -0300	[thread overview]
Message-ID: <CAAEAJfBtOtiEEJy500-Kg8ZHm+ZGF3vL7y7xJD3a0-3CJ0w33A@mail.gmail.com> (raw)
In-Reply-To: <1444148837-10770-4-git-send-email-harvey.hunt@imgtec.com>

On 6 October 2015 at 13:27, Harvey Hunt <harvey.hunt@imgtec.com> wrote:
> From: Alex Smith <alex.smith@imgtec.com>
>
> Add device tree nodes for the NEMC and BCH to the JZ4780 device tree,
> and make use of them in the Ci20 device tree to add a node for the
> board's NAND.
>
> Note that since the pinctrl driver is not yet upstream, this includes
> neither pin configuration nor busy/write-protect GPIO pins for the
> NAND. Use of the NAND relies on the boot loader to have left the pins
> configured in a usable state, which should be the case when booted
> from the NAND.
>
> Signed-off-by: Alex Smith <alex.smith@imgtec.com>
> Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
> Cc: David Woodhouse <dwmw2@infradead.org>
> Cc: Brian Norris <computersforpeace@gmail.com>
> Cc: Paul Burton <paul.burton@imgtec.com>
> Cc: linux-mtd@lists.infradead.org
> Cc: devicetree@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-mips@linux-mips.org
> Cc: Alex Smith <alex@alex-smith.me.uk>
> Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com>
> ---
> v6 -> v7:
>  - Add nand-ecc-mode to DT.
>  - Add nand-on-flash-bbt to DT.
>
> v4 -> v5:
>  - New patch adding DT nodes for the NAND so that the driver can be
>    tested.
>
>  arch/mips/boot/dts/ingenic/ci20.dts    | 54 ++++++++++++++++++++++++++++++++++
>  arch/mips/boot/dts/ingenic/jz4780.dtsi | 26 ++++++++++++++++
>  2 files changed, 80 insertions(+)
>
> diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts
> index 9fcb9e7..453f1d3 100644
> --- a/arch/mips/boot/dts/ingenic/ci20.dts
> +++ b/arch/mips/boot/dts/ingenic/ci20.dts
> @@ -42,3 +42,57 @@
>  &uart4 {
>         status = "okay";
>  };
> +
> +&nemc {
> +       status = "okay";
> +
> +       nand: nand@1 {
> +               compatible = "ingenic,jz4780-nand";
> +               reg = <1 0 0x1000000>;
> +

Why is this in the ci20.dts instead of the SoC dtsi?

Seems at least compatible and reg is not board-specific.

Thanks,
-- 
Ezequiel García, VanguardiaSur
www.vanguardiasur.com.ar

  reply	other threads:[~2015-10-08 21:22 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1444148837-10770-1-git-send-email-harvey.hunt@imgtec.com>
2015-10-06 16:27 ` [PATCH v7,1/3] dt-bindings: binding for jz4780-{nand,bch} Harvey Hunt
2015-11-04  7:57   ` Boris Brezillon
2015-11-17 16:08     ` Harvey Hunt
2015-11-17 16:25     ` Harvey Hunt
2015-10-06 16:27 ` [PATCH v7,2/3] mtd: nand: jz4780: driver for NAND devices on JZ4780 SoCs Harvey Hunt
2015-11-04 10:18   ` [PATCH v7, 2/3] " Boris Brezillon
2015-11-17 16:28     ` Harvey Hunt
2015-11-17 19:09       ` Boris Brezillon
2015-10-06 16:27 ` [PATCH v7,3/3] MIPS: dts: jz4780/ci20: Add NEMC, BCH and NAND device tree nodes Harvey Hunt
2015-10-08 21:22   ` Ezequiel Garcia [this message]
2015-10-14  9:15     ` Harvey Hunt
2015-10-15  8:47   ` James Hogan
2015-10-16 10:11     ` Alex Smith
2015-10-16 10:31       ` James Hogan
2015-10-16 10:48         ` Paul Burton
2015-11-04  7:51           ` Boris Brezillon
2015-11-17 16:29             ` Harvey Hunt

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