From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7E6AEC433EF for ; Mon, 4 Oct 2021 23:53:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5C97260F5C for ; Mon, 4 Oct 2021 23:53:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232647AbhJDXzH (ORCPT ); Mon, 4 Oct 2021 19:55:07 -0400 Received: from mail.kernel.org ([198.145.29.99]:35886 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229486AbhJDXzG (ORCPT ); Mon, 4 Oct 2021 19:55:06 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id A544661401 for ; Mon, 4 Oct 2021 23:53:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1633391596; bh=KacuFmoUGvcXzM9fllt69Pg7UBDWLYu7j2eBaHhQ04c=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=t3GtKPhlMlF01/ThMVlitLmMDrfl19dhlT7zN6/NvKndee70E/iTNLDAh2lokJ62O ADwVmTCbHSzMXX1Ns6ReI3hD1Fxkcg9YzGKazko9ndwU841j9O7n3m/whWVjD3smN3 qa4+wp6n/3Qr3j8ONaFHbCKRCRIX4NcmKcQJtgJsFaaLJTr3hnUOVXpzdZ3zcvQ1rK S84jpNZks49oyomLxJ25h3pFfKSUU3cPI+s1pvEayUXePzHyktrIx4LY00WKUAhchF SDKZdsgcXmeqC1PkIOAdqHGWqVONA+l6FFsZv0WkZWCuo2fo9Gr1KEy3ZOm7PgP2uO iWLsbEXhhN0+w== Received: by mail-ed1-f46.google.com with SMTP id z20so19802128edc.13 for ; Mon, 04 Oct 2021 16:53:16 -0700 (PDT) X-Gm-Message-State: AOAM533BBz2C6vGG46dhu+Qo5dNTKjy7rsn/X1pr7vL71ldahtzKrmH9 LWdyMWeBRhOlv3d+YYzcYTYwFMxrXCU4926T2A== X-Google-Smtp-Source: ABdhPJwGp2DqpTNo0P4lu0bDreSkPUWiH27/pIjz21Rlva5heOvqliI+Up3iksR2Jw2wostBa8zwm00N0d1+Hs27N/U= X-Received: by 2002:a17:906:3181:: with SMTP id 1mr21316647ejy.388.1633391595236; Mon, 04 Oct 2021 16:53:15 -0700 (PDT) MIME-Version: 1.0 References: <20210915223117.7857-1-jitao.shi@mediatek.com> <20210915223117.7857-2-jitao.shi@mediatek.com> In-Reply-To: <20210915223117.7857-2-jitao.shi@mediatek.com> From: Chun-Kuang Hu Date: Tue, 5 Oct 2021 07:53:04 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v7 1/3] drm/dsi: transer dsi hs packet aligned To: Jitao Shi Cc: Chun-Kuang Hu , Philipp Zabel , Matthias Brugger , Daniel Vetter , David Airlie , DRI Development , linux-kernel , "moderated list:ARM/Mediatek SoC support" , Linux ARM , CK Hu , stonea168@163.com, huijuan.xie@mediatek.com, Rex-BC Chen , shuijing.li@mediatek.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Jitao: Jitao Shi =E6=96=BC 2021=E5=B9=B49=E6=9C=8816=E6= =97=A5 =E9=80=B1=E5=9B=9B =E4=B8=8A=E5=8D=886:31=E5=AF=AB=E9=81=93=EF=BC=9A > > Some DSI devices reqire the hs packet starting and ending > at same time on all dsi lanes. So use a flag to those devices. > Reviewed-by: Chun-Kuang Hu > Signed-off-by: Jitao Shi > --- > include/drm/drm_mipi_dsi.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h > index af7ba8071eb0..8e8563792682 100644 > --- a/include/drm/drm_mipi_dsi.h > +++ b/include/drm/drm_mipi_dsi.h > @@ -177,6 +177,7 @@ struct mipi_dsi_device_info { > * @lp_rate: maximum lane frequency for low power mode in hertz, this sh= ould > * be set to the real limits of the hardware, zero is only accepted for > * legacy drivers > + * @hs_packet_end_aligned: transfer dsi hs packet ending aligned > */ > struct mipi_dsi_device { > struct mipi_dsi_host *host; > @@ -189,6 +190,7 @@ struct mipi_dsi_device { > unsigned long mode_flags; > unsigned long hs_rate; > unsigned long lp_rate; > + bool hs_packet_end_aligned; > }; > > #define MIPI_DSI_MODULE_PREFIX "mipi-dsi:" > -- > 2.25.1