From: Chun-Kuang Hu <chunkuang.hu@kernel.org>
To: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>,
Stephen Boyd <sboyd@kernel.org>,
Nicolas Boichat <drinkcat@chromium.org>,
Rob Herring <robh+dt@kernel.org>,
Linux ARM <linux-arm-kernel@lists.infradead.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@lists.infradead.org>,
linux-clk@vger.kernel.org, DTML <devicetree@vger.kernel.org>,
srv_heupstream <srv_heupstream@mediatek.com>,
Project_Global_Chrome_Upstream_Group@mediatek.com
Subject: Re: [v11 01/19] dt-bindings: ARM: Mediatek: Add new document bindings of MT8192 clock
Date: Wed, 30 Jun 2021 22:30:01 +0800 [thread overview]
Message-ID: <CAAOTY_8SgZ5SN9Q0nfL_jQVTbB7ZDqgoGFRkKe8+QJwUi55Hew@mail.gmail.com> (raw)
In-Reply-To: <20210630132804.20436-2-chun-jie.chen@mediatek.com>
Hi, Chun-Jie:
Chun-Jie Chen <chun-jie.chen@mediatek.com> 於 2021年6月30日 週三 下午9:30寫道：
>
> This patch adds the new binding documentation for system clock
> and functional clock on Mediatek MT8192.
>
> Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
> Reviewed-by: Rob Herring <robh@kernel.org>
> ---
[snip]
> +
> + - |
> + mmsys: clock-controller@14000000 {
mmsys is a system controller rather than clock controller, isn't it?
Regards,
Chun-Kuang.
> + compatible = "mediatek,mt8192-mmsys";
> + reg = <0x14000000 0x1000>;
> + #clock-cells = <1>;
> + };
> +
next prev parent reply other threads:[~2021-06-30 14:30 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20210630132804.20436-1-chun-jie.chen@mediatek.com>
2021-06-30 13:27 ` [v11 01/19] dt-bindings: ARM: Mediatek: Add new document bindings of MT8192 clock Chun-Jie Chen
2021-06-30 14:30 ` Chun-Kuang Hu [this message]
2021-07-01 2:13 ` Chun-Jie Chen
2021-07-01 17:30 ` Matthias Brugger
2021-07-01 14:02 ` Rob Herring
2021-06-30 13:27 ` [v11 02/19] clk: mediatek: Add dt-bindings of MT8192 clocks Chun-Jie Chen
2021-06-30 13:27 ` [v11 03/19] clk: mediatek: Get regmap without syscon compatible check Chun-Jie Chen
2021-06-30 13:27 ` [v11 04/19] clk: mediatek: Fix asymmetrical PLL enable and disable control Chun-Jie Chen
2021-06-30 13:27 ` [v11 05/19] clk: mediatek: Add configurable enable control to mtk_pll_data Chun-Jie Chen
2021-06-30 13:27 ` [v11 06/19] clk: mediatek: Add mtk_clk_simple_probe() to simplify clock providers Chun-Jie Chen
2021-06-30 13:27 ` [v11 07/19] clk: mediatek: Add MT8192 basic clocks support Chun-Jie Chen
2021-06-30 13:27 ` [v11 08/19] clk: mediatek: Add MT8192 audio clock support Chun-Jie Chen
2021-06-30 13:27 ` [v11 09/19] clk: mediatek: Add MT8192 camsys " Chun-Jie Chen
2021-06-30 13:27 ` [v11 10/19] clk: mediatek: Add MT8192 imgsys " Chun-Jie Chen
2021-06-30 13:27 ` [v11 11/19] clk: mediatek: Add MT8192 imp i2c wrapper " Chun-Jie Chen
2021-06-30 13:27 ` [v11 12/19] clk: mediatek: Add MT8192 ipesys " Chun-Jie Chen
2021-06-30 13:27 ` [v11 13/19] clk: mediatek: Add MT8192 mdpsys " Chun-Jie Chen
2021-06-30 13:27 ` [v11 14/19] clk: mediatek: Add MT8192 mfgcfg " Chun-Jie Chen
2021-06-30 13:28 ` [v11 15/19] clk: mediatek: Add MT8192 mmsys " Chun-Jie Chen
2021-06-30 13:28 ` [v11 16/19] clk: mediatek: Add MT8192 msdc " Chun-Jie Chen
2021-06-30 13:28 ` [v11 17/19] clk: mediatek: Add MT8192 scp adsp " Chun-Jie Chen
2021-06-30 13:28 ` [v11 18/19] clk: mediatek: Add MT8192 vdecsys " Chun-Jie Chen
2021-06-30 13:28 ` [v11 19/19] clk: mediatek: Add MT8192 vencsys " Chun-Jie Chen
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