From: Chun-Kuang Hu <chunkuang.hu@kernel.org>
To: Macpaul Lin <macpaul.lin@mediatek.com>
Cc: Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
mtk01761 <wendell.lin@mediatek.com>,
Fabien Parent <fparent@baylibre.com>,
Weiyi Lu <weiyi.lu@mediatek.com>,
Mars Cheng <mars.cheng@mediatek.com>,
Sean Wang <Sean.Wang@mediatek.com>,
Owen Chen <owen.chen@mediatek.com>,
Chunfeng Yun <chunfeng.yun@mediatek.com>,
Evan Green <evgreen@chromium.org>, Yong Wu <yong.wu@mediatek.com>,
Joerg Roedel <jroedel@suse.de>, Shawn Guo <shawnguo@kernel.org>,
Marc Zyngier <marc.zyngier@arm.com>,
Ryder Lee <Ryder.Lee@mediatek.com>,
DTML <devicetree@vger.kernel.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
Linux ARM <linux-arm-kernel@lists.infradead.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@lists.infradead.org>,
linux-clk@vger.kernel.org, CC Hwang <cc.hwang@mediatek.com>,
Loda Chou <loda.chou@mediatek.com>,
Mediatek WSD Upstream <wsd_upstream@mediatek.com>
Subject: Re: [PATCH v8 3/4] arm64: dts: mediatek: add mt6765 support
Date: Wed, 10 Mar 2021 00:08:18 +0800 [thread overview]
Message-ID: <CAAOTY__kSW0ci9YJjSALOfRqKxxR3ysZUQ3Mxsab77hmCO0TyA@mail.gmail.com> (raw)
In-Reply-To: <1582279929-11535-4-git-send-email-macpaul.lin@mediatek.com>
Hi, Macpaul:
Macpaul Lin <macpaul.lin@mediatek.com> 於 2020年2月21日 週五 下午6:22寫道：
>
> From: Mars Cheng <mars.cheng@mediatek.com>
>
> Add basic chip support for Mediatek 6765, include
> uart node with correct uart clocks, pwrap device
>
> Add clock controller nodes, include topckgen, infracfg,
> apmixedsys and subsystem.
>
> Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
> Signed-off-by: Owen Chen <owen.chen@mediatek.com>
> Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
> Acked-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
> arch/arm64/boot/dts/mediatek/Makefile | 1 +
> arch/arm64/boot/dts/mediatek/mt6765-evb.dts | 33 ++++
> arch/arm64/boot/dts/mediatek/mt6765.dtsi | 253 +++++++++++++++++++++++++++
> 3 files changed, 287 insertions(+)
> create mode 100644 arch/arm64/boot/dts/mediatek/mt6765-evb.dts
> create mode 100644 arch/arm64/boot/dts/mediatek/mt6765.dtsi
>
> diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile
> index 458bbc4..22bdf1a 100644
> --- a/arch/arm64/boot/dts/mediatek/Makefile
> +++ b/arch/arm64/boot/dts/mediatek/Makefile
> @@ -1,6 +1,7 @@
> # SPDX-License-Identifier: GPL-2.0
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt2712-evb.dtb
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt6755-evb.dtb
> +dtb-$(CONFIG_ARCH_MEDIATEK) += mt6765-evb.dtb
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-evb.dtb
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-evb.dtb
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb
> diff --git a/arch/arm64/boot/dts/mediatek/mt6765-evb.dts b/arch/arm64/boot/dts/mediatek/mt6765-evb.dts
> new file mode 100644
> index 0000000..36dddff2
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mediatek/mt6765-evb.dts
> @@ -0,0 +1,33 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * dts file for Mediatek MT6765
> + *
> + * (C) Copyright 2018. Mediatek, Inc.
> + *
> + * Mars Cheng <mars.cheng@mediatek.com>
> + */
> +
> +/dts-v1/;
> +#include "mt6765.dtsi"
> +
> +/ {
> + model = "MediaTek MT6765 EVB";
> + compatible = "mediatek,mt6765-evb", "mediatek,mt6765";
> +
> + aliases {
> + serial0 = &uart0;
> + };
> +
> + memory@40000000 {
> + device_type = "memory";
> + reg = <0 0x40000000 0 0x1e800000>;
> + };
> +
> + chosen {
> + stdout-path = "serial0:921600n8";
> + };
> +};
> +
> +&uart0 {
> + status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/mediatek/mt6765.dtsi b/arch/arm64/boot/dts/mediatek/mt6765.dtsi
> new file mode 100644
> index 0000000..2662470
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mediatek/mt6765.dtsi
> @@ -0,0 +1,253 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * dts file for Mediatek MT6765
> + *
> + * (C) Copyright 2018. Mediatek, Inc.
> + *
> + * Mars Cheng <mars.cheng@mediatek.com>
> + */
> +
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/clock/mt6765-clk.h>
> +
> +/ {
> + compatible = "mediatek,mt6765";
> + interrupt-parent = <&sysirq>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
[snip]
> +
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + compatible = "simple-bus";
> + ranges;
> +
> + gic: interrupt-controller@c000000 {
> + compatible = "arm,gic-v3";
> + #interrupt-cells = <3>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> + interrupt-parent = <&gic>;
> + interrupt-controller;
> + reg = <0 0x0c000000 0 0x40000>, /* GICD */
> + <0 0x0c100000 0 0x200000>, /* GICR */
> + <0 0x0c400000 0 0x2000>, /* GICC */
> + <0 0x0c410000 0 0x2000>, /* GICH */
> + <0 0x0c420000 0 0x20000>; /* GICV */
> + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + topckgen: syscon@10000000 {
> + compatible = "mediatek,mt6765-topckgen", "syscon";
> + reg = <0 0x10000000 0 0x1000>;
> + #clock-cells = <1>;
> + };
> +
> + infracfg: syscon@10001000 {
> + compatible = "mediatek,mt6765-infracfg", "syscon";
> + reg = <0 0x10001000 0 0x1000>;
> + interrupts = <GIC_SPI 147 IRQ_TYPE_EDGE_RISING>;
> + #clock-cells = <1>;
> + };
> +
> + pericfg: pericfg@10003000 {
> + compatible = "mediatek,mt6765-pericfg", "syscon";
> + reg = <0 0x10003000 0 0x1000>;
> + };
> +
> + scpsys: scpsys@10006000 {
> + compatible = "mediatek,mt6765-scpsys";
> + reg = <0 0x10006000 0 0x1000>; /* spm */
> + #power-domain-cells = <1>;
> + clocks = <&topckgen CLK_TOP_MFG_SEL>,
> + <&topckgen CLK_TOP_MM_SEL>,
> + <&mmsys_config CLK_MM_SMI_COMMON>,
> + <&mmsys_config CLK_MM_SMI_COMM0>,
> + <&mmsys_config CLK_MM_SMI_COMM1>,
> + <&mmsys_config CLK_MM_SMI_LARB0>,
> + <&imgsys CLK_IMG_LARB2>,
> + <&mmsys_config CLK_MM_SMI_IMG>,
> + <&camsys CLK_CAM_LARB3>,
> + <&camsys CLK_CAM_DFP_VAD>,
> + <&camsys CLK_CAM>,
> + <&camsys CLK_CAM_CCU>,
> + <&mmsys_config CLK_MM_SMI_CAM>;
> + clock-names = "mfg", "mm",
> + "mm-0", "mm-1", "mm-2", "mm-3",
> + "isp-0", "isp-1", "cam-0", "cam-1",
> + "cam-2", "cam-3", "cam-4";
> + infracfg = <&infracfg>;
> + smi_comm = <&smi_common>;
> + };
> +
> + apmixed: syscon@1000c000 {
> + compatible = "mediatek,mt6765-apmixedsys", "syscon";
> + reg = <0 0x1000c000 0 0x1000>;
> + #clock-cells = <1>;
> + };
> +
> + sysirq: interrupt-controller@10200a80 {
> + compatible = "mediatek,mt6765-sysirq",
> + "mediatek,mt6577-sysirq";
> + interrupt-controller;
> + #interrupt-cells = <3>;
> + interrupt-parent = <&gic>;
> + reg = <0 0x10200a80 0 0x50>;
> + };
> +
> + uart0: serial@11002000 {
> + compatible = "mediatek,mt6765-uart",
> + "mediatek,mt6577-uart";
> + reg = <0 0x11002000 0 0x400>;
> + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&infracfg CLK_IFR_UART0>,
> + <&infracfg CLK_IFR_AP_DMA>;
> + clock-names = "baud", "bus";
> + status = "disabled";
> + };
> +
> + uart1: serial@11003000 {
> + compatible = "mediatek,mt6765-uart",
> + "mediatek,mt6577-uart";
> + reg = <0 0x11003000 0 0x400>;
> + interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&infracfg CLK_IFR_UART1>,
> + <&infracfg CLK_IFR_AP_DMA>;
> + clock-names = "baud", "bus";
> + status = "disabled";
> + };
> +
> + audio: syscon@11220000 {
> + compatible = "mediatek,mt6765-audsys", "syscon";
> + reg = <0 0x11220000 0 0x1000>;
> + #clock-cells = <1>;
> + };
> +
> + mipi_rx_ana_csi0a: syscon@11c10000 {
> + compatible = "mediatek,mt6765-mipi0a",
> + "syscon";
> + reg = <0 0x11c10000 0 0x1000>;
> + #clock-cells = <1>;
> + };
> +
> + mmsys_config: syscon@14000000 {
> + compatible = "mediatek,mt6765-mmsys", "syscon";
> + reg = <0 0x14000000 0 0x1000>;
> + interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_LOW>;
I does not see interrupts property in binding document [1], please add
this in binding document first.
I'm curious about this interrupt. In which condition would it be triggered?
[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt?h=v5.12-rc2
Regards,
Chun-Kuang.
> + #clock-cells = <1>;
> + };
> +
> + smi_common: smi_common@14002000 {
> + compatible = "mediatek,mt6765-smi-common", "syscon";
> + reg = <0 0x14002000 0 0x1000>;
> + };
> +
> + imgsys: syscon@15020000 {
> + compatible = "mediatek,mt6765-imgsys", "syscon";
> + reg = <0 0x15020000 0 0x1000>;
> + #clock-cells = <1>;
> + };
> +
> + venc_gcon: syscon@17000000 {
> + compatible = "mediatek,mt6765-vcodecsys", "syscon";
> + reg = <0 0x17000000 0 0x10000>;
> + #clock-cells = <1>;
> + };
> +
> + camsys: syscon@1a000000 {
> + compatible = "mediatek,mt6765-camsys", "syscon";
> + reg = <0 0x1a000000 0 0x1000>;
> + #clock-cells = <1>;
> + };
> + }; /* end of soc */
> +};
> --
> 1.7.9.5
> _______________________________________________
> Linux-mediatek mailing list
> Linux-mediatek@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
next prev parent reply other threads:[~2021-03-09 16:09 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-21 10:12 [PATCH v8 0/4] Add basic SoC support for mt6765 Macpaul Lin
2020-02-21 10:12 ` [PATCH v8 1/4] dt-bindings: mediatek: Add smi dts binding for Mediatek MT6765 SoC Macpaul Lin
2020-02-21 10:12 ` [PATCH v8 2/4] soc: mediatek: add MT6765 scpsys and subdomain support Macpaul Lin
2021-04-06 14:01 ` Matthias Brugger
2021-04-06 14:04 ` Matthias Brugger
2020-02-21 10:12 ` [PATCH v8 3/4] arm64: dts: mediatek: add mt6765 support Macpaul Lin
2021-03-09 16:08 ` Chun-Kuang Hu [this message]
2021-03-10 6:05 ` Macpaul Lin
2020-02-21 10:12 ` [PATCH v8 4/4] arm64: defconfig: add CONFIG_COMMON_CLK_MT6765_XXX clocks Macpaul Lin
2020-06-18 11:06 ` [PATCH v8 0/4] Add basic SoC support for mt6765 Macpaul Lin
2021-03-09 12:05 ` [PATCH v9 " Macpaul Lin
2021-03-09 12:05 ` [PATCH v9 1/4] dt-bindings: mediatek: Add smi dts binding for Mediatek MT6765 SoC Macpaul Lin
2021-03-09 12:05 ` [PATCH v9 2/4] soc: mediatek: add MT6765 scpsys and subdomain support Macpaul Lin
2021-03-09 12:05 ` [PATCH v9 3/4] arm64: dts: mediatek: add mt6765 support Macpaul Lin
2021-03-09 12:05 ` [PATCH v9 4/4] arm64: defconfig: add CONFIG_COMMON_CLK_MT6765_XXX clocks Macpaul Lin
2021-03-10 6:36 ` [PATCH v10 0/4] Add basic SoC support for mt6765 Macpaul Lin
2021-03-10 6:36 ` [PATCH v10 1/4] dt-bindings: mediatek: Add smi dts binding for Mediatek MT6765 SoC Macpaul Lin
2021-03-30 10:48 ` Matthias Brugger
2021-03-10 6:36 ` [PATCH v10 2/4] soc: mediatek: add MT6765 scpsys and subdomain support Macpaul Lin
2021-04-01 9:24 ` Matthias Brugger
2021-03-10 6:36 ` [PATCH v10 3/4] arm64: dts: mediatek: add mt6765 support Macpaul Lin
2021-03-10 6:36 ` [PATCH v10 4/4] arm64: defconfig: add CONFIG_COMMON_CLK_MT6765_XXX clocks Macpaul Lin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=CAAOTY__kSW0ci9YJjSALOfRqKxxR3ysZUQ3Mxsab77hmCO0TyA@mail.gmail.com \
--to=chunkuang.hu@kernel.org \
--cc=Ryder.Lee@mediatek.com \
--cc=Sean.Wang@mediatek.com \
--cc=catalin.marinas@arm.com \
--cc=cc.hwang@mediatek.com \
--cc=chunfeng.yun@mediatek.com \
--cc=devicetree@vger.kernel.org \
--cc=evgreen@chromium.org \
--cc=fparent@baylibre.com \
--cc=jroedel@suse.de \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=loda.chou@mediatek.com \
--cc=macpaul.lin@mediatek.com \
--cc=marc.zyngier@arm.com \
--cc=mark.rutland@arm.com \
--cc=mars.cheng@mediatek.com \
--cc=matthias.bgg@gmail.com \
--cc=mturquette@baylibre.com \
--cc=owen.chen@mediatek.com \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
--cc=shawnguo@kernel.org \
--cc=weiyi.lu@mediatek.com \
--cc=wendell.lin@mediatek.com \
--cc=will@kernel.org \
--cc=wsd_upstream@mediatek.com \
--cc=yong.wu@mediatek.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).