From: Doug Smythies <dsmythies@telus.net>
To: Len Brown <lenb@kernel.org>
Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Linux PM list <linux-pm@vger.kernel.org>,
dsmythies <dsmythies@telus.net>
Subject: Re: [PATCH] tools/power/x86/turbostat: Fix TCC offset bit mask
Date: Thu, 11 Mar 2021 22:26:02 -0800 [thread overview]
Message-ID: <CAAYoRsVYejQRByDz78jbv5cMfd+ctT8N3YxfOBndW8FJiuk9MA@mail.gmail.com> (raw)
In-Reply-To: <CAJvTdKm3h_msmu-NjTPY+09bLqyVL_-GCHnGFdNGdTcSZRP4zQ@mail.gmail.com>
Hi Len,
thank you for your reply.
On Thu, Mar 11, 2021 at 3:19 PM Len Brown <lenb@kernel.org> wrote:
>
> Thanks for the close read, Doug.
>
> This field size actually varies from system to system,
> but the reality is that the offset is never that big, and so the
> smaller mask is sufficient.
Disagree.
I want to use an offset of 26.
> Finally, this may all be moot, because there is discussion that using
> the offset this way is simply erroneous.
Disagree.
It works great.
As far as I know/recall I was the only person that responded to Rui's thread
"thermal/intel: introduce tcc cooling driver" [1]
And, I spent quite a bit of time doing so.
However, I agree the response seems different between the two systems
under test, Rui's and mine.
[1] https://marc.info/?l=linux-pm&m=161070345329806&w=2
> stay tuned.
O.K.
... Doug
>
> -Len
>
>
> On Sat, Jan 16, 2021 at 12:07 PM Doug Smythies <doug.smythies@gmail.com> wrote:
> >
> > The TCC offset mask is incorrect, resulting in
> > incorrect target temperature calculations, if
> > the offset is big enough to exceed the mask size.
> >
> > Signed-off-by: Doug Smythies <dsmythies@telus.net>
> > ---
> > tools/power/x86/turbostat/turbostat.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c
> > index 389ea5209a83..d7acdd4d16c4 100644
> > --- a/tools/power/x86/turbostat/turbostat.c
> > +++ b/tools/power/x86/turbostat/turbostat.c
> > @@ -4823,7 +4823,7 @@ int read_tcc_activation_temp()
> >
> > target_c = (msr >> 16) & 0xFF;
> >
> > - offset_c = (msr >> 24) & 0xF;
> > + offset_c = (msr >> 24) & 0x3F;
> >
> > tcc = target_c - offset_c;
> >
> > --
> > 2.25.1
> >
>
>
> --
> Len Brown, Intel Open Source Technology Center
next prev parent reply other threads:[~2021-03-12 6:27 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-16 17:07 [PATCH] tools/power/x86/turbostat: Fix TCC offset bit mask Doug Smythies
2021-03-11 23:18 ` Len Brown
2021-03-12 6:26 ` Doug Smythies [this message]
2021-03-12 22:15 ` Len Brown
2021-03-13 15:16 ` Doug Smythies
2021-04-11 14:09 ` Zhang Rui
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