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bh=9EnWzCrCjMkBA9yDDFJOkeJ9fcIzJ3+RLUTB4gLbZcg=; b=IEVmNT5rio1yDhJwbqwo2LM512sgoiXtpNbzhqnLybhi3+XCl+vZ/Tc11sDt7FV/q8 rvwLhxIZK4xys5XFH8yjyHx8VeQcNHGd+c7xc/35AkcC3XCYiJD4HXxVikiGN7jOtKRC tX0S587IcFHHFyCqmdrSM02ZR166qxFnE328D21qWlvrD03mcXVDPCFwbf2zHtGGGagC ulc/G6UxWXlhUU2hRmWvgaj0E98ip3t1jDDIsR4FmaG8YyQMrD6P+rgPOX8hcwitSObC 8QTZXYNzz8r3dl11bsm2lFw4Paxte+P9hQNqeLr7J5i2Dc+PInhYl8KsZq7iqcvwMuXn Ge3g== X-Gm-Message-State: AOAM5332sw9sF6pUKjUm+0NAhKNbOGvw9cw3KL1n2YuT7WQCR5KeR+Q5 McybekHZpeaiMbZ1oazjk3xUBQnuzR3NxsuUpPDhsw== X-Google-Smtp-Source: ABdhPJyOAoJ00XEnqH4r8aB6WS1NFX4IHuoS0DZpueYY1Z36KtN1KjazL8ggYd054SBzKdj8Xgq60ik5QOw1bMIusOU= X-Received: by 2002:a17:90a:5288:: with SMTP id w8mr2475201pjh.170.1622012689272; Wed, 26 May 2021 00:04:49 -0700 (PDT) MIME-Version: 1.0 References: <20210424004645.3950558-1-seanjc@google.com> <20210424004645.3950558-18-seanjc@google.com> In-Reply-To: <20210424004645.3950558-18-seanjc@google.com> From: Reiji Watanabe Date: Wed, 26 May 2021 00:04:33 -0700 Message-ID: Subject: Re: [PATCH 17/43] KVM: x86: Open code necessary bits of kvm_lapic_set_base() at vCPU RESET To: Sean Christopherson Cc: Paolo Bonzini , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , kvm@vger.kernel.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Apr 23, 2021 at 5:51 PM Sean Christopherson wrote: > > Stuff vcpu->arch.apic_base and apic->base_address directly during APIC > reset, as opposed to bouncing through kvm_set_apic_base() while fudging > the ENABLE bit during creation to avoid the other, unwanted side effects. > > This is a step towards consolidating the APIC RESET logic across x86, > VMX, and SVM. > > Signed-off-by: Sean Christopherson > --- > arch/x86/kvm/lapic.c | 15 ++++++--------- > 1 file changed, 6 insertions(+), 9 deletions(-) > > diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c > index b088f6984b37..b1366df46d1d 100644 > --- a/arch/x86/kvm/lapic.c > +++ b/arch/x86/kvm/lapic.c > @@ -2305,7 +2305,6 @@ EXPORT_SYMBOL_GPL(kvm_apic_update_apicv); > void kvm_lapic_reset(struct kvm_vcpu *vcpu, bool init_event) > { > struct kvm_lapic *apic = vcpu->arch.apic; > - u64 msr_val; > int i; > > if (!apic) > @@ -2315,10 +2314,13 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu, bool init_event) > hrtimer_cancel(&apic->lapic_timer.timer); > > if (!init_event) { > - msr_val = APIC_DEFAULT_PHYS_BASE | MSR_IA32_APICBASE_ENABLE; > + vcpu->arch.apic_base = APIC_DEFAULT_PHYS_BASE | > + MSR_IA32_APICBASE_ENABLE; > if (kvm_vcpu_is_reset_bsp(vcpu)) > - msr_val |= MSR_IA32_APICBASE_BSP; > - kvm_lapic_set_base(vcpu, msr_val); > + vcpu->arch.apic_base |= MSR_IA32_APICBASE_BSP; > + > + apic->base_address = MSR_IA32_APICBASE_ENABLE; I think you wanted to make the code above set apic->base_address to APIC_DEFAULT_PHYS_BASE (not MSR_IA32_APICBASE_ENABLE). Thanks, Reiji