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From: Reiji Watanabe <reijiw@google.com>
To: Sean Christopherson <seanjc@google.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
	Vitaly Kuznetsov <vkuznets@redhat.com>,
	Wanpeng Li <wanpengli@tencent.com>,
	Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
	kvm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 02/43] KVM: VMX: Set EDX at INIT with CPUID.0x1, Family-Model-Stepping
Date: Sun, 23 May 2021 21:29:46 -0700	[thread overview]
Message-ID: <CAAeT=FxuBEY1C7MMQ5f34-AbQjtDRAgVeR88LkS9=763dCjb=A@mail.gmail.com> (raw)
In-Reply-To: <YKfRj+I2Wa+t//lb@google.com>

> > > On Tue, May 18, 2021, Reiji Watanabe wrote:
> > > > BTW, I would think having a default CPUID for CPUID.(EAX=0x1) would be better
> > > > for consistency of a vCPU state for RESET.  I would think it doesn't matter
> > > > practically anyway though.
> > >
> > > Probably, but that would require defining default values for all of CPUID.0x0 and
> > > CPUID.0x1, which is a can of worms I'd rather not open.  E.g. vendor info, basic
> > > feature set, APIC ID, etc... would all need default values.  On the other hand,
> > > the EDX value stuffing predates CPUID, so using 0x600 isn't provably wrong, just
> > > a bit anachronistic. :-)
> >
> > I see... Then I don't think it's worth doing...
> > Just out of curiosity, can't we simply use a vcpu_id for the APIC ID ?
>
> That would mostly work, but theoretically we could overflow the 8 bit field
> because max vCPUs is 288.  Thanks Larrabee.
>
>   commit 682f732ecf7396e9d6fe24d44738966699fae6c0
>   Author: Radim Krčmář <rkrcmar@redhat.com>
>   Date:   Tue Jul 12 22:09:29 2016 +0200
>
>     KVM: x86: bump MAX_VCPUS to 288
>
>     288 is in high demand because of Knights Landing CPU.
>     We cannot set the limit to 640k, because that would be wasting space.
>
> > Also, can't we simply use the same values that KVM_GET_SUPPORTED_CPUID
> > provides for other CPUID fields ?
>
> Yes, that would mostly work.  It's certainly possible to have a moderately sane
> default, but there's essentially zero benefit in doing so since practically
> speaking all userspace VMMs will override CPUID anyways.  KVM could completely
> default to the host CPUID, but again, it wouldn't provide any meaningful benefit,
> while doing so would step on userspace's toes since KVM's approach is that KVM is
> "just" an accelerator, while userspace defines the CPU model, devices, etc...
> And it would also mean KVM has to start worrying about silly corner cases like
> the max vCPUs thing.  That's why I say it's a can of worms :-)

Ah, I see.  Thank you for the answer and the helpful information !

Regards,
Reiji

  reply	other threads:[~2021-05-24  4:32 UTC|newest]

Thread overview: 88+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-24  0:46 [PATCH 00/43] KVM: x86: vCPU RESET/INIT fixes and consolidation Sean Christopherson
2021-04-24  0:46 ` [PATCH 01/43] KVM: nVMX: Set LDTR to its architecturally defined value on nested VM-Exit Sean Christopherson
2021-05-19  5:30   ` Reiji Watanabe
2021-04-24  0:46 ` [PATCH 02/43] KVM: VMX: Set EDX at INIT with CPUID.0x1, Family-Model-Stepping Sean Christopherson
2021-05-19  5:59   ` Reiji Watanabe
2021-05-19 18:47     ` Sean Christopherson
2021-05-21  7:07       ` Reiji Watanabe
2021-05-21 15:28         ` Sean Christopherson
2021-05-24  4:29           ` Reiji Watanabe [this message]
2021-04-24  0:46 ` [PATCH 03/43] KVM: SVM: Require exact CPUID.0x1 match when stuffing EDX at INIT Sean Christopherson
2021-05-19  5:30   ` Reiji Watanabe
2021-04-24  0:46 ` [PATCH 04/43] KVM: SVM: Fall back to KVM's hardcoded value for EDX at RESET/INIT Sean Christopherson
2021-05-19  5:41   ` Reiji Watanabe
2021-04-24  0:46 ` [PATCH 05/43] KVM: x86: Split out CR0/CR4 MMU role change detectors to separate helpers Sean Christopherson
2021-05-19  5:31   ` Reiji Watanabe
2021-04-24  0:46 ` [PATCH 06/43] KVM: x86: Properly reset MMU context at vCPU RESET/INIT Sean Christopherson
2021-05-17 16:57   ` Reiji Watanabe
2021-05-18 20:23     ` Sean Christopherson
2021-05-18 22:42       ` Reiji Watanabe
2021-05-19 17:16         ` Sean Christopherson
2021-05-24  4:57           ` Reiji Watanabe
2021-04-24  0:46 ` [PATCH 07/43] KVM: VMX: Remove explicit MMU reset in enter_rmode() Sean Christopherson
2021-04-24  0:46 ` [PATCH 08/43] KVM: SVM: Drop explicit MMU reset at RESET/INIT Sean Christopherson
2021-05-19  5:32   ` Reiji Watanabe
2021-04-24  0:46 ` [PATCH 09/43] KVM: SVM: Drop a redundant init_vmcb() from svm_create_vcpu() Sean Christopherson
2021-05-19  5:32   ` Reiji Watanabe
2021-04-24  0:46 ` [PATCH 10/43] KVM: VMX: Move init_vmcs() invocation to vmx_vcpu_reset() Sean Christopherson
2021-05-19  5:33   ` Reiji Watanabe
2021-04-24  0:46 ` [PATCH 11/43] KVM: x86: WARN if the APIC map is dirty without an in-kernel local APIC Sean Christopherson
2021-04-24  0:46 ` [PATCH 12/43] KVM: x86: Remove defunct BSP "update" in local APIC reset Sean Christopherson
2021-05-26  6:54   ` Reiji Watanabe
2021-04-24  0:46 ` [PATCH 13/43] KVM: x86: Migrate the PIT only if vcpu0 is migrated, not any BSP Sean Christopherson
2021-04-24  0:46 ` [PATCH 14/43] KVM: x86: Don't force set BSP bit when local APIC is managed by userspace Sean Christopherson
2021-05-26  6:55   ` Reiji Watanabe
2021-04-24  0:46 ` [PATCH 15/43] KVM: x86: Set BSP bit in reset BSP vCPU's APIC base by default Sean Christopherson
2021-05-26  6:55   ` Reiji Watanabe
2021-04-24  0:46 ` [PATCH 16/43] KVM: VMX: Stuff vcpu->arch.apic_base directly at vCPU RESET Sean Christopherson
2021-05-26  6:55   ` Reiji Watanabe
2021-04-24  0:46 ` [PATCH 17/43] KVM: x86: Open code necessary bits of kvm_lapic_set_base() " Sean Christopherson
2021-05-26  7:04   ` Reiji Watanabe
2021-05-26 15:15     ` Sean Christopherson
2021-04-24  0:46 ` [PATCH 18/43] KVM: x86: Consolidate APIC base RESET initialization code Sean Christopherson
2021-05-26  7:04   ` Reiji Watanabe
2021-04-24  0:46 ` [PATCH 19/43] KVM: x86: Move EDX initialization at vCPU RESET to common code Sean Christopherson
2021-05-19  5:45   ` Reiji Watanabe
2021-04-24  0:46 ` [PATCH 20/43] KVM: SVM: Don't bother writing vmcb->save.rip at vCPU RESET/INIT Sean Christopherson
2021-05-19  5:34   ` Reiji Watanabe
2021-04-24  0:46 ` [PATCH 21/43] KVM: VMX: Invert handling of CR0.WP for EPT without unrestricted guest Sean Christopherson
2021-04-24  0:46 ` [PATCH 22/43] KVM: VMX: Remove direct write to vcpu->arch.cr0 during vCPU RESET/INIT Sean Christopherson
2021-05-19  5:34   ` Reiji Watanabe
2021-04-24  0:46 ` [PATCH 23/43] KVM: VMX: Fold ept_update_paging_mode_cr0() back into vmx_set_cr0() Sean Christopherson
2021-04-24  0:46 ` [PATCH 24/43] KVM: nVMX: Do not clear CR3 load/store exiting bits if L1 wants 'em Sean Christopherson
2021-04-24  0:46 ` [PATCH 25/43] KVM: VMX: Pull GUEST_CR3 from the VMCS iff CR3 load exiting is disabled Sean Christopherson
2021-04-24  0:46 ` [PATCH 26/43] KVM: VMX: Process CR0.PG side effects after setting CR0 assets Sean Christopherson
2021-04-24  0:46 ` [PATCH 27/43] KVM: VMX: Skip emulation required checks during pmode/rmode transitions Sean Christopherson
2021-04-24  0:46 ` [PATCH 28/43] KVM: nVMX: Don't evaluate "emulation required" on VM-Exit Sean Christopherson
2021-04-24  0:46 ` [PATCH 29/43] KVM: SVM: Tweak order of cr0/cr4/efer writes at RESET/INIT Sean Christopherson
2021-05-19 18:16   ` Reiji Watanabe
2021-05-19 19:58     ` Sean Christopherson
2021-05-23 23:04       ` Reiji Watanabe
2021-04-24  0:46 ` [PATCH 30/43] KVM: SVM: Drop redundant writes to vmcb->save.cr4 " Sean Christopherson
2021-05-19  5:35   ` Reiji Watanabe
2021-04-24  0:46 ` [PATCH 31/43] KVM: SVM: Stuff save->dr6 at during VMSA sync, not " Sean Christopherson
2021-04-24  0:46 ` [PATCH 32/43] KVM: VMX: Skip pointless MSR bitmap update when setting EFER Sean Christopherson
2021-04-24  0:46 ` [PATCH 33/43] KVM: VMX: Refresh list of user return MSRs after setting guest CPUID Sean Christopherson
2021-05-19  5:35   ` Reiji Watanabe
2021-04-24  0:46 ` [PATCH 34/43] KVM: VMX: Don't _explicitly_ reconfigure user return MSRs on vCPU INIT Sean Christopherson
2021-04-24  0:46 ` [PATCH 35/43] KVM: x86: Move setting of sregs during vCPU RESET/INIT to common x86 Sean Christopherson
2021-05-17 23:50   ` Reiji Watanabe
2021-05-18 21:45     ` Sean Christopherson
2021-05-21  5:19       ` Reiji Watanabe
2021-04-24  0:46 ` [PATCH 36/43] KVM: VMX: Remove obsolete MSR bitmap refresh at vCPU RESET/INIT Sean Christopherson
2021-04-24  0:46 ` [PATCH 37/43] KVM: nVMX: Remove obsolete MSR bitmap refresh at nested transitions Sean Christopherson
2021-04-24  0:46 ` [PATCH 38/43] KVM: VMX: Don't redo x2APIC MSR bitmaps when userspace filter is changed Sean Christopherson
2021-04-24  0:46 ` [PATCH 39/43] KVM: VMX: Remove unnecessary initialization of msr_bitmap_mode Sean Christopherson
2021-04-24  0:46 ` [PATCH 40/43] KVM: VMX: Smush x2APIC MSR bitmap adjustments into single function Sean Christopherson
2021-04-24  0:46 ` [PATCH 41/43] KVM: VMX: Remove redundant write to set vCPU as active at RESET/INIT Sean Christopherson
2021-04-24  0:46 ` [PATCH 42/43] KVM: VMX: Drop VMWRITEs to zero fields at vCPU RESET Sean Christopherson
2021-05-24 21:15   ` Paolo Bonzini
2021-05-24 22:21     ` Jim Mattson
2021-05-24 22:28     ` Sean Christopherson
2021-05-24 22:48       ` Jim Mattson
2021-05-25  1:02         ` Sean Christopherson
2021-04-24  0:46 ` [PATCH 43/43] KVM: x86: Drop pointless @reset_roots from kvm_init_mmu() Sean Christopherson
2021-05-27 19:11   ` Sean Christopherson
2021-05-27 19:25     ` Sean Christopherson
2021-06-10 16:54 ` [PATCH 00/43] KVM: x86: vCPU RESET/INIT fixes and consolidation Paolo Bonzini
2021-06-10 19:22   ` Sean Christopherson

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