From: Chunyan Zhang <zhang.lyra@gmail.com>
To: Stephen Boyd <sboyd@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
Michael Turquette <mturquette@baylibre.com>,
Rob Herring <robh+dt@kernel.org>,
linux-clk <linux-clk@vger.kernel.org>,
DTML <devicetree@vger.kernel.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Orson Zhai <orsonzhai@gmail.com>,
Baolin Wang <baolin.wang7@gmail.com>,
Chunyan Zhang <chunyan.zhang@unisoc.com>
Subject: Re: [PATCH v6 3/7] dt-bindings: clk: sprd: add bindings for sc9863a clock controller
Date: Sun, 22 Mar 2020 19:00:39 +0800 [thread overview]
Message-ID: <CAAfSe-sQnZLn8J7Ct5OES=2PmT-nGT-_0zXxRaO=mcHVtgTcnQ@mail.gmail.com> (raw)
In-Reply-To: <158475317083.125146.1467485980949213245@swboyd.mtv.corp.google.com>
Hi Stephen,
On Sat, 21 Mar 2020 at 09:12, Stephen Boyd <sboyd@kernel.org> wrote:
>
> Quoting Chunyan Zhang (2020-03-03 23:27:26)
> > From: Chunyan Zhang <chunyan.zhang@unisoc.com>
> >
> > add a new bindings to describe sc9863a clock compatible string.
> >
> > Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com>
> [...]
> > +examples:
> > + - |
> > + ap_clk: clock-controller@21500000 {
> > + compatible = "sprd,sc9863a-ap-clk";
> > + reg = <0 0x21500000 0 0x1000>;
> > + clocks = <&ext_26m>, <&ext_32k>;
> > + clock-names = "ext-26m", "ext-32k";
> > + #clock-cells = <1>;
> > + };
> > +
> > + - |
> > + soc {
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > +
> > + ap_ahb_regs: syscon@20e00000 {
> > + compatible = "sprd,sc9863a-glbregs", "syscon", "simple-mfd";
> > + reg = <0 0x20e00000 0 0x4000>;
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges = <0 0 0x20e00000 0x4000>;
> > +
> > + apahb_gate: apahb-gate@0 {
>
> Why do we need a node per "clk type" in the simple-mfd syscon? Can't we
> register clks from the driver that matches the parent node and have that
> driver know what sorts of clks are where? Sorry I haven't read the rest
> of the patch series and I'm not aware if this came up before. If so,
> please put details about this in the commit text.
Please see the change logs after v2 in cover-letter.
Rob suggested us to put some clocks under syscon nodes, since these
clocks have the same
physical address base with the syscon;
Thanks,
Chunyan
>
> > + compatible = "sprd,sc9863a-apahb-gate";
> > + reg = <0x0 0x1020>;
> > + #clock-cells = <1>;
next prev parent reply other threads:[~2020-03-22 11:01 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-04 7:27 [PATCH v6 0/7] Add clocks for Unisoc's SC9863A Chunyan Zhang
2020-03-04 7:27 ` [PATCH v6 1/7] clk: sprd: add gate for pll clocks Chunyan Zhang
2020-03-04 7:27 ` [PATCH v6 2/7] dt-bindings: clk: sprd: rename the common file name sprd.txt to SoC specific Chunyan Zhang
2020-03-04 7:27 ` [PATCH v6 3/7] dt-bindings: clk: sprd: add bindings for sc9863a clock controller Chunyan Zhang
2020-03-09 1:33 ` Chunyan Zhang
2020-03-10 21:17 ` Rob Herring
2020-03-21 1:12 ` Stephen Boyd
2020-03-22 11:00 ` Chunyan Zhang [this message]
2020-03-25 2:03 ` Stephen Boyd
2020-03-25 2:05 ` Chunyan Zhang
2020-03-04 7:27 ` [PATCH v6 4/7] clk: sprd: Add dt-bindings include file for SC9863A Chunyan Zhang
2020-03-04 7:27 ` [PATCH v6 5/7] clk: sprd: Add macros for referencing parents without strings Chunyan Zhang
2020-03-04 7:27 ` [PATCH v6 6/7] clk: sprd: support to get regmap from parent node Chunyan Zhang
2020-03-04 7:27 ` [PATCH v6 7/7] clk: sprd: add clocks support for SC9863A Chunyan Zhang
2020-03-09 1:37 ` [PATCH v6 0/7] Add clocks for Unisoc's SC9863A Chunyan Zhang
2020-03-20 10:34 ` Chunyan Zhang
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