From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E5298C433E0 for ; Thu, 4 Mar 2021 07:14:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A21A064F0D for ; Thu, 4 Mar 2021 07:14:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236113AbhCDHNd (ORCPT ); Thu, 4 Mar 2021 02:13:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53430 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236109AbhCDHNJ (ORCPT ); Thu, 4 Mar 2021 02:13:09 -0500 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [IPv6:2a00:1450:4864:20::336]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 49447C061574; Wed, 3 Mar 2021 23:12:29 -0800 (PST) Received: by mail-wm1-x336.google.com with SMTP id m7so232445wmq.0; Wed, 03 Mar 2021 23:12:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=e4pM5UzwJCaSA1xipkCauFzjQ9OrQvbh3Krxwlg6A34=; b=Td5CtP2JXZs3/z+onUhusDaS/j80xOxhLLTBHnmC2rlv7gQbVZaoasHlCAihJpjy3f 1pn43gUjayYEoX2t50IEoWfDWvSM8yNa1lJKXDRVn3A9XIKqwS21w2G9f/XVkvcBfvB1 sgcrIpMNzLP+UKxP4w3TkoUg5MrBmbdI03BIqawDkqvjhyTYLihP9ZOIH9sYUX38PwqG 7YucHosRHqBc+uLsycdLK9PkJSoHCErCYTvEzxvfZR/uBEApK+X5iqsI44QqHz6fm0nF d/UsWBaKW8wkdfERPQCu0ifMUC8uvblyosKkaNHT4o4Ul3YSuBGxDQYuQtLPIZzXY7Gc 8K5Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=e4pM5UzwJCaSA1xipkCauFzjQ9OrQvbh3Krxwlg6A34=; b=VCRMfJ7F9cb1ELV/DvqZ/3OGMwJ/P7qJoDSCmUlrmTOq7F3yvaFRRRyFwdbMWFxQuX 92N4stavyel2hoDkgT0SlS60mueB1rp45BYg6Bq3ltgtXTEyfga8TqJSXrdH8675udlr DObcNQqgi+7iC8i04TE61jb7b2bsadFoVuud65uLFwUcwoVo/tBR8NX2EWnjqjBgLfYp JXWuxBxJ2MgFDbat7F6PJoUf/97LaJjhYieSCkkuKfSHYWn5QAQjVY3XSCNzkFggNHZj o3OwYracqtDG+qDn0TYz1FTv5CRC0tL7jB5lZPkHr7KYGQ2X6wrrkXroRBp8uRVprioE zZPQ== X-Gm-Message-State: AOAM533oJzxL8AkPPbRziFGeOGhvtQ66QCH6xli3jGaDvvY7h/mpYeg3 IZpZIN/0stTNBWkfbjfvGondZXPzhxFIJGzqCk0c86Mf X-Google-Smtp-Source: ABdhPJwYVUlui2AC7T6vQ81NWLGM2vgiDSy9t8fSLesvFTqaLJWz7p/s8gl+y3QYqTdSrvhjt4vWn78UHbdhRAPCeqE= X-Received: by 2002:a1c:7402:: with SMTP id p2mr2286514wmc.43.1614841948026; Wed, 03 Mar 2021 23:12:28 -0800 (PST) MIME-Version: 1.0 References: <20210203090727.789939-1-zhang.lyra@gmail.com> <20210203090727.789939-2-zhang.lyra@gmail.com> <20210204232549.GA1305874@robh.at.kernel.org> <4b88182c-f3fb-20d5-de6f-7fd6eddbcba7@arm.com> In-Reply-To: <4b88182c-f3fb-20d5-de6f-7fd6eddbcba7@arm.com> From: Chunyan Zhang Date: Thu, 4 Mar 2021 15:11:51 +0800 Message-ID: Subject: Re: [PATCH v3 1/2] dt-bindings: iommu: add bindings for sprd iommu To: Robin Murphy Cc: Rob Herring , Joerg Roedel , Linux IOMMU , DTML , Baolin Wang , Linux Kernel Mailing List , Orson Zhai , Sheng Xu , Chunyan Zhang Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Robin, On Tue, 16 Feb 2021 at 23:10, Robin Murphy wrote: > > >>> > >>> On Wed, Feb 03, 2021 at 05:07:26PM +0800, Chunyan Zhang wrote: > >>>> From: Chunyan Zhang > >>>> > >>>> This iommu module can be used by Unisoc's multimedia devices, such as > >>>> display, Image codec(jpeg) and a few signal processors, including > >>>> VSP(video), GSP(graphic), ISP(image), and CPP(camera pixel processor), etc. > >>>> > >>>> Signed-off-by: Chunyan Zhang > >>>> --- > >>>> .../devicetree/bindings/iommu/sprd,iommu.yaml | 72 +++++++++++++++++++ > >>>> 1 file changed, 72 insertions(+) > >>>> create mode 100644 Documentation/devicetree/bindings/iommu/sprd,iommu.yaml > >>>> > >>>> diff --git a/Documentation/devicetree/bindings/iommu/sprd,iommu.yaml b/Documentation/devicetree/bindings/iommu/sprd,iommu.yaml > >>>> new file mode 100644 > >>>> index 000000000000..4fc99e81fa66 > >>>> --- /dev/null > >>>> +++ b/Documentation/devicetree/bindings/iommu/sprd,iommu.yaml > >>>> @@ -0,0 +1,72 @@ > >>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > >>>> +# Copyright 2020 Unisoc Inc. > >>>> +%YAML 1.2 > >>>> +--- > >>>> +$id: http://devicetree.org/schemas/iommu/sprd,iommu.yaml# > >>>> +$schema: http://devicetree.org/meta-schemas/core.yaml# > >>>> + > >>>> +title: Unisoc IOMMU and Multi-media MMU > >>>> + > >>>> +maintainers: > >>>> + - Chunyan Zhang > >>>> + > >>>> +properties: > >>>> + compatible: > >>>> + enum: > >>>> + - sprd,iommu-v1 > >>>> + > >>>> + "#iommu-cells": > >>>> + const: 0 > >>>> + description: > >>>> + Unisoc IOMMUs are all single-master IOMMU devices, therefore no > >>>> + additional information needs to associate with its master device. > >>>> + Please refer to the generic bindings document for more details, > >>>> + Documentation/devicetree/bindings/iommu/iommu.txt > >>>> + > >>>> + reg: > >>>> + maxItems: 1 > >>>> + description: > >>>> + Not required if 'sprd,iommu-regs' is defined. > >>>> + > >>>> + clocks: > >>>> + description: > >>>> + Reference to a gate clock phandle, since access to some of IOMMUs are > >>>> + controlled by gate clock, but this is not required. > >>>> + > >>>> + sprd,iommu-regs: > >>>> + $ref: /schemas/types.yaml#/definitions/phandle-array > >>>> + description: > >>>> + Reference to a syscon phandle plus 1 cell, the syscon defines the > >>>> + register range used by the iommu and the media device, the cell > >>>> + defines the offset for iommu registers. Since iommu module shares > >>>> + the same register range with the media device which uses it. > >>>> + > >>>> +required: > >>>> + - compatible > >>>> + - "#iommu-cells" > > OK, so apparently the hardware is not quite as trivial as my initial > impression, and you should have interrupts as well. I've checked with my colleagues for this issue. And like I explained before, one sprd IOMMU serves one master device only, so interrupts are handled by master devices rather than IOMMUs. Chunyan