From: Anup Patel <anup@brainfault.org>
To: Christoph Hellwig <hch@infradead.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
Damien Le Moal <Damien.LeMoal@wdc.com>,
"palmer@sifive.com" <palmer@sifive.com>,
"linux-kernel@vger.kernel.org List"
<linux-kernel@vger.kernel.org>, Atish Patra <atish.patra@wdc.com>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>,
Thomas Gleixner <tglx@linutronix.de>
Subject: Re: [RFC PATCH 3/5] RISC-V: Add cpu_operatios structure
Date: Wed, 22 Aug 2018 20:54:51 +0530 [thread overview]
Message-ID: <CAAhSdy1jdn7OS1AxwXYZqejUw-qto-5Afbb6o034ahH26E+vyw@mail.gmail.com> (raw)
In-Reply-To: <20180822060353.GA27106@infradead.org>
On Wed, Aug 22, 2018 at 11:33 AM, Christoph Hellwig <hch@infradead.org> wrote:
> On Tue, Aug 21, 2018 at 10:34:38PM +0530, Anup Patel wrote:
>> The cpu_operations is certainly required because SOC vendors will add
>> vendor-specific mechanism to selectively bringing-up CPUs/HARTs instead
>> of all CPUs entering Linux kernel simultaneously. In fact, we might also end-up
>> having CPU ON/OFF operations in SBI.
>
> Your forgot an essential part in your analysis: Right now we only have
> one single way to deal with cpu on/offlining, and that is the dummy WFI
> kind. Once other ways show up we can build proper infrastructure, but
> until then this is just a white elephant as we have no idea how these
> abstractions will look like.
>
> And my hope is that we'll just see new SBI calls, in which case we'll
> just need SBI and dummy version and can avoid all the indirect calls.
IMHO, rather than waiting for new CPU ON/OFF methods to come-up we
can keep the cpu_operations ready. Also, we are not re-inventing anything
here which we might have to discard later because cpu_operations are
already tried and hardened for Linux ARM64.
I agree with you that in long-term SBI-based CPU ON/OFF will be widely
used. Most likely we will have at-least two CPU ON/OFF methods:
1. Existing lottery based spinning
2. New SBI calls
Regards,
Anup
next prev parent reply other threads:[~2018-08-22 15:24 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-15 23:56 [RFC PATCH 0/5] RISC-V: Improve smp functionality & support cpu hotplug Atish Patra
2018-08-15 23:56 ` [RFC PATCH 1/5] RISC-V: Add logical CPU indexing for RISC-V Atish Patra
2018-08-16 4:06 ` Anup Patel
2018-08-16 5:17 ` Atish Patra
2018-08-16 5:39 ` Anup Patel
2018-08-15 23:56 ` [RFC PATCH 2/5] RISC-V: Use Linux logical cpu number instead of hartid Atish Patra
2018-08-16 4:24 ` Anup Patel
2018-08-16 5:23 ` Atish Patra
2018-08-16 5:45 ` Anup Patel
2018-08-16 5:52 ` Atish Patra
2018-08-16 6:03 ` Anup Patel
2018-08-16 17:26 ` Atish Patra
2018-08-15 23:56 ` [RFC PATCH 3/5] RISC-V: Add cpu_operatios structure Atish Patra
2018-08-16 5:02 ` Anup Patel
2018-08-16 5:40 ` Atish Patra
2018-08-16 6:21 ` Anup Patel
2018-08-18 1:25 ` Atish Patra
2018-08-21 7:48 ` Christoph Hellwig
2018-08-21 17:04 ` Anup Patel
2018-08-22 6:03 ` Christoph Hellwig
2018-08-22 15:24 ` Anup Patel [this message]
2018-08-23 4:25 ` Atish Patra
2018-08-23 13:37 ` Christoph Hellwig
2018-08-23 15:15 ` Anup Patel
2018-08-22 17:16 ` Palmer Dabbelt
2018-08-15 23:56 ` [RFC PATCH 4/5] RISC-V: Move interrupt cause declarations to irq.h Atish Patra
2018-08-21 7:49 ` Christoph Hellwig
2018-08-15 23:56 ` [RFC PATCH 5/5] RISC-V: Support cpu hotplug Atish Patra
2018-08-21 7:54 ` Christoph Hellwig
2018-08-21 20:23 ` Atish Patra
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