From: Anup Patel <anup@brainfault.org>
To: "limingwang (A)" <limingwang@huawei.com>
Cc: Anup Patel <anup.patel@wdc.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Palmer Dabbelt <palmerdabbelt@google.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Paolo Bonzini <pbonzini@redhat.com>,
Alexander Graf <graf@amazon.com>,
Atish Patra <atish.patra@wdc.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
Damien Le Moal <damien.lemoal@wdc.com>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"kvm-riscv@lists.infradead.org" <kvm-riscv@lists.infradead.org>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v19 11/17] RISC-V: KVM: Implement MMU notifiers
Date: Wed, 4 Aug 2021 12:46:20 +0530 [thread overview]
Message-ID: <CAAhSdy2jCQQScw9KMwHy-c7Mgkaq5xB95qmjypJEYbb+0q3_Tg@mail.gmail.com> (raw)
In-Reply-To: <38734ad1008a46169dcd89e1ded9ac62@huawei.com>
On Tue, Aug 3, 2021 at 6:49 PM limingwang (A) <limingwang@huawei.com> wrote:
>
> > diff --git a/arch/riscv/kvm/mmu.c b/arch/riscv/kvm/mmu.c index
> > fa9a4f9b9542..4b294113c63b 100644
> > --- a/arch/riscv/kvm/mmu.c
> > +++ b/arch/riscv/kvm/mmu.c
> > @@ -300,7 +300,8 @@ static void stage2_op_pte(struct kvm *kvm, gpa_t
> > addr,
> > }
> > }
> >
> > -static void stage2_unmap_range(struct kvm *kvm, gpa_t start, gpa_t size)
> > +static void stage2_unmap_range(struct kvm *kvm, gpa_t start,
> > + gpa_t size, bool may_block)
> > {
> > int ret;
> > pte_t *ptep;
> > @@ -325,6 +326,13 @@ static void stage2_unmap_range(struct kvm *kvm,
> > gpa_t start, gpa_t size)
> >
> > next:
> > addr += page_size;
> > +
> > + /*
> > + * If the range is too large, release the kvm->mmu_lock
> > + * to prevent starvation and lockup detector warnings.
> > + */
> > + if (may_block && addr < end)
> > + cond_resched_lock(&kvm->mmu_lock);
> > }
> > }
> >
> > @@ -405,7 +413,6 @@ static int stage2_ioremap(struct kvm *kvm, gpa_t gpa,
> > phys_addr_t hpa,
> > out:
> > stage2_cache_flush(&pcache);
> > return ret;
> > -
> > }
> >
> > void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm, @@
> > -547,7 +554,7 @@ int kvm_arch_prepare_memory_region(struct kvm *kvm,
> > spin_lock(&kvm->mmu_lock);
> > if (ret)
> > stage2_unmap_range(kvm, mem->guest_phys_addr,
> > - mem->memory_size);
> > + mem->memory_size, false);
> > spin_unlock(&kvm->mmu_lock);
> >
> > out:
> > @@ -555,6 +562,73 @@ int kvm_arch_prepare_memory_region(struct kvm
> > *kvm,
> > return ret;
> > }
> >
> > +bool kvm_unmap_gfn_range(struct kvm *kvm, struct kvm_gfn_range *range)
> > +{
> > + if (!kvm->arch.pgd)
> > + return 0;
> > +
> > + stage2_unmap_range(kvm, range->start << PAGE_SHIFT,
> > + (range->end - range->start) << PAGE_SHIFT,
> > + range->may_block);
> > + return 0;
> > +}
> > +
> > +bool kvm_set_spte_gfn(struct kvm *kvm, struct kvm_gfn_range *range) {
> > + int ret;
> > + kvm_pfn_t pfn = pte_pfn(range->pte);
> > +
> > + if (!kvm->arch.pgd)
> > + return 0;
> > +
> > + WARN_ON(range->end - range->start != 1);
> > +
> > + ret = stage2_map_page(kvm, NULL, range->start << PAGE_SHIFT,
> > + __pfn_to_phys(pfn), PAGE_SIZE, true, true);
> > + if (ret) {
> > + kvm_err("Failed to map stage2 page (error %d)\n", ret);
> > + return 1;
> > + }
>
> Hi, Anup
>
> I think that it is not appropriate to add kvm_err here, because stage2_set_pte function
> may apply for memory based on the pcache parameter. If the value of pcache is NULL,
> stage2_set_pte function considers that there is not enough memory and here an invalid
> error log is generated.
>
> As an example, this error log is printed when a VM is migrating. But finally the VM migration
> is successful. And if the kvm_err is added to the same position in the ARM architecture, the
> same error log is also printed.
Okay, I have converted kvm_err() to kvm_debug(). In the future, we can totally
remove it as well.
Please try riscv_kvm_v20 branch at:
https://github.com/avpatel/linux.git
Regards,
Anup
>
> Mingwang
>
> > + return 0;
> > +}
> > +
>
next prev parent reply other threads:[~2021-08-04 7:17 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-27 5:54 [PATCH v19 00/17] KVM RISC-V Support Anup Patel
2021-07-27 5:54 ` [PATCH v19 01/17] RISC-V: Add hypervisor extension related CSR defines Anup Patel
2021-07-27 5:54 ` [PATCH v19 02/17] RISC-V: Add initial skeletal KVM support Anup Patel
2021-07-27 5:54 ` [PATCH v19 03/17] RISC-V: KVM: Implement VCPU create, init and destroy functions Anup Patel
2021-07-27 5:54 ` [PATCH v19 04/17] RISC-V: KVM: Implement VCPU interrupts and requests handling Anup Patel
2021-07-27 5:54 ` [PATCH v19 05/17] RISC-V: KVM: Implement KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctls Anup Patel
2021-07-27 5:54 ` [PATCH v19 06/17] RISC-V: KVM: Implement VCPU world-switch Anup Patel
2021-07-27 5:54 ` [PATCH v19 07/17] RISC-V: KVM: Handle MMIO exits for VCPU Anup Patel
2021-07-27 5:54 ` [PATCH v19 08/17] RISC-V: KVM: Handle WFI " Anup Patel
2021-07-27 5:54 ` [PATCH v19 09/17] RISC-V: KVM: Implement VMID allocator Anup Patel
2021-07-27 5:54 ` [PATCH v19 10/17] RISC-V: KVM: Implement stage2 page table programming Anup Patel
2021-07-27 5:54 ` [PATCH v19 11/17] RISC-V: KVM: Implement MMU notifiers Anup Patel
2021-08-03 13:19 ` limingwang (A)
2021-08-04 7:16 ` Anup Patel [this message]
2021-07-27 5:54 ` [PATCH v19 12/17] RISC-V: KVM: Add timer functionality Anup Patel
2021-07-27 5:54 ` [PATCH v19 13/17] RISC-V: KVM: FP lazy save/restore Anup Patel
2021-09-13 4:30 ` Vincent Chen
2021-09-13 5:04 ` Anup Patel
2021-09-13 7:11 ` Vincent Chen
2021-07-27 5:54 ` [PATCH v19 14/17] RISC-V: KVM: Implement ONE REG interface for FP registers Anup Patel
2021-07-27 5:54 ` [PATCH v19 15/17] RISC-V: KVM: Add SBI v0.1 support Anup Patel
2021-07-27 5:54 ` [PATCH v19 16/17] RISC-V: KVM: Document RISC-V specific parts of KVM API Anup Patel
2021-07-27 5:54 ` [PATCH v19 17/17] RISC-V: KVM: Add MAINTAINERS entry Anup Patel
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=CAAhSdy2jCQQScw9KMwHy-c7Mgkaq5xB95qmjypJEYbb+0q3_Tg@mail.gmail.com \
--to=anup@brainfault.org \
--cc=Alistair.Francis@wdc.com \
--cc=anup.patel@wdc.com \
--cc=aou@eecs.berkeley.edu \
--cc=atish.patra@wdc.com \
--cc=damien.lemoal@wdc.com \
--cc=graf@amazon.com \
--cc=kvm-riscv@lists.infradead.org \
--cc=kvm@vger.kernel.org \
--cc=limingwang@huawei.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=palmer@dabbelt.com \
--cc=palmerdabbelt@google.com \
--cc=paul.walmsley@sifive.com \
--cc=pbonzini@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).