linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Anup Patel <anup@brainfault.org>
To: Rob Herring <robh@kernel.org>
Cc: Anup Patel <anup.patel@wdc.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	"Rafael J . Wysocki" <rjw@rjwysocki.net>,
	linux-riscv <linux-riscv@lists.infradead.org>,
	Sandeep Tripathy <milun.tripathy@gmail.com>,
	Ulf Hansson <ulf.hansson@linaro.org>,
	Atish Patra <atish.patra@wdc.com>,
	"open list:THERMAL" <linux-pm@vger.kernel.org>,
	Palmer Dabbelt <palmerdabbelt@google.com>,
	Alistair Francis <Alistair.Francis@wdc.com>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org List"
	<linux-kernel@vger.kernel.org>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	DTML <devicetree@vger.kernel.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Rob Herring <robh+dt@kernel.org>, Liush <liush@allwinnertech.com>,
	Pavel Machek <pavel@ucw.cz>
Subject: Re: [PATCH v6 7/8] dt-bindings: Add common bindings for ARM and RISC-V idle states
Date: Thu, 10 Jun 2021 09:54:18 +0530	[thread overview]
Message-ID: <CAAhSdy2yqqdCJCaUkX8Ld8yUQcuGQx6c-TAVaNNVehgNHsjwzQ@mail.gmail.com> (raw)
In-Reply-To: <1623255403.618479.3763295.nullmailer@robh.at.kernel.org>

On Wed, Jun 9, 2021 at 9:46 PM Rob Herring <robh@kernel.org> wrote:
>
> On Wed, 09 Jun 2021 17:57:14 +0530, Anup Patel wrote:
> > The RISC-V CPU idle states will be described in under the
> > /cpus/idle-states DT node in the same way as ARM CPU idle
> > states.
> >
> > This patch adds common bindings documentation for both ARM
> > and RISC-V idle states.
> >
> > Signed-off-by: Anup Patel <anup.patel@wdc.com>
> > Reviewed-by: Rob Herring <robh@kernel.org>
> > ---
> >  .../bindings/{arm => cpu}/idle-states.yaml    | 228 ++++++++++++++++--
> >  .../devicetree/bindings/riscv/cpus.yaml       |   6 +
> >  2 files changed, 217 insertions(+), 17 deletions(-)
> >  rename Documentation/devicetree/bindings/{arm => cpu}/idle-states.yaml (74%)
> >
>
> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> on your patch (DT_CHECKER_FLAGS is new in v5.13):
>
> yamllint warnings/errors:
>
> dtschema/dtc warnings/errors:
>
> \ndoc reference errors (make refcheckdocs):
> Warning: Documentation/devicetree/bindings/arm/msm/qcom,idle-state.txt references a file that doesn't exist: Documentation/devicetree/bindings/arm/idle-states.yaml
> Warning: Documentation/devicetree/bindings/arm/psci.yaml references a file that doesn't exist: Documentation/devicetree/bindings/arm/idle-states.yaml
> Documentation/devicetree/bindings/arm/msm/qcom,idle-state.txt: Documentation/devicetree/bindings/arm/idle-states.yaml
> Documentation/devicetree/bindings/arm/psci.yaml: Documentation/devicetree/bindings/arm/idle-states.yaml
>
> See https://patchwork.ozlabs.org/patch/1489849
>
> This check can fail if there are any dependencies. The base for a patch
> series is generally the most recent rc1.
>
> If you already ran 'make dt_binding_check' and didn't see the above
> error(s), then make sure 'yamllint' is installed and dt-schema is up to
> date:
>
> pip3 install dtschema --upgrade
>
> Please check and re-submit.
>

Sure, I will quickly fix this one and send a v7 revision

Regards,
Anup

  reply	other threads:[~2021-06-10  4:24 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-09 12:27 [PATCH v6 0/8] RISC-V CPU Idle Support Anup Patel
2021-06-09 12:27 ` [PATCH v6 1/8] RISC-V: Enable CPU_IDLE drivers Anup Patel
2021-06-09 12:27 ` [PATCH v6 2/8] RISC-V: Rename relocate() and make it global Anup Patel
2021-06-09 12:27 ` [PATCH v6 3/8] RISC-V: Add arch functions for non-retentive suspend entry/exit Anup Patel
2021-06-09 12:27 ` [PATCH v6 4/8] RISC-V: Add SBI HSM suspend related defines Anup Patel
2021-06-09 12:27 ` [PATCH v6 5/8] cpuidle: Factor-out power domain related code from PSCI domain driver Anup Patel
2021-06-09 12:27 ` [PATCH v6 6/8] cpuidle: Add RISC-V SBI CPU idle driver Anup Patel
2021-06-09 12:27 ` [PATCH v6 7/8] dt-bindings: Add common bindings for ARM and RISC-V idle states Anup Patel
2021-06-09 16:16   ` Rob Herring
2021-06-10  4:24     ` Anup Patel [this message]
2021-06-09 12:27 ` [PATCH v6 8/8] RISC-V: Enable RISC-V SBI CPU Idle driver for QEMU virt machine Anup Patel

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=CAAhSdy2yqqdCJCaUkX8Ld8yUQcuGQx6c-TAVaNNVehgNHsjwzQ@mail.gmail.com \
    --to=anup@brainfault.org \
    --cc=Alistair.Francis@wdc.com \
    --cc=anup.patel@wdc.com \
    --cc=aou@eecs.berkeley.edu \
    --cc=atish.patra@wdc.com \
    --cc=daniel.lezcano@linaro.org \
    --cc=devicetree@vger.kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pm@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=liush@allwinnertech.com \
    --cc=milun.tripathy@gmail.com \
    --cc=palmer@dabbelt.com \
    --cc=palmerdabbelt@google.com \
    --cc=paul.walmsley@sifive.com \
    --cc=pavel@ucw.cz \
    --cc=rjw@rjwysocki.net \
    --cc=robh+dt@kernel.org \
    --cc=robh@kernel.org \
    --cc=ulf.hansson@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).