[PATCH 0/12] RISC-V: Clean up the defconfigs

[PATCH 0/12] RISC-V: Clean up the defconfigs

[Palmer Dabbelt]

It's been a while since updating the defconfigs, so I figured it would
be good to go through all the diff to make sure nothing was lurking.  It
turns out there were two minor issues, which I've fixed with the first
two patches.  The rest of these are just cleanups that should have no
functional change.

I don't have a K210 (I might somewhere, but I've yet to boot it) so I
can't test this to make sure, but I think patch 2 is the reason we have
a special !MMU PAGE_OFFSET config.  If someone does have one it'd be
nice to be able to remove that special case.

[PATCH 01/12] RISC-V: defconfigs: Set CONFIG_FB=y, for FB console

[Palmer Dabbelt]

From: Palmer Dabbelt <palmer@rivosinc.com>

We have CONFIG_FRAMEBUFFER_CONSOLE=y in the defconfigs, but that depends
on CONFIG_FB so it's not actually getting set.  I'm assuming most users
on real systems want a framebuffer console, so this enables CONFIG_FB to
allow that to take effect.

Fixes: 33c57c0d3c67 ("RISC-V: Add a basic defconfig")
Cc: stable@vger.kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
---
 arch/riscv/configs/defconfig      | 1 +
 arch/riscv/configs/rv32_defconfig | 1 +
 2 files changed, 2 insertions(+)

diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index ef473e2f503b..11de2ab9ed6e 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -78,6 +78,7 @@ CONFIG_DRM=m
 CONFIG_DRM_RADEON=m
 CONFIG_DRM_NOUVEAU=m
 CONFIG_DRM_VIRTIO_GPU=m
+CONFIG_FB=y
 CONFIG_FRAMEBUFFER_CONSOLE=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
index 6e9f12ff968a..05b6f17adbc1 100644
--- a/arch/riscv/configs/rv32_defconfig
+++ b/arch/riscv/configs/rv32_defconfig
@@ -73,6 +73,7 @@ CONFIG_POWER_RESET=y
 CONFIG_DRM=y
 CONFIG_DRM_RADEON=y
 CONFIG_DRM_VIRTIO_GPU=y
+CONFIG_FB=y
 CONFIG_FRAMEBUFFER_CONSOLE=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
-- 
2.32.0

[PATCH 02/12] RISC-V: MAXPHYSMEM_2GB doesn't depend on CMODEL_MEDLOW

[Palmer Dabbelt]

From: Palmer Dabbelt <palmer@rivosinc.com>

For non-relocatable kernels we need to be able to link the kernel at
approximately PAGE_OFFSET, thus requiring medany (as medlow requires the
code to be linked within 2GiB of 0).  The inverse doesn't apply, though:
since medany code can be linked anywhere it's fine to link it close to
0, so we can support the smaller memory config.

Fixes: de5f4b8f634b ("RISC-V: Define MAXPHYSMEM_1GB only for RV32")
Cc: stable@vger.kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

---

I found this when going through the savedefconfig diffs for the K210
defconfigs.  I'm not entirely sure they're doing the right thing here
(they should probably be setting CMODEL_LOW to take advantage of the
better code generation), but I don't have any way to test those
platforms so I don't want to change too much.
---
 arch/riscv/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 821252b65f89..61f64512dcde 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -280,7 +280,7 @@ choice
 		depends on 32BIT
 		bool "1GiB"
 	config MAXPHYSMEM_2GB
-		depends on 64BIT && CMODEL_MEDLOW
+		depends on 64BIT
 		bool "2GiB"
 	config MAXPHYSMEM_128GB
 		depends on 64BIT && CMODEL_MEDANY
-- 
2.32.0

[PATCH 03/12] RISC-V: defconfigs: Sort CONFIG_BPF_SYSCALL

[Palmer Dabbelt]

From: Palmer Dabbelt <palmer@rivosinc.com>

This should have no functional change, it just sorts CONFIG_BPF_SYSCALL
the same way savedefconfig does.

Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
---
 arch/riscv/configs/defconfig      | 2 +-
 arch/riscv/configs/rv32_defconfig | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index 11de2ab9ed6e..a6cb99cf4d3c 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -2,6 +2,7 @@ CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 CONFIG_NO_HZ_IDLE=y
 CONFIG_HIGH_RES_TIMERS=y
+CONFIG_BPF_SYSCALL=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_CGROUPS=y
@@ -13,7 +14,6 @@ CONFIG_USER_NS=y
 CONFIG_CHECKPOINT_RESTORE=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_EXPERT=y
-CONFIG_BPF_SYSCALL=y
 CONFIG_SOC_SIFIVE=y
 CONFIG_SOC_VIRT=y
 CONFIG_SOC_MICROCHIP_POLARFIRE=y
diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
index 05b6f17adbc1..8a57c940d5ef 100644
--- a/arch/riscv/configs/rv32_defconfig
+++ b/arch/riscv/configs/rv32_defconfig
@@ -2,6 +2,7 @@ CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 CONFIG_NO_HZ_IDLE=y
 CONFIG_HIGH_RES_TIMERS=y
+CONFIG_BPF_SYSCALL=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_CGROUPS=y
@@ -13,7 +14,6 @@ CONFIG_USER_NS=y
 CONFIG_CHECKPOINT_RESTORE=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_EXPERT=y
-CONFIG_BPF_SYSCALL=y
 CONFIG_SOC_SIFIVE=y
 CONFIG_SOC_VIRT=y
 CONFIG_ARCH_RV32I=y
-- 
2.32.0

[PATCH 04/12] RISC-V: defconfigs: Sort CONFIG_SYSFS_SYSCALL

[Palmer Dabbelt]

From: Palmer Dabbelt <palmer@rivosinc.com>

This should have no functional change, it just sorts
CONFIG_SYSFS_SYSCALL the same way savedefconfig does.

Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
---
 arch/riscv/configs/defconfig      | 2 +-
 arch/riscv/configs/rv32_defconfig | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index a6cb99cf4d3c..96c2a3615bcd 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -14,6 +14,7 @@ CONFIG_USER_NS=y
 CONFIG_CHECKPOINT_RESTORE=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_EXPERT=y
+# CONFIG_SYSFS_SYSCALL is not set
 CONFIG_SOC_SIFIVE=y
 CONFIG_SOC_VIRT=y
 CONFIG_SOC_MICROCHIP_POLARFIRE=y
@@ -143,5 +144,4 @@ CONFIG_RCU_EQS_DEBUG=y
 # CONFIG_FTRACE is not set
 # CONFIG_RUNTIME_TESTING_MENU is not set
 CONFIG_MEMTEST=y
-# CONFIG_SYSFS_SYSCALL is not set
 CONFIG_EFI=y
diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
index 8a57c940d5ef..1f6808aa1261 100644
--- a/arch/riscv/configs/rv32_defconfig
+++ b/arch/riscv/configs/rv32_defconfig
@@ -14,6 +14,7 @@ CONFIG_USER_NS=y
 CONFIG_CHECKPOINT_RESTORE=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_EXPERT=y
+# CONFIG_SYSFS_SYSCALL is not set
 CONFIG_SOC_SIFIVE=y
 CONFIG_SOC_VIRT=y
 CONFIG_ARCH_RV32I=y
@@ -133,4 +134,3 @@ CONFIG_RCU_EQS_DEBUG=y
 # CONFIG_FTRACE is not set
 # CONFIG_RUNTIME_TESTING_MENU is not set
 CONFIG_MEMTEST=y
-# CONFIG_SYSFS_SYSCALL is not set
-- 
2.32.0

[PATCH 05/12] RISC-V: defconfigs: Sort CONFIG_SOC_POLARFIRE

[Palmer Dabbelt]

From: Palmer Dabbelt <palmer@rivosinc.com>

This should have no functional change, it just sorts
CONFIG_SOC_POLARFIRE the same way savedefconfig does.

Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
---
 arch/riscv/configs/defconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index 96c2a3615bcd..0f4fe5790fb5 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -15,9 +15,9 @@ CONFIG_CHECKPOINT_RESTORE=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_EXPERT=y
 # CONFIG_SYSFS_SYSCALL is not set
+CONFIG_SOC_MICROCHIP_POLARFIRE=y
 CONFIG_SOC_SIFIVE=y
 CONFIG_SOC_VIRT=y
-CONFIG_SOC_MICROCHIP_POLARFIRE=y
 CONFIG_SMP=y
 CONFIG_HOTPLUG_CPU=y
 CONFIG_VIRTUALIZATION=y
-- 
2.32.0

[PATCH 06/12] RISC-V: defconfigs: Sort CONFIG_PTP_1588_CLOCK

[Palmer Dabbelt]

From: Palmer Dabbelt <palmer@rivosinc.com>

This should have no functional change, it just sorts
CONFIG_PTP_1588_CLOCK the same way savedefconfig does.  This only
touches the rv64 defconfig because rv32_defconfig was already sorted
correctly.

Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
---
 arch/riscv/configs/defconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index 0f4fe5790fb5..fa9017c60b3d 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -71,9 +71,9 @@ CONFIG_HW_RANDOM=y
 CONFIG_HW_RANDOM_VIRTIO=y
 CONFIG_SPI=y
 CONFIG_SPI_SIFIVE=y
+# CONFIG_PTP_1588_CLOCK is not set
 CONFIG_GPIOLIB=y
 CONFIG_GPIO_SIFIVE=y
-# CONFIG_PTP_1588_CLOCK is not set
 CONFIG_POWER_RESET=y
 CONFIG_DRM=m
 CONFIG_DRM_RADEON=m
-- 
2.32.0

[PATCH 07/12] RISC-V: defconfigs: Sort CONFIG_MMC

[Palmer Dabbelt]

From: Palmer Dabbelt <palmer@rivosinc.com>

This should have no functional change, it just sorts CONFIG_MMC the same
way savedefconfig does.  This only touches the rv64 defconfig because
rv32_defconfig was already sorted correctly.

Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
---
 arch/riscv/configs/defconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index fa9017c60b3d..ec9540392df7 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -90,10 +90,10 @@ CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_OHCI_HCD_PLATFORM=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_UAS=y
+CONFIG_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_PLTFM=y
 CONFIG_MMC_SDHCI_CADENCE=y
-CONFIG_MMC=y
 CONFIG_MMC_SPI=y
 CONFIG_RTC_CLASS=y
 CONFIG_VIRTIO_PCI=y
-- 
2.32.0

[PATCH 08/12] RISC-V: defconfigs: Sort CONFIG_SURFACE_PLATFORMS

[Palmer Dabbelt]

From: Palmer Dabbelt <palmer@rivosinc.com>

This should have no functional change, it just sorts
CONFIG_SURFACE_PLATFORMS the same way savedefconfig does.

Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
---
 arch/riscv/configs/nommu_k210_defconfig        | 1 -
 arch/riscv/configs/nommu_k210_sdcard_defconfig | 1 -
 2 files changed, 2 deletions(-)

diff --git a/arch/riscv/configs/nommu_k210_defconfig b/arch/riscv/configs/nommu_k210_defconfig
index b16a2a12c82a..89ab76349ea8 100644
--- a/arch/riscv/configs/nommu_k210_defconfig
+++ b/arch/riscv/configs/nommu_k210_defconfig
@@ -75,7 +75,6 @@ CONFIG_LEDS_GPIO=y
 CONFIG_LEDS_USER=y
 # CONFIG_VIRTIO_MENU is not set
 # CONFIG_VHOST_MENU is not set
-# CONFIG_SURFACE_PLATFORMS is not set
 # CONFIG_FILE_LOCKING is not set
 # CONFIG_DNOTIFY is not set
 # CONFIG_INOTIFY_USER is not set
diff --git a/arch/riscv/configs/nommu_k210_sdcard_defconfig b/arch/riscv/configs/nommu_k210_sdcard_defconfig
index 61f887f65419..690460f79925 100644
--- a/arch/riscv/configs/nommu_k210_sdcard_defconfig
+++ b/arch/riscv/configs/nommu_k210_sdcard_defconfig
@@ -72,7 +72,6 @@ CONFIG_LEDS_GPIO=y
 CONFIG_LEDS_USER=y
 # CONFIG_VIRTIO_MENU is not set
 # CONFIG_VHOST_MENU is not set
-# CONFIG_SURFACE_PLATFORMS is not set
 CONFIG_EXT2_FS=y
 # CONFIG_FILE_LOCKING is not set
 # CONFIG_DNOTIFY is not set
-- 
2.32.0

[PATCH 09/12] RISC-V: defconfigs: Sort CONFIG_BLK_DEV_BSG

[Palmer Dabbelt]

From: Palmer Dabbelt <palmer@rivosinc.com>

This should have no functional change, it just sorts CONFIG_BLK_DEV_BSG
the same way savedefconfig does.

Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
---
 arch/riscv/configs/nommu_k210_sdcard_defconfig | 1 -
 arch/riscv/configs/nommu_virt_defconfig        | 1 -
 2 files changed, 2 deletions(-)

diff --git a/arch/riscv/configs/nommu_k210_sdcard_defconfig b/arch/riscv/configs/nommu_k210_sdcard_defconfig
index 690460f79925..84b87f8bfc8f 100644
--- a/arch/riscv/configs/nommu_k210_sdcard_defconfig
+++ b/arch/riscv/configs/nommu_k210_sdcard_defconfig
@@ -30,7 +30,6 @@ CONFIG_CMDLINE_FORCE=y
 # CONFIG_SECCOMP is not set
 # CONFIG_STACKPROTECTOR is not set
 # CONFIG_GCC_PLUGINS is not set
-# CONFIG_BLK_DEV_BSG is not set
 # CONFIG_MQ_IOSCHED_DEADLINE is not set
 # CONFIG_MQ_IOSCHED_KYBER is not set
 CONFIG_BINFMT_FLAT=y
diff --git a/arch/riscv/configs/nommu_virt_defconfig b/arch/riscv/configs/nommu_virt_defconfig
index e046a0babde4..385cca741b01 100644
--- a/arch/riscv/configs/nommu_virt_defconfig
+++ b/arch/riscv/configs/nommu_virt_defconfig
@@ -32,7 +32,6 @@ CONFIG_SMP=y
 CONFIG_CMDLINE="root=/dev/vda rw earlycon=uart8250,mmio,0x10000000,115200n8 console=ttyS0"
 CONFIG_CMDLINE_FORCE=y
 CONFIG_JUMP_LABEL=y
-# CONFIG_BLK_DEV_BSG is not set
 CONFIG_PARTITION_ADVANCED=y
 # CONFIG_MSDOS_PARTITION is not set
 # CONFIG_EFI_PARTITION is not set
-- 
2.32.0

[PATCH 10/12] RISC-V: defconfigs: Remove redundant CONFIG_POWER_RESET

[Palmer Dabbelt]

From: Palmer Dabbelt <palmer@rivosinc.com>

As of ab7fbad0c7d7 ("riscv: Fix unmet direct dependencies built based on
SOC_VIRT") we select CONFIG_POWER_RESET=y along with CONFIG_SOC_VIRT,
which is already in defconfig.  This make setting CONFIG_POWER_RESET in
the defconfigs redundant, so remove it to remain consistent with
savedefconfig.

Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
---
 arch/riscv/configs/defconfig      | 1 -
 arch/riscv/configs/rv32_defconfig | 1 -
 2 files changed, 2 deletions(-)

diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index ec9540392df7..a72dbd74b93d 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -74,7 +74,6 @@ CONFIG_SPI_SIFIVE=y
 # CONFIG_PTP_1588_CLOCK is not set
 CONFIG_GPIOLIB=y
 CONFIG_GPIO_SIFIVE=y
-CONFIG_POWER_RESET=y
 CONFIG_DRM=m
 CONFIG_DRM_RADEON=m
 CONFIG_DRM_NOUVEAU=m
diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
index 1f6808aa1261..8b56a7f1eb06 100644
--- a/arch/riscv/configs/rv32_defconfig
+++ b/arch/riscv/configs/rv32_defconfig
@@ -70,7 +70,6 @@ CONFIG_HW_RANDOM_VIRTIO=y
 CONFIG_SPI=y
 CONFIG_SPI_SIFIVE=y
 # CONFIG_PTP_1588_CLOCK is not set
-CONFIG_POWER_RESET=y
 CONFIG_DRM=y
 CONFIG_DRM_RADEON=y
 CONFIG_DRM_VIRTIO_GPU=y
-- 
2.32.0

[PATCH 11/12] RISC-V: defconfigs: Remove redundant CONFIG_EFI=y

[Palmer Dabbelt]

From: Palmer Dabbelt <palmer@rivosinc.com>

We've always had CONFIG_EFI as "def_bool y" so this has always been
redundant.  It's removed by savedefconfig, so drop it to keep things
clean.

Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
---
 arch/riscv/configs/defconfig | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index a72dbd74b93d..f120fcc43d0a 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -143,4 +143,3 @@ CONFIG_RCU_EQS_DEBUG=y
 # CONFIG_FTRACE is not set
 # CONFIG_RUNTIME_TESTING_MENU is not set
 CONFIG_MEMTEST=y
-CONFIG_EFI=y
-- 
2.32.0

[PATCH 12/12] RISC-V: defconfigs: Remove redundant K210 DT source

[Palmer Dabbelt]

From: Palmer Dabbelt <palmer@rivosinc.com>

The "k210_generic" DT has been the default in Kconfig since 7d96729a9e7
("riscv: Update Canaan Kendryte K210 device tree"), so drop it from the
defconfigs to avoid diff with savedefconfig.

Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
---
 arch/riscv/configs/nommu_k210_defconfig        | 1 -
 arch/riscv/configs/nommu_k210_sdcard_defconfig | 1 -
 2 files changed, 2 deletions(-)

diff --git a/arch/riscv/configs/nommu_k210_defconfig b/arch/riscv/configs/nommu_k210_defconfig
index 89ab76349ea8..e8ceab678e8b 100644
--- a/arch/riscv/configs/nommu_k210_defconfig
+++ b/arch/riscv/configs/nommu_k210_defconfig
@@ -29,7 +29,6 @@ CONFIG_EMBEDDED=y
 CONFIG_SLOB=y
 # CONFIG_MMU is not set
 CONFIG_SOC_CANAAN=y
-CONFIG_SOC_CANAAN_K210_DTB_SOURCE="k210_generic"
 CONFIG_MAXPHYSMEM_2GB=y
 CONFIG_SMP=y
 CONFIG_NR_CPUS=2
diff --git a/arch/riscv/configs/nommu_k210_sdcard_defconfig b/arch/riscv/configs/nommu_k210_sdcard_defconfig
index 84b87f8bfc8f..46aa3879f19c 100644
--- a/arch/riscv/configs/nommu_k210_sdcard_defconfig
+++ b/arch/riscv/configs/nommu_k210_sdcard_defconfig
@@ -21,7 +21,6 @@ CONFIG_EMBEDDED=y
 CONFIG_SLOB=y
 # CONFIG_MMU is not set
 CONFIG_SOC_CANAAN=y
-CONFIG_SOC_CANAAN_K210_DTB_SOURCE="k210_generic"
 CONFIG_MAXPHYSMEM_2GB=y
 CONFIG_SMP=y
 CONFIG_NR_CPUS=2
-- 
2.32.0

Re: [PATCH 01/12] RISC-V: defconfigs: Set CONFIG_FB=y, for FB console

[Anup Patel]

On Fri, Nov 19, 2021 at 10:14 PM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>
> From: Palmer Dabbelt <palmer@rivosinc.com>
>
> We have CONFIG_FRAMEBUFFER_CONSOLE=y in the defconfigs, but that depends
> on CONFIG_FB so it's not actually getting set.  I'm assuming most users
> on real systems want a framebuffer console, so this enables CONFIG_FB to
> allow that to take effect.
>
> Fixes: 33c57c0d3c67 ("RISC-V: Add a basic defconfig")
> Cc: stable@vger.kernel.org
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

Looks good to me.

Reviewed-by: Anup Patel <anup@brainfault.org>

Regards,
Anup

> ---
>  arch/riscv/configs/defconfig      | 1 +
>  arch/riscv/configs/rv32_defconfig | 1 +
>  2 files changed, 2 insertions(+)
>
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index ef473e2f503b..11de2ab9ed6e 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -78,6 +78,7 @@ CONFIG_DRM=m
>  CONFIG_DRM_RADEON=m
>  CONFIG_DRM_NOUVEAU=m
>  CONFIG_DRM_VIRTIO_GPU=m
> +CONFIG_FB=y
>  CONFIG_FRAMEBUFFER_CONSOLE=y
>  CONFIG_USB=y
>  CONFIG_USB_XHCI_HCD=y
> diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
> index 6e9f12ff968a..05b6f17adbc1 100644
> --- a/arch/riscv/configs/rv32_defconfig
> +++ b/arch/riscv/configs/rv32_defconfig
> @@ -73,6 +73,7 @@ CONFIG_POWER_RESET=y
>  CONFIG_DRM=y
>  CONFIG_DRM_RADEON=y
>  CONFIG_DRM_VIRTIO_GPU=y
> +CONFIG_FB=y
>  CONFIG_FRAMEBUFFER_CONSOLE=y
>  CONFIG_USB=y
>  CONFIG_USB_XHCI_HCD=y
> --
> 2.32.0
>

Re: [PATCH 02/12] RISC-V: MAXPHYSMEM_2GB doesn't depend on CMODEL_MEDLOW

[Anup Patel]

On Fri, Nov 19, 2021 at 10:14 PM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>
> From: Palmer Dabbelt <palmer@rivosinc.com>
>
> For non-relocatable kernels we need to be able to link the kernel at
> approximately PAGE_OFFSET, thus requiring medany (as medlow requires the
> code to be linked within 2GiB of 0).  The inverse doesn't apply, though:
> since medany code can be linked anywhere it's fine to link it close to
> 0, so we can support the smaller memory config.
>
> Fixes: de5f4b8f634b ("RISC-V: Define MAXPHYSMEM_1GB only for RV32")
> Cc: stable@vger.kernel.org
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

Looks good to me.

Reviewed-by: Anup Patel <anup@brainfault.org>

Regards,
Anup

>
> ---
>
> I found this when going through the savedefconfig diffs for the K210
> defconfigs.  I'm not entirely sure they're doing the right thing here
> (they should probably be setting CMODEL_LOW to take advantage of the
> better code generation), but I don't have any way to test those
> platforms so I don't want to change too much.
> ---
>  arch/riscv/Kconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index 821252b65f89..61f64512dcde 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -280,7 +280,7 @@ choice
>                 depends on 32BIT
>                 bool "1GiB"
>         config MAXPHYSMEM_2GB
> -               depends on 64BIT && CMODEL_MEDLOW
> +               depends on 64BIT
>                 bool "2GiB"
>         config MAXPHYSMEM_128GB
>                 depends on 64BIT && CMODEL_MEDANY
> --
> 2.32.0
>

Re: [PATCH 03/12] RISC-V: defconfigs: Sort CONFIG_BPF_SYSCALL

[Anup Patel]

On Fri, Nov 19, 2021 at 10:14 PM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>
> From: Palmer Dabbelt <palmer@rivosinc.com>
>
> This should have no functional change, it just sorts CONFIG_BPF_SYSCALL
> the same way savedefconfig does.
>
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

Looks good to me.

Reviewed-by: Anup Patel <anup@brainfault.org>

Regards,
Anup

> ---
>  arch/riscv/configs/defconfig      | 2 +-
>  arch/riscv/configs/rv32_defconfig | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index 11de2ab9ed6e..a6cb99cf4d3c 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -2,6 +2,7 @@ CONFIG_SYSVIPC=y
>  CONFIG_POSIX_MQUEUE=y
>  CONFIG_NO_HZ_IDLE=y
>  CONFIG_HIGH_RES_TIMERS=y
> +CONFIG_BPF_SYSCALL=y
>  CONFIG_IKCONFIG=y
>  CONFIG_IKCONFIG_PROC=y
>  CONFIG_CGROUPS=y
> @@ -13,7 +14,6 @@ CONFIG_USER_NS=y
>  CONFIG_CHECKPOINT_RESTORE=y
>  CONFIG_BLK_DEV_INITRD=y
>  CONFIG_EXPERT=y
> -CONFIG_BPF_SYSCALL=y
>  CONFIG_SOC_SIFIVE=y
>  CONFIG_SOC_VIRT=y
>  CONFIG_SOC_MICROCHIP_POLARFIRE=y
> diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
> index 05b6f17adbc1..8a57c940d5ef 100644
> --- a/arch/riscv/configs/rv32_defconfig
> +++ b/arch/riscv/configs/rv32_defconfig
> @@ -2,6 +2,7 @@ CONFIG_SYSVIPC=y
>  CONFIG_POSIX_MQUEUE=y
>  CONFIG_NO_HZ_IDLE=y
>  CONFIG_HIGH_RES_TIMERS=y
> +CONFIG_BPF_SYSCALL=y
>  CONFIG_IKCONFIG=y
>  CONFIG_IKCONFIG_PROC=y
>  CONFIG_CGROUPS=y
> @@ -13,7 +14,6 @@ CONFIG_USER_NS=y
>  CONFIG_CHECKPOINT_RESTORE=y
>  CONFIG_BLK_DEV_INITRD=y
>  CONFIG_EXPERT=y
> -CONFIG_BPF_SYSCALL=y
>  CONFIG_SOC_SIFIVE=y
>  CONFIG_SOC_VIRT=y
>  CONFIG_ARCH_RV32I=y
> --
> 2.32.0
>

Re: [PATCH 04/12] RISC-V: defconfigs: Sort CONFIG_SYSFS_SYSCALL

[Anup Patel]

On Fri, Nov 19, 2021 at 10:15 PM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>
> From: Palmer Dabbelt <palmer@rivosinc.com>
>
> This should have no functional change, it just sorts
> CONFIG_SYSFS_SYSCALL the same way savedefconfig does.
>
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

Looks good to me.

Reviewed-by: Anup Patel <anup@brainfault.org>

Regards,
Anup

> ---
>  arch/riscv/configs/defconfig      | 2 +-
>  arch/riscv/configs/rv32_defconfig | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index a6cb99cf4d3c..96c2a3615bcd 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -14,6 +14,7 @@ CONFIG_USER_NS=y
>  CONFIG_CHECKPOINT_RESTORE=y
>  CONFIG_BLK_DEV_INITRD=y
>  CONFIG_EXPERT=y
> +# CONFIG_SYSFS_SYSCALL is not set
>  CONFIG_SOC_SIFIVE=y
>  CONFIG_SOC_VIRT=y
>  CONFIG_SOC_MICROCHIP_POLARFIRE=y
> @@ -143,5 +144,4 @@ CONFIG_RCU_EQS_DEBUG=y
>  # CONFIG_FTRACE is not set
>  # CONFIG_RUNTIME_TESTING_MENU is not set
>  CONFIG_MEMTEST=y
> -# CONFIG_SYSFS_SYSCALL is not set
>  CONFIG_EFI=y
> diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
> index 8a57c940d5ef..1f6808aa1261 100644
> --- a/arch/riscv/configs/rv32_defconfig
> +++ b/arch/riscv/configs/rv32_defconfig
> @@ -14,6 +14,7 @@ CONFIG_USER_NS=y
>  CONFIG_CHECKPOINT_RESTORE=y
>  CONFIG_BLK_DEV_INITRD=y
>  CONFIG_EXPERT=y
> +# CONFIG_SYSFS_SYSCALL is not set
>  CONFIG_SOC_SIFIVE=y
>  CONFIG_SOC_VIRT=y
>  CONFIG_ARCH_RV32I=y
> @@ -133,4 +134,3 @@ CONFIG_RCU_EQS_DEBUG=y
>  # CONFIG_FTRACE is not set
>  # CONFIG_RUNTIME_TESTING_MENU is not set
>  CONFIG_MEMTEST=y
> -# CONFIG_SYSFS_SYSCALL is not set
> --
> 2.32.0
>

Re: [PATCH 05/12] RISC-V: defconfigs: Sort CONFIG_SOC_POLARFIRE

[Anup Patel]

On Fri, Nov 19, 2021 at 10:15 PM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>
> From: Palmer Dabbelt <palmer@rivosinc.com>
>
> This should have no functional change, it just sorts
> CONFIG_SOC_POLARFIRE the same way savedefconfig does.
>
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

Looks good to me.

Reviewed-by: Anup Patel <anup@brainfault.org>

Regards,
Anup

> ---
>  arch/riscv/configs/defconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index 96c2a3615bcd..0f4fe5790fb5 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -15,9 +15,9 @@ CONFIG_CHECKPOINT_RESTORE=y
>  CONFIG_BLK_DEV_INITRD=y
>  CONFIG_EXPERT=y
>  # CONFIG_SYSFS_SYSCALL is not set
> +CONFIG_SOC_MICROCHIP_POLARFIRE=y
>  CONFIG_SOC_SIFIVE=y
>  CONFIG_SOC_VIRT=y
> -CONFIG_SOC_MICROCHIP_POLARFIRE=y
>  CONFIG_SMP=y
>  CONFIG_HOTPLUG_CPU=y
>  CONFIG_VIRTUALIZATION=y
> --
> 2.32.0
>

Re: [PATCH 06/12] RISC-V: defconfigs: Sort CONFIG_PTP_1588_CLOCK

[Anup Patel]

On Fri, Nov 19, 2021 at 10:15 PM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>
> From: Palmer Dabbelt <palmer@rivosinc.com>
>
> This should have no functional change, it just sorts
> CONFIG_PTP_1588_CLOCK the same way savedefconfig does.  This only
> touches the rv64 defconfig because rv32_defconfig was already sorted
> correctly.
>
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

Looks good to me.

Reviewed-by: Anup Patel <anup@brainfault.org>

Regards,
Anup

> ---
>  arch/riscv/configs/defconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index 0f4fe5790fb5..fa9017c60b3d 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -71,9 +71,9 @@ CONFIG_HW_RANDOM=y
>  CONFIG_HW_RANDOM_VIRTIO=y
>  CONFIG_SPI=y
>  CONFIG_SPI_SIFIVE=y
> +# CONFIG_PTP_1588_CLOCK is not set
>  CONFIG_GPIOLIB=y
>  CONFIG_GPIO_SIFIVE=y
> -# CONFIG_PTP_1588_CLOCK is not set
>  CONFIG_POWER_RESET=y
>  CONFIG_DRM=m
>  CONFIG_DRM_RADEON=m
> --
> 2.32.0
>

Re: [PATCH 07/12] RISC-V: defconfigs: Sort CONFIG_MMC

[Anup Patel]

On Fri, Nov 19, 2021 at 10:15 PM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>
> From: Palmer Dabbelt <palmer@rivosinc.com>
>
> This should have no functional change, it just sorts CONFIG_MMC the same
> way savedefconfig does.  This only touches the rv64 defconfig because
> rv32_defconfig was already sorted correctly.
>
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

Looks good to me.

Reviewed-by: Anup Patel <anup@brainfault.org>

Regards,
Anup

> ---
>  arch/riscv/configs/defconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index fa9017c60b3d..ec9540392df7 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -90,10 +90,10 @@ CONFIG_USB_OHCI_HCD=y
>  CONFIG_USB_OHCI_HCD_PLATFORM=y
>  CONFIG_USB_STORAGE=y
>  CONFIG_USB_UAS=y
> +CONFIG_MMC=y
>  CONFIG_MMC_SDHCI=y
>  CONFIG_MMC_SDHCI_PLTFM=y
>  CONFIG_MMC_SDHCI_CADENCE=y
> -CONFIG_MMC=y
>  CONFIG_MMC_SPI=y
>  CONFIG_RTC_CLASS=y
>  CONFIG_VIRTIO_PCI=y
> --
> 2.32.0
>

Re: [PATCH 08/12] RISC-V: defconfigs: Sort CONFIG_SURFACE_PLATFORMS

[Anup Patel]

On Fri, Nov 19, 2021 at 10:15 PM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>
> From: Palmer Dabbelt <palmer@rivosinc.com>
>
> This should have no functional change, it just sorts
> CONFIG_SURFACE_PLATFORMS the same way savedefconfig does.
>
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

Looks good to me.

Reviewed-by: Anup Patel <anup@brainfault.org>

Regards,
Anup

> ---
>  arch/riscv/configs/nommu_k210_defconfig        | 1 -
>  arch/riscv/configs/nommu_k210_sdcard_defconfig | 1 -
>  2 files changed, 2 deletions(-)
>
> diff --git a/arch/riscv/configs/nommu_k210_defconfig b/arch/riscv/configs/nommu_k210_defconfig
> index b16a2a12c82a..89ab76349ea8 100644
> --- a/arch/riscv/configs/nommu_k210_defconfig
> +++ b/arch/riscv/configs/nommu_k210_defconfig
> @@ -75,7 +75,6 @@ CONFIG_LEDS_GPIO=y
>  CONFIG_LEDS_USER=y
>  # CONFIG_VIRTIO_MENU is not set
>  # CONFIG_VHOST_MENU is not set
> -# CONFIG_SURFACE_PLATFORMS is not set
>  # CONFIG_FILE_LOCKING is not set
>  # CONFIG_DNOTIFY is not set
>  # CONFIG_INOTIFY_USER is not set
> diff --git a/arch/riscv/configs/nommu_k210_sdcard_defconfig b/arch/riscv/configs/nommu_k210_sdcard_defconfig
> index 61f887f65419..690460f79925 100644
> --- a/arch/riscv/configs/nommu_k210_sdcard_defconfig
> +++ b/arch/riscv/configs/nommu_k210_sdcard_defconfig
> @@ -72,7 +72,6 @@ CONFIG_LEDS_GPIO=y
>  CONFIG_LEDS_USER=y
>  # CONFIG_VIRTIO_MENU is not set
>  # CONFIG_VHOST_MENU is not set
> -# CONFIG_SURFACE_PLATFORMS is not set
>  CONFIG_EXT2_FS=y
>  # CONFIG_FILE_LOCKING is not set
>  # CONFIG_DNOTIFY is not set
> --
> 2.32.0
>

Re: [PATCH 09/12] RISC-V: defconfigs: Sort CONFIG_BLK_DEV_BSG

[Anup Patel]

On Fri, Nov 19, 2021 at 10:15 PM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>
> From: Palmer Dabbelt <palmer@rivosinc.com>
>
> This should have no functional change, it just sorts CONFIG_BLK_DEV_BSG
> the same way savedefconfig does.
>
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

Looks good to me.

Reviewed-by: Anup Patel <anup@brainfault.org>

Regards,
Anup

> ---
>  arch/riscv/configs/nommu_k210_sdcard_defconfig | 1 -
>  arch/riscv/configs/nommu_virt_defconfig        | 1 -
>  2 files changed, 2 deletions(-)
>
> diff --git a/arch/riscv/configs/nommu_k210_sdcard_defconfig b/arch/riscv/configs/nommu_k210_sdcard_defconfig
> index 690460f79925..84b87f8bfc8f 100644
> --- a/arch/riscv/configs/nommu_k210_sdcard_defconfig
> +++ b/arch/riscv/configs/nommu_k210_sdcard_defconfig
> @@ -30,7 +30,6 @@ CONFIG_CMDLINE_FORCE=y
>  # CONFIG_SECCOMP is not set
>  # CONFIG_STACKPROTECTOR is not set
>  # CONFIG_GCC_PLUGINS is not set
> -# CONFIG_BLK_DEV_BSG is not set
>  # CONFIG_MQ_IOSCHED_DEADLINE is not set
>  # CONFIG_MQ_IOSCHED_KYBER is not set
>  CONFIG_BINFMT_FLAT=y
> diff --git a/arch/riscv/configs/nommu_virt_defconfig b/arch/riscv/configs/nommu_virt_defconfig
> index e046a0babde4..385cca741b01 100644
> --- a/arch/riscv/configs/nommu_virt_defconfig
> +++ b/arch/riscv/configs/nommu_virt_defconfig
> @@ -32,7 +32,6 @@ CONFIG_SMP=y
>  CONFIG_CMDLINE="root=/dev/vda rw earlycon=uart8250,mmio,0x10000000,115200n8 console=ttyS0"
>  CONFIG_CMDLINE_FORCE=y
>  CONFIG_JUMP_LABEL=y
> -# CONFIG_BLK_DEV_BSG is not set
>  CONFIG_PARTITION_ADVANCED=y
>  # CONFIG_MSDOS_PARTITION is not set
>  # CONFIG_EFI_PARTITION is not set
> --
> 2.32.0
>

Re: [PATCH 10/12] RISC-V: defconfigs: Remove redundant CONFIG_POWER_RESET

[Anup Patel]

On Fri, Nov 19, 2021 at 10:15 PM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>
> From: Palmer Dabbelt <palmer@rivosinc.com>
>
> As of ab7fbad0c7d7 ("riscv: Fix unmet direct dependencies built based on
> SOC_VIRT") we select CONFIG_POWER_RESET=y along with CONFIG_SOC_VIRT,
> which is already in defconfig.  This make setting CONFIG_POWER_RESET in
> the defconfigs redundant, so remove it to remain consistent with
> savedefconfig.
>
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

Looks good to me.

Reviewed-by: Anup Patel <anup@brainfault.org>

Regards,
Anup

> ---
>  arch/riscv/configs/defconfig      | 1 -
>  arch/riscv/configs/rv32_defconfig | 1 -
>  2 files changed, 2 deletions(-)
>
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index ec9540392df7..a72dbd74b93d 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -74,7 +74,6 @@ CONFIG_SPI_SIFIVE=y
>  # CONFIG_PTP_1588_CLOCK is not set
>  CONFIG_GPIOLIB=y
>  CONFIG_GPIO_SIFIVE=y
> -CONFIG_POWER_RESET=y
>  CONFIG_DRM=m
>  CONFIG_DRM_RADEON=m
>  CONFIG_DRM_NOUVEAU=m
> diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
> index 1f6808aa1261..8b56a7f1eb06 100644
> --- a/arch/riscv/configs/rv32_defconfig
> +++ b/arch/riscv/configs/rv32_defconfig
> @@ -70,7 +70,6 @@ CONFIG_HW_RANDOM_VIRTIO=y
>  CONFIG_SPI=y
>  CONFIG_SPI_SIFIVE=y
>  # CONFIG_PTP_1588_CLOCK is not set
> -CONFIG_POWER_RESET=y
>  CONFIG_DRM=y
>  CONFIG_DRM_RADEON=y
>  CONFIG_DRM_VIRTIO_GPU=y
> --
> 2.32.0
>

Re: [PATCH 11/12] RISC-V: defconfigs: Remove redundant CONFIG_EFI=y

[Anup Patel]

On Fri, Nov 19, 2021 at 10:15 PM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>
> From: Palmer Dabbelt <palmer@rivosinc.com>
>
> We've always had CONFIG_EFI as "def_bool y" so this has always been
> redundant.  It's removed by savedefconfig, so drop it to keep things
> clean.
>
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

Looks good to me.

Reviewed-by: Anup Patel <anup@brainfault.org>

Regards,
Anup

> ---
>  arch/riscv/configs/defconfig | 1 -
>  1 file changed, 1 deletion(-)
>
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index a72dbd74b93d..f120fcc43d0a 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -143,4 +143,3 @@ CONFIG_RCU_EQS_DEBUG=y
>  # CONFIG_FTRACE is not set
>  # CONFIG_RUNTIME_TESTING_MENU is not set
>  CONFIG_MEMTEST=y
> -CONFIG_EFI=y
> --
> 2.32.0
>

Re: [PATCH 12/12] RISC-V: defconfigs: Remove redundant K210 DT source

[Anup Patel]

On Fri, Nov 19, 2021 at 10:15 PM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>
> From: Palmer Dabbelt <palmer@rivosinc.com>
>
> The "k210_generic" DT has been the default in Kconfig since 7d96729a9e7
> ("riscv: Update Canaan Kendryte K210 device tree"), so drop it from the
> defconfigs to avoid diff with savedefconfig.
>
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

Looks good to me.

Reviewed-by: Anup Patel <anup@brainfault.org>

Regards,
Anup

> ---
>  arch/riscv/configs/nommu_k210_defconfig        | 1 -
>  arch/riscv/configs/nommu_k210_sdcard_defconfig | 1 -
>  2 files changed, 2 deletions(-)
>
> diff --git a/arch/riscv/configs/nommu_k210_defconfig b/arch/riscv/configs/nommu_k210_defconfig
> index 89ab76349ea8..e8ceab678e8b 100644
> --- a/arch/riscv/configs/nommu_k210_defconfig
> +++ b/arch/riscv/configs/nommu_k210_defconfig
> @@ -29,7 +29,6 @@ CONFIG_EMBEDDED=y
>  CONFIG_SLOB=y
>  # CONFIG_MMU is not set
>  CONFIG_SOC_CANAAN=y
> -CONFIG_SOC_CANAAN_K210_DTB_SOURCE="k210_generic"
>  CONFIG_MAXPHYSMEM_2GB=y
>  CONFIG_SMP=y
>  CONFIG_NR_CPUS=2
> diff --git a/arch/riscv/configs/nommu_k210_sdcard_defconfig b/arch/riscv/configs/nommu_k210_sdcard_defconfig
> index 84b87f8bfc8f..46aa3879f19c 100644
> --- a/arch/riscv/configs/nommu_k210_sdcard_defconfig
> +++ b/arch/riscv/configs/nommu_k210_sdcard_defconfig
> @@ -21,7 +21,6 @@ CONFIG_EMBEDDED=y
>  CONFIG_SLOB=y
>  # CONFIG_MMU is not set
>  CONFIG_SOC_CANAAN=y
> -CONFIG_SOC_CANAAN_K210_DTB_SOURCE="k210_generic"
>  CONFIG_MAXPHYSMEM_2GB=y
>  CONFIG_SMP=y
>  CONFIG_NR_CPUS=2
> --
> 2.32.0
>

Re: [PATCH 0/12] RISC-V: Clean up the defconfigs

[Anup Patel]

On Fri, Nov 19, 2021 at 10:14 PM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>
> It's been a while since updating the defconfigs, so I figured it would
> be good to go through all the diff to make sure nothing was lurking.  It
> turns out there were two minor issues, which I've fixed with the first
> two patches.  The rest of these are just cleanups that should have no
> functional change.
>
> I don't have a K210 (I might somewhere, but I've yet to boot it) so I
> can't test this to make sure, but I think patch 2 is the reason we have
> a special !MMU PAGE_OFFSET config.  If someone does have one it'd be
> nice to be able to remove that special case.
>
>

Using savedefconfig, I used to always get a huge diff so thanks for
doing this cleanups. Going forward, I suggest that we insiste everyone
to always use "make savedefconfig" for creating defconfig patches.

Regards,
Anup

Re: [PATCH 12/12] RISC-V: defconfigs: Remove redundant K210 DT source

[Damien Le Moal]

On 2021/11/20 1:45, Palmer Dabbelt wrote:
> From: Palmer Dabbelt <palmer@rivosinc.com>
> 
> The "k210_generic" DT has been the default in Kconfig since 7d96729a9e7
> ("riscv: Update Canaan Kendryte K210 device tree"), so drop it from the
> defconfigs to avoid diff with savedefconfig.
> 
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
> ---
>  arch/riscv/configs/nommu_k210_defconfig        | 1 -
>  arch/riscv/configs/nommu_k210_sdcard_defconfig | 1 -
>  2 files changed, 2 deletions(-)
> 
> diff --git a/arch/riscv/configs/nommu_k210_defconfig b/arch/riscv/configs/nommu_k210_defconfig
> index 89ab76349ea8..e8ceab678e8b 100644
> --- a/arch/riscv/configs/nommu_k210_defconfig
> +++ b/arch/riscv/configs/nommu_k210_defconfig
> @@ -29,7 +29,6 @@ CONFIG_EMBEDDED=y
>  CONFIG_SLOB=y
>  # CONFIG_MMU is not set
>  CONFIG_SOC_CANAAN=y
> -CONFIG_SOC_CANAAN_K210_DTB_SOURCE="k210_generic"
>  CONFIG_MAXPHYSMEM_2GB=y
>  CONFIG_SMP=y
>  CONFIG_NR_CPUS=2
> diff --git a/arch/riscv/configs/nommu_k210_sdcard_defconfig b/arch/riscv/configs/nommu_k210_sdcard_defconfig
> index 84b87f8bfc8f..46aa3879f19c 100644
> --- a/arch/riscv/configs/nommu_k210_sdcard_defconfig
> +++ b/arch/riscv/configs/nommu_k210_sdcard_defconfig
> @@ -21,7 +21,6 @@ CONFIG_EMBEDDED=y
>  CONFIG_SLOB=y
>  # CONFIG_MMU is not set
>  CONFIG_SOC_CANAAN=y
> -CONFIG_SOC_CANAAN_K210_DTB_SOURCE="k210_generic"
>  CONFIG_MAXPHYSMEM_2GB=y
>  CONFIG_SMP=y
>  CONFIG_NR_CPUS=2
> 

Then maybe also delete the arch/riscv/boot/dts/canaan/k210_generic.dts file too
? It is redundant now that it is not being referenced...

-- 
Damien Le Moal
Western Digital Research

Re: [PATCH 0/12] RISC-V: Clean up the defconfigs

[Damien Le Moal]

On 2021/11/20 1:45, Palmer Dabbelt wrote:
> It's been a while since updating the defconfigs, so I figured it would
> be good to go through all the diff to make sure nothing was lurking.  It
> turns out there were two minor issues, which I've fixed with the first
> two patches.  The rest of these are just cleanups that should have no
> functional change.
> 
> I don't have a K210 (I might somewhere, but I've yet to boot it) so I
> can't test this to make sure, but I think patch 2 is the reason we have
> a special !MMU PAGE_OFFSET config.  If someone does have one it'd be
> nice to be able to remove that special case.

Note: incorrect email address for Atish. Fixed here.

-- 
Damien Le Moal
Western Digital Research

Re: [PATCH 0/12] RISC-V: Clean up the defconfigs

[Bin Meng]

On Sat, Nov 20, 2021 at 12:32 PM Anup Patel <anup@brainfault.org> wrote:
>
> On Fri, Nov 19, 2021 at 10:14 PM Palmer Dabbelt <palmer@rivosinc.com> wrote:
> >
> > It's been a while since updating the defconfigs, so I figured it would
> > be good to go through all the diff to make sure nothing was lurking.  It
> > turns out there were two minor issues, which I've fixed with the first
> > two patches.  The rest of these are just cleanups that should have no
> > functional change.
> >
> > I don't have a K210 (I might somewhere, but I've yet to boot it) so I
> > can't test this to make sure, but I think patch 2 is the reason we have
> > a special !MMU PAGE_OFFSET config.  If someone does have one it'd be
> > nice to be able to remove that special case.
> >
> >
>
> Using savedefconfig, I used to always get a huge diff so thanks for
> doing this cleanups. Going forward, I suggest that we insiste everyone
> to always use "make savedefconfig" for creating defconfig patches.

Yep, using "savedefconfig" is always required by U-Boot maintainers. I
thought that's always the case for the Linux kernel but it seems it is
not the case.

Regards,
Bin

Re: [PATCH 0/12] RISC-V: Clean up the defconfigs

[Palmer Dabbelt]

On Sun, 21 Nov 2021 18:45:24 PST (-0800), bmeng.cn@gmail.com wrote:
> On Sat, Nov 20, 2021 at 12:32 PM Anup Patel <anup@brainfault.org> wrote:
>>
>> On Fri, Nov 19, 2021 at 10:14 PM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>> >
>> > It's been a while since updating the defconfigs, so I figured it would
>> > be good to go through all the diff to make sure nothing was lurking.  It
>> > turns out there were two minor issues, which I've fixed with the first
>> > two patches.  The rest of these are just cleanups that should have no
>> > functional change.
>> >
>> > I don't have a K210 (I might somewhere, but I've yet to boot it) so I
>> > can't test this to make sure, but I think patch 2 is the reason we have
>> > a special !MMU PAGE_OFFSET config.  If someone does have one it'd be
>> > nice to be able to remove that special case.
>> >
>> >
>>
>> Using savedefconfig, I used to always get a huge diff so thanks for
>> doing this cleanups. Going forward, I suggest that we insiste everyone
>> to always use "make savedefconfig" for creating defconfig patches.
>
> Yep, using "savedefconfig" is always required by U-Boot maintainers. I
> thought that's always the case for the Linux kernel but it seems it is
> not the case.

It's actually a bit more complicated than that, as the results of
savedefconfig change to track Kconfig updates.  I'd mostly been running
savedefconfig and tossing the extra diff for people, but that led to a
bit of a mess here.

There's no way we can require everyone to run savedefconfig on our tree 
(and even if we could, it'd be a merge nightmare).  IIUC what most folks 
do is regularly re-spin the defconfigs, now that they're clean that 
should be easy.  I'm going to start doing that, the best I can come up 
with is in the second week of the merge window -- that way we'll have 
both fixes and for-next based on the newer defconfigs, along with all 
the WIP branches that folks base on rc1.  If anyone's got a better 
scheme then I'm all ears, though.

This patch set is on for-next.

Thanks!

Re: [PATCH 12/12] RISC-V: defconfigs: Remove redundant K210 DT source

[Palmer Dabbelt]

On Sun, 21 Nov 2021 15:41:18 PST (-0800), Damien.LeMoal@wdc.com wrote:
>> On 2021/11/20 1:45, Palmer Dabbelt wrote:
>> From: Palmer Dabbelt <palmer@rivosinc.com>
>> 
>> The "k210_generic" DT has been the default in Kconfig since 7d96729a9e7
>> ("riscv: Update Canaan Kendryte K210 device tree"), so drop it from the
>> defconfigs to avoid diff with savedefconfig.
>> 
>> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
>> ---
>>  arch/riscv/configs/nommu_k210_defconfig        | 1 -
>>  arch/riscv/configs/nommu_k210_sdcard_defconfig | 1 -
>>  2 files changed, 2 deletions(-)
>> 
>> diff --git a/arch/riscv/configs/nommu_k210_defconfig b/arch/riscv/configs/nommu_k210_defconfig
>> index 89ab76349ea8..e8ceab678e8b 100644
>> --- a/arch/riscv/configs/nommu_k210_defconfig
>> +++ b/arch/riscv/configs/nommu_k210_defconfig
>> @@ -29,7 +29,6 @@ CONFIG_EMBEDDED=y
>>  CONFIG_SLOB=y
>>  # CONFIG_MMU is not set
>>  CONFIG_SOC_CANAAN=y
>> -CONFIG_SOC_CANAAN_K210_DTB_SOURCE="k210_generic"
>>  CONFIG_MAXPHYSMEM_2GB=y
>>  CONFIG_SMP=y
>>  CONFIG_NR_CPUS=2
>> diff --git a/arch/riscv/configs/nommu_k210_sdcard_defconfig b/arch/riscv/configs/nommu_k210_sdcard_defconfig
>> index 84b87f8bfc8f..46aa3879f19c 100644
>> --- a/arch/riscv/configs/nommu_k210_sdcard_defconfig
>> +++ b/arch/riscv/configs/nommu_k210_sdcard_defconfig
>> @@ -21,7 +21,6 @@ CONFIG_EMBEDDED=y
>>  CONFIG_SLOB=y
>>  # CONFIG_MMU is not set
>>  CONFIG_SOC_CANAAN=y
>> -CONFIG_SOC_CANAAN_K210_DTB_SOURCE="k210_generic"
>>  CONFIG_MAXPHYSMEM_2GB=y
>>  CONFIG_SMP=y
>>  CONFIG_NR_CPUS=2
>> 
>
> Then maybe also delete the arch/riscv/boot/dts/canaan/k210_generic.dts file too
> ? It is redundant now that it is not being referenced...

IIUC that's the opposite of what's going on here.  Looks like I somehow 
managed to get the commit wrong, which I've fixed, it's 67d96729a9e7 
("riscv: Update Canaan Kendryte K210 device tree")  That contains

    diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
    index 6402746c68f3..7efcece8896c 100644
    --- a/arch/riscv/Kconfig.socs
    +++ b/arch/riscv/Kconfig.socs
    @@ -51,7 +51,7 @@ config SOC_CANAAN_K210_DTB_SOURCE
            string "Source file for the Canaan Kendryte K210 builtin DTB"
            depends on SOC_CANAAN
            depends on SOC_CANAAN_K210_DTB_BUILTIN
    -       default "k210"
    +       default "k210_generic"
            help
              Base name (without suffix, relative to arch/riscv/boot/dts/canaan)
              for the DTS file that will be used to produce the DTB linked into the

which makes the defconfig entry redundant but still references the DT 
file.

Re: [PATCH 12/12] RISC-V: defconfigs: Remove redundant K210 DT source

[Damien Le Moal]

Re: [PATCH 02/12] RISC-V: MAXPHYSMEM_2GB doesn't depend on CMODEL_MEDLOW

[Geert Uytterhoeven]

Hi Palmer,

On Fri, Nov 19, 2021 at 5:47 PM Palmer Dabbelt <palmer@rivosinc.com> wrote:
> From: Palmer Dabbelt <palmer@rivosinc.com>
>
> For non-relocatable kernels we need to be able to link the kernel at
> approximately PAGE_OFFSET, thus requiring medany (as medlow requires the
> code to be linked within 2GiB of 0).  The inverse doesn't apply, though:
> since medany code can be linked anywhere it's fine to link it close to
> 0, so we can support the smaller memory config.
>
> Fixes: de5f4b8f634b ("RISC-V: Define MAXPHYSMEM_1GB only for RV32")
> Cc: stable@vger.kernel.org
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

Thanks for your patch, which is now commit 9f36b96bc70f9707 ("RISC-V:
MAXPHYSMEM_2GB doesn't depend on CMODEL_MEDLOW").

> I found this when going through the savedefconfig diffs for the K210
> defconfigs.  I'm not entirely sure they're doing the right thing here
> (they should probably be setting CMODEL_LOW to take advantage of the
> better code generation), but I don't have any way to test those
> platforms so I don't want to change too much.

I can confirm MAXPHYSMEM_2GB works on K210 with CMODEL_MEDANY.

As the Icicle has 1760 MiB of RAM, I gave it a try with MAXPHYSMEM_2GB
(and CMODEL_MEDANY), too.  Unfortunately it crashes very early
(needs earlycon to see):

    OF: fdt: Ignoring memory range 0x80000000 - 0x80200000
    Machine model: Microchip PolarFire-SoC Icicle Kit
    printk: debug: ignoring loglevel setting.
    earlycon: ns16550a0 at MMIO32 0x0000000020100000 (options '115200n8')
    printk: bootconsole [ns16550a0] enabled
    printk: debug: skip boot console de-registration.
    efi: UEFI not found.
    Unable to handle kernel paging request at virtual address ffffffff87e00001
    Oops [#1]
    Modules linked in:
    CPU: 0 PID: 0 Comm: swapper Not tainted 5.16.0-08771-g85515233477d #56
    Hardware name: Microchip PolarFire-SoC Icicle Kit (DT)
    epc : fdt_check_header+0x14/0x208
     ra : early_init_dt_verify+0x16/0x94
    epc : ffffffff802ddacc ra : ffffffff8082415a sp : ffffffff81203ee0
     gp : ffffffff812ec3a8 tp : ffffffff8120cd80 t0 : 0000000000000005
     t1 : 0000001040000000 t2 : ffffffff80000000 s0 : ffffffff81203f00
     s1 : ffffffff87e00000 a0 : ffffffff87e00000 a1 : 000000040ffffce7
     a2 : 00000000000000e7 a3 : ffffffff8080394c a4 : 0000000000000000
     a5 : 0000000000000000 a6 : 0000000000000000 a7 : 0000000000000000
     s2 : ffffffff81203f98 s3 : 8000000a00006800 s4 : fffffffffffffff3
     s5 : 0000000000000000 s6 : 0000000000000001 s7 : 0000000000000000
     s8 : 0000000020236c20 s9 : 0000000000000000 s10: 0000000000000000
     s11: 0000000000000000 t3 : 0000000000000018 t4 : 00ff000000000000
     t5 : 0000000000000000 t6 : 0000000000000010
    status: 0000000200000100 badaddr: ffffffff87e00001 cause: 000000000000000d
    [<ffffffff802ddacc>] fdt_check_header+0x14/0x208
    [<ffffffff8082415a>] early_init_dt_verify+0x16/0x94
    [<ffffffff80802dee>] setup_arch+0xec/0x4ec
    [<ffffffff80800700>] start_kernel+0x88/0x6d6
    random: get_random_bytes called from
print_oops_end_marker+0x22/0x44 with crng_init=0
    ---[ end trace 903df1a0ade0b876 ]---
    Kernel panic - not syncing: Attempted to kill the idle task!
    ---[ end Kernel panic - not syncing: Attempted to kill the idle task! ]---

So the FDT is at 0xffffffff87e00000, i.e. at 0x7e00000 from the start
of virtual memory (CONFIG_PAGE_OFFSET=0xffffffff80000000), and thus
within the 2 GiB range.

> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -280,7 +280,7 @@ choice
>                 depends on 32BIT
>                 bool "1GiB"
>         config MAXPHYSMEM_2GB
> -               depends on 64BIT && CMODEL_MEDLOW
> +               depends on 64BIT
>                 bool "2GiB"
>         config MAXPHYSMEM_128GB
>                 depends on 64BIT && CMODEL_MEDANY

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 02/12] RISC-V: MAXPHYSMEM_2GB doesn't depend on CMODEL_MEDLOW

[Alexandre ghiti]

Hi Geert,

On 1/11/22 17:04, Geert Uytterhoeven wrote:
> Hi Palmer,
>
> On Fri, Nov 19, 2021 at 5:47 PM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>> From: Palmer Dabbelt <palmer@rivosinc.com>
>>
>> For non-relocatable kernels we need to be able to link the kernel at
>> approximately PAGE_OFFSET, thus requiring medany (as medlow requires the
>> code to be linked within 2GiB of 0).  The inverse doesn't apply, though:
>> since medany code can be linked anywhere it's fine to link it close to
>> 0, so we can support the smaller memory config.
>>
>> Fixes: de5f4b8f634b ("RISC-V: Define MAXPHYSMEM_1GB only for RV32")
>> Cc: stable@vger.kernel.org
>> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
> Thanks for your patch, which is now commit 9f36b96bc70f9707 ("RISC-V:
> MAXPHYSMEM_2GB doesn't depend on CMODEL_MEDLOW").
>
>> I found this when going through the savedefconfig diffs for the K210
>> defconfigs.  I'm not entirely sure they're doing the right thing here
>> (they should probably be setting CMODEL_LOW to take advantage of the
>> better code generation), but I don't have any way to test those
>> platforms so I don't want to change too much.
> I can confirm MAXPHYSMEM_2GB works on K210 with CMODEL_MEDANY.
>
> As the Icicle has 1760 MiB of RAM, I gave it a try with MAXPHYSMEM_2GB
> (and CMODEL_MEDANY), too.  Unfortunately it crashes very early
> (needs earlycon to see):
>
>      OF: fdt: Ignoring memory range 0x80000000 - 0x80200000
>      Machine model: Microchip PolarFire-SoC Icicle Kit
>      printk: debug: ignoring loglevel setting.
>      earlycon: ns16550a0 at MMIO32 0x0000000020100000 (options '115200n8')
>      printk: bootconsole [ns16550a0] enabled
>      printk: debug: skip boot console de-registration.
>      efi: UEFI not found.
>      Unable to handle kernel paging request at virtual address ffffffff87e00001
>      Oops [#1]
>      Modules linked in:
>      CPU: 0 PID: 0 Comm: swapper Not tainted 5.16.0-08771-g85515233477d #56
>      Hardware name: Microchip PolarFire-SoC Icicle Kit (DT)
>      epc : fdt_check_header+0x14/0x208
>       ra : early_init_dt_verify+0x16/0x94
>      epc : ffffffff802ddacc ra : ffffffff8082415a sp : ffffffff81203ee0
>       gp : ffffffff812ec3a8 tp : ffffffff8120cd80 t0 : 0000000000000005
>       t1 : 0000001040000000 t2 : ffffffff80000000 s0 : ffffffff81203f00
>       s1 : ffffffff87e00000 a0 : ffffffff87e00000 a1 : 000000040ffffce7
>       a2 : 00000000000000e7 a3 : ffffffff8080394c a4 : 0000000000000000
>       a5 : 0000000000000000 a6 : 0000000000000000 a7 : 0000000000000000
>       s2 : ffffffff81203f98 s3 : 8000000a00006800 s4 : fffffffffffffff3
>       s5 : 0000000000000000 s6 : 0000000000000001 s7 : 0000000000000000
>       s8 : 0000000020236c20 s9 : 0000000000000000 s10: 0000000000000000
>       s11: 0000000000000000 t3 : 0000000000000018 t4 : 00ff000000000000
>       t5 : 0000000000000000 t6 : 0000000000000010
>      status: 0000000200000100 badaddr: ffffffff87e00001 cause: 000000000000000d
>      [<ffffffff802ddacc>] fdt_check_header+0x14/0x208
>      [<ffffffff8082415a>] early_init_dt_verify+0x16/0x94
>      [<ffffffff80802dee>] setup_arch+0xec/0x4ec
>      [<ffffffff80800700>] start_kernel+0x88/0x6d6
>      random: get_random_bytes called from
> print_oops_end_marker+0x22/0x44 with crng_init=0
>      ---[ end trace 903df1a0ade0b876 ]---
>      Kernel panic - not syncing: Attempted to kill the idle task!
>      ---[ end Kernel panic - not syncing: Attempted to kill the idle task! ]---
>
> So the FDT is at 0xffffffff87e00000, i.e. at 0x7e00000 from the start
> of virtual memory (CONFIG_PAGE_OFFSET=0xffffffff80000000), and thus
> within the 2 GiB range.


I think you have just encountered what I suspected and mentioned in [1]: 
we recently moved the kernel to the PAGE_OFFSET address used with 
MAXPHYSMEM_2GB.

I would try to cherry-pick [1] and see if that works better :)

Alex

[1] 
https://patchwork.kernel.org/project/linux-riscv/patch/20211206104657.433304-6-alexandre.ghiti@canonical.com/


>
>> --- a/arch/riscv/Kconfig
>> +++ b/arch/riscv/Kconfig
>> @@ -280,7 +280,7 @@ choice
>>                  depends on 32BIT
>>                  bool "1GiB"
>>          config MAXPHYSMEM_2GB
>> -               depends on 64BIT && CMODEL_MEDLOW
>> +               depends on 64BIT
>>                  bool "2GiB"
>>          config MAXPHYSMEM_128GB
>>                  depends on 64BIT && CMODEL_MEDANY
> Gr{oetje,eeting}s,
>
>                          Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                  -- Linus Torvalds
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH 02/12] RISC-V: MAXPHYSMEM_2GB doesn't depend on CMODEL_MEDLOW

[Conor.Dooley]

On 11/01/2022 16:04, Geert Uytterhoeven wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Hi Palmer,
> 
> On Fri, Nov 19, 2021 at 5:47 PM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>> From: Palmer Dabbelt <palmer@rivosinc.com>
>>
>> For non-relocatable kernels we need to be able to link the kernel at
>> approximately PAGE_OFFSET, thus requiring medany (as medlow requires the
>> code to be linked within 2GiB of 0).  The inverse doesn't apply, though:
>> since medany code can be linked anywhere it's fine to link it close to
>> 0, so we can support the smaller memory config.
>>
>> Fixes: de5f4b8f634b ("RISC-V: Define MAXPHYSMEM_1GB only for RV32")
>> Cc: stable@vger.kernel.org
>> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
> 
> Thanks for your patch, which is now commit 9f36b96bc70f9707 ("RISC-V:
> MAXPHYSMEM_2GB doesn't depend on CMODEL_MEDLOW").
> 
>> I found this when going through the savedefconfig diffs for the K210
>> defconfigs.  I'm not entirely sure they're doing the right thing here
>> (they should probably be setting CMODEL_LOW to take advantage of the
>> better code generation), but I don't have any way to test those
>> platforms so I don't want to change too much.
> 
> I can confirm MAXPHYSMEM_2GB works on K210 with CMODEL_MEDANY.
> 
> As the Icicle has 1760 MiB of RAM, I gave it a try with MAXPHYSMEM_2GB
> (and CMODEL_MEDANY), too.  Unfortunately it crashes very early
> (needs earlycon to see):
Given you said 1760 MiB I assume you're not running the device tree 
currently in the kernel?
But the defconfig is /arch/riscv/configs/defconfig?

I tested it w/ my newer version of the dts, using both 1760 & 736 MiB 
(ddrc_cache_lo only) w/ MAXPHYSMEM_2GB.
Enabling MAXPHYSMEM_2GB with either CMODEL_MEDANY or CMODEL_MEDLOW
lead to the same boot failure as you got.
> 
>      OF: fdt: Ignoring memory range 0x80000000 - 0x80200000
>      Machine model: Microchip PolarFire-SoC Icicle Kit
>      printk: debug: ignoring loglevel setting.
>      earlycon: ns16550a0 at MMIO32 0x0000000020100000 (options '115200n8')
>      printk: bootconsole [ns16550a0] enabled
>      printk: debug: skip boot console de-registration.
>      efi: UEFI not found.
>      Unable to handle kernel paging request at virtual address ffffffff87e00001
>      Oops [#1]
>      Modules linked in:
>      CPU: 0 PID: 0 Comm: swapper Not tainted 5.16.0-08771-g85515233477d #56
>      Hardware name: Microchip PolarFire-SoC Icicle Kit (DT)
>      epc : fdt_check_header+0x14/0x208
>       ra : early_init_dt_verify+0x16/0x94
>      epc : ffffffff802ddacc ra : ffffffff8082415a sp : ffffffff81203ee0
>       gp : ffffffff812ec3a8 tp : ffffffff8120cd80 t0 : 0000000000000005
>       t1 : 0000001040000000 t2 : ffffffff80000000 s0 : ffffffff81203f00
>       s1 : ffffffff87e00000 a0 : ffffffff87e00000 a1 : 000000040ffffce7
>       a2 : 00000000000000e7 a3 : ffffffff8080394c a4 : 0000000000000000
>       a5 : 0000000000000000 a6 : 0000000000000000 a7 : 0000000000000000
>       s2 : ffffffff81203f98 s3 : 8000000a00006800 s4 : fffffffffffffff3
>       s5 : 0000000000000000 s6 : 0000000000000001 s7 : 0000000000000000
>       s8 : 0000000020236c20 s9 : 0000000000000000 s10: 0000000000000000
>       s11: 0000000000000000 t3 : 0000000000000018 t4 : 00ff000000000000
>       t5 : 0000000000000000 t6 : 0000000000000010
>      status: 0000000200000100 badaddr: ffffffff87e00001 cause: 000000000000000d
>      [<ffffffff802ddacc>] fdt_check_header+0x14/0x208
>      [<ffffffff8082415a>] early_init_dt_verify+0x16/0x94
>      [<ffffffff80802dee>] setup_arch+0xec/0x4ec
>      [<ffffffff80800700>] start_kernel+0x88/0x6d6
>      random: get_random_bytes called from
> print_oops_end_marker+0x22/0x44 with crng_init=0
>      ---[ end trace 903df1a0ade0b876 ]---
>      Kernel panic - not syncing: Attempted to kill the idle task!
>      ---[ end Kernel panic - not syncing: Attempted to kill the idle task! ]---
> 
> So the FDT is at 0xffffffff87e00000, i.e. at 0x7e00000 from the start
> of virtual memory (CONFIG_PAGE_OFFSET=0xffffffff80000000), and thus
> within the 2 GiB range.
> 
>> --- a/arch/riscv/Kconfig
>> +++ b/arch/riscv/Kconfig
>> @@ -280,7 +280,7 @@ choice
>>                  depends on 32BIT
>>                  bool "1GiB"
>>          config MAXPHYSMEM_2GB
>> -               depends on 64BIT && CMODEL_MEDLOW
>> +               depends on 64BIT
>>                  bool "2GiB"
>>          config MAXPHYSMEM_128GB
>>                  depends on 64BIT && CMODEL_MEDANY
> 
> Gr{oetje,eeting}s,
> 
>                          Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                  -- Linus Torvalds
> 
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
> 

Re: [PATCH 02/12] RISC-V: MAXPHYSMEM_2GB doesn't depend on CMODEL_MEDLOW

[Alexandre ghiti]

Hi Conor,

On 1/14/22 09:40, Conor.Dooley@microchip.com wrote:
> On 11/01/2022 16:04, Geert Uytterhoeven wrote:
>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>
>> Hi Palmer,
>>
>> On Fri, Nov 19, 2021 at 5:47 PM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>>> From: Palmer Dabbelt <palmer@rivosinc.com>
>>>
>>> For non-relocatable kernels we need to be able to link the kernel at
>>> approximately PAGE_OFFSET, thus requiring medany (as medlow requires the
>>> code to be linked within 2GiB of 0).  The inverse doesn't apply, though:
>>> since medany code can be linked anywhere it's fine to link it close to
>>> 0, so we can support the smaller memory config.
>>>
>>> Fixes: de5f4b8f634b ("RISC-V: Define MAXPHYSMEM_1GB only for RV32")
>>> Cc: stable@vger.kernel.org
>>> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
>> Thanks for your patch, which is now commit 9f36b96bc70f9707 ("RISC-V:
>> MAXPHYSMEM_2GB doesn't depend on CMODEL_MEDLOW").
>>
>>> I found this when going through the savedefconfig diffs for the K210
>>> defconfigs.  I'm not entirely sure they're doing the right thing here
>>> (they should probably be setting CMODEL_LOW to take advantage of the
>>> better code generation), but I don't have any way to test those
>>> platforms so I don't want to change too much.
>> I can confirm MAXPHYSMEM_2GB works on K210 with CMODEL_MEDANY.
>>
>> As the Icicle has 1760 MiB of RAM, I gave it a try with MAXPHYSMEM_2GB
>> (and CMODEL_MEDANY), too.  Unfortunately it crashes very early
>> (needs earlycon to see):
> Given you said 1760 MiB I assume you're not running the device tree
> currently in the kernel?
> But the defconfig is /arch/riscv/configs/defconfig?
>
> I tested it w/ my newer version of the dts, using both 1760 & 736 MiB
> (ddrc_cache_lo only) w/ MAXPHYSMEM_2GB.
> Enabling MAXPHYSMEM_2GB with either CMODEL_MEDANY or CMODEL_MEDLOW
> lead to the same boot failure as you got.


Any chance you can give a try to [1] so that I can extract it from my 
sv48 patchset and propose it to fixes if it works?

Thanks,

Alex

https://patchwork.kernel.org/project/linux-riscv/patch/20211206104657.433304-6-alexandre.ghiti@canonical.com/


>>       OF: fdt: Ignoring memory range 0x80000000 - 0x80200000
>>       Machine model: Microchip PolarFire-SoC Icicle Kit
>>       printk: debug: ignoring loglevel setting.
>>       earlycon: ns16550a0 at MMIO32 0x0000000020100000 (options '115200n8')
>>       printk: bootconsole [ns16550a0] enabled
>>       printk: debug: skip boot console de-registration.
>>       efi: UEFI not found.
>>       Unable to handle kernel paging request at virtual address ffffffff87e00001
>>       Oops [#1]
>>       Modules linked in:
>>       CPU: 0 PID: 0 Comm: swapper Not tainted 5.16.0-08771-g85515233477d #56
>>       Hardware name: Microchip PolarFire-SoC Icicle Kit (DT)
>>       epc : fdt_check_header+0x14/0x208
>>        ra : early_init_dt_verify+0x16/0x94
>>       epc : ffffffff802ddacc ra : ffffffff8082415a sp : ffffffff81203ee0
>>        gp : ffffffff812ec3a8 tp : ffffffff8120cd80 t0 : 0000000000000005
>>        t1 : 0000001040000000 t2 : ffffffff80000000 s0 : ffffffff81203f00
>>        s1 : ffffffff87e00000 a0 : ffffffff87e00000 a1 : 000000040ffffce7
>>        a2 : 00000000000000e7 a3 : ffffffff8080394c a4 : 0000000000000000
>>        a5 : 0000000000000000 a6 : 0000000000000000 a7 : 0000000000000000
>>        s2 : ffffffff81203f98 s3 : 8000000a00006800 s4 : fffffffffffffff3
>>        s5 : 0000000000000000 s6 : 0000000000000001 s7 : 0000000000000000
>>        s8 : 0000000020236c20 s9 : 0000000000000000 s10: 0000000000000000
>>        s11: 0000000000000000 t3 : 0000000000000018 t4 : 00ff000000000000
>>        t5 : 0000000000000000 t6 : 0000000000000010
>>       status: 0000000200000100 badaddr: ffffffff87e00001 cause: 000000000000000d
>>       [<ffffffff802ddacc>] fdt_check_header+0x14/0x208
>>       [<ffffffff8082415a>] early_init_dt_verify+0x16/0x94
>>       [<ffffffff80802dee>] setup_arch+0xec/0x4ec
>>       [<ffffffff80800700>] start_kernel+0x88/0x6d6
>>       random: get_random_bytes called from
>> print_oops_end_marker+0x22/0x44 with crng_init=0
>>       ---[ end trace 903df1a0ade0b876 ]---
>>       Kernel panic - not syncing: Attempted to kill the idle task!
>>       ---[ end Kernel panic - not syncing: Attempted to kill the idle task! ]---
>>
>> So the FDT is at 0xffffffff87e00000, i.e. at 0x7e00000 from the start
>> of virtual memory (CONFIG_PAGE_OFFSET=0xffffffff80000000), and thus
>> within the 2 GiB range.
>>
>>> --- a/arch/riscv/Kconfig
>>> +++ b/arch/riscv/Kconfig
>>> @@ -280,7 +280,7 @@ choice
>>>                   depends on 32BIT
>>>                   bool "1GiB"
>>>           config MAXPHYSMEM_2GB
>>> -               depends on 64BIT && CMODEL_MEDLOW
>>> +               depends on 64BIT
>>>                   bool "2GiB"
>>>           config MAXPHYSMEM_128GB
>>>                   depends on 64BIT && CMODEL_MEDANY
>> Gr{oetje,eeting}s,
>>
>>                           Geert
>>
>> --
>> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
>>
>> In personal conversations with technical people, I call myself a hacker. But
>> when I'm talking to journalists I just say "programmer" or something like that.
>>                                   -- Linus Torvalds
>>
>> _______________________________________________
>> linux-riscv mailing list
>> linux-riscv@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-riscv
>>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH 02/12] RISC-V: MAXPHYSMEM_2GB doesn't depend on CMODEL_MEDLOW

[Conor.Dooley]

On 14/01/2022 09:09, Alexandre ghiti wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know 
> the content is safe
> 
> Hi Conor,
> 
> On 1/14/22 09:40, Conor.Dooley@microchip.com wrote:
>> On 11/01/2022 16:04, Geert Uytterhoeven wrote:
>>> EXTERNAL EMAIL: Do not click links or open attachments unless you 
>>> know the content is safe
>>>
>>> Hi Palmer,
>>>
>>> On Fri, Nov 19, 2021 at 5:47 PM Palmer Dabbelt <palmer@rivosinc.com> 
>>> wrote:
>>>> From: Palmer Dabbelt <palmer@rivosinc.com>
>>>>
>>>> For non-relocatable kernels we need to be able to link the kernel at
>>>> approximately PAGE_OFFSET, thus requiring medany (as medlow requires 
>>>> the
>>>> code to be linked within 2GiB of 0).  The inverse doesn't apply, 
>>>> though:
>>>> since medany code can be linked anywhere it's fine to link it close to
>>>> 0, so we can support the smaller memory config.
>>>>
>>>> Fixes: de5f4b8f634b ("RISC-V: Define MAXPHYSMEM_1GB only for RV32")
>>>> Cc: stable@vger.kernel.org
>>>> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
>>> Thanks for your patch, which is now commit 9f36b96bc70f9707 ("RISC-V:
>>> MAXPHYSMEM_2GB doesn't depend on CMODEL_MEDLOW").
>>>
>>>> I found this when going through the savedefconfig diffs for the K210
>>>> defconfigs.  I'm not entirely sure they're doing the right thing here
>>>> (they should probably be setting CMODEL_LOW to take advantage of the
>>>> better code generation), but I don't have any way to test those
>>>> platforms so I don't want to change too much.
>>> I can confirm MAXPHYSMEM_2GB works on K210 with CMODEL_MEDANY.
>>>
>>> As the Icicle has 1760 MiB of RAM, I gave it a try with MAXPHYSMEM_2GB
>>> (and CMODEL_MEDANY), too.  Unfortunately it crashes very early
>>> (needs earlycon to see):
>> Given you said 1760 MiB I assume you're not running the device tree
>> currently in the kernel?
>> But the defconfig is /arch/riscv/configs/defconfig?
>>
>> I tested it w/ my newer version of the dts, using both 1760 & 736 MiB
>> (ddrc_cache_lo only) w/ MAXPHYSMEM_2GB.
>> Enabling MAXPHYSMEM_2GB with either CMODEL_MEDANY or CMODEL_MEDLOW
>> lead to the same boot failure as you got.
> 
> 
> Any chance you can give a try to [1] so that I can extract it from my
> sv48 patchset and propose it to fixes if it works?
Applied, tested with 1760 & 736 MiB - booted fine. :)
> 
> Thanks,
> 
> Alex
> 
> https://patchwork.kernel.org/project/linux-riscv/patch/20211206104657.433304-6-alexandre.ghiti@canonical.com/ 
> 
> 
> 
>>>       OF: fdt: Ignoring memory range 0x80000000 - 0x80200000
>>>       Machine model: Microchip PolarFire-SoC Icicle Kit
>>>       printk: debug: ignoring loglevel setting.
>>>       earlycon: ns16550a0 at MMIO32 0x0000000020100000 (options 
>>> '115200n8')
>>>       printk: bootconsole [ns16550a0] enabled
>>>       printk: debug: skip boot console de-registration.
>>>       efi: UEFI not found.
>>>       Unable to handle kernel paging request at virtual address 
>>> ffffffff87e00001
>>>       Oops [#1]
>>>       Modules linked in:
>>>       CPU: 0 PID: 0 Comm: swapper Not tainted 
>>> 5.16.0-08771-g85515233477d #56
>>>       Hardware name: Microchip PolarFire-SoC Icicle Kit (DT)
>>>       epc : fdt_check_header+0x14/0x208
>>>        ra : early_init_dt_verify+0x16/0x94
>>>       epc : ffffffff802ddacc ra : ffffffff8082415a sp : ffffffff81203ee0
>>>        gp : ffffffff812ec3a8 tp : ffffffff8120cd80 t0 : 0000000000000005
>>>        t1 : 0000001040000000 t2 : ffffffff80000000 s0 : ffffffff81203f00
>>>        s1 : ffffffff87e00000 a0 : ffffffff87e00000 a1 : 000000040ffffce7
>>>        a2 : 00000000000000e7 a3 : ffffffff8080394c a4 : 0000000000000000
>>>        a5 : 0000000000000000 a6 : 0000000000000000 a7 : 0000000000000000
>>>        s2 : ffffffff81203f98 s3 : 8000000a00006800 s4 : fffffffffffffff3
>>>        s5 : 0000000000000000 s6 : 0000000000000001 s7 : 0000000000000000
>>>        s8 : 0000000020236c20 s9 : 0000000000000000 s10: 0000000000000000
>>>        s11: 0000000000000000 t3 : 0000000000000018 t4 : 00ff000000000000
>>>        t5 : 0000000000000000 t6 : 0000000000000010
>>>       status: 0000000200000100 badaddr: ffffffff87e00001 cause: 
>>> 000000000000000d
>>>       [<ffffffff802ddacc>] fdt_check_header+0x14/0x208
>>>       [<ffffffff8082415a>] early_init_dt_verify+0x16/0x94
>>>       [<ffffffff80802dee>] setup_arch+0xec/0x4ec
>>>       [<ffffffff80800700>] start_kernel+0x88/0x6d6
>>>       random: get_random_bytes called from
>>> print_oops_end_marker+0x22/0x44 with crng_init=0
>>>       ---[ end trace 903df1a0ade0b876 ]---
>>>       Kernel panic - not syncing: Attempted to kill the idle task!
>>>       ---[ end Kernel panic - not syncing: Attempted to kill the idle 
>>> task! ]---
>>>
>>> So the FDT is at 0xffffffff87e00000, i.e. at 0x7e00000 from the start
>>> of virtual memory (CONFIG_PAGE_OFFSET=0xffffffff80000000), and thus
>>> within the 2 GiB range.
>>>
>>>> --- a/arch/riscv/Kconfig
>>>> +++ b/arch/riscv/Kconfig
>>>> @@ -280,7 +280,7 @@ choice
>>>>                   depends on 32BIT
>>>>                   bool "1GiB"
>>>>           config MAXPHYSMEM_2GB
>>>> -               depends on 64BIT && CMODEL_MEDLOW
>>>> +               depends on 64BIT
>>>>                   bool "2GiB"
>>>>           config MAXPHYSMEM_128GB
>>>>                   depends on 64BIT && CMODEL_MEDANY
>>> Gr{oetje,eeting}s,
>>>
>>>                           Geert
>>>
>>> -- 
>>> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- 
>>> geert@linux-m68k.org
>>>
>>> In personal conversations with technical people, I call myself a 
>>> hacker. But
>>> when I'm talking to journalists I just say "programmer" or something 
>>> like that.
>>>                                   -- Linus Torvalds
>>>
>>> _______________________________________________
>>> linux-riscv mailing list
>>> linux-riscv@lists.infradead.org
>>> http://lists.infradead.org/mailman/listinfo/linux-riscv
>>>
>> _______________________________________________
>> linux-riscv mailing list
>> linux-riscv@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH 02/12] RISC-V: MAXPHYSMEM_2GB doesn't depend on CMODEL_MEDLOW

[Alexandre Ghiti]

On 1/14/22 10:41, Conor.Dooley@microchip.com wrote:
> On 14/01/2022 09:09, Alexandre ghiti wrote:
>> EXTERNAL EMAIL: Do not click links or open attachments unless you know
>> the content is safe
>>
>> Hi Conor,
>>
>> On 1/14/22 09:40, Conor.Dooley@microchip.com wrote:
>>> On 11/01/2022 16:04, Geert Uytterhoeven wrote:
>>>> EXTERNAL EMAIL: Do not click links or open attachments unless you
>>>> know the content is safe
>>>>
>>>> Hi Palmer,
>>>>
>>>> On Fri, Nov 19, 2021 at 5:47 PM Palmer Dabbelt <palmer@rivosinc.com>
>>>> wrote:
>>>>> From: Palmer Dabbelt <palmer@rivosinc.com>
>>>>>
>>>>> For non-relocatable kernels we need to be able to link the kernel at
>>>>> approximately PAGE_OFFSET, thus requiring medany (as medlow requires
>>>>> the
>>>>> code to be linked within 2GiB of 0).  The inverse doesn't apply,
>>>>> though:
>>>>> since medany code can be linked anywhere it's fine to link it close to
>>>>> 0, so we can support the smaller memory config.
>>>>>
>>>>> Fixes: de5f4b8f634b ("RISC-V: Define MAXPHYSMEM_1GB only for RV32")
>>>>> Cc: stable@vger.kernel.org
>>>>> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
>>>> Thanks for your patch, which is now commit 9f36b96bc70f9707 ("RISC-V:
>>>> MAXPHYSMEM_2GB doesn't depend on CMODEL_MEDLOW").
>>>>
>>>>> I found this when going through the savedefconfig diffs for the K210
>>>>> defconfigs.  I'm not entirely sure they're doing the right thing here
>>>>> (they should probably be setting CMODEL_LOW to take advantage of the
>>>>> better code generation), but I don't have any way to test those
>>>>> platforms so I don't want to change too much.
>>>> I can confirm MAXPHYSMEM_2GB works on K210 with CMODEL_MEDANY.
>>>>
>>>> As the Icicle has 1760 MiB of RAM, I gave it a try with MAXPHYSMEM_2GB
>>>> (and CMODEL_MEDANY), too.  Unfortunately it crashes very early
>>>> (needs earlycon to see):
>>> Given you said 1760 MiB I assume you're not running the device tree
>>> currently in the kernel?
>>> But the defconfig is /arch/riscv/configs/defconfig?
>>>
>>> I tested it w/ my newer version of the dts, using both 1760 & 736 MiB
>>> (ddrc_cache_lo only) w/ MAXPHYSMEM_2GB.
>>> Enabling MAXPHYSMEM_2GB with either CMODEL_MEDANY or CMODEL_MEDLOW
>>> lead to the same boot failure as you got.
>>
>> Any chance you can give a try to [1] so that I can extract it from my
>> sv48 patchset and propose it to fixes if it works?
> Applied, tested with 1760 & 736 MiB - booted fine. :)


Great, I'll extract it, rephrase it (since it is not a suspicion 
anymore), add Geert Reported-by and your Tested-by.

Thanks!

Alex


>> Thanks,
>>
>> Alex
>>
>> https://patchwork.kernel.org/project/linux-riscv/patch/20211206104657.433304-6-alexandre.ghiti@canonical.com/
>>
>>
>>
>>>>        OF: fdt: Ignoring memory range 0x80000000 - 0x80200000
>>>>        Machine model: Microchip PolarFire-SoC Icicle Kit
>>>>        printk: debug: ignoring loglevel setting.
>>>>        earlycon: ns16550a0 at MMIO32 0x0000000020100000 (options
>>>> '115200n8')
>>>>        printk: bootconsole [ns16550a0] enabled
>>>>        printk: debug: skip boot console de-registration.
>>>>        efi: UEFI not found.
>>>>        Unable to handle kernel paging request at virtual address
>>>> ffffffff87e00001
>>>>        Oops [#1]
>>>>        Modules linked in:
>>>>        CPU: 0 PID: 0 Comm: swapper Not tainted
>>>> 5.16.0-08771-g85515233477d #56
>>>>        Hardware name: Microchip PolarFire-SoC Icicle Kit (DT)
>>>>        epc : fdt_check_header+0x14/0x208
>>>>         ra : early_init_dt_verify+0x16/0x94
>>>>        epc : ffffffff802ddacc ra : ffffffff8082415a sp : ffffffff81203ee0
>>>>         gp : ffffffff812ec3a8 tp : ffffffff8120cd80 t0 : 0000000000000005
>>>>         t1 : 0000001040000000 t2 : ffffffff80000000 s0 : ffffffff81203f00
>>>>         s1 : ffffffff87e00000 a0 : ffffffff87e00000 a1 : 000000040ffffce7
>>>>         a2 : 00000000000000e7 a3 : ffffffff8080394c a4 : 0000000000000000
>>>>         a5 : 0000000000000000 a6 : 0000000000000000 a7 : 0000000000000000
>>>>         s2 : ffffffff81203f98 s3 : 8000000a00006800 s4 : fffffffffffffff3
>>>>         s5 : 0000000000000000 s6 : 0000000000000001 s7 : 0000000000000000
>>>>         s8 : 0000000020236c20 s9 : 0000000000000000 s10: 0000000000000000
>>>>         s11: 0000000000000000 t3 : 0000000000000018 t4 : 00ff000000000000
>>>>         t5 : 0000000000000000 t6 : 0000000000000010
>>>>        status: 0000000200000100 badaddr: ffffffff87e00001 cause:
>>>> 000000000000000d
>>>>        [<ffffffff802ddacc>] fdt_check_header+0x14/0x208
>>>>        [<ffffffff8082415a>] early_init_dt_verify+0x16/0x94
>>>>        [<ffffffff80802dee>] setup_arch+0xec/0x4ec
>>>>        [<ffffffff80800700>] start_kernel+0x88/0x6d6
>>>>        random: get_random_bytes called from
>>>> print_oops_end_marker+0x22/0x44 with crng_init=0
>>>>        ---[ end trace 903df1a0ade0b876 ]---
>>>>        Kernel panic - not syncing: Attempted to kill the idle task!
>>>>        ---[ end Kernel panic - not syncing: Attempted to kill the idle
>>>> task! ]---
>>>>
>>>> So the FDT is at 0xffffffff87e00000, i.e. at 0x7e00000 from the start
>>>> of virtual memory (CONFIG_PAGE_OFFSET=0xffffffff80000000), and thus
>>>> within the 2 GiB range.
>>>>
>>>>> --- a/arch/riscv/Kconfig
>>>>> +++ b/arch/riscv/Kconfig
>>>>> @@ -280,7 +280,7 @@ choice
>>>>>                    depends on 32BIT
>>>>>                    bool "1GiB"
>>>>>            config MAXPHYSMEM_2GB
>>>>> -               depends on 64BIT && CMODEL_MEDLOW
>>>>> +               depends on 64BIT
>>>>>                    bool "2GiB"
>>>>>            config MAXPHYSMEM_128GB
>>>>>                    depends on 64BIT && CMODEL_MEDANY
>>>> Gr{oetje,eeting}s,
>>>>
>>>>                            Geert
>>>>
>>>> -- 
>>>> Geert Uytterhoeven -- There's lots of Linux beyond ia32 --
>>>> geert@linux-m68k.org
>>>>
>>>> In personal conversations with technical people, I call myself a
>>>> hacker. But
>>>> when I'm talking to journalists I just say "programmer" or something
>>>> like that.
>>>>                                    -- Linus Torvalds
>>>>
>>>> _______________________________________________
>>>> linux-riscv mailing list
>>>> linux-riscv@lists.infradead.org
>>>> http://lists.infradead.org/mailman/listinfo/linux-riscv
>>>>
>>> _______________________________________________
>>> linux-riscv mailing list
>>> linux-riscv@lists.infradead.org
>>> http://lists.infradead.org/mailman/listinfo/linux-riscv
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH 02/12] RISC-V: MAXPHYSMEM_2GB doesn't depend on CMODEL_MEDLOW

[Geert Uytterhoeven]

Hi Alex,

On Tue, Jan 11, 2022 at 5:14 PM Alexandre ghiti <alex@ghiti.fr> wrote:
> On 1/11/22 17:04, Geert Uytterhoeven wrote:
> > On Fri, Nov 19, 2021 at 5:47 PM Palmer Dabbelt <palmer@rivosinc.com> wrote:
> >> From: Palmer Dabbelt <palmer@rivosinc.com>
> >>
> >> For non-relocatable kernels we need to be able to link the kernel at
> >> approximately PAGE_OFFSET, thus requiring medany (as medlow requires the
> >> code to be linked within 2GiB of 0).  The inverse doesn't apply, though:
> >> since medany code can be linked anywhere it's fine to link it close to
> >> 0, so we can support the smaller memory config.
> >>
> >> Fixes: de5f4b8f634b ("RISC-V: Define MAXPHYSMEM_1GB only for RV32")
> >> Cc: stable@vger.kernel.org
> >> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
> > Thanks for your patch, which is now commit 9f36b96bc70f9707 ("RISC-V:
> > MAXPHYSMEM_2GB doesn't depend on CMODEL_MEDLOW").
> >
> >> I found this when going through the savedefconfig diffs for the K210
> >> defconfigs.  I'm not entirely sure they're doing the right thing here
> >> (they should probably be setting CMODEL_LOW to take advantage of the
> >> better code generation), but I don't have any way to test those
> >> platforms so I don't want to change too much.
> > I can confirm MAXPHYSMEM_2GB works on K210 with CMODEL_MEDANY.
> >
> > As the Icicle has 1760 MiB of RAM, I gave it a try with MAXPHYSMEM_2GB
> > (and CMODEL_MEDANY), too.  Unfortunately it crashes very early
> > (needs earlycon to see):
> >
> >      OF: fdt: Ignoring memory range 0x80000000 - 0x80200000
> >      Machine model: Microchip PolarFire-SoC Icicle Kit
> >      printk: debug: ignoring loglevel setting.
> >      earlycon: ns16550a0 at MMIO32 0x0000000020100000 (options '115200n8')
> >      printk: bootconsole [ns16550a0] enabled
> >      printk: debug: skip boot console de-registration.
> >      efi: UEFI not found.
> >      Unable to handle kernel paging request at virtual address ffffffff87e00001
> >      Oops [#1]
> >      Modules linked in:
> >      CPU: 0 PID: 0 Comm: swapper Not tainted 5.16.0-08771-g85515233477d #56
> >      Hardware name: Microchip PolarFire-SoC Icicle Kit (DT)
> >      epc : fdt_check_header+0x14/0x208
> >       ra : early_init_dt_verify+0x16/0x94
> >      epc : ffffffff802ddacc ra : ffffffff8082415a sp : ffffffff81203ee0
> >       gp : ffffffff812ec3a8 tp : ffffffff8120cd80 t0 : 0000000000000005
> >       t1 : 0000001040000000 t2 : ffffffff80000000 s0 : ffffffff81203f00
> >       s1 : ffffffff87e00000 a0 : ffffffff87e00000 a1 : 000000040ffffce7
> >       a2 : 00000000000000e7 a3 : ffffffff8080394c a4 : 0000000000000000
> >       a5 : 0000000000000000 a6 : 0000000000000000 a7 : 0000000000000000
> >       s2 : ffffffff81203f98 s3 : 8000000a00006800 s4 : fffffffffffffff3
> >       s5 : 0000000000000000 s6 : 0000000000000001 s7 : 0000000000000000
> >       s8 : 0000000020236c20 s9 : 0000000000000000 s10: 0000000000000000
> >       s11: 0000000000000000 t3 : 0000000000000018 t4 : 00ff000000000000
> >       t5 : 0000000000000000 t6 : 0000000000000010
> >      status: 0000000200000100 badaddr: ffffffff87e00001 cause: 000000000000000d
> >      [<ffffffff802ddacc>] fdt_check_header+0x14/0x208
> >      [<ffffffff8082415a>] early_init_dt_verify+0x16/0x94
> >      [<ffffffff80802dee>] setup_arch+0xec/0x4ec
> >      [<ffffffff80800700>] start_kernel+0x88/0x6d6
> >      random: get_random_bytes called from
> > print_oops_end_marker+0x22/0x44 with crng_init=0
> >      ---[ end trace 903df1a0ade0b876 ]---
> >      Kernel panic - not syncing: Attempted to kill the idle task!
> >      ---[ end Kernel panic - not syncing: Attempted to kill the idle task! ]---
> >
> > So the FDT is at 0xffffffff87e00000, i.e. at 0x7e00000 from the start
> > of virtual memory (CONFIG_PAGE_OFFSET=0xffffffff80000000), and thus
> > within the 2 GiB range.
>
>
> I think you have just encountered what I suspected and mentioned in [1]:
> we recently moved the kernel to the PAGE_OFFSET address used with
> MAXPHYSMEM_2GB.
>
> I would try to cherry-pick [1] and see if that works better :)
>
> Alex
>
> [1]
> https://patchwork.kernel.org/project/linux-riscv/patch/20211206104657.433304-6-alexandre.ghiti@canonical.com/

Thanks, works fine with just that patch (needed small changes), or with
the full series.

Tested-by: Geert Uytterhoeven <geert@linux-m68k.org>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 02/12] RISC-V: MAXPHYSMEM_2GB doesn't depend on CMODEL_MEDLOW

[Alexandre Ghiti]

Hi Geert,

On 1/14/22 11:12, Geert Uytterhoeven wrote:
> Hi Alex,
>
> On Tue, Jan 11, 2022 at 5:14 PM Alexandre ghiti <alex@ghiti.fr> wrote:
>> On 1/11/22 17:04, Geert Uytterhoeven wrote:
>>> On Fri, Nov 19, 2021 at 5:47 PM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>>>> From: Palmer Dabbelt <palmer@rivosinc.com>
>>>>
>>>> For non-relocatable kernels we need to be able to link the kernel at
>>>> approximately PAGE_OFFSET, thus requiring medany (as medlow requires the
>>>> code to be linked within 2GiB of 0).  The inverse doesn't apply, though:
>>>> since medany code can be linked anywhere it's fine to link it close to
>>>> 0, so we can support the smaller memory config.
>>>>
>>>> Fixes: de5f4b8f634b ("RISC-V: Define MAXPHYSMEM_1GB only for RV32")
>>>> Cc: stable@vger.kernel.org
>>>> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
>>> Thanks for your patch, which is now commit 9f36b96bc70f9707 ("RISC-V:
>>> MAXPHYSMEM_2GB doesn't depend on CMODEL_MEDLOW").
>>>
>>>> I found this when going through the savedefconfig diffs for the K210
>>>> defconfigs.  I'm not entirely sure they're doing the right thing here
>>>> (they should probably be setting CMODEL_LOW to take advantage of the
>>>> better code generation), but I don't have any way to test those
>>>> platforms so I don't want to change too much.
>>> I can confirm MAXPHYSMEM_2GB works on K210 with CMODEL_MEDANY.
>>>
>>> As the Icicle has 1760 MiB of RAM, I gave it a try with MAXPHYSMEM_2GB
>>> (and CMODEL_MEDANY), too.  Unfortunately it crashes very early
>>> (needs earlycon to see):
>>>
>>>       OF: fdt: Ignoring memory range 0x80000000 - 0x80200000
>>>       Machine model: Microchip PolarFire-SoC Icicle Kit
>>>       printk: debug: ignoring loglevel setting.
>>>       earlycon: ns16550a0 at MMIO32 0x0000000020100000 (options '115200n8')
>>>       printk: bootconsole [ns16550a0] enabled
>>>       printk: debug: skip boot console de-registration.
>>>       efi: UEFI not found.
>>>       Unable to handle kernel paging request at virtual address ffffffff87e00001
>>>       Oops [#1]
>>>       Modules linked in:
>>>       CPU: 0 PID: 0 Comm: swapper Not tainted 5.16.0-08771-g85515233477d #56
>>>       Hardware name: Microchip PolarFire-SoC Icicle Kit (DT)
>>>       epc : fdt_check_header+0x14/0x208
>>>        ra : early_init_dt_verify+0x16/0x94
>>>       epc : ffffffff802ddacc ra : ffffffff8082415a sp : ffffffff81203ee0
>>>        gp : ffffffff812ec3a8 tp : ffffffff8120cd80 t0 : 0000000000000005
>>>        t1 : 0000001040000000 t2 : ffffffff80000000 s0 : ffffffff81203f00
>>>        s1 : ffffffff87e00000 a0 : ffffffff87e00000 a1 : 000000040ffffce7
>>>        a2 : 00000000000000e7 a3 : ffffffff8080394c a4 : 0000000000000000
>>>        a5 : 0000000000000000 a6 : 0000000000000000 a7 : 0000000000000000
>>>        s2 : ffffffff81203f98 s3 : 8000000a00006800 s4 : fffffffffffffff3
>>>        s5 : 0000000000000000 s6 : 0000000000000001 s7 : 0000000000000000
>>>        s8 : 0000000020236c20 s9 : 0000000000000000 s10: 0000000000000000
>>>        s11: 0000000000000000 t3 : 0000000000000018 t4 : 00ff000000000000
>>>        t5 : 0000000000000000 t6 : 0000000000000010
>>>       status: 0000000200000100 badaddr: ffffffff87e00001 cause: 000000000000000d
>>>       [<ffffffff802ddacc>] fdt_check_header+0x14/0x208
>>>       [<ffffffff8082415a>] early_init_dt_verify+0x16/0x94
>>>       [<ffffffff80802dee>] setup_arch+0xec/0x4ec
>>>       [<ffffffff80800700>] start_kernel+0x88/0x6d6
>>>       random: get_random_bytes called from
>>> print_oops_end_marker+0x22/0x44 with crng_init=0
>>>       ---[ end trace 903df1a0ade0b876 ]---
>>>       Kernel panic - not syncing: Attempted to kill the idle task!
>>>       ---[ end Kernel panic - not syncing: Attempted to kill the idle task! ]---
>>>
>>> So the FDT is at 0xffffffff87e00000, i.e. at 0x7e00000 from the start
>>> of virtual memory (CONFIG_PAGE_OFFSET=0xffffffff80000000), and thus
>>> within the 2 GiB range.
>>
>> I think you have just encountered what I suspected and mentioned in [1]:
>> we recently moved the kernel to the PAGE_OFFSET address used with
>> MAXPHYSMEM_2GB.
>>
>> I would try to cherry-pick [1] and see if that works better :)
>>
>> Alex
>>
>> [1]
>> https://patchwork.kernel.org/project/linux-riscv/patch/20211206104657.433304-6-alexandre.ghiti@canonical.com/
> Thanks, works fine with just that patch (needed small changes), or with
> the full series.
>
> Tested-by: Geert Uytterhoeven <geert@linux-m68k.org>


Nice to know the full series works too, thank you, I'll add your Tested-by.

Thanks!

Alex


> Gr{oetje,eeting}s,
>
>                          Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                  -- Linus Torvalds
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH 12/12] RISC-V: defconfigs: Remove redundant K210 DT source

[Palmer Dabbelt]

On Thu, 06 Jan 2022 18:14:00 PST (-0800), Damien.LeMoal@wdc.com wrote:

I just see an empty message here.  Not sure if it's something wrong with 
my mail client, it's always a bit confused by yours -- it's usually not 
this confused, but it is generally a broken mess so I wouldn't be 
surprised by anything ;)

Re: [PATCH 12/12] RISC-V: defconfigs: Remove redundant K210 DT source

[Damien Le Moal]

On 2022/01/21 3:19, Palmer Dabbelt wrote:
> On Thu, 06 Jan 2022 18:14:00 PST (-0800), Damien.LeMoal@wdc.com wrote:
> 
> I just see an empty message here.  Not sure if it's something wrong with 
> my mail client, it's always a bit confused by yours -- it's usually not 
> this confused, but it is generally a broken mess so I wouldn't be 
> surprised by anything ;)

Sorry about that. I have some problems with my Thunderbird+Exquilla plugin on
the corporate MS Exchange account. Email replies are all sent empty since a
couple of weeks ago... Not sure what is going on but that is definitely on my
end. Switching gradually to this new email address (not MS Exchange :))

In this reply, I was simply saying "OK. Thanks !"

Cheers.

-- 
Damien Le Moal
Western Digital Research