From: Moritz Fischer <moritz.fischer@ettus.com>
To: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Cc: "Nadathur, Sundar" <sundar.nadathur@intel.com>,
Alan Tull <delicious.quinoa@gmail.com>,
Yves Vandervennet <yves.vandervennet@linux.intel.com>,
"matthew.gerlach@linux.intel.com"
<matthew.gerlach@linux.intel.com>,
linux-kernel <linux-kernel@vger.kernel.org>,
"linux-fpga@vger.kernel.org" <linux-fpga@vger.kernel.org>,
"Marek Va??ut" <marex@denx.de>
Subject: Re: [RFC 7/8] fpga-region: add sysfs interface
Date: Tue, 21 Feb 2017 21:38:41 -0800 [thread overview]
Message-ID: <CAAtXAHe-3L4E7sj9RJJwgMEASJCFmYcXyJdm6z7NtnXWGVGG=w@mail.gmail.com> (raw)
In-Reply-To: <20170222051201.GB29755@obsidianresearch.com>
Hi all,
On Tue, Feb 21, 2017 at 9:12 PM, Jason Gunthorpe
<jgunthorpe@obsidianresearch.com> wrote:
> On Tue, Feb 21, 2017 at 07:49:19PM -0800, Moritz Fischer wrote:
>
>> fdt does this out of the box, too. So far I've seen nothing fdt
>> couldn't do (or doesn't do let's rather say).
>
> tlv/fdt/http headers are all essentially exactly the same
> thing. Key/value pairs with various encoding schemes.
>
> I don't think we don't need a tree of data, so fdt is overkill.
>
> tlv is not substantially easier to parse correctly than the
> structured plain text headers.. It is just in binary so it can
> represent binary-ish things better.
TLV Seems easy enough. To give an update, I played with fdt a bit to see
how far I get in half an hour. I got bool / int / strings to work
quite fast (~30mins).
Please disregard the horrible hackyness of this ...
For simplicity I stuck the header on top of my bitfile with:
<snip>
/dts-v1/;
/{
description = "Test";
compressed = <0>;
encrypted = <1>;
};
</snip>
$ dtc -o header.dtb header.dts
$ cat header.dtb mybitfile.bin > /lib/firmware/bitfile_header.bin
+ static int __fpga_mgr_blob_to_image_info(const void *blob,
+ struct fpga_image_info *info)
+ {
+ int root_offset;
+ const char *desc;
+ const uint32_t *_compressed, *_encrypted;
+ int compressed, encrypted;
+
+ if (fdt_check_header(blob)) {
+ pr_err("Invalid device tree blob header\n");
+ return -EINVAL;
+ }
+
+ root_offset = fdt_path_offset(blob, "/");
+ if (root_offset < 0) {
+ pr_err("Invalid root offset\n");
+ return -EINVAL;
+ }
+
+ desc = fdt_getprop(blob, root_offset, "description", NULL);
+
+ _compressed = fdt_getprop(blob, root_offset, "compressed", NULL);
+ if (_compressed)
+ compressed = fdt32_to_cpu(*_compressed);
+
+ _encrypted = fdt_getprop(blob, root_offset, "encrypted", NULL);
+ if (_encrypted)
+ encrypted = fdt32_to_cpu(*_encrypted);
+
+ if (desc)
+ pr_info("%s: description=%s\n", __func__, desc);
+
+ if (_encrypted && _compressed)
+ pr_info("%s: compressed? %s encrypted? %s\n", __func__,
+ compressed ? "Yes" : "No", encrypted ? "Yes" : "No");
+
+ return 0;
+ }
Which gave me:
<snip>
[ 19.325182] fpga_manager fpga0: writing bitfile_header.bin to
Xilinx Zynq FPGA Manager
[ 20.091222] __fpga_mgr_blob_to_image_info: description=Test
[ 20.096730] __fpga_mgr_blob_to_image_info: compressed? No encrypted? Yes
</snip>
So I'm fairly convinced I can make this work, TVLs seem like it could work, too.
> So far the only thing we know we need is a 'bool' for encrypted and a
> stringish guid thing for partial reconfiguration.
Yeah, shouldn't be hard to implement either way.
Cheers,
Moritz
next prev parent reply other threads:[~2017-02-22 5:38 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-15 16:14 FPGA Region enhancements and fixes Alan Tull
2017-02-15 16:14 ` [RFC 1/8] fpga-mgr: add a single function for fpga loading methods Alan Tull
2017-02-16 0:36 ` matthew.gerlach
2017-02-15 16:14 ` [RFC 2/8] fpga-region: support more than one overlay per FPGA region Alan Tull
2017-02-16 16:50 ` matthew.gerlach
2017-02-16 17:35 ` Alan Tull
2017-02-15 16:14 ` [RFC 3/8] fpga-bridge: add non-dt support Alan Tull
2017-02-15 16:14 ` [RFC 4/8] doc: fpga-mgr: separate getting/locking FPGA manager Alan Tull
2017-02-17 17:14 ` Li, Yi
2017-02-17 21:55 ` Alan Tull
2017-02-17 17:52 ` Moritz Fischer
2017-02-17 22:02 ` Alan Tull
2017-02-15 16:14 ` [RFC 5/8] " Alan Tull
2017-02-15 16:14 ` [RFC 6/8] fpga-region: separate out common code to allow non-dt support Alan Tull
2017-02-15 16:14 ` [RFC 7/8] fpga-region: add sysfs interface Alan Tull
2017-02-15 17:21 ` Jason Gunthorpe
2017-02-15 17:46 ` Alan Tull
2017-02-15 17:55 ` Moritz Fischer
2017-02-15 18:06 ` Jason Gunthorpe
2017-02-15 18:23 ` Alan Tull
2017-02-15 18:31 ` Moritz Fischer
2017-02-15 19:49 ` Jason Gunthorpe
2017-02-15 22:49 ` Alan Tull
2017-02-15 23:07 ` Jason Gunthorpe
2017-02-15 20:07 ` matthew.gerlach
2017-02-15 20:37 ` Jason Gunthorpe
2017-02-15 20:54 ` Moritz Fischer
2017-02-15 21:15 ` Jason Gunthorpe
2017-02-15 21:36 ` Moritz Fischer
2017-02-15 22:42 ` Alan Tull
2017-02-16 0:16 ` Moritz Fischer
2017-02-16 17:47 ` Alan Tull
2017-02-16 17:56 ` Jason Gunthorpe
2017-02-16 18:11 ` Moritz Fischer
2017-02-17 22:28 ` Yves Vandervennet
2017-02-18 2:30 ` Moritz Fischer
2017-02-18 12:45 ` Nadathur, Sundar
2017-02-18 20:10 ` Alan Tull
2017-02-18 20:45 ` Moritz Fischer
2017-02-19 15:00 ` Alan Tull
2017-02-19 23:16 ` Alan Tull
2017-02-20 23:49 ` Moritz Fischer
2017-02-21 18:33 ` Alan Tull
2017-02-22 3:13 ` Nadathur, Sundar
2017-02-22 3:49 ` Moritz Fischer
2017-02-22 5:12 ` Jason Gunthorpe
2017-02-22 5:38 ` Moritz Fischer [this message]
2017-02-22 5:46 ` Nadathur, Sundar
2017-02-22 6:05 ` Moritz Fischer
2017-02-22 16:44 ` Jason Gunthorpe
2017-02-22 17:50 ` Moritz Fischer
2017-02-22 17:54 ` Jason Gunthorpe
2017-02-22 17:57 ` Moritz Fischer
2017-02-22 16:33 ` Alan Tull
2017-02-22 16:44 ` Moritz Fischer
2017-02-22 16:52 ` Alan Tull
2017-02-27 20:09 ` Alan Tull
2017-02-27 22:49 ` Moritz Fischer
2017-02-28 0:04 ` matthew.gerlach
2017-02-15 21:20 ` Anatolij Gustschin
2017-02-15 16:14 ` [RFC 8/8] doc: fpga: add sysfs document for fpga region Alan Tull
2017-02-28 17:35 ` FPGA Region enhancements and fixes Alan Tull
2017-02-28 22:03 ` Alan Tull
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