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From: Stephane Eranian <eranian@google.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: Ingo Molnar <mingo@kernel.org>,
	Vince Weaver <vincent.weaver@maine.edu>,
	Jiri Olsa <jolsa@redhat.com>, "Liang, Kan" <kan.liang@intel.com>,
	LKML <linux-kernel@vger.kernel.org>,
	Andrew Hunter <ahh@google.com>,
	Maria Dimakopoulou <maria.n.dimakopoulou@gmail.com>
Subject: Re: [PATCH v2 01/11] perf,x86: Fix event/group validation
Date: Tue, 26 May 2015 05:25:59 -0700	[thread overview]
Message-ID: <CABPqkBQbw=vx+hFX+gAFQRkHpkpzz6meucpdo4eMfQ6Xu_XzvA@mail.gmail.com> (raw)
In-Reply-To: <20150526121619.GN3644@twins.programming.kicks-ass.net>

On Tue, May 26, 2015 at 5:16 AM, Peter Zijlstra <peterz@infradead.org> wrote:
> On Tue, May 26, 2015 at 04:46:07AM -0700, Stephane Eranian wrote:
>> On Tue, May 26, 2015 at 3:12 AM, Peter Zijlstra <peterz@infradead.org> wrote:
>> > On Tue, May 26, 2015 at 02:24:38AM -0700, Stephane Eranian wrote:
>> >> On Fri, May 22, 2015 at 6:40 AM, Peter Zijlstra <peterz@infradead.org> wrote:
>> >> > On Fri, May 22, 2015 at 03:29:06PM +0200, Peter Zijlstra wrote:
>> >> >> @@ -788,9 +788,9 @@ int x86_schedule_events(struct cpu_hw_ev
>> >> >>               x86_pmu.start_scheduling(cpuc);
>> >> >>
>> >> >>       for (i = 0, wmin = X86_PMC_IDX_MAX, wmax = 0; i < n; i++) {
>> >> >> +             cpuc->event_constraint[i] = NULL;
>> >> >
>
>> But where is the code that says: skip reinstalling the constraint
>> in intel_get_event_constraints() because there is already a (stale)
>> one? I don't see where that is.
>
> IIRC the problem was that the copy from c2 into c1:
>
>         if (c1 && (c1->flags & PERF_X86_EVENT_DYNAMIC)) {
>                 bitmap_copy(c1->idxmsk, c2->idxmsk, X86_PMC_IDX_MAX);
>                 c1->weight = c2->weight;
>                 c2 = c1;
>         }
>
> is incomplete. For instance, flags is not copied, and some code down the
> line might check that and get wrong flags.
>
Ok, now I remember this code. It has to do with incremental scheduling.
Suppose E1, E2, E3 events where E1 is exclusive. The first call is
for scheduling E1. It gets to get_event_constraint() which "allocates" a
dynamic constraint. The second call  tries to schedule E1, E2. But the
second time for E1, you already have the dynamic constraint allocated, so
this code is reusing the constraint storage and just updates the bitmask
and weight.

Now, that the storage is not actually dynamic (kmalloc'd), but taken from a
fixed size array in cpuc, I believe we can simplify this and "re-allocate"
the constraint for each incremental call to intel_get_event_constraints().
Do you agree?


> I'm not entirely sure I saw misbehaviour, but I figured I'd better close
> that hole and rule out this is contributing to fail.
>

  reply	other threads:[~2015-05-26 13:24 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-22 13:29 [PATCH v2 00/11] Various x86 pmu scheduling patches Peter Zijlstra
2015-05-22 13:29 ` [PATCH v2 01/11] perf,x86: Fix event/group validation Peter Zijlstra
2015-05-22 13:40   ` Peter Zijlstra
2015-05-26  9:24     ` Stephane Eranian
2015-05-26 10:12       ` Peter Zijlstra
2015-05-26 11:46         ` Stephane Eranian
2015-05-26 12:16           ` Peter Zijlstra
2015-05-26 12:25             ` Stephane Eranian [this message]
2015-05-26 13:22               ` Peter Zijlstra
2015-05-26 13:44                 ` Stephane Eranian
2015-05-22 13:29 ` [PATCH v2 02/11] perf/x86: Improve HT workaround GP counter constraint Peter Zijlstra
2015-05-22 13:42   ` Peter Zijlstra
2015-05-26  9:37   ` Stephane Eranian
2015-05-26 10:15     ` Peter Zijlstra
2015-05-26 11:47       ` Stephane Eranian
2015-05-26 13:19         ` Peter Zijlstra
2015-05-26 16:07           ` Peter Zijlstra
2015-05-27  9:01             ` Stephane Eranian
2015-05-27 10:11               ` Peter Zijlstra
2015-05-27 11:39                 ` Stephane Eranian
2015-05-27 10:13               ` Peter Zijlstra
2015-05-27 11:44                 ` Stephane Eranian
2015-05-26 23:33   ` Andi Kleen
2015-05-27  7:48     ` Peter Zijlstra
2015-05-27 14:00       ` Andi Kleen
2015-05-22 13:29 ` [PATCH v2 03/11] perf/x86: Correct local vs remote sibling state Peter Zijlstra
2015-05-26 11:48   ` Stephane Eranian
2015-05-22 13:29 ` [PATCH v2 04/11] perf/x86: Use lockdep Peter Zijlstra
2015-05-22 13:29 ` [PATCH v2 05/11] perf/x86: Simplify dynamic constraint code somewhat Peter Zijlstra
2015-05-22 13:29 ` [PATCH v2 06/11] perf/x86: Make WARNs consistent Peter Zijlstra
2015-05-22 13:29 ` [PATCH v2 07/11] perf/x86: Move intel_commit_scheduling() Peter Zijlstra
2015-05-22 13:29 ` [PATCH v2 08/11] perf/x86: Remove pointless tests Peter Zijlstra
2015-05-22 13:29 ` [PATCH v2 09/11] perf/x86: Remove intel_excl_states::init_state Peter Zijlstra
2015-05-22 13:29 ` [PATCH v2 10/11] perf,x86: Simplify logic Peter Zijlstra
2015-05-22 13:29 ` [PATCH v2 11/11] perf/x86: Simplify put_exclusive_constraints Peter Zijlstra
2015-05-22 13:38   ` Peter Zijlstra

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