From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758058AbcDHJnP (ORCPT ); Fri, 8 Apr 2016 05:43:15 -0400 Received: from mail-oi0-f52.google.com ([209.85.218.52]:34424 "EHLO mail-oi0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758004AbcDHJnN (ORCPT ); Fri, 8 Apr 2016 05:43:13 -0400 MIME-Version: 1.0 In-Reply-To: <1459436979-17275-7-git-send-email-mcoquelin.stm32@gmail.com> References: <1459436979-17275-1-git-send-email-mcoquelin.stm32@gmail.com> <1459436979-17275-7-git-send-email-mcoquelin.stm32@gmail.com> Date: Fri, 8 Apr 2016 11:43:12 +0200 Message-ID: Subject: Re: [PATCH v2 6/9] pinctrl: Add IRQ support to STM32 gpios From: Linus Walleij To: Maxime Coquelin Cc: Thomas Gleixner , Jason Cooper , Marc Zyngier , Mark Rutland , Rob Herring , "linux-gpio@vger.kernel.org" , Arnd Bergmann , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" , Daniel Thompson , Bruno Herrera , Lee Jones Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Mar 31, 2016 at 5:09 PM, Maxime Coquelin wrote: > +static int stm32_gpio_to_irq(struct gpio_chip *chip, unsigned offset) > +{ > + struct stm32_pinctrl *pctl = dev_get_drvdata(chip->parent); > + struct stm32_gpio_bank *bank = gpiochip_get_data(chip); > + unsigned int irq; > + > + regmap_field_write(pctl->irqmux[offset], bank->range.id); No. You must implement the irqchip and GPIO controllers to be orthogonal, doing things like this creates a semantic that assumes .to_irq() is always called before using the IRQ and that is not guaranteed at all. A consumer may very well use an interrupt right off the irqchip without this being called first. All this function should do is translate a number. No other semantics. This needs to be done from the irqchip (sorry). Yours, Linus Walleij