From: Linus Walleij <linus.walleij@linaro.org>
To: Paul Cercueil <paul@crapouillou.net>
Cc: Zhou Yanjie <zhouyanjie@zoho.com>,
"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
stable <stable@vger.kernel.org>
Subject: Re: [PATCH 1/2] pinctrl: ingenic: Fix JZ4760 support
Date: Mon, 4 Jan 2021 15:35:03 +0100 [thread overview]
Message-ID: <CACRpkdYPN5fhpWfo=hsK3Qut_a0P7KO3cTv=znJfH5OfvfJ6QQ@mail.gmail.com> (raw)
In-Reply-To: <20201211232810.261565-1-paul@crapouillou.net>
On Sat, Dec 12, 2020 at 12:28 AM Paul Cercueil <paul@crapouillou.net> wrote:
> - JZ4760 and JZ4760B have a similar register layout as the JZ4740, and
> don't use the new register layout, which was introduced with the
> JZ4770 SoC and not the JZ4760 or JZ4760B SoCs.
>
> - The JZ4740 code path only expected two function modes to be
> configurable for each pin, and wouldn't work with more than two. Fix
> it for the JZ4760, which has four configurable function modes.
>
> Fixes: 0257595a5cf4 ("pinctrl: Ingenic: Add pinctrl driver for JZ4760 and JZ4760B.")
> Cc: <stable@vger.kernel.org> # 5.3
> Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Patches applied for fixes, sorry for missing this for a long time...
Yours,
Linus Walleij
prev parent reply other threads:[~2021-01-04 14:36 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-11 23:28 [PATCH 1/2] pinctrl: ingenic: Fix JZ4760 support Paul Cercueil
2020-12-11 23:28 ` [PATCH 2/2] pinctrl: ingenic: Rename registers from JZ4760_GPIO_* to JZ4770_GPIO_* Paul Cercueil
2021-01-04 14:35 ` Linus Walleij [this message]
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