From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CA5A9C4338F for ; Wed, 11 Aug 2021 09:05:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A706360F11 for ; Wed, 11 Aug 2021 09:05:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236591AbhHKJGT (ORCPT ); Wed, 11 Aug 2021 05:06:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37074 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236487AbhHKJGO (ORCPT ); Wed, 11 Aug 2021 05:06:14 -0400 Received: from mail-lj1-x236.google.com (mail-lj1-x236.google.com [IPv6:2a00:1450:4864:20::236]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 195EEC0613D5 for ; Wed, 11 Aug 2021 02:05:51 -0700 (PDT) Received: by mail-lj1-x236.google.com with SMTP id h11so3356828ljo.12 for ; Wed, 11 Aug 2021 02:05:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=WHR5vMYM5Xq0aEUZrFZkJXPDd1LunIEi4v9qS0h1HO0=; b=U9Jax0Pz4olLYQJIFk2TzLLCgD1/AgsJjjc1jPyfKN+iHIfSf+sOvIgQ2mOcBufJOe dbr669Dfx7xE+7MQXb/jTVZ9PEgd6/3eyXVPGZOoS32v5CEmRvBSJBGOfOGRPUkMz0hr Ytp9oJLePRyBugqYenwQeXFNI4dEVGqFCsCV9UzVJQcEW9lrhEZrg4sUfRmNk7ACOHck a4a2fqVpcZG274sxyUTFt0N2g+UU5o//7Meh9BOOjDCmzm2tbbJtOrxGrx25r3/4WXhB lNP5/JqECXVMx468VZLokXnF9EuF27I4yPLn2YSKV9ndXpW7fCzOgPzKek/fUy820QsH bx0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=WHR5vMYM5Xq0aEUZrFZkJXPDd1LunIEi4v9qS0h1HO0=; b=Wx9x+yFH3AT+5yTu3ifRQ5QMy/W6sM8ouLeuKcWWLy9rYqJQSSeDWe0dlvtkBvmafQ Ax06wfLFoK6JxLKmSHgHBnJ4cKUPa2eCpJZwKKTHepbe/6FBwq1/XzKLC2j0dY9tmZg1 s2XaJfwkTngpF9lEqQShNTWMLSOezN+FgdlAfz+4I7NP+UkXZljTw4DOoqYarbZWQxQN JLBLRbMuKQcIvbQzJMOVf2DGy0cRfV/mgglzNCmbcrkax4wozot1oPf8NF/X6M80Agxq dy32dwQdCxMYFezJsAhNe5cPd6WOSZZT2B3ZXGNH3LYhW7EVNTcRKFVEYGwwVfaUjx3X 54Pg== X-Gm-Message-State: AOAM533mNMnLeTeFxrJSftnusrU7rdSST4bWSf87BxAHkJpGMIIy6eL5 bf9RzHjmmlCXMifklknQkwaMYTqdEh3GF7/yQWXg4A== X-Google-Smtp-Source: ABdhPJzJiIAevboqUG5VU4DSPztTjR+dTM5JpLH29JynmMjAv5LJj9eIi3aCBtOUd4vqeU+9At92D/p9hhh83zGz9LA= X-Received: by 2002:a2e:b819:: with SMTP id u25mr22350417ljo.438.1628672749431; Wed, 11 Aug 2021 02:05:49 -0700 (PDT) MIME-Version: 1.0 References: <20210726111941.1447057-1-wenst@chromium.org> In-Reply-To: <20210726111941.1447057-1-wenst@chromium.org> From: Linus Walleij Date: Wed, 11 Aug 2021 11:05:38 +0200 Message-ID: Subject: Re: [PATCH] dt-bindings: pinctrl: mt8195: Use real world values for drive-strength arguments To: Chen-Yu Tsai Cc: Rob Herring , Matthias Brugger , Sean Wang , Zhiyong Tao , "open list:GPIO SUBSYSTEM" , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "moderated list:ARM/Mediatek SoC support" , Linux ARM , linux-kernel Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Jul 26, 2021 at 1:19 PM Chen-Yu Tsai wrote: > The original binding submission for MT8195 pinctrl described the > possible drive strength values in micro-amps in its description, but > then proceeded to list register values in its device tree binding > constraints. > > However, the macros used with the Mediatek pinctrl bindings directly > specify the drive strength in micro-amps, instead of hardware register > values. The current driver implementation in Linux does convert the > value from micro-amps to hardware register values. This implementation > is also used with MT7622 and MT8183, which use real world values in > their device trees. > > Given the above, it was likely an oversight to use the raw register > values in the binding. Correct the values in the binding. Also drop > the description since the binding combined with its parent, > pinctrl/pincfg.yaml, the binding is now self-describing. > > Fixes: 7f7663899d94 ("dt-bindings: pinctrl: mt8195: add pinctrl file and binding document") > Signed-off-by: Chen-Yu Tsai Patch applied. Yours, Linus Walleij