From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935407AbdCXPnA (ORCPT ); Fri, 24 Mar 2017 11:43:00 -0400 Received: from mail-oi0-f53.google.com ([209.85.218.53]:33042 "EHLO mail-oi0-f53.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757535AbdCXPmu (ORCPT ); Fri, 24 Mar 2017 11:42:50 -0400 MIME-Version: 1.0 In-Reply-To: <1490368934-12494-2-git-send-email-jacopo+renesas@jmondi.org> References: <1490368934-12494-1-git-send-email-jacopo+renesas@jmondi.org> <1490368934-12494-2-git-send-email-jacopo+renesas@jmondi.org> From: Linus Walleij Date: Fri, 24 Mar 2017 16:42:47 +0100 Message-ID: Subject: Re: [PATCH v3 1/7] pinctrl: Renesas RZ/A1 pin and gpio controller To: Jacopo Mondi Cc: Geert Uytterhoeven , Laurent Pinchart , Chris Brandt , Rob Herring , Mark Rutland , Russell King , Linux-Renesas , "linux-gpio@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Mar 24, 2017 at 4:22 PM, Jacopo Mondi wrote: I assume Geert will queue this driver even if it is outside of sh-pfc? > Add combined gpio and pin controller driver for Renesas RZ/A1 > r7s72100 SoC. > > Signed-off-by: Jacopo Mondi > --- > drivers/pinctrl/Kconfig | 10 + > drivers/pinctrl/Makefile | 1 + > drivers/pinctrl/pinctrl-rza1.c | 961 +++++++++++++++++++++++++++++++++++++++++ So this is very different from the SH-PFC family and should not be in drivers/pinctrl/sh-pfc? > +config PINCTRL_RZA1 > + bool "Renesas RZ/A1 gpio and pinctrl driver" > + depends on OF > + depends on ARCH_R7S72100 || COMPILE_TEST > + select GENERIC_PINCTRL_GROUPS > + select GENERIC_PINMUX_FUNCTIONS > + select GENERIC_PINCONF If it is also a GPIO driver I guess it should select GPIOLIB as well. This was not possible in the past, but it is possible nowadays. > +struct gpio_chip rza1_gpiochip_template = { > + .request = rza1_gpio_request, > + .free = rza1_gpio_free, > + .get_direction = rza1_gpio_get_direction, > + .direction_input = rza1_gpio_direction_input, > + .direction_output = rza1_gpio_direction_output, > + .get = rza1_gpio_get, > + .set = rza1_gpio_set, > +}; We now also have .set_multiple() and more interestingly .set_config() which can be backed by pinctrl if you want to e.g. support debouncing and/or open drain/open source. Maybe this is stuff your pin controller can do, but not needed in the initial submission for sure. > +static int rza1_pinmux_set(struct pinctrl_dev *pctldev, unsigned int selector, > + unsigned int group) Please name it rza1_set_mux() to correspond with the ops field. Yours, Linus Walleij