[PATCH 00/14] ARM: randconfig build fixes

[PATCH 00/14] ARM: randconfig build fixes

[Arnd Bergmann]

From: Arnd Bergmann <arnd@arndb.de>

Hi Russell,

This is a set of patches that address various problems building random
configurations. Most of these are older and have been sitting in my
collection of random fixes that I need to get back to. After the -Werror
changes for v5.15, I did that and collected all the patches that fix
something I actually run into. These are the arm32 specific ones that
I think we could merge right away, either for v5.15 as a bugfix or
for v5.16.

Let me know if you have any objections. As the patches are mostly
trivial, I would otherwise send them to your patch tracker once you've
had time to take a look.

There are a few more patches that I'm currently using, but those
are the ones that that are not ready to be merged, either because
they have been rejected before or because they are known to break
something.

      Arnd

Arnd Bergmann (13):
  ARM: RiscPC needs older gcc version
  ARM: patch: fix BE32 compilation
  ARM: remove duplicate memcpy() definition
  ARM: kprobes: address gcc -Wempty-body warning
  ARM: ARMv7-M uses BE-8, not BE-32
  ARM: disallow CONFIG_THUMB with ARMv4
  ARM: fix link warning with XIP + frame-pointer
  ARM: kprobes: fix arch_init_kprobes() prototype
  ARM: allow compile-testing without machine record
  ARM: only warn about XIP address when not compile testing
  ARM: kasan: work around LPAE build warning
  ARM: add CONFIG_PHYS_OFFSET default values
  [RFC] ARM: forbid ftrace with clang and thumb2_kernel

Nick Desaulniers (1):
  ARM: use .arch directives instead of assembler command line flags

 arch/arm/Kconfig                      | 12 +++++++-----
 arch/arm/boot/compressed/Makefile     |  2 --
 arch/arm/boot/compressed/decompress.c |  2 ++
 arch/arm/common/Makefile              |  2 --
 arch/arm/common/mcpm_head.S           |  2 ++
 arch/arm/common/vlock.S               |  2 ++
 arch/arm/include/asm/opcodes.h        |  9 +++++++--
 arch/arm/kernel/Makefile              |  2 --
 arch/arm/kernel/hyp-stub.S            |  2 ++
 arch/arm/kernel/swp_emulate.c         |  1 +
 arch/arm/kernel/vmlinux-xip.lds.S     |  8 +++++++-
 arch/arm/kernel/vmlinux.lds.S         |  2 ++
 arch/arm/lib/Makefile                 |  4 ----
 arch/arm/lib/delay-loop.S             |  4 ++++
 arch/arm/mach-at91/Makefile           |  3 ---
 arch/arm/mach-at91/pm_suspend.S       |  4 ++++
 arch/arm/mach-imx/Makefile            |  3 ---
 arch/arm/mach-imx/headsmp.S           |  2 ++
 arch/arm/mach-imx/resume-imx6.S       |  2 ++
 arch/arm/mach-imx/suspend-imx6.S      |  2 ++
 arch/arm/mach-mvebu/Makefile          |  3 ---
 arch/arm/mach-mvebu/coherency_ll.S    |  1 +
 arch/arm/mach-mvebu/pmsu.c            |  1 +
 arch/arm/mach-npcm/Makefile           |  2 --
 arch/arm/mach-npcm/headsmp.S          |  2 ++
 arch/arm/mm/Kconfig                   |  4 ++--
 arch/arm/mm/Makefile                  | 15 ---------------
 arch/arm/mm/abort-ev6.S               |  1 +
 arch/arm/mm/abort-ev7.S               |  1 +
 arch/arm/mm/cache-v6.S                |  2 ++
 arch/arm/mm/cache-v7.S                |  2 ++
 arch/arm/mm/cache-v7m.S               |  2 ++
 arch/arm/mm/copypage-feroceon.c       |  1 +
 arch/arm/mm/kasan_init.c              |  2 +-
 arch/arm/mm/proc-v6.S                 |  2 ++
 arch/arm/mm/proc-v7-2level.S          |  2 ++
 arch/arm/mm/proc-v7.S                 |  2 ++
 arch/arm/mm/tlb-v6.S                  |  2 ++
 arch/arm/mm/tlb-v7.S                  |  2 ++
 arch/arm/probes/kprobes/core.c        |  2 +-
 arch/arm/probes/kprobes/test-core.h   |  2 +-
 drivers/memory/Makefile               |  2 --
 drivers/memory/ti-emif-sram-pm.S      |  1 +
 43 files changed, 75 insertions(+), 51 deletions(-)

-- 
Cc: Ard Biesheuvel <ardb@kernel.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Nathan Chancellor <nathan@kernel.org>
Cc: Nick Desaulniers <ndesaulniers@google.com>
Cc: llvm@lists.linux.dev
2.29.2

[PATCH 01/14] ARM: RiscPC needs older gcc version

[Arnd Bergmann]

From: Arnd Bergmann <arnd@arndb.de>

Attempting to build mach-rpc with gcc-9 or higher, or with any version
of clang results in a build failure, like:

arm-linux-gnueabi-gcc-11.1.0: error: unrecognized -march target: armv3m
arm-linux-gnueabi-gcc-11.1.0: note: valid arguments are: armv4 armv4t armv5t armv5te armv5tej armv6 armv6j armv6k armv6z armv6kz armv6zk armv6t2 armv6-m armv6s-m armv7 armv7-a armv7ve armv7-r armv7-m armv7e-m armv8-a armv8.1-a armv8.2-a armv8.3-a armv8.4-a armv8.5-a armv8.6-a armv8-m.base armv8-m.main armv8-r armv8.1-m.main iwmmxt iwmmxt2; did you mean 'armv4'?

Handle this in Kconfig so we don't run into this with randconfig
builds.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index fc196421b2ce..12a0bd4b315d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -431,7 +431,7 @@ config ARCH_PXA
 
 config ARCH_RPC
 	bool "RiscPC"
-	depends on MMU
+	depends on !CC_IS_CLANG || GCC_VERSION < 90100
 	select ARCH_ACORN
 	select ARCH_MAY_HAVE_PC_FDC
 	select ARCH_SPARSEMEM_ENABLE
-- 
2.29.2

[PATCH 02/14] ARM: patch: fix BE32 compilation

[Arnd Bergmann]

From: Arnd Bergmann <arnd@arndb.de>

On BE32 kernels, the __opcode_to_mem_thumb32() interface is intentionally
not defined, but it is referenced whenever runtime patching is enabled
for the kernel, which may be for ftrace, jump label, kprobes or kgdb:

arch/arm/kernel/patch.c: In function '__patch_text_real':
arch/arm/kernel/patch.c:94:32: error: implicit declaration of function '__opcode_to_mem_thumb32' [-Werror=implicit-function-declaration]
   94 |                         insn = __opcode_to_mem_thumb32(insn);
      |                                ^~~~~~~~~~~~~~~~~~~~~~~

Since BE32 kernels never run Thumb2 code, we never end up using the
result of this call, so providing an extern declaration without
a definition makes it build correctly.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/include/asm/opcodes.h | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/opcodes.h b/arch/arm/include/asm/opcodes.h
index 6bff94b2372b..38e3eabff5c3 100644
--- a/arch/arm/include/asm/opcodes.h
+++ b/arch/arm/include/asm/opcodes.h
@@ -110,12 +110,17 @@ extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
 #define __opcode_to_mem_thumb16(x) ___opcode_identity16(x)
 #define ___asm_opcode_to_mem_arm(x) ___asm_opcode_identity32(x)
 #define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_identity16(x)
-#ifndef CONFIG_CPU_ENDIAN_BE32
+#ifdef CONFIG_CPU_ENDIAN_BE32
+#ifndef __ASSEMBLY__
 /*
  * On BE32 systems, using 32-bit accesses to store Thumb instructions will not
  * work in all cases, due to alignment constraints.  For now, a correct
- * version is not provided for BE32.
+ * version is not provided for BE32, but the prototype needs to be there
+ * to compile patch.c.
  */
+extern __u32 __opcode_to_mem_thumb32(__u32);
+#endif
+#else
 #define __opcode_to_mem_thumb32(x) ___opcode_swahw32(x)
 #define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahw32(x)
 #endif
-- 
2.29.2

[PATCH 03/14] ARM: remove duplicate memcpy() definition

[Arnd Bergmann]

From: Arnd Bergmann <arnd@arndb.de>

Both the decompressor code and the kasan logic try to override
the memcpy() and memmove()  definitions, which leading to a clash
in a KASAN-enabled kernel with XZ decompression:

arch/arm/boot/compressed/decompress.c:50:9: error: 'memmove' macro redefined [-Werror,-Wmacro-redefined]
 #define memmove memmove
        ^
arch/arm/include/asm/string.h:59:9: note: previous definition is here
 #define memmove(dst, src, len) __memmove(dst, src, len)
        ^
arch/arm/boot/compressed/decompress.c:51:9: error: 'memcpy' macro redefined [-Werror,-Wmacro-redefined]
 #define memcpy memcpy
        ^
arch/arm/include/asm/string.h:58:9: note: previous definition is here
 #define memcpy(dst, src, len) __memcpy(dst, src, len)
        ^

Here we want the set of functions from the decompressor, so undefine
the other macros before the override.

Fixes: d6d51a96c7d6 ("ARM: 9014/2: Replace string mem* functions for KASan")
Fixes: a7f464f3db93 ("ARM: 7001/2: Wire up support for the XZ decompressor")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/boot/compressed/decompress.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/compressed/decompress.c b/arch/arm/boot/compressed/decompress.c
index aa075d8372ea..5b387c60accd 100644
--- a/arch/arm/boot/compressed/decompress.c
+++ b/arch/arm/boot/compressed/decompress.c
@@ -47,7 +47,9 @@ extern char * strchrnul(const char *, int);
 #endif
 
 #ifdef CONFIG_KERNEL_XZ
+#undef memmove
 #define memmove memmove
+#undef memcpy
 #define memcpy memcpy
 #include "../../../../lib/decompress_unxz.c"
 #endif
-- 
2.29.2

[PATCH 04/14] ARM: kprobes: address gcc -Wempty-body warning

[Arnd Bergmann]

From: Arnd Bergmann <arnd@arndb.de>

Building with 'make W=1' shows a warning in some configurations
when 'verbose()' is defined to be empty.

arch/arm/probes/kprobes/test-core.c: In function 'kprobes_test_case_start':
arch/arm/probes/kprobes/test-core.c:1367:26: error: suggest braces around empty body in an 'else' statement [-Werror=empty-body]
 1367 |      current_instruction);
      |                          ^

Change the definition of verbose() to use no_printk(), allowing format
string checking and avoiding the warning.

Link: https://lore.kernel.org/all/20210322114600.3528031-1-arnd@kernel.org/
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/probes/kprobes/test-core.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/probes/kprobes/test-core.h b/arch/arm/probes/kprobes/test-core.h
index f1d5583e7bbb..56ad3c0aaeea 100644
--- a/arch/arm/probes/kprobes/test-core.h
+++ b/arch/arm/probes/kprobes/test-core.h
@@ -98,7 +98,7 @@ struct test_arg_end {
 #if VERBOSE
 #define verbose(fmt, ...) pr_info(fmt, ##__VA_ARGS__)
 #else
-#define verbose(fmt, ...)
+#define verbose(fmt, ...) no_printk(fmt, ##__VA_ARGS__)
 #endif
 
 #define TEST_GROUP(title)					\
-- 
2.29.2

[PATCH 05/14] ARM: ARMv7-M uses BE-8, not BE-32

[Arnd Bergmann]

From: Arnd Bergmann <arnd@arndb.de>

When configuring the kernel for big-endian, we set either BE-8 or BE-32
based on the CPU architecture level. Until linux-4.4, we did not have
any ARMv7-M platform allowing big-endian builds, but now i.MX/Vybrid
is in that category, adn we get a build error because of this:

arch/arm/kernel/module-plts.c: In function 'get_module_plt':
arch/arm/kernel/module-plts.c:60:46: error: implicit declaration of function '__opcode_to_mem_thumb32' [-Werror=implicit-function-declaration]

This comes down to picking the wrong default, ARMv7-M uses BE8
like ARMv7-A does. Changing the default gets the kernel to compile
and presumably works.

Tested-by: Vladimir Murzin <vladimir.murzin@arm.com>
https://lore.kernel.org/all/1455804123-2526139-2-git-send-email-arnd@arndb.de/
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/mm/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 8355c3895894..82aa990c4180 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -750,7 +750,7 @@ config CPU_BIG_ENDIAN
 config CPU_ENDIAN_BE8
 	bool
 	depends on CPU_BIG_ENDIAN
-	default CPU_V6 || CPU_V6K || CPU_V7
+	default CPU_V6 || CPU_V6K || CPU_V7 || CPU_V7M
 	help
 	  Support for the BE-8 (big-endian) mode on ARMv6 and ARMv7 processors.
 
-- 
2.29.2

[PATCH 06/14] ARM: disallow CONFIG_THUMB with ARMv4

[Arnd Bergmann]

From: Arnd Bergmann <arnd@arndb.de>

We can currently build a multi-cpu enabled kernel that allows both ARMv4
and ARMv5 CPUs, and also supports THUMB mode in user space.

However, returning to user space in this configuration with the usr_ret
macro requires the use of the 'bx' instruction, which is refused by
the assembler:

arch/arm/kernel/entry-armv.S: Assembler messages:
arch/arm/kernel/entry-armv.S:937: Error: selected processor does not support `bx lr' in ARM mode
arch/arm/kernel/entry-armv.S:960: Error: selected processor does not support `bx lr' in ARM mode
arch/arm/kernel/entry-armv.S:1003: Error: selected processor does not support `bx lr' in ARM mode
<instantiation>:2:2: note: instruction requires: armv4t
 bx lr

While it would be possible to handle this correctly in principle, doing so
seems to not be worth it, if we can simply avoid the problem by enforcing
that a kernel supporting both ARMv4 and a later CPU architecture cannot
run THUMB binaries.

This turned up while build-testing with clang; for some reason,
gcc never triggered the problem.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/mm/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 82aa990c4180..58afba346729 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -675,7 +675,7 @@ config ARM_PV_FIXUP
 
 config ARM_THUMB
 	bool "Support Thumb user binaries" if !CPU_THUMBONLY && EXPERT
-	depends on CPU_THUMB_CAPABLE
+	depends on CPU_THUMB_CAPABLE && !CPU_32v4
 	default y
 	help
 	  Say Y if you want to include kernel support for running user space
-- 
2.29.2

[PATCH 07/14] ARM: fix link warning with XIP + frame-pointer

[Arnd Bergmann]

From: Arnd Bergmann <arnd@arndb.de>

When frame pointers are used instead of the ARM unwinder,
and the kernel is built using clang with an external assembler
and CONFIG_XIP_KERNEL, every file produces two warnings
like:

arm-linux-gnueabi-ld: warning: orphan section `.ARM.extab' from `net/mac802154/util.o' being placed in section `.ARM.extab'
arm-linux-gnueabi-ld: warning: orphan section `.ARM.exidx' from `net/mac802154/util.o' being placed in section `.ARM.exidx'

The same fix was already merged for the normal (non-XIP)
linker script, with a longer description.

Fixes: c39866f268f8 ("arm/build: Always handle .ARM.exidx and .ARM.extab sections")
Reviewed-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/kernel/vmlinux-xip.lds.S | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/kernel/vmlinux-xip.lds.S b/arch/arm/kernel/vmlinux-xip.lds.S
index 50136828f5b5..e0c00986487f 100644
--- a/arch/arm/kernel/vmlinux-xip.lds.S
+++ b/arch/arm/kernel/vmlinux-xip.lds.S
@@ -40,6 +40,10 @@ SECTIONS
 		ARM_DISCARD
 		*(.alt.smp.init)
 		*(.pv_table)
+#ifndef CONFIG_ARM_UNWIND
+		*(.ARM.exidx) *(.ARM.exidx.*)
+		*(.ARM.extab) *(.ARM.extab.*)
+#endif
 	}
 
 	. = XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR);
-- 
2.29.2

[PATCH 08/14] ARM: kprobes: fix arch_init_kprobes() prototype

[Arnd Bergmann]

From: Arnd Bergmann <arnd@arndb.de>

With extra warnings enabled, gcc complains about this function
definition:

arch/arm/probes/kprobes/core.c: In function 'arch_init_kprobes':
arch/arm/probes/kprobes/core.c:465:12: warning: old-style function definition [-Wold-style-definition]
  465 | int __init arch_init_kprobes()

Fixes: 24ba613c9d6c ("ARM kprobes: core code")
Acked-by: Masami Hiramatsu <mhiramat@kernel.org>
Link: https://lore.kernel.org/all/20201027093057.c685a14b386acacb3c449e3d@kernel.org/
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/probes/kprobes/core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/probes/kprobes/core.c b/arch/arm/probes/kprobes/core.c
index 27e0af78e88b..9d8634e2f12f 100644
--- a/arch/arm/probes/kprobes/core.c
+++ b/arch/arm/probes/kprobes/core.c
@@ -439,7 +439,7 @@ static struct undef_hook kprobes_arm_break_hook = {
 
 #endif /* !CONFIG_THUMB2_KERNEL */
 
-int __init arch_init_kprobes()
+int __init arch_init_kprobes(void)
 {
 	arm_probes_decode_init();
 #ifdef CONFIG_THUMB2_KERNEL
-- 
2.29.2

[PATCH 09/14] ARM: allow compile-testing without machine record

[Arnd Bergmann]

From: Arnd Bergmann <arnd@arndb.de>

A lot of randconfig builds end up not selecting any machine type at
all. This is generally fine for the purpose of compile testing, but
of course it means that the kernel is not usable on actual hardware,
and it causes a warning about this fact.

As most of the build bots now force-enable CONFIG_COMPILE_TEST for
randconfig builds, use that as a guard to control whether we warn
on this type of broken configuration.

We could do the same for the missing-cpu-type warning, but those
configurations fail to build much earlier.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/kernel/vmlinux-xip.lds.S | 2 ++
 arch/arm/kernel/vmlinux.lds.S     | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/arch/arm/kernel/vmlinux-xip.lds.S b/arch/arm/kernel/vmlinux-xip.lds.S
index e0c00986487f..bf16fadb6a00 100644
--- a/arch/arm/kernel/vmlinux-xip.lds.S
+++ b/arch/arm/kernel/vmlinux-xip.lds.S
@@ -166,7 +166,9 @@ SECTIONS
  * binutils is too old (for other reasons as well)
  */
 ASSERT((__proc_info_end - __proc_info_begin), "missing CPU support")
+#ifndef CONFIG_COMPILE_TEST
 ASSERT((__arch_info_end - __arch_info_begin), "no machine record defined")
+#endif
 
 #ifdef CONFIG_XIP_DEFLATED_DATA
 /*
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index 20c4f6d20c7a..f02d617e3359 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -174,6 +174,8 @@ __start_rodata_section_aligned = ALIGN(__start_rodata, 1 << SECTION_SHIFT);
  * binutils is too old (for other reasons as well)
  */
 ASSERT((__proc_info_end - __proc_info_begin), "missing CPU support")
+#ifndef CONFIG_COMPILE_TEST
 ASSERT((__arch_info_end - __arch_info_begin), "no machine record defined")
+#endif
 
 #endif /* CONFIG_XIP_KERNEL */
-- 
2.29.2

[PATCH 10/14] ARM: only warn about XIP address when not compile testing

[Arnd Bergmann]

From: Arnd Bergmann <arnd@arndb.de>

In randconfig builds, we sometimes come across this warning:

arm-linux-gnueabi-ld: XIP start address may cause MPU programming issues

While this is helpful for actual systems to figure out why it
fails, the warning does not provide any benefit for build testing,
so guard it in a check for CONFIG_COMPILE_TEST, which is usually
set on randconfig builds.

Fixes: 216218308cfb ("ARM: 8713/1: NOMMU: Support MPU in XIP configuration")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/kernel/vmlinux-xip.lds.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/kernel/vmlinux-xip.lds.S b/arch/arm/kernel/vmlinux-xip.lds.S
index bf16fadb6a00..76678732c60d 100644
--- a/arch/arm/kernel/vmlinux-xip.lds.S
+++ b/arch/arm/kernel/vmlinux-xip.lds.S
@@ -178,7 +178,7 @@ ASSERT((__arch_info_end - __arch_info_begin), "no machine record defined")
 ASSERT((_end - __bss_start) >= 12288, ".bss too small for CONFIG_XIP_DEFLATED_DATA")
 #endif
 
-#ifdef CONFIG_ARM_MPU
+#if defined(CONFIG_ARM_MPU) && !defined(CONFIG_COMPILE_TEST)
 /*
  * Due to PMSAv7 restriction on base address and size we have to
  * enforce minimal alignment restrictions. It was seen that weaker
-- 
2.29.2

[PATCH 11/14] ARM: kasan: work around LPAE build warning

[Arnd Bergmann]

From: Arnd Bergmann <arnd@arndb.de>

pgd_page_vaddr() returns an 'unsigned long' address, causing a warning
with the memcpy() call in kasan_init():

arch/arm/mm/kasan_init.c: In function 'kasan_init':
include/asm-generic/pgtable-nop4d.h:44:50: error: passing argument 2 of '__memcpy' makes pointer from integer without a cast [-Werror=int-conversion]
   44 | #define pgd_page_vaddr(pgd)                     ((unsigned long)(p4d_pgtable((p4d_t){ pgd })))
      |                                                 ~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
      |                                                  |
      |                                                  long unsigned int
arch/arm/include/asm/string.h:58:45: note: in definition of macro 'memcpy'
   58 | #define memcpy(dst, src, len) __memcpy(dst, src, len)
      |                                             ^~~
arch/arm/mm/kasan_init.c:229:16: note: in expansion of macro 'pgd_page_vaddr'
  229 |                pgd_page_vaddr(*pgd_offset_k(KASAN_SHADOW_START)),
      |                ^~~~~~~~~~~~~~
arch/arm/include/asm/string.h:21:47: note: expected 'const void *' but argument is of type 'long unsigned int'
   21 | extern void *__memcpy(void *dest, const void *src, __kernel_size_t n);
      |                                   ~~~~~~~~~~~~^~~

Avoid this by adding an explicit typecast.

Fixes: 5615f69bc209 ("ARM: 9016/2: Initialize the mapping of KASan shadow memory")
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/all/CACRpkdb3DMvof3-xdtss0Pc6KM36pJA-iy=WhvtNVnsDpeJ24Q@mail.gmail.com/
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/mm/kasan_init.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mm/kasan_init.c b/arch/arm/mm/kasan_init.c
index 9c348042a724..4b1619584b23 100644
--- a/arch/arm/mm/kasan_init.c
+++ b/arch/arm/mm/kasan_init.c
@@ -226,7 +226,7 @@ void __init kasan_init(void)
 	BUILD_BUG_ON(pgd_index(KASAN_SHADOW_START) !=
 		     pgd_index(KASAN_SHADOW_END));
 	memcpy(tmp_pmd_table,
-	       pgd_page_vaddr(*pgd_offset_k(KASAN_SHADOW_START)),
+	       (void*)pgd_page_vaddr(*pgd_offset_k(KASAN_SHADOW_START)),
 	       sizeof(tmp_pmd_table));
 	set_pgd(&tmp_pgd_table[pgd_index(KASAN_SHADOW_START)],
 		__pgd(__pa(tmp_pmd_table) | PMD_TYPE_TABLE | L_PGD_SWAPPER));
-- 
2.29.2

[PATCH 12/14] ARM: add CONFIG_PHYS_OFFSET default values

[Arnd Bergmann]

From: Arnd Bergmann <arnd@arndb.de>

For platforms that are not yet converted to ARCH_MULTIPLATFORM,
we can disable CONFIG_ARM_PATCH_PHYS_VIRT, which in turn requires
setting a correct address here.

As we actualy know what all the values are supposed to be based
on the old mach/memory.h header file contents (from git history),
we can just add them here.

This also solves a problem in Kconfig where 'make randconfig'
fails to continue if no number is selected for a 'hex' option.
Users can still override the number at configuration time, e.g.
when the memory visible to the kernel starts at a nonstandard
address on some machine, but it should no longer be required
now.

I originally posted this back in 2016, but the problem still
persists. The patch has gotten much simpler though, as almost
all platforms rely on ARM_PATCH_PHYS_VIRT now.

Acked-by: Nicolas Pitre <nico@linaro.org>
Link: https://lore.kernel.org/linux-arm-kernel/1455804123-2526139-5-git-send-email-arnd@arndb.de/
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/Kconfig | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 12a0bd4b315d..0d4f3e2d50ad 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -264,10 +264,12 @@ config PHYS_OFFSET
 	hex "Physical address of main memory" if MMU
 	depends on !ARM_PATCH_PHYS_VIRT
 	default DRAM_BASE if !MMU
-	default 0x00000000 if ARCH_FOOTBRIDGE
+	default 0x00000000 if ARCH_FOOTBRIDGE || ARCH_IXP4XX
 	default 0x10000000 if ARCH_OMAP1 || ARCH_RPC
-	default 0x20000000 if ARCH_S5PV210
-	default 0xc0000000 if ARCH_SA1100
+	default 0x30000000 if ARCH_S3C24XX
+	default 0xa0000000 if ARCH_IOP32X || ARCH_PXA
+	default 0xc0000000 if ARCH_EP93XX || ARCH_SA1100
+	default 0
 	help
 	  Please provide the physical address corresponding to the
 	  location of main memory in your system.
-- 
2.29.2

[PATCH 13/14] ARM: use .arch directives instead of assembler command line flags

[Arnd Bergmann]

From: Nick Desaulniers <ndesaulniers@google.com>

Similar to commit a6c30873ee4a ("ARM: 8989/1: use .fpu assembler
directives instead of assembler arguments").

GCC and GNU binutils support setting the "sub arch" via -march=,
-Wa,-march, target function attribute, and .arch assembler directive.

Clang's integrated assembler does not support -Wa,-march (and the logic
to overrule one when multiple of the above are used), and this can
cause annoying warnings such as:

clang: warning: argument unused during compilation: '-march=armv6k' [-Wunused-command-line-argument]
clang: warning: argument unused during compilation: '-march=armv6k' [-Wunused-command-line-argument]
clang: warning: argument unused during compilation: '-march=armv6k' [-Wunused-command-line-argument]

Since most assembler is non-conditionally assembled with one sub arch
(modulo arch/arm/delay-loop.S which conditionally is assembled as armv4
based on CONFIG_ARCH_RPC, and arch/arm/mach-at91/pm-suspend.S which is
conditionally assembled as armv7-a based on CONFIG_CPU_V7), prefer the
.arch assembler directive.

Link: https://bugs.llvm.org/show_bug.cgi?id=48894
Link: https://github.com/ClangBuiltLinux/linux/issues/1195
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
[arnd] add a few more instances found in compile testing
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/boot/compressed/Makefile  |  2 --
 arch/arm/common/Makefile           |  2 --
 arch/arm/common/mcpm_head.S        |  2 ++
 arch/arm/common/vlock.S            |  2 ++
 arch/arm/kernel/Makefile           |  2 --
 arch/arm/kernel/hyp-stub.S         |  2 ++
 arch/arm/kernel/swp_emulate.c      |  1 +
 arch/arm/lib/Makefile              |  4 ----
 arch/arm/lib/delay-loop.S          |  4 ++++
 arch/arm/mach-at91/Makefile        |  3 ---
 arch/arm/mach-at91/pm_suspend.S    |  4 ++++
 arch/arm/mach-imx/Makefile         |  3 ---
 arch/arm/mach-imx/headsmp.S        |  2 ++
 arch/arm/mach-imx/resume-imx6.S    |  2 ++
 arch/arm/mach-imx/suspend-imx6.S   |  2 ++
 arch/arm/mach-mvebu/Makefile       |  3 ---
 arch/arm/mach-mvebu/coherency_ll.S |  1 +
 arch/arm/mach-mvebu/pmsu.c         |  1 +
 arch/arm/mach-npcm/Makefile        |  2 --
 arch/arm/mach-npcm/headsmp.S       |  2 ++
 arch/arm/mm/Makefile               | 15 ---------------
 arch/arm/mm/abort-ev6.S            |  1 +
 arch/arm/mm/abort-ev7.S            |  1 +
 arch/arm/mm/cache-v6.S             |  2 ++
 arch/arm/mm/cache-v7.S             |  2 ++
 arch/arm/mm/cache-v7m.S            |  2 ++
 arch/arm/mm/copypage-feroceon.c    |  1 +
 arch/arm/mm/proc-v6.S              |  2 ++
 arch/arm/mm/proc-v7-2level.S       |  2 ++
 arch/arm/mm/proc-v7.S              |  2 ++
 arch/arm/mm/tlb-v6.S               |  2 ++
 arch/arm/mm/tlb-v7.S               |  2 ++
 drivers/memory/Makefile            |  2 --
 drivers/memory/ti-emif-sram-pm.S   |  1 +
 34 files changed, 45 insertions(+), 38 deletions(-)

diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index 91265e7ff672..c5ee2b10f670 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -191,7 +191,5 @@ CFLAGS_font.o := -Dstatic=
 $(obj)/font.c: $(FONTC)
 	$(call cmd,shipped)
 
-AFLAGS_hyp-stub.o := -Wa,-march=armv7-a
-
 $(obj)/hyp-stub.S: $(srctree)/arch/$(SRCARCH)/kernel/hyp-stub.S
 	$(call cmd,shipped)
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
index 8cd574be94cf..6a42600fa4c5 100644
--- a/arch/arm/common/Makefile
+++ b/arch/arm/common/Makefile
@@ -14,7 +14,5 @@ obj-$(CONFIG_SHARP_SCOOP)	+= scoop.o
 obj-$(CONFIG_CPU_V7)		+= secure_cntvoff.o
 obj-$(CONFIG_MCPM)		+= mcpm_head.o mcpm_entry.o mcpm_platsmp.o vlock.o
 CFLAGS_REMOVE_mcpm_entry.o	= -pg
-AFLAGS_mcpm_head.o		:= -march=armv7-a
-AFLAGS_vlock.o			:= -march=armv7-a
 obj-$(CONFIG_BL_SWITCHER)	+= bL_switcher.o
 obj-$(CONFIG_BL_SWITCHER_DUMMY_IF) += bL_switcher_dummy_if.o
diff --git a/arch/arm/common/mcpm_head.S b/arch/arm/common/mcpm_head.S
index 291d969bc719..299495c43dfd 100644
--- a/arch/arm/common/mcpm_head.S
+++ b/arch/arm/common/mcpm_head.S
@@ -15,6 +15,8 @@
 
 #include "vlock.h"
 
+.arch armv7-a
+
 .if MCPM_SYNC_CLUSTER_CPUS
 .error "cpus must be the first member of struct mcpm_sync_struct"
 .endif
diff --git a/arch/arm/common/vlock.S b/arch/arm/common/vlock.S
index f1c7fd44f1b1..1fa09c4697ed 100644
--- a/arch/arm/common/vlock.S
+++ b/arch/arm/common/vlock.S
@@ -12,6 +12,8 @@
 #include <linux/linkage.h>
 #include "vlock.h"
 
+.arch armv7-a
+
 /* Select different code if voting flags  can fit in a single word. */
 #if VLOCK_VOTING_SIZE > 4
 #define FEW(x...)
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index ae295a3bcfef..714752f5402a 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -70,7 +70,6 @@ obj-$(CONFIG_HAVE_TCM)		+= tcm.o
 obj-$(CONFIG_OF)		+= devtree.o
 obj-$(CONFIG_CRASH_DUMP)	+= crash_dump.o
 obj-$(CONFIG_SWP_EMULATE)	+= swp_emulate.o
-CFLAGS_swp_emulate.o		:= -Wa,-march=armv7-a
 obj-$(CONFIG_HAVE_HW_BREAKPOINT)	+= hw_breakpoint.o
 
 obj-$(CONFIG_CPU_XSCALE)	+= xscale-cp0.o
@@ -99,7 +98,6 @@ CFLAGS_head-inflate-data.o := $(call cc-option,-Wframe-larger-than=10240)
 obj-$(CONFIG_XIP_DEFLATED_DATA) += head-inflate-data.o
 
 obj-$(CONFIG_ARM_VIRT_EXT)	+= hyp-stub.o
-AFLAGS_hyp-stub.o		:=-Wa,-march=armv7-a
 ifeq ($(CONFIG_ARM_PSCI),y)
 obj-$(CONFIG_SMP)		+= psci_smp.o
 endif
diff --git a/arch/arm/kernel/hyp-stub.S b/arch/arm/kernel/hyp-stub.S
index b699b22a4db1..3a506b9095a5 100644
--- a/arch/arm/kernel/hyp-stub.S
+++ b/arch/arm/kernel/hyp-stub.S
@@ -9,6 +9,8 @@
 #include <asm/assembler.h>
 #include <asm/virt.h>
 
+.arch armv7-a
+
 #ifndef ZIMAGE
 /*
  * For the kernel proper, we need to find out the CPU boot mode long after
diff --git a/arch/arm/kernel/swp_emulate.c b/arch/arm/kernel/swp_emulate.c
index 6166ba38bf99..8f2f218029c9 100644
--- a/arch/arm/kernel/swp_emulate.c
+++ b/arch/arm/kernel/swp_emulate.c
@@ -34,6 +34,7 @@
  */
 #define __user_swpX_asm(data, addr, res, temp, B)		\
 	__asm__ __volatile__(					\
+	".arch armv7-a\n"					\
 	"0:	ldrex"B"	%2, [%3]\n"			\
 	"1:	strex"B"	%0, %1, [%3]\n"			\
 	"	cmp		%0, #0\n"			\
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 6d2ba454f25b..42fb75c06647 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -36,10 +36,6 @@ else
   lib-y	+= io-readsw-armv4.o io-writesw-armv4.o
 endif
 
-ifeq ($(CONFIG_ARCH_RPC),y)
-  AFLAGS_delay-loop.o		+= -march=armv4
-endif
-
 $(obj)/csumpartialcopy.o:	$(obj)/csumpartialcopygeneric.S
 $(obj)/csumpartialcopyuser.o:	$(obj)/csumpartialcopygeneric.S
 
diff --git a/arch/arm/lib/delay-loop.S b/arch/arm/lib/delay-loop.S
index 3ccade0f8130..3ac05177d097 100644
--- a/arch/arm/lib/delay-loop.S
+++ b/arch/arm/lib/delay-loop.S
@@ -8,6 +8,10 @@
 #include <asm/assembler.h>
 #include <asm/delay.h>
 
+#ifdef CONFIG_ARCH_RPC
+		.arch	armv4
+#endif
+
 		.text
 
 .LC0:		.word	loops_per_jiffy
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 522b680b6446..e7a47fa03626 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -14,9 +14,6 @@ obj-$(CONFIG_SOC_SAMV7)		+= samv7.o
 # Power Management
 obj-$(CONFIG_ATMEL_PM)		+= pm.o pm_suspend.o
 
-ifeq ($(CONFIG_CPU_V7),y)
-AFLAGS_pm_suspend.o := -march=armv7-a
-endif
 ifeq ($(CONFIG_PM_DEBUG),y)
 CFLAGS_pm.o += -DDEBUG
 endif
diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
index cbd61a3bcab1..8d7b6377399c 100644
--- a/arch/arm/mach-at91/pm_suspend.S
+++ b/arch/arm/mach-at91/pm_suspend.S
@@ -12,6 +12,10 @@
 #include "pm.h"
 #include "pm_data-offsets.h"
 
+#ifdef CONFIG_CPU_V7
+.arch armv7-a
+#endif
+
 #define	SRAMC_SELF_FRESH_ACTIVE		0x01
 #define	SRAMC_SELF_FRESH_EXIT		0x00
 
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index d1506ef7a537..95509d8ad9d5 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -36,7 +36,6 @@ obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
 obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o
 obj-$(CONFIG_HAVE_IMX_SRC) += src.o
 ifneq ($(CONFIG_SOC_IMX6)$(CONFIG_SOC_IMX7D_CA7)$(CONFIG_SOC_LS1021A),)
-AFLAGS_headsmp.o :=-Wa,-march=armv7-a
 obj-$(CONFIG_SMP) += headsmp.o platsmp.o
 obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
 endif
@@ -50,12 +49,10 @@ obj-$(CONFIG_SOC_IMX7D_CM4) += mach-imx7d-cm4.o
 obj-$(CONFIG_SOC_IMX7ULP) += mach-imx7ulp.o pm-imx7ulp.o
 
 ifeq ($(CONFIG_SUSPEND),y)
-AFLAGS_suspend-imx6.o :=-Wa,-march=armv7-a
 obj-$(CONFIG_SOC_IMX6) += suspend-imx6.o
 obj-$(CONFIG_SOC_IMX53) += suspend-imx53.o
 endif
 ifeq ($(CONFIG_ARM_CPU_SUSPEND),y)
-AFLAGS_resume-imx6.o :=-Wa,-march=armv7-a
 obj-$(CONFIG_SOC_IMX6) += resume-imx6.o
 endif
 obj-$(CONFIG_SOC_IMX6) += pm-imx6.o
diff --git a/arch/arm/mach-imx/headsmp.S b/arch/arm/mach-imx/headsmp.S
index fcba58be8e79..5f9c7b48ae80 100644
--- a/arch/arm/mach-imx/headsmp.S
+++ b/arch/arm/mach-imx/headsmp.S
@@ -8,6 +8,8 @@
 #include <linux/init.h>
 #include <asm/assembler.h>
 
+.arch armv7-a
+
 diag_reg_offset:
 	.word	g_diag_reg - .
 
diff --git a/arch/arm/mach-imx/resume-imx6.S b/arch/arm/mach-imx/resume-imx6.S
index 5bd1ba7ef15b..2c0c5c771251 100644
--- a/arch/arm/mach-imx/resume-imx6.S
+++ b/arch/arm/mach-imx/resume-imx6.S
@@ -9,6 +9,8 @@
 #include <asm/hardware/cache-l2x0.h>
 #include "hardware.h"
 
+.arch armv7-a
+
 /*
  * The following code must assume it is running from physical address
  * where absolute virtual addresses to the data section have to be
diff --git a/arch/arm/mach-imx/suspend-imx6.S b/arch/arm/mach-imx/suspend-imx6.S
index e06f946b75b9..63ccc2d0e920 100644
--- a/arch/arm/mach-imx/suspend-imx6.S
+++ b/arch/arm/mach-imx/suspend-imx6.S
@@ -9,6 +9,8 @@
 #include <asm/hardware/cache-l2x0.h>
 #include "hardware.h"
 
+.arch armv7-a
+
 /*
  * ==================== low level suspend ====================
  *
diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile
index cb106899dd7c..9b9fddb69958 100644
--- a/arch/arm/mach-mvebu/Makefile
+++ b/arch/arm/mach-mvebu/Makefile
@@ -1,9 +1,6 @@
 # SPDX-License-Identifier: GPL-2.0
 ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/arch/arm/plat-orion/include
 
-AFLAGS_coherency_ll.o		:= -Wa,-march=armv7-a
-CFLAGS_pmsu.o			:= -march=armv7-a
-
 obj-$(CONFIG_MACH_MVEBU_ANY)	 += system-controller.o mvebu-soc-id.o
 
 ifeq ($(CONFIG_MACH_MVEBU_V7),y)
diff --git a/arch/arm/mach-mvebu/coherency_ll.S b/arch/arm/mach-mvebu/coherency_ll.S
index a3a64bf97250..25197290632d 100644
--- a/arch/arm/mach-mvebu/coherency_ll.S
+++ b/arch/arm/mach-mvebu/coherency_ll.S
@@ -23,6 +23,7 @@
 #include <asm/assembler.h>
 #include <asm/cp15.h>
 
+	.arch armv7-a
 	.text
 /*
  * Returns the coherency base address in r1 (r0 is untouched), or 0 if
diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c
index 73d5d72dfc3e..9a77cc3a10bd 100644
--- a/arch/arm/mach-mvebu/pmsu.c
+++ b/arch/arm/mach-mvebu/pmsu.c
@@ -294,6 +294,7 @@ int armada_370_xp_pmsu_idle_enter(unsigned long deepidle)
 
 	/* Test the CR_C bit and set it if it was cleared */
 	asm volatile(
+	".arch	armv7-a\n\t"
 	"mrc	p15, 0, r0, c1, c0, 0 \n\t"
 	"tst	r0, %0 \n\t"
 	"orreq	r0, r0, #(1 << 2) \n\t"
diff --git a/arch/arm/mach-npcm/Makefile b/arch/arm/mach-npcm/Makefile
index 8d61fcd42fb1..ac83e1caf2ee 100644
--- a/arch/arm/mach-npcm/Makefile
+++ b/arch/arm/mach-npcm/Makefile
@@ -1,6 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0-only
-AFLAGS_headsmp.o		+= -march=armv7-a
-
 obj-$(CONFIG_ARCH_WPCM450)	+= wpcm450.o
 obj-$(CONFIG_ARCH_NPCM7XX)	+= npcm7xx.o
 obj-$(CONFIG_SMP)		+= platsmp.o headsmp.o
diff --git a/arch/arm/mach-npcm/headsmp.S b/arch/arm/mach-npcm/headsmp.S
index c083fe09a07b..84d2b6daaf0b 100644
--- a/arch/arm/mach-npcm/headsmp.S
+++ b/arch/arm/mach-npcm/headsmp.S
@@ -6,6 +6,8 @@
 #include <linux/init.h>
 #include <asm/assembler.h>
 
+.arch armv7-a
+
 /*
  * The boot ROM does not start secondary CPUs in SVC mode, so we need to do that
  * here.
diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile
index 3510503bc5e6..71b858c9b10c 100644
--- a/arch/arm/mm/Makefile
+++ b/arch/arm/mm/Makefile
@@ -33,9 +33,6 @@ obj-$(CONFIG_CPU_ABRT_EV5TJ)	+= abort-ev5tj.o
 obj-$(CONFIG_CPU_ABRT_EV6)	+= abort-ev6.o
 obj-$(CONFIG_CPU_ABRT_EV7)	+= abort-ev7.o
 
-AFLAGS_abort-ev6.o	:=-Wa,-march=armv6k
-AFLAGS_abort-ev7.o	:=-Wa,-march=armv7-a
-
 obj-$(CONFIG_CPU_PABRT_LEGACY)	+= pabort-legacy.o
 obj-$(CONFIG_CPU_PABRT_V6)	+= pabort-v6.o
 obj-$(CONFIG_CPU_PABRT_V7)	+= pabort-v7.o
@@ -49,10 +46,6 @@ obj-$(CONFIG_CPU_CACHE_FA)	+= cache-fa.o
 obj-$(CONFIG_CPU_CACHE_NOP)	+= cache-nop.o
 obj-$(CONFIG_CPU_CACHE_V7M)	+= cache-v7m.o
 
-AFLAGS_cache-v6.o	:=-Wa,-march=armv6
-AFLAGS_cache-v7.o	:=-Wa,-march=armv7-a
-AFLAGS_cache-v7m.o	:=-Wa,-march=armv7-m
-
 obj-$(CONFIG_CPU_COPY_V4WT)	+= copypage-v4wt.o
 obj-$(CONFIG_CPU_COPY_V4WB)	+= copypage-v4wb.o
 obj-$(CONFIG_CPU_COPY_FEROCEON)	+= copypage-feroceon.o
@@ -62,8 +55,6 @@ obj-$(CONFIG_CPU_XSCALE)	+= copypage-xscale.o
 obj-$(CONFIG_CPU_XSC3)		+= copypage-xsc3.o
 obj-$(CONFIG_CPU_COPY_FA)	+= copypage-fa.o
 
-CFLAGS_copypage-feroceon.o := -march=armv5te
-
 obj-$(CONFIG_CPU_TLB_V4WT)	+= tlb-v4.o
 obj-$(CONFIG_CPU_TLB_V4WB)	+= tlb-v4wb.o
 obj-$(CONFIG_CPU_TLB_V4WBI)	+= tlb-v4wbi.o
@@ -72,9 +63,6 @@ obj-$(CONFIG_CPU_TLB_V6)	+= tlb-v6.o
 obj-$(CONFIG_CPU_TLB_V7)	+= tlb-v7.o
 obj-$(CONFIG_CPU_TLB_FA)	+= tlb-fa.o
 
-AFLAGS_tlb-v6.o		:=-Wa,-march=armv6
-AFLAGS_tlb-v7.o		:=-Wa,-march=armv7-a
-
 obj-$(CONFIG_CPU_ARM7TDMI)	+= proc-arm7tdmi.o
 obj-$(CONFIG_CPU_ARM720T)	+= proc-arm720.o
 obj-$(CONFIG_CPU_ARM740T)	+= proc-arm740.o
@@ -101,9 +89,6 @@ obj-$(CONFIG_CPU_V6K)		+= proc-v6.o
 obj-$(CONFIG_CPU_V7)		+= proc-v7.o proc-v7-bugs.o
 obj-$(CONFIG_CPU_V7M)		+= proc-v7m.o
 
-AFLAGS_proc-v6.o	:=-Wa,-march=armv6
-AFLAGS_proc-v7.o	:=-Wa,-march=armv7-a
-
 obj-$(CONFIG_OUTER_CACHE)	+= l2c-common.o
 obj-$(CONFIG_CACHE_B15_RAC)	+= cache-b15-rac.o
 obj-$(CONFIG_CACHE_FEROCEON_L2)	+= cache-feroceon-l2.o
diff --git a/arch/arm/mm/abort-ev6.S b/arch/arm/mm/abort-ev6.S
index c58bf8b43fea..836dc1299243 100644
--- a/arch/arm/mm/abort-ev6.S
+++ b/arch/arm/mm/abort-ev6.S
@@ -16,6 +16,7 @@
  * abort here if the I-TLB and D-TLB aren't seeing the same
  * picture.  Unfortunately, this does happen.  We live with it.
  */
+	.arch	armv6k
 	.align	5
 ENTRY(v6_early_abort)
 	mrc	p15, 0, r1, c5, c0, 0		@ get FSR
diff --git a/arch/arm/mm/abort-ev7.S b/arch/arm/mm/abort-ev7.S
index f81bceacc660..53fb41c24774 100644
--- a/arch/arm/mm/abort-ev7.S
+++ b/arch/arm/mm/abort-ev7.S
@@ -12,6 +12,7 @@
  *
  * Purpose : obtain information about current aborted instruction.
  */
+	.arch	armv7-a
 	.align	5
 ENTRY(v7_early_abort)
 	mrc	p15, 0, r1, c5, c0, 0		@ get FSR
diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S
index f0f65eb073e4..250c83bf7158 100644
--- a/arch/arm/mm/cache-v6.S
+++ b/arch/arm/mm/cache-v6.S
@@ -19,6 +19,8 @@
 #define D_CACHE_LINE_SIZE	32
 #define BTB_FLUSH_SIZE		8
 
+.arch armv6
+
 /*
  *	v6_flush_icache_all()
  *
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index 830bbfb26ca5..29ec2952fe3a 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -16,6 +16,8 @@
 
 #include "proc-macros.S"
 
+.arch armv7-a
+
 #ifdef CONFIG_CPU_ICACHE_MISMATCH_WORKAROUND
 .globl icache_size
 	.data
diff --git a/arch/arm/mm/cache-v7m.S b/arch/arm/mm/cache-v7m.S
index 1bc3a0a50753..eb60b5e5e2ad 100644
--- a/arch/arm/mm/cache-v7m.S
+++ b/arch/arm/mm/cache-v7m.S
@@ -18,6 +18,8 @@
 
 #include "proc-macros.S"
 
+.arch armv7-m
+
 /* Generic V7M read/write macros for memory mapped cache operations */
 .macro v7m_cache_read, rt, reg
 	movw	\rt, #:lower16:BASEADDR_V7M_SCB + \reg
diff --git a/arch/arm/mm/copypage-feroceon.c b/arch/arm/mm/copypage-feroceon.c
index 064b19e63571..5fc8ef1e665f 100644
--- a/arch/arm/mm/copypage-feroceon.c
+++ b/arch/arm/mm/copypage-feroceon.c
@@ -15,6 +15,7 @@ static void feroceon_copy_user_page(void *kto, const void *kfrom)
 	int tmp;
 
 	asm volatile ("\
+.arch	armv5te					\n\
 1:	ldmia	%1!, {r2 - r7, ip, lr}		\n\
 	pld	[%1, #0]			\n\
 	pld	[%1, #32]			\n\
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index a0618f3e6836..203dff89ab1a 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -32,6 +32,8 @@
 #define TTB_FLAGS_SMP	TTB_RGN_WBWA|TTB_S
 #define PMD_FLAGS_SMP	PMD_SECT_WBWA|PMD_SECT_S
 
+.arch armv6
+
 ENTRY(cpu_v6_proc_init)
 	ret	lr
 
diff --git a/arch/arm/mm/proc-v7-2level.S b/arch/arm/mm/proc-v7-2level.S
index 5db029c8f987..0a3083ad19c2 100644
--- a/arch/arm/mm/proc-v7-2level.S
+++ b/arch/arm/mm/proc-v7-2level.S
@@ -24,6 +24,8 @@
 #define TTB_FLAGS_SMP	TTB_IRGN_WBWA|TTB_S|TTB_NOS|TTB_RGN_OC_WBWA
 #define PMD_FLAGS_SMP	PMD_SECT_WBWA|PMD_SECT_S
 
+.arch armv7-a
+
 /*
  *	cpu_v7_switch_mm(pgd_phys, tsk)
  *
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 26d726a08a34..6b4ef9539b68 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -24,6 +24,8 @@
 #include "proc-v7-2level.S"
 #endif
 
+.arch armv7-a
+
 ENTRY(cpu_v7_proc_init)
 	ret	lr
 ENDPROC(cpu_v7_proc_init)
diff --git a/arch/arm/mm/tlb-v6.S b/arch/arm/mm/tlb-v6.S
index 74f4b383afe3..1d91e49b2c2d 100644
--- a/arch/arm/mm/tlb-v6.S
+++ b/arch/arm/mm/tlb-v6.S
@@ -17,6 +17,8 @@
 
 #define HARVARD_TLB
 
+.arch armv6
+
 /*
  *	v6wbi_flush_user_tlb_range(start, end, vma)
  *
diff --git a/arch/arm/mm/tlb-v7.S b/arch/arm/mm/tlb-v7.S
index 87bf4ab17721..35fd6d4f0d03 100644
--- a/arch/arm/mm/tlb-v7.S
+++ b/arch/arm/mm/tlb-v7.S
@@ -16,6 +16,8 @@
 #include <asm/tlbflush.h>
 #include "proc-macros.S"
 
+.arch armv7-a
+
 /*
  *	v7wbi_flush_user_tlb_range(start, end, vma)
  *
diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile
index bc7663ed1c25..d1388a748872 100644
--- a/drivers/memory/Makefile
+++ b/drivers/memory/Makefile
@@ -32,8 +32,6 @@ obj-$(CONFIG_FPGA_DFL_EMIF)	+= dfl-emif.o
 
 ti-emif-sram-objs		:= ti-emif-pm.o ti-emif-sram-pm.o
 
-AFLAGS_ti-emif-sram-pm.o	:=-Wa,-march=armv7-a
-
 $(obj)/ti-emif-sram-pm.o: $(obj)/ti-emif-asm-offsets.h
 
 $(obj)/ti-emif-asm-offsets.h: $(obj)/emif-asm-offsets.s FORCE
diff --git a/drivers/memory/ti-emif-sram-pm.S b/drivers/memory/ti-emif-sram-pm.S
index d1c83bd5b98e..af2feb251303 100644
--- a/drivers/memory/ti-emif-sram-pm.S
+++ b/drivers/memory/ti-emif-sram-pm.S
@@ -36,6 +36,7 @@
 
 	.arm
 	.align 3
+	.arch armv7-a
 
 ENTRY(ti_emif_sram)
 
-- 
2.29.2

[PATCH 14/14] [RFC] ARM: forbid ftrace with clang and thumb2_kernel

[Arnd Bergmann]

From: Arnd Bergmann <arnd@arndb.de>

clang fails to build kernels with THUMB2 and FUNCTION_TRACER
enabled when there is any inline asm statement containing
the frame pointer register r7:

arch/arm/mach-versatile/dcscb.c:95:2: error: inline asm clobber list contains reserved registers: R7 [-Werror,-Winline-asm]
arch/arm/mach-exynos/mcpm-exynos.c:154:2: error: inline asm clobber list contains reserved registers: R7 [-Werror,-Winline-asm]
arch/arm/probes/kprobes/actions-thumb.c:449:3: error: inline asm clobber list contains reserved registers: R7 [-Werror,-Winline-asm]

Apparently gcc should also have warned about this, and the
configuration is actually invalid, though there is some
disagreement on the bug trackers about this.

Link: https://bugs.llvm.org/show_bug.cgi?id=45826
Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94986
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0d4f3e2d50ad..7ea95bb40004 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -91,7 +91,7 @@ config ARM
 	select HAVE_FAST_GUP if ARM_LPAE
 	select HAVE_FTRACE_MCOUNT_RECORD if !XIP_KERNEL
 	select HAVE_FUNCTION_GRAPH_TRACER if !THUMB2_KERNEL && !CC_IS_CLANG
-	select HAVE_FUNCTION_TRACER if !XIP_KERNEL
+	select HAVE_FUNCTION_TRACER if !XIP_KERNEL && !(THUMB2_KERNEL && CC_IS_CLANG)
 	select HAVE_GCC_PLUGINS
 	select HAVE_HW_BREAKPOINT if PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7)
 	select HAVE_IRQ_TIME_ACCOUNTING
-- 
2.29.2

Re: [PATCH 12/14] ARM: add CONFIG_PHYS_OFFSET default values

[Nicolas Pitre]

On Tue, 28 Sep 2021, Arnd Bergmann wrote:

> From: Arnd Bergmann <arnd@arndb.de>
> 
> For platforms that are not yet converted to ARCH_MULTIPLATFORM,
> we can disable CONFIG_ARM_PATCH_PHYS_VIRT, which in turn requires
> setting a correct address here.
> 
> As we actualy know what all the values are supposed to be based
> on the old mach/memory.h header file contents (from git history),
> we can just add them here.
> 
> This also solves a problem in Kconfig where 'make randconfig'
> fails to continue if no number is selected for a 'hex' option.
> Users can still override the number at configuration time, e.g.
> when the memory visible to the kernel starts at a nonstandard
> address on some machine, but it should no longer be required
> now.
> 
> I originally posted this back in 2016, but the problem still
> persists. The patch has gotten much simpler though, as almost
> all platforms rely on ARM_PATCH_PHYS_VIRT now.
> 
> Acked-by: Nicolas Pitre <nico@linaro.org>

Acked-by: Nicolas Pitre <nico@fluxnic.net>

> Link: https://lore.kernel.org/linux-arm-kernel/1455804123-2526139-5-git-send-email-arnd@arndb.de/
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> ---
>  arch/arm/Kconfig | 8 +++++---
>  1 file changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 12a0bd4b315d..0d4f3e2d50ad 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -264,10 +264,12 @@ config PHYS_OFFSET
>  	hex "Physical address of main memory" if MMU
>  	depends on !ARM_PATCH_PHYS_VIRT
>  	default DRAM_BASE if !MMU
> -	default 0x00000000 if ARCH_FOOTBRIDGE
> +	default 0x00000000 if ARCH_FOOTBRIDGE || ARCH_IXP4XX
>  	default 0x10000000 if ARCH_OMAP1 || ARCH_RPC
> -	default 0x20000000 if ARCH_S5PV210
> -	default 0xc0000000 if ARCH_SA1100
> +	default 0x30000000 if ARCH_S3C24XX
> +	default 0xa0000000 if ARCH_IOP32X || ARCH_PXA
> +	default 0xc0000000 if ARCH_EP93XX || ARCH_SA1100
> +	default 0
>  	help
>  	  Please provide the physical address corresponding to the
>  	  location of main memory in your system.
> -- 
> 2.29.2
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> 

Re: [PATCH 01/14] ARM: RiscPC needs older gcc version

[Arnd Bergmann]

On Tue, Sep 28, 2021 at 5:42 PM Arnd Bergmann <arnd@kernel.org> wrote:

> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index fc196421b2ce..12a0bd4b315d 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -431,7 +431,7 @@ config ARCH_PXA
>
>  config ARCH_RPC
>         bool "RiscPC"
> -       depends on MMU

This line was a botched rebase, it obviously has to stay here.

      Arnd

> +       depends on !CC_IS_CLANG || GCC_VERSION < 90100
>         select ARCH_ACORN
>         select ARCH_MAY_HAVE_PC_FDC
>         select ARCH_SPARSEMEM_ENABLE
> --
> 2.29.2
>

Re: [PATCH 13/14] ARM: use .arch directives instead of assembler command line flags

[Nick Desaulniers]

On Tue, Sep 28, 2021 at 8:42 AM Arnd Bergmann <arnd@kernel.org> wrote:
>
> From: Nick Desaulniers <ndesaulniers@google.com>
>
> Similar to commit a6c30873ee4a ("ARM: 8989/1: use .fpu assembler
> directives instead of assembler arguments").
>
> GCC and GNU binutils support setting the "sub arch" via -march=,
> -Wa,-march, target function attribute, and .arch assembler directive.
>
> Clang's integrated assembler does not support -Wa,-march (and the logic
> to overrule one when multiple of the above are used), and this can
> cause annoying warnings such as:
>
> clang: warning: argument unused during compilation: '-march=armv6k' [-Wunused-command-line-argument]
> clang: warning: argument unused during compilation: '-march=armv6k' [-Wunused-command-line-argument]
> clang: warning: argument unused during compilation: '-march=armv6k' [-Wunused-command-line-argument]

Note, the above lack of support was fixed in clang-13. That said, both
Clang and GCC defer to -Wa,-march when -march is also present, so
clang is still correct that -march is ignored.  Thanks for resending;
this is still helpful for earlier releases of clang that we still
support.

>
> Since most assembler is non-conditionally assembled with one sub arch
> (modulo arch/arm/delay-loop.S which conditionally is assembled as armv4
> based on CONFIG_ARCH_RPC, and arch/arm/mach-at91/pm-suspend.S which is
> conditionally assembled as armv7-a based on CONFIG_CPU_V7), prefer the
> .arch assembler directive.
>
> Link: https://bugs.llvm.org/show_bug.cgi?id=48894
> Link: https://github.com/ClangBuiltLinux/linux/issues/1195
> Suggested-by: Arnd Bergmann <arnd@arndb.de>
> Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
> [arnd] add a few more instances found in compile testing
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> ---
>  arch/arm/boot/compressed/Makefile  |  2 --
>  arch/arm/common/Makefile           |  2 --
>  arch/arm/common/mcpm_head.S        |  2 ++
>  arch/arm/common/vlock.S            |  2 ++
>  arch/arm/kernel/Makefile           |  2 --
>  arch/arm/kernel/hyp-stub.S         |  2 ++
>  arch/arm/kernel/swp_emulate.c      |  1 +
>  arch/arm/lib/Makefile              |  4 ----
>  arch/arm/lib/delay-loop.S          |  4 ++++
>  arch/arm/mach-at91/Makefile        |  3 ---
>  arch/arm/mach-at91/pm_suspend.S    |  4 ++++
>  arch/arm/mach-imx/Makefile         |  3 ---
>  arch/arm/mach-imx/headsmp.S        |  2 ++
>  arch/arm/mach-imx/resume-imx6.S    |  2 ++
>  arch/arm/mach-imx/suspend-imx6.S   |  2 ++
>  arch/arm/mach-mvebu/Makefile       |  3 ---
>  arch/arm/mach-mvebu/coherency_ll.S |  1 +
>  arch/arm/mach-mvebu/pmsu.c         |  1 +
>  arch/arm/mach-npcm/Makefile        |  2 --
>  arch/arm/mach-npcm/headsmp.S       |  2 ++
>  arch/arm/mm/Makefile               | 15 ---------------
>  arch/arm/mm/abort-ev6.S            |  1 +
>  arch/arm/mm/abort-ev7.S            |  1 +
>  arch/arm/mm/cache-v6.S             |  2 ++
>  arch/arm/mm/cache-v7.S             |  2 ++
>  arch/arm/mm/cache-v7m.S            |  2 ++
>  arch/arm/mm/copypage-feroceon.c    |  1 +
>  arch/arm/mm/proc-v6.S              |  2 ++
>  arch/arm/mm/proc-v7-2level.S       |  2 ++
>  arch/arm/mm/proc-v7.S              |  2 ++
>  arch/arm/mm/tlb-v6.S               |  2 ++
>  arch/arm/mm/tlb-v7.S               |  2 ++
>  drivers/memory/Makefile            |  2 --
>  drivers/memory/ti-emif-sram-pm.S   |  1 +
>  34 files changed, 45 insertions(+), 38 deletions(-)
>
> diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
> index 91265e7ff672..c5ee2b10f670 100644
> --- a/arch/arm/boot/compressed/Makefile
> +++ b/arch/arm/boot/compressed/Makefile
> @@ -191,7 +191,5 @@ CFLAGS_font.o := -Dstatic=
>  $(obj)/font.c: $(FONTC)
>         $(call cmd,shipped)
>
> -AFLAGS_hyp-stub.o := -Wa,-march=armv7-a
> -
>  $(obj)/hyp-stub.S: $(srctree)/arch/$(SRCARCH)/kernel/hyp-stub.S
>         $(call cmd,shipped)
> diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
> index 8cd574be94cf..6a42600fa4c5 100644
> --- a/arch/arm/common/Makefile
> +++ b/arch/arm/common/Makefile
> @@ -14,7 +14,5 @@ obj-$(CONFIG_SHARP_SCOOP)     += scoop.o
>  obj-$(CONFIG_CPU_V7)           += secure_cntvoff.o
>  obj-$(CONFIG_MCPM)             += mcpm_head.o mcpm_entry.o mcpm_platsmp.o vlock.o
>  CFLAGS_REMOVE_mcpm_entry.o     = -pg
> -AFLAGS_mcpm_head.o             := -march=armv7-a
> -AFLAGS_vlock.o                 := -march=armv7-a
>  obj-$(CONFIG_BL_SWITCHER)      += bL_switcher.o
>  obj-$(CONFIG_BL_SWITCHER_DUMMY_IF) += bL_switcher_dummy_if.o
> diff --git a/arch/arm/common/mcpm_head.S b/arch/arm/common/mcpm_head.S
> index 291d969bc719..299495c43dfd 100644
> --- a/arch/arm/common/mcpm_head.S
> +++ b/arch/arm/common/mcpm_head.S
> @@ -15,6 +15,8 @@
>
>  #include "vlock.h"
>
> +.arch armv7-a
> +
>  .if MCPM_SYNC_CLUSTER_CPUS
>  .error "cpus must be the first member of struct mcpm_sync_struct"
>  .endif
> diff --git a/arch/arm/common/vlock.S b/arch/arm/common/vlock.S
> index f1c7fd44f1b1..1fa09c4697ed 100644
> --- a/arch/arm/common/vlock.S
> +++ b/arch/arm/common/vlock.S
> @@ -12,6 +12,8 @@
>  #include <linux/linkage.h>
>  #include "vlock.h"
>
> +.arch armv7-a
> +
>  /* Select different code if voting flags  can fit in a single word. */
>  #if VLOCK_VOTING_SIZE > 4
>  #define FEW(x...)
> diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
> index ae295a3bcfef..714752f5402a 100644
> --- a/arch/arm/kernel/Makefile
> +++ b/arch/arm/kernel/Makefile
> @@ -70,7 +70,6 @@ obj-$(CONFIG_HAVE_TCM)                += tcm.o
>  obj-$(CONFIG_OF)               += devtree.o
>  obj-$(CONFIG_CRASH_DUMP)       += crash_dump.o
>  obj-$(CONFIG_SWP_EMULATE)      += swp_emulate.o
> -CFLAGS_swp_emulate.o           := -Wa,-march=armv7-a
>  obj-$(CONFIG_HAVE_HW_BREAKPOINT)       += hw_breakpoint.o
>
>  obj-$(CONFIG_CPU_XSCALE)       += xscale-cp0.o
> @@ -99,7 +98,6 @@ CFLAGS_head-inflate-data.o := $(call cc-option,-Wframe-larger-than=10240)
>  obj-$(CONFIG_XIP_DEFLATED_DATA) += head-inflate-data.o
>
>  obj-$(CONFIG_ARM_VIRT_EXT)     += hyp-stub.o
> -AFLAGS_hyp-stub.o              :=-Wa,-march=armv7-a
>  ifeq ($(CONFIG_ARM_PSCI),y)
>  obj-$(CONFIG_SMP)              += psci_smp.o
>  endif
> diff --git a/arch/arm/kernel/hyp-stub.S b/arch/arm/kernel/hyp-stub.S
> index b699b22a4db1..3a506b9095a5 100644
> --- a/arch/arm/kernel/hyp-stub.S
> +++ b/arch/arm/kernel/hyp-stub.S
> @@ -9,6 +9,8 @@
>  #include <asm/assembler.h>
>  #include <asm/virt.h>
>
> +.arch armv7-a
> +
>  #ifndef ZIMAGE
>  /*
>   * For the kernel proper, we need to find out the CPU boot mode long after
> diff --git a/arch/arm/kernel/swp_emulate.c b/arch/arm/kernel/swp_emulate.c
> index 6166ba38bf99..8f2f218029c9 100644
> --- a/arch/arm/kernel/swp_emulate.c
> +++ b/arch/arm/kernel/swp_emulate.c
> @@ -34,6 +34,7 @@
>   */
>  #define __user_swpX_asm(data, addr, res, temp, B)              \
>         __asm__ __volatile__(                                   \
> +       ".arch armv7-a\n"                                       \
>         "0:     ldrex"B"        %2, [%3]\n"                     \
>         "1:     strex"B"        %0, %1, [%3]\n"                 \
>         "       cmp             %0, #0\n"                       \
> diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
> index 6d2ba454f25b..42fb75c06647 100644
> --- a/arch/arm/lib/Makefile
> +++ b/arch/arm/lib/Makefile
> @@ -36,10 +36,6 @@ else
>    lib-y        += io-readsw-armv4.o io-writesw-armv4.o
>  endif
>
> -ifeq ($(CONFIG_ARCH_RPC),y)
> -  AFLAGS_delay-loop.o          += -march=armv4
> -endif
> -
>  $(obj)/csumpartialcopy.o:      $(obj)/csumpartialcopygeneric.S
>  $(obj)/csumpartialcopyuser.o:  $(obj)/csumpartialcopygeneric.S
>
> diff --git a/arch/arm/lib/delay-loop.S b/arch/arm/lib/delay-loop.S
> index 3ccade0f8130..3ac05177d097 100644
> --- a/arch/arm/lib/delay-loop.S
> +++ b/arch/arm/lib/delay-loop.S
> @@ -8,6 +8,10 @@
>  #include <asm/assembler.h>
>  #include <asm/delay.h>
>
> +#ifdef CONFIG_ARCH_RPC
> +               .arch   armv4
> +#endif
> +
>                 .text
>
>  .LC0:          .word   loops_per_jiffy
> diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
> index 522b680b6446..e7a47fa03626 100644
> --- a/arch/arm/mach-at91/Makefile
> +++ b/arch/arm/mach-at91/Makefile
> @@ -14,9 +14,6 @@ obj-$(CONFIG_SOC_SAMV7)               += samv7.o
>  # Power Management
>  obj-$(CONFIG_ATMEL_PM)         += pm.o pm_suspend.o
>
> -ifeq ($(CONFIG_CPU_V7),y)
> -AFLAGS_pm_suspend.o := -march=armv7-a
> -endif
>  ifeq ($(CONFIG_PM_DEBUG),y)
>  CFLAGS_pm.o += -DDEBUG
>  endif
> diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
> index cbd61a3bcab1..8d7b6377399c 100644
> --- a/arch/arm/mach-at91/pm_suspend.S
> +++ b/arch/arm/mach-at91/pm_suspend.S
> @@ -12,6 +12,10 @@
>  #include "pm.h"
>  #include "pm_data-offsets.h"
>
> +#ifdef CONFIG_CPU_V7
> +.arch armv7-a
> +#endif
> +
>  #define        SRAMC_SELF_FRESH_ACTIVE         0x01
>  #define        SRAMC_SELF_FRESH_EXIT           0x00
>
> diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
> index d1506ef7a537..95509d8ad9d5 100644
> --- a/arch/arm/mach-imx/Makefile
> +++ b/arch/arm/mach-imx/Makefile
> @@ -36,7 +36,6 @@ obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
>  obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o
>  obj-$(CONFIG_HAVE_IMX_SRC) += src.o
>  ifneq ($(CONFIG_SOC_IMX6)$(CONFIG_SOC_IMX7D_CA7)$(CONFIG_SOC_LS1021A),)
> -AFLAGS_headsmp.o :=-Wa,-march=armv7-a
>  obj-$(CONFIG_SMP) += headsmp.o platsmp.o
>  obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
>  endif
> @@ -50,12 +49,10 @@ obj-$(CONFIG_SOC_IMX7D_CM4) += mach-imx7d-cm4.o
>  obj-$(CONFIG_SOC_IMX7ULP) += mach-imx7ulp.o pm-imx7ulp.o
>
>  ifeq ($(CONFIG_SUSPEND),y)
> -AFLAGS_suspend-imx6.o :=-Wa,-march=armv7-a
>  obj-$(CONFIG_SOC_IMX6) += suspend-imx6.o
>  obj-$(CONFIG_SOC_IMX53) += suspend-imx53.o
>  endif
>  ifeq ($(CONFIG_ARM_CPU_SUSPEND),y)
> -AFLAGS_resume-imx6.o :=-Wa,-march=armv7-a
>  obj-$(CONFIG_SOC_IMX6) += resume-imx6.o
>  endif
>  obj-$(CONFIG_SOC_IMX6) += pm-imx6.o
> diff --git a/arch/arm/mach-imx/headsmp.S b/arch/arm/mach-imx/headsmp.S
> index fcba58be8e79..5f9c7b48ae80 100644
> --- a/arch/arm/mach-imx/headsmp.S
> +++ b/arch/arm/mach-imx/headsmp.S
> @@ -8,6 +8,8 @@
>  #include <linux/init.h>
>  #include <asm/assembler.h>
>
> +.arch armv7-a
> +
>  diag_reg_offset:
>         .word   g_diag_reg - .
>
> diff --git a/arch/arm/mach-imx/resume-imx6.S b/arch/arm/mach-imx/resume-imx6.S
> index 5bd1ba7ef15b..2c0c5c771251 100644
> --- a/arch/arm/mach-imx/resume-imx6.S
> +++ b/arch/arm/mach-imx/resume-imx6.S
> @@ -9,6 +9,8 @@
>  #include <asm/hardware/cache-l2x0.h>
>  #include "hardware.h"
>
> +.arch armv7-a
> +
>  /*
>   * The following code must assume it is running from physical address
>   * where absolute virtual addresses to the data section have to be
> diff --git a/arch/arm/mach-imx/suspend-imx6.S b/arch/arm/mach-imx/suspend-imx6.S
> index e06f946b75b9..63ccc2d0e920 100644
> --- a/arch/arm/mach-imx/suspend-imx6.S
> +++ b/arch/arm/mach-imx/suspend-imx6.S
> @@ -9,6 +9,8 @@
>  #include <asm/hardware/cache-l2x0.h>
>  #include "hardware.h"
>
> +.arch armv7-a
> +
>  /*
>   * ==================== low level suspend ====================
>   *
> diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile
> index cb106899dd7c..9b9fddb69958 100644
> --- a/arch/arm/mach-mvebu/Makefile
> +++ b/arch/arm/mach-mvebu/Makefile
> @@ -1,9 +1,6 @@
>  # SPDX-License-Identifier: GPL-2.0
>  ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/arch/arm/plat-orion/include
>
> -AFLAGS_coherency_ll.o          := -Wa,-march=armv7-a
> -CFLAGS_pmsu.o                  := -march=armv7-a
> -
>  obj-$(CONFIG_MACH_MVEBU_ANY)    += system-controller.o mvebu-soc-id.o
>
>  ifeq ($(CONFIG_MACH_MVEBU_V7),y)
> diff --git a/arch/arm/mach-mvebu/coherency_ll.S b/arch/arm/mach-mvebu/coherency_ll.S
> index a3a64bf97250..25197290632d 100644
> --- a/arch/arm/mach-mvebu/coherency_ll.S
> +++ b/arch/arm/mach-mvebu/coherency_ll.S
> @@ -23,6 +23,7 @@
>  #include <asm/assembler.h>
>  #include <asm/cp15.h>
>
> +       .arch armv7-a
>         .text
>  /*
>   * Returns the coherency base address in r1 (r0 is untouched), or 0 if
> diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c
> index 73d5d72dfc3e..9a77cc3a10bd 100644
> --- a/arch/arm/mach-mvebu/pmsu.c
> +++ b/arch/arm/mach-mvebu/pmsu.c
> @@ -294,6 +294,7 @@ int armada_370_xp_pmsu_idle_enter(unsigned long deepidle)
>
>         /* Test the CR_C bit and set it if it was cleared */
>         asm volatile(
> +       ".arch  armv7-a\n\t"
>         "mrc    p15, 0, r0, c1, c0, 0 \n\t"
>         "tst    r0, %0 \n\t"
>         "orreq  r0, r0, #(1 << 2) \n\t"
> diff --git a/arch/arm/mach-npcm/Makefile b/arch/arm/mach-npcm/Makefile
> index 8d61fcd42fb1..ac83e1caf2ee 100644
> --- a/arch/arm/mach-npcm/Makefile
> +++ b/arch/arm/mach-npcm/Makefile
> @@ -1,6 +1,4 @@
>  # SPDX-License-Identifier: GPL-2.0-only
> -AFLAGS_headsmp.o               += -march=armv7-a
> -
>  obj-$(CONFIG_ARCH_WPCM450)     += wpcm450.o
>  obj-$(CONFIG_ARCH_NPCM7XX)     += npcm7xx.o
>  obj-$(CONFIG_SMP)              += platsmp.o headsmp.o
> diff --git a/arch/arm/mach-npcm/headsmp.S b/arch/arm/mach-npcm/headsmp.S
> index c083fe09a07b..84d2b6daaf0b 100644
> --- a/arch/arm/mach-npcm/headsmp.S
> +++ b/arch/arm/mach-npcm/headsmp.S
> @@ -6,6 +6,8 @@
>  #include <linux/init.h>
>  #include <asm/assembler.h>
>
> +.arch armv7-a
> +
>  /*
>   * The boot ROM does not start secondary CPUs in SVC mode, so we need to do that
>   * here.
> diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile
> index 3510503bc5e6..71b858c9b10c 100644
> --- a/arch/arm/mm/Makefile
> +++ b/arch/arm/mm/Makefile
> @@ -33,9 +33,6 @@ obj-$(CONFIG_CPU_ABRT_EV5TJ)  += abort-ev5tj.o
>  obj-$(CONFIG_CPU_ABRT_EV6)     += abort-ev6.o
>  obj-$(CONFIG_CPU_ABRT_EV7)     += abort-ev7.o
>
> -AFLAGS_abort-ev6.o     :=-Wa,-march=armv6k
> -AFLAGS_abort-ev7.o     :=-Wa,-march=armv7-a
> -
>  obj-$(CONFIG_CPU_PABRT_LEGACY) += pabort-legacy.o
>  obj-$(CONFIG_CPU_PABRT_V6)     += pabort-v6.o
>  obj-$(CONFIG_CPU_PABRT_V7)     += pabort-v7.o
> @@ -49,10 +46,6 @@ obj-$(CONFIG_CPU_CACHE_FA)   += cache-fa.o
>  obj-$(CONFIG_CPU_CACHE_NOP)    += cache-nop.o
>  obj-$(CONFIG_CPU_CACHE_V7M)    += cache-v7m.o
>
> -AFLAGS_cache-v6.o      :=-Wa,-march=armv6
> -AFLAGS_cache-v7.o      :=-Wa,-march=armv7-a
> -AFLAGS_cache-v7m.o     :=-Wa,-march=armv7-m
> -
>  obj-$(CONFIG_CPU_COPY_V4WT)    += copypage-v4wt.o
>  obj-$(CONFIG_CPU_COPY_V4WB)    += copypage-v4wb.o
>  obj-$(CONFIG_CPU_COPY_FEROCEON)        += copypage-feroceon.o
> @@ -62,8 +55,6 @@ obj-$(CONFIG_CPU_XSCALE)      += copypage-xscale.o
>  obj-$(CONFIG_CPU_XSC3)         += copypage-xsc3.o
>  obj-$(CONFIG_CPU_COPY_FA)      += copypage-fa.o
>
> -CFLAGS_copypage-feroceon.o := -march=armv5te
> -
>  obj-$(CONFIG_CPU_TLB_V4WT)     += tlb-v4.o
>  obj-$(CONFIG_CPU_TLB_V4WB)     += tlb-v4wb.o
>  obj-$(CONFIG_CPU_TLB_V4WBI)    += tlb-v4wbi.o
> @@ -72,9 +63,6 @@ obj-$(CONFIG_CPU_TLB_V6)      += tlb-v6.o
>  obj-$(CONFIG_CPU_TLB_V7)       += tlb-v7.o
>  obj-$(CONFIG_CPU_TLB_FA)       += tlb-fa.o
>
> -AFLAGS_tlb-v6.o                :=-Wa,-march=armv6
> -AFLAGS_tlb-v7.o                :=-Wa,-march=armv7-a
> -
>  obj-$(CONFIG_CPU_ARM7TDMI)     += proc-arm7tdmi.o
>  obj-$(CONFIG_CPU_ARM720T)      += proc-arm720.o
>  obj-$(CONFIG_CPU_ARM740T)      += proc-arm740.o
> @@ -101,9 +89,6 @@ obj-$(CONFIG_CPU_V6K)                += proc-v6.o
>  obj-$(CONFIG_CPU_V7)           += proc-v7.o proc-v7-bugs.o
>  obj-$(CONFIG_CPU_V7M)          += proc-v7m.o
>
> -AFLAGS_proc-v6.o       :=-Wa,-march=armv6
> -AFLAGS_proc-v7.o       :=-Wa,-march=armv7-a
> -
>  obj-$(CONFIG_OUTER_CACHE)      += l2c-common.o
>  obj-$(CONFIG_CACHE_B15_RAC)    += cache-b15-rac.o
>  obj-$(CONFIG_CACHE_FEROCEON_L2)        += cache-feroceon-l2.o
> diff --git a/arch/arm/mm/abort-ev6.S b/arch/arm/mm/abort-ev6.S
> index c58bf8b43fea..836dc1299243 100644
> --- a/arch/arm/mm/abort-ev6.S
> +++ b/arch/arm/mm/abort-ev6.S
> @@ -16,6 +16,7 @@
>   * abort here if the I-TLB and D-TLB aren't seeing the same
>   * picture.  Unfortunately, this does happen.  We live with it.
>   */
> +       .arch   armv6k
>         .align  5
>  ENTRY(v6_early_abort)
>         mrc     p15, 0, r1, c5, c0, 0           @ get FSR
> diff --git a/arch/arm/mm/abort-ev7.S b/arch/arm/mm/abort-ev7.S
> index f81bceacc660..53fb41c24774 100644
> --- a/arch/arm/mm/abort-ev7.S
> +++ b/arch/arm/mm/abort-ev7.S
> @@ -12,6 +12,7 @@
>   *
>   * Purpose : obtain information about current aborted instruction.
>   */
> +       .arch   armv7-a
>         .align  5
>  ENTRY(v7_early_abort)
>         mrc     p15, 0, r1, c5, c0, 0           @ get FSR
> diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S
> index f0f65eb073e4..250c83bf7158 100644
> --- a/arch/arm/mm/cache-v6.S
> +++ b/arch/arm/mm/cache-v6.S
> @@ -19,6 +19,8 @@
>  #define D_CACHE_LINE_SIZE      32
>  #define BTB_FLUSH_SIZE         8
>
> +.arch armv6
> +
>  /*
>   *     v6_flush_icache_all()
>   *
> diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
> index 830bbfb26ca5..29ec2952fe3a 100644
> --- a/arch/arm/mm/cache-v7.S
> +++ b/arch/arm/mm/cache-v7.S
> @@ -16,6 +16,8 @@
>
>  #include "proc-macros.S"
>
> +.arch armv7-a
> +
>  #ifdef CONFIG_CPU_ICACHE_MISMATCH_WORKAROUND
>  .globl icache_size
>         .data
> diff --git a/arch/arm/mm/cache-v7m.S b/arch/arm/mm/cache-v7m.S
> index 1bc3a0a50753..eb60b5e5e2ad 100644
> --- a/arch/arm/mm/cache-v7m.S
> +++ b/arch/arm/mm/cache-v7m.S
> @@ -18,6 +18,8 @@
>
>  #include "proc-macros.S"
>
> +.arch armv7-m
> +
>  /* Generic V7M read/write macros for memory mapped cache operations */
>  .macro v7m_cache_read, rt, reg
>         movw    \rt, #:lower16:BASEADDR_V7M_SCB + \reg
> diff --git a/arch/arm/mm/copypage-feroceon.c b/arch/arm/mm/copypage-feroceon.c
> index 064b19e63571..5fc8ef1e665f 100644
> --- a/arch/arm/mm/copypage-feroceon.c
> +++ b/arch/arm/mm/copypage-feroceon.c
> @@ -15,6 +15,7 @@ static void feroceon_copy_user_page(void *kto, const void *kfrom)
>         int tmp;
>
>         asm volatile ("\
> +.arch  armv5te                                 \n\
>  1:     ldmia   %1!, {r2 - r7, ip, lr}          \n\
>         pld     [%1, #0]                        \n\
>         pld     [%1, #32]                       \n\
> diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
> index a0618f3e6836..203dff89ab1a 100644
> --- a/arch/arm/mm/proc-v6.S
> +++ b/arch/arm/mm/proc-v6.S
> @@ -32,6 +32,8 @@
>  #define TTB_FLAGS_SMP  TTB_RGN_WBWA|TTB_S
>  #define PMD_FLAGS_SMP  PMD_SECT_WBWA|PMD_SECT_S
>
> +.arch armv6
> +
>  ENTRY(cpu_v6_proc_init)
>         ret     lr
>
> diff --git a/arch/arm/mm/proc-v7-2level.S b/arch/arm/mm/proc-v7-2level.S
> index 5db029c8f987..0a3083ad19c2 100644
> --- a/arch/arm/mm/proc-v7-2level.S
> +++ b/arch/arm/mm/proc-v7-2level.S
> @@ -24,6 +24,8 @@
>  #define TTB_FLAGS_SMP  TTB_IRGN_WBWA|TTB_S|TTB_NOS|TTB_RGN_OC_WBWA
>  #define PMD_FLAGS_SMP  PMD_SECT_WBWA|PMD_SECT_S
>
> +.arch armv7-a
> +
>  /*
>   *     cpu_v7_switch_mm(pgd_phys, tsk)
>   *
> diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
> index 26d726a08a34..6b4ef9539b68 100644
> --- a/arch/arm/mm/proc-v7.S
> +++ b/arch/arm/mm/proc-v7.S
> @@ -24,6 +24,8 @@
>  #include "proc-v7-2level.S"
>  #endif
>
> +.arch armv7-a
> +
>  ENTRY(cpu_v7_proc_init)
>         ret     lr
>  ENDPROC(cpu_v7_proc_init)
> diff --git a/arch/arm/mm/tlb-v6.S b/arch/arm/mm/tlb-v6.S
> index 74f4b383afe3..1d91e49b2c2d 100644
> --- a/arch/arm/mm/tlb-v6.S
> +++ b/arch/arm/mm/tlb-v6.S
> @@ -17,6 +17,8 @@
>
>  #define HARVARD_TLB
>
> +.arch armv6
> +
>  /*
>   *     v6wbi_flush_user_tlb_range(start, end, vma)
>   *
> diff --git a/arch/arm/mm/tlb-v7.S b/arch/arm/mm/tlb-v7.S
> index 87bf4ab17721..35fd6d4f0d03 100644
> --- a/arch/arm/mm/tlb-v7.S
> +++ b/arch/arm/mm/tlb-v7.S
> @@ -16,6 +16,8 @@
>  #include <asm/tlbflush.h>
>  #include "proc-macros.S"
>
> +.arch armv7-a
> +
>  /*
>   *     v7wbi_flush_user_tlb_range(start, end, vma)
>   *
> diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile
> index bc7663ed1c25..d1388a748872 100644
> --- a/drivers/memory/Makefile
> +++ b/drivers/memory/Makefile
> @@ -32,8 +32,6 @@ obj-$(CONFIG_FPGA_DFL_EMIF)   += dfl-emif.o
>
>  ti-emif-sram-objs              := ti-emif-pm.o ti-emif-sram-pm.o
>
> -AFLAGS_ti-emif-sram-pm.o       :=-Wa,-march=armv7-a
> -
>  $(obj)/ti-emif-sram-pm.o: $(obj)/ti-emif-asm-offsets.h
>
>  $(obj)/ti-emif-asm-offsets.h: $(obj)/emif-asm-offsets.s FORCE
> diff --git a/drivers/memory/ti-emif-sram-pm.S b/drivers/memory/ti-emif-sram-pm.S
> index d1c83bd5b98e..af2feb251303 100644
> --- a/drivers/memory/ti-emif-sram-pm.S
> +++ b/drivers/memory/ti-emif-sram-pm.S
> @@ -36,6 +36,7 @@
>
>         .arm
>         .align 3
> +       .arch armv7-a
>
>  ENTRY(ti_emif_sram)
>
> --
> 2.29.2
>


-- 
Thanks,
~Nick Desaulniers

Re: [PATCH 14/14] [RFC] ARM: forbid ftrace with clang and thumb2_kernel

[Nick Desaulniers]

On Tue, Sep 28, 2021 at 8:42 AM Arnd Bergmann <arnd@kernel.org> wrote:
>
> From: Arnd Bergmann <arnd@arndb.de>
>
> clang fails to build kernels with THUMB2 and FUNCTION_TRACER
> enabled when there is any inline asm statement containing
> the frame pointer register r7:
>
> arch/arm/mach-versatile/dcscb.c:95:2: error: inline asm clobber list contains reserved registers: R7 [-Werror,-Winline-asm]

^ This file no longer exists in tree?

> arch/arm/mach-exynos/mcpm-exynos.c:154:2: error: inline asm clobber list contains reserved registers: R7 [-Werror,-Winline-asm]
> arch/arm/probes/kprobes/actions-thumb.c:449:3: error: inline asm clobber list contains reserved registers: R7 [-Werror,-Winline-asm]
>
> Apparently gcc should also have warned about this, and the
> configuration is actually invalid, though there is some
> disagreement on the bug trackers about this.
>
> Link: https://bugs.llvm.org/show_bug.cgi?id=45826
> Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94986
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>

> ---
>  arch/arm/Kconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 0d4f3e2d50ad..7ea95bb40004 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -91,7 +91,7 @@ config ARM
>         select HAVE_FAST_GUP if ARM_LPAE
>         select HAVE_FTRACE_MCOUNT_RECORD if !XIP_KERNEL
>         select HAVE_FUNCTION_GRAPH_TRACER if !THUMB2_KERNEL && !CC_IS_CLANG
> -       select HAVE_FUNCTION_TRACER if !XIP_KERNEL
> +       select HAVE_FUNCTION_TRACER if !XIP_KERNEL && !(THUMB2_KERNEL && CC_IS_CLANG)
>         select HAVE_GCC_PLUGINS
>         select HAVE_HW_BREAKPOINT if PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7)
>         select HAVE_IRQ_TIME_ACCOUNTING
> --
> 2.29.2
>
>


-- 
Thanks,
~Nick Desaulniers

Re: [PATCH 13/14] ARM: use .arch directives instead of assembler command line flags

[Arnd Bergmann]

On Tue, Sep 28, 2021 at 7:10 PM Nick Desaulniers
<ndesaulniers@google.com> wrote:
>
> On Tue, Sep 28, 2021 at 8:42 AM Arnd Bergmann <arnd@kernel.org> wrote:
> >
> > From: Nick Desaulniers <ndesaulniers@google.com>
> >
> > Similar to commit a6c30873ee4a ("ARM: 8989/1: use .fpu assembler
> > directives instead of assembler arguments").
> >
> > GCC and GNU binutils support setting the "sub arch" via -march=,
> > -Wa,-march, target function attribute, and .arch assembler directive.
> >
> > Clang's integrated assembler does not support -Wa,-march (and the logic
> > to overrule one when multiple of the above are used), and this can
> > cause annoying warnings such as:
> >
> > clang: warning: argument unused during compilation: '-march=armv6k' [-Wunused-command-line-argument]
> > clang: warning: argument unused during compilation: '-march=armv6k' [-Wunused-command-line-argument]
> > clang: warning: argument unused during compilation: '-march=armv6k' [-Wunused-command-line-argument]
>
> Note, the above lack of support was fixed in clang-13. That said, both
> Clang and GCC defer to -Wa,-march when -march is also present, so
> clang is still correct that -march is ignored.  Thanks for resending;
> this is still helpful for earlier releases of clang that we still
> support.

The -Wunused-command-line-argument warning also caused a build
failure for me when building with 'make W=1', and I think there are
cases where the flags from the command line are contradictory.

Isn't the patch also needed for LTO? All I know is that with this
applied it all builds, but without it I run into link failures. I can dig
more into the specific failures, but overall I think this is the right
thing to do anyway.

       Arnd

Re: [PATCH 02/14] ARM: patch: fix BE32 compilation

[Linus Walleij]

On Tue, Sep 28, 2021 at 5:42 PM Arnd Bergmann <arnd@kernel.org> wrote:

> From: Arnd Bergmann <arnd@arndb.de>
>
> On BE32 kernels, the __opcode_to_mem_thumb32() interface is intentionally
> not defined, but it is referenced whenever runtime patching is enabled
> for the kernel, which may be for ftrace, jump label, kprobes or kgdb:
>
> arch/arm/kernel/patch.c: In function '__patch_text_real':
> arch/arm/kernel/patch.c:94:32: error: implicit declaration of function '__opcode_to_mem_thumb32' [-Werror=implicit-function-declaration]
>    94 |                         insn = __opcode_to_mem_thumb32(insn);
>       |                                ^~~~~~~~~~~~~~~~~~~~~~~
>
> Since BE32 kernels never run Thumb2 code, we never end up using the
> result of this call, so providing an extern declaration without
> a definition makes it build correctly.
>
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Looks good to me!
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Yours,
Linus Walleij

Re: [PATCH 03/14] ARM: remove duplicate memcpy() definition

[Linus Walleij]

On Tue, Sep 28, 2021 at 5:42 PM Arnd Bergmann <arnd@kernel.org> wrote:

> From: Arnd Bergmann <arnd@arndb.de>
>
> Both the decompressor code and the kasan logic try to override
> the memcpy() and memmove()  definitions, which leading to a clash
> in a KASAN-enabled kernel with XZ decompression:
>
> arch/arm/boot/compressed/decompress.c:50:9: error: 'memmove' macro redefined [-Werror,-Wmacro-redefined]
>  #define memmove memmove
>         ^
> arch/arm/include/asm/string.h:59:9: note: previous definition is here
>  #define memmove(dst, src, len) __memmove(dst, src, len)
>         ^
> arch/arm/boot/compressed/decompress.c:51:9: error: 'memcpy' macro redefined [-Werror,-Wmacro-redefined]
>  #define memcpy memcpy
>         ^
> arch/arm/include/asm/string.h:58:9: note: previous definition is here
>  #define memcpy(dst, src, len) __memcpy(dst, src, len)
>         ^
>
> Here we want the set of functions from the decompressor, so undefine
> the other macros before the override.
>
> Fixes: d6d51a96c7d6 ("ARM: 9014/2: Replace string mem* functions for KASan")
> Fixes: a7f464f3db93 ("ARM: 7001/2: Wire up support for the XZ decompressor")
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Solves this, right?
https://lore.kernel.org/lkml/202105091112.F5rmd4By-lkp@intel.com/

Can you put in a reported-by and Link: to this so we got it tracked?

>  #ifdef CONFIG_KERNEL_XZ
> +#undef memmove
>  #define memmove memmove
> +#undef memcpy
>  #define memcpy memcpy
>  #include "../../../../lib/decompress_unxz.c"
>  #endif

That's clever, maybe drop a small comment in the code why we do this
pretty unintuitive looking thing and how this works?

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Yours,
Linus Walleij

Re: [PATCH 12/14] ARM: add CONFIG_PHYS_OFFSET default values

[Linus Walleij]

On Tue, Sep 28, 2021 at 5:42 PM Arnd Bergmann <arnd@kernel.org> wrote:

> From: Arnd Bergmann <arnd@arndb.de>
>
> For platforms that are not yet converted to ARCH_MULTIPLATFORM,
> we can disable CONFIG_ARM_PATCH_PHYS_VIRT, which in turn requires
> setting a correct address here.
>
> As we actualy know what all the values are supposed to be based
> on the old mach/memory.h header file contents (from git history),
> we can just add them here.
>
> This also solves a problem in Kconfig where 'make randconfig'
> fails to continue if no number is selected for a 'hex' option.
> Users can still override the number at configuration time, e.g.
> when the memory visible to the kernel starts at a nonstandard
> address on some machine, but it should no longer be required
> now.
>
> I originally posted this back in 2016, but the problem still
> persists. The patch has gotten much simpler though, as almost
> all platforms rely on ARM_PATCH_PHYS_VIRT now.
>
> Acked-by: Nicolas Pitre <nico@linaro.org>
> Link: https://lore.kernel.org/linux-arm-kernel/1455804123-2526139-5-git-send-email-arnd@arndb.de/
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

BTW thanks for this very nice cleanup patch set!

Yours,
Linus Walleij

Re: [PATCH 01/14] ARM: RiscPC needs older gcc version

[Arnd Bergmann]

On Tue, Sep 28, 2021 at 6:03 PM Arnd Bergmann <arnd@arndb.de> wrote:
>
> On Tue, Sep 28, 2021 at 5:42 PM Arnd Bergmann <arnd@kernel.org> wrote:
>
> > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> > index fc196421b2ce..12a0bd4b315d 100644
> > --- a/arch/arm/Kconfig
> > +++ b/arch/arm/Kconfig
> > @@ -431,7 +431,7 @@ config ARCH_PXA
> >
> >  config ARCH_RPC
> >         bool "RiscPC"
> > -       depends on MMU
>
> This line was a botched rebase, it obviously has to stay here.
>
> > +       depends on !CC_IS_CLANG || GCC_VERSION < 90100

This line is also wrong, it needs to be '&&', not '||'.

        Arnd

Re: [PATCH 13/14] ARM: use .arch directives instead of assembler command line flags

[Nick Desaulniers]

On Tue, Sep 28, 2021 at 11:32 AM Arnd Bergmann <arnd@kernel.org> wrote:
>
> On Tue, Sep 28, 2021 at 7:10 PM Nick Desaulniers
> <ndesaulniers@google.com> wrote:
> >
> > On Tue, Sep 28, 2021 at 8:42 AM Arnd Bergmann <arnd@kernel.org> wrote:
> > >
> > > From: Nick Desaulniers <ndesaulniers@google.com>
> > >
> > > Similar to commit a6c30873ee4a ("ARM: 8989/1: use .fpu assembler
> > > directives instead of assembler arguments").
> > >
> > > GCC and GNU binutils support setting the "sub arch" via -march=,
> > > -Wa,-march, target function attribute, and .arch assembler directive.
> > >
> > > Clang's integrated assembler does not support -Wa,-march (and the logic
> > > to overrule one when multiple of the above are used), and this can
> > > cause annoying warnings such as:
> > >
> > > clang: warning: argument unused during compilation: '-march=armv6k' [-Wunused-command-line-argument]
> > > clang: warning: argument unused during compilation: '-march=armv6k' [-Wunused-command-line-argument]
> > > clang: warning: argument unused during compilation: '-march=armv6k' [-Wunused-command-line-argument]
> >
> > Note, the above lack of support was fixed in clang-13. That said, both
> > Clang and GCC defer to -Wa,-march when -march is also present, so
> > clang is still correct that -march is ignored.  Thanks for resending;
> > this is still helpful for earlier releases of clang that we still
> > support.
>
> The -Wunused-command-line-argument warning also caused a build
> failure for me when building with 'make W=1', and I think there are
> cases where the flags from the command line are contradictory.

There's also -Werror now, which is hurting allmodconfig builds.

> Isn't the patch also needed for LTO? All I know is that with this
> applied it all builds, but without it I run into link failures.

We don't support LTO on 32b ARM, yet.  I would be interested in
getting that support working.

>  I can dig
> more into the specific failures, but overall I think this is the right
> thing to do anyway.

I agree.  I was just adding additional context to the commit message
via my initial reply.
-- 
Thanks,
~Nick Desaulniers

Re: [PATCH 06/14] ARM: disallow CONFIG_THUMB with ARMv4

[Nick Desaulniers]

On Tue, Sep 28, 2021 at 8:42 AM Arnd Bergmann <arnd@kernel.org> wrote:
>
> From: Arnd Bergmann <arnd@arndb.de>
>
> We can currently build a multi-cpu enabled kernel that allows both ARMv4
> and ARMv5 CPUs, and also supports THUMB mode in user space.
>
> However, returning to user space in this configuration with the usr_ret
> macro requires the use of the 'bx' instruction, which is refused by
> the assembler:
>
> arch/arm/kernel/entry-armv.S: Assembler messages:
> arch/arm/kernel/entry-armv.S:937: Error: selected processor does not support `bx lr' in ARM mode
> arch/arm/kernel/entry-armv.S:960: Error: selected processor does not support `bx lr' in ARM mode
> arch/arm/kernel/entry-armv.S:1003: Error: selected processor does not support `bx lr' in ARM mode
> <instantiation>:2:2: note: instruction requires: armv4t
>  bx lr
>
> While it would be possible to handle this correctly in principle, doing so
> seems to not be worth it, if we can simply avoid the problem by enforcing

does `mov pc, lr` work here, with a preprocessor guard on CPU_32v4? Or
better yet...

If `ret` is just an assembler macro
(arch/arm/include/asm/assembler.h#L449), then perhaps always just
using `ret` would be preferable here? In that case, it looks like
`usr_ret` could be outright replaced with just expansions of `ret`?

Just spitballing ideas; like you said, maybe not worth fixing.

> that a kernel supporting both ARMv4 and a later CPU architecture cannot
> run THUMB binaries.
>
> This turned up while build-testing with clang; for some reason,
> gcc never triggered the problem.

I suspect this is a Clang's integrated assembler vs GAS difference
(compiler irrelevant); clang's assembler is more strict that `bx lr`
requires armvt (CPU_32v4T).  Though I can reproduce that exact message
in local testing with GAS:

$ cat foo.s
bx lr
$ arm-linux-gnueabi-as -march=armv4 -c foo.s
foo.s: Assembler messages:
foo.s:1: Error: selected processor does not support `bx lr' in ARM mode
$ arm-linux-gnueabi-as -march=armv4t -c foo.s
$ arm-linux-gnueabi-objdump -dr a.out
...
00000000 <.text>:
   0:   e12fff1e        bx      lr
                        0: R_ARM_V4BX   *ABS*

The `<instantiation>:2:2` makes me think of inline asm.

>
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>

> ---
>  arch/arm/mm/Kconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
> index 82aa990c4180..58afba346729 100644
> --- a/arch/arm/mm/Kconfig
> +++ b/arch/arm/mm/Kconfig
> @@ -675,7 +675,7 @@ config ARM_PV_FIXUP
>
>  config ARM_THUMB
>         bool "Support Thumb user binaries" if !CPU_THUMBONLY && EXPERT
> -       depends on CPU_THUMB_CAPABLE
> +       depends on CPU_THUMB_CAPABLE && !CPU_32v4
>         default y
>         help
>           Say Y if you want to include kernel support for running user space
> --
> 2.29.2
>


-- 
Thanks,
~Nick Desaulniers

Re: [PATCH 06/14] ARM: disallow CONFIG_THUMB with ARMv4

[Ard Biesheuvel]

On Tue, 28 Sept 2021 at 17:42, Arnd Bergmann <arnd@kernel.org> wrote:
>
> From: Arnd Bergmann <arnd@arndb.de>
>
> We can currently build a multi-cpu enabled kernel that allows both ARMv4
> and ARMv5 CPUs, and also supports THUMB mode in user space.
>
> However, returning to user space in this configuration with the usr_ret
> macro requires the use of the 'bx' instruction, which is refused by
> the assembler:
>
> arch/arm/kernel/entry-armv.S: Assembler messages:
> arch/arm/kernel/entry-armv.S:937: Error: selected processor does not support `bx lr' in ARM mode
> arch/arm/kernel/entry-armv.S:960: Error: selected processor does not support `bx lr' in ARM mode
> arch/arm/kernel/entry-armv.S:1003: Error: selected processor does not support `bx lr' in ARM mode
> <instantiation>:2:2: note: instruction requires: armv4t
>  bx lr
>
> While it would be possible to handle this correctly in principle, doing so
> seems to not be worth it, if we can simply avoid the problem by enforcing
> that a kernel supporting both ARMv4 and a later CPU architecture cannot
> run THUMB binaries.
>

I had a quick look, and it seems that the only way to handle this
correctly is to emit the BX instructions, and use code patching to
change them into 'mov pc, <reg>' if the runtime detected CPU is not
Thumb capable. The usual approach (emitting 'tst <reg>, #1; moveq pc,
<reg>; bx lr') is not feasible here, since we run out of space in the
kuser helper slots.

Reviewed-by: Ard Biesheuvel <ardb@kernel.org>

> This turned up while build-testing with clang; for some reason,
> gcc never triggered the problem.
>
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> ---
>  arch/arm/mm/Kconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
> index 82aa990c4180..58afba346729 100644
> --- a/arch/arm/mm/Kconfig
> +++ b/arch/arm/mm/Kconfig
> @@ -675,7 +675,7 @@ config ARM_PV_FIXUP
>
>  config ARM_THUMB
>         bool "Support Thumb user binaries" if !CPU_THUMBONLY && EXPERT
> -       depends on CPU_THUMB_CAPABLE
> +       depends on CPU_THUMB_CAPABLE && !CPU_32v4
>         default y
>         help
>           Say Y if you want to include kernel support for running user space
> --
> 2.29.2
>

Re: [PATCH 13/14] ARM: use .arch directives instead of assembler command line flags

[Nathan Chancellor]

Hi Arnd,

On Tue, Sep 28, 2021 at 05:41:42PM +0200, Arnd Bergmann wrote:
> From: Nick Desaulniers <ndesaulniers@google.com>
> 
> Similar to commit a6c30873ee4a ("ARM: 8989/1: use .fpu assembler
> directives instead of assembler arguments").
> 
> GCC and GNU binutils support setting the "sub arch" via -march=,
> -Wa,-march, target function attribute, and .arch assembler directive.
> 
> Clang's integrated assembler does not support -Wa,-march (and the logic
> to overrule one when multiple of the above are used), and this can
> cause annoying warnings such as:
> 
> clang: warning: argument unused during compilation: '-march=armv6k' [-Wunused-command-line-argument]
> clang: warning: argument unused during compilation: '-march=armv6k' [-Wunused-command-line-argument]
> clang: warning: argument unused during compilation: '-march=armv6k' [-Wunused-command-line-argument]
> 
> Since most assembler is non-conditionally assembled with one sub arch
> (modulo arch/arm/delay-loop.S which conditionally is assembled as armv4
> based on CONFIG_ARCH_RPC, and arch/arm/mach-at91/pm-suspend.S which is
> conditionally assembled as armv7-a based on CONFIG_CPU_V7), prefer the
> .arch assembler directive.
> 
> Link: https://bugs.llvm.org/show_bug.cgi?id=48894
> Link: https://github.com/ClangBuiltLinux/linux/issues/1195
> Suggested-by: Arnd Bergmann <arnd@arndb.de>
> Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
> [arnd] add a few more instances found in compile testing
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Did anything ever come of this patch (or series)? I would like to add
-Werror=unused-command-line-argument to CLANG_FLAGS so that invalid
flags will not cause cascading cc-option failures but we cannot not do
that until this is resolved.

Cheers,
Nathan