From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1423455AbcFHJQS (ORCPT ); Wed, 8 Jun 2016 05:16:18 -0400 Received: from mail-oi0-f45.google.com ([209.85.218.45]:35065 "EHLO mail-oi0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1423278AbcFHJQP convert rfc822-to-8bit (ORCPT ); Wed, 8 Jun 2016 05:16:15 -0400 MIME-Version: 1.0 In-Reply-To: <4af460fea30b60fbb1d621fcb568c5f3b04e1eee.1463172434.git.chunkeey@googlemail.com> References: <4af460fea30b60fbb1d621fcb568c5f3b04e1eee.1463172434.git.chunkeey@googlemail.com> From: Linus Walleij Date: Wed, 8 Jun 2016 11:16:14 +0200 Message-ID: Subject: Re: [PATCH v10 1/2] gpio: mmio: add DT support for memory-mapped GPIOs To: Christian Lamparter Cc: "linux-gpio@vger.kernel.org" , "linux-kernel@vger.kernel.org" , =?UTF-8?B?w4FsdmFybyBGZXJuw6FuZGV6IFJvamFz?= , Alexandre Courbot , Andy Shevchenko , Joachim Eastwood Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, May 13, 2016 at 11:07 PM, Christian Lamparter wrote: > From: Álvaro Fernández Rojas > > This patch adds support for defining memory-mapped GPIOs which > are compatible with the existing gpio-mmio interface. The generic > library provides support for many memory-mapped GPIO controllers > that are found in various on-board FPGA and ASIC solutions that > are used to control board's switches, LEDs, chip-selects, > Ethernet/USB PHY power, etc. > > For setting GPIOs there are three configurations: > 1. single input/output register resource (named "dat"), > 2. set/clear pair (named "set" and "clr"), > 3. single output register resource and single input resource > ("set" and dat"). > > The configuration is detected by which resources are present. > For the single output register, this drives a 1 by setting a bit > and a zero by clearing a bit. For the set clr pair, this drives > a 1 by setting a bit in the set register and clears it by setting > a bit in the clear register. > > For setting the GPIO direction, there are three configurations: > a. simple bidirectional GPIOs that requires no configuration. > b. an output direction register (named "dirout") > where a 1 bit indicates the GPIO is an output. > c. an input direction register (named "dirin") > where a 1 bit indicates the GPIO is an input. > > Reviewed-by: Andy Shevchenko > Signed-off-by: Álvaro Fernández Rojas > Signed-off-by: Christian Lamparter Patch applied with Alex' ACK. Yours, Linus Walleij