From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 84FB5ECAAD2 for ; Sun, 28 Aug 2022 11:36:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229738AbiH1LgP (ORCPT ); Sun, 28 Aug 2022 07:36:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46722 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229500AbiH1LgM (ORCPT ); Sun, 28 Aug 2022 07:36:12 -0400 Received: from mail-ej1-x633.google.com (mail-ej1-x633.google.com [IPv6:2a00:1450:4864:20::633]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6FA684331B for ; Sun, 28 Aug 2022 04:36:10 -0700 (PDT) Received: by mail-ej1-x633.google.com with SMTP id se27so2962928ejb.8 for ; Sun, 28 Aug 2022 04:36:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc; bh=OdQ+Q9qV3LedSJkQfbn2p7WBBrnXUtBV8MUOTrhaEAY=; b=eeBB52Ce3r5kR9Dcp27QVPv61AMhihFpTZYjm3DkOv1VJWc6dejpSJHpOYakb68HeB akvqHdPr6RxF7jBUDq/hyyx8Ub1PLDhFD6VA41pYOF5zCY08yz6bbSY4QqUY2VXPDykb xFjRr29B2z700CCN8O0GJOAN29YA33B1RF54Vhm8aAY9vFQyOy+wSKiEAeTyaOH3wLg7 9l7lsS2WzkLlehfx9n6wRdq4L+5Wo5wLhI8erWLJYJZfl0hatDEgJGjjFdCBmAiP4VBc 7Bw+VqNTkYXGlAKQEd8bkrAKeig8lYdFPvJbEW/TdPfkpxjnjqqmlWSXuOEDhGhWR4Eq zA9g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc; bh=OdQ+Q9qV3LedSJkQfbn2p7WBBrnXUtBV8MUOTrhaEAY=; b=u3IJij/dc9m9sfFaNWXiJpdpxzvybnpoknY/skEOYyOtpUFqXdOMTFeCrhkOTuqZH+ bVeVByVf843qCnVhR42R/+yeSqL5vCkbRoPmfhq6YWIJsWvddepDcI2ocihkbjHIrSoR NfMXeDJzVp/pL2bumKLkeCwKJ38t7AZWS+vAIqd3fC87h3cOVJ6icLxt7lnBvtoKo3OX w06fgOz7wgoVdp+jMeDOyJPVAlFy3n+T1yig9+gHeHd2Yybg9jgrfDKprucDB3MgdZm5 PwFVsgB2eupUon3+9qiTdK0kPsYxnK4SYTejjVDeKrvc7FavONXArb/QwkhaU56kbN07 Uorw== X-Gm-Message-State: ACgBeo0zARgd0ERu7OkhhPG+yGlBFllkAAS4qIb2RgeEYL3kM5o0+wtq rCi4nT2PX8QM4MAxrrDJxUtzcPD5jt1lkN3xDskJFA== X-Google-Smtp-Source: AA6agR7AmPxeYl/v4RcSVBl9iTpUGDHWyRcltexR6tY4uxIhIlTFbByhTuUZ07p3AOXBLqSGuwkccRVfPDLNHQeyuk8= X-Received: by 2002:a17:906:cc5a:b0:741:5240:d91a with SMTP id mm26-20020a170906cc5a00b007415240d91amr3390854ejb.500.1661686568986; Sun, 28 Aug 2022 04:36:08 -0700 (PDT) MIME-Version: 1.0 References: <87f2ff4c-3426-201c-df86-2d06d3587a20@csgroup.eu> <515364a9-33a1-fafa-fdce-dc7dbd5bb7fb@csgroup.eu> In-Reply-To: <515364a9-33a1-fafa-fdce-dc7dbd5bb7fb@csgroup.eu> From: Linus Walleij Date: Sun, 28 Aug 2022 13:35:57 +0200 Message-ID: Subject: Re: [PATCH] gpio: Allow user to customise maximum number of GPIOs To: Christophe Leroy Cc: Arnd Bergmann , Alexandre Courbot , Alexandre Courbot , Bartosz Golaszewski , Jonathan Corbet , Russell King , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" , "H. Peter Anvin" , "open list:GPIO SUBSYSTEM" , "open list:DOCUMENTATION" , open list , "moderated list:ARM PORT" , "open list:GENERIC INCLUDE/ASM HEADER FILES" Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, Aug 28, 2022 at 11:06 AM Christophe Leroy wrote: > And I guess there might be other drivers like that (I found that one > because of its comment mentionning ARCH_NR_GPIOS. Yes there are a bunch of GPIO controllers with fixed base. These only exist because there is boardfile code that uses these fixed GPIO numbers. > Another solution could be to leave first GPIOs for static allocation, > and allocate dynamic ones from 256 or from 512 ? > > Maybe in two steps: > - First step: Allocate dynamic from 256 upwards and add a pr_warn() for > all static allocations. OK that is reasonable. I thought that maybe we could assume the fixed bases to probe first and thus reserve the GPIO bases they want before we get to the dynamically allocated drivers. This could be a good first step. > - Second step later: Allocate dynamic from 0 and forbid static allocation. What needs to happen for doing that 100% safe is to get rid of all board files, mostly in arch/arm/mach* but also elsewhere, or to augment all boardfiles to use descriptor tables instead. But you're right, try the two step approach first. Yours, Linus Walleij