From: Linus Walleij <linus.walleij@linaro.org>
To: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Chen-Yu Tsai <wens@csie.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
Icenowy Zheng <icenowy@aosc.xyz>
Subject: Re: [PATCH 1/3] pinctrl: sunxi: Add pinctrl variants
Date: Mon, 9 Jan 2017 15:42:32 +0100 [thread overview]
Message-ID: <CACRpkdao7X0Ut2hNGpqu_anTKeSB60Vay0MigE35un4i1VceLQ@mail.gmail.com> (raw)
In-Reply-To: <e664022c7ea8177305c5c62676bd64f949caf7ab.1483911013.git-series.maxime.ripard@free-electrons.com>
On Sun, Jan 8, 2017 at 10:31 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> Some SoCs are either supposed to be pin compatible (A10 and A20 for
> example), or are just repackaged versions of the same die (A10s, A13, GR8).
>
> In those case, having a full blown pinctrl driver just introduces
> duplication in both data size and maintainance effort.
>
> Add a variant option to both pins and functions to be able to limit the
> pins and functions described only to a subset of the SoC we support with a
> given driver.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Patch applied.
Yours,
Linus Walleij
next prev parent reply other threads:[~2017-01-09 14:43 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-08 21:31 [PATCH 0/3] pinctrl: sunxi: Support variants Maxime Ripard
2017-01-08 21:31 ` [PATCH 1/3] pinctrl: sunxi: Add pinctrl variants Maxime Ripard
2017-01-09 14:42 ` Linus Walleij [this message]
2017-01-08 21:31 ` [PATCH 2/3] pinctrl: sunxi: Add common sun5i pinctrl driver Maxime Ripard
2017-01-09 14:43 ` Linus Walleij
2017-01-08 21:31 ` [PATCH 3/3] pinctrl: sunxi: Remove old sun5i pinctrl drivers Maxime Ripard
2017-01-09 14:45 ` Linus Walleij
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